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Shailja Thakur

shailja
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https://shailja-thakur.github.io/

AI & ML interests

large language model understanding, security and interpretability, embedded systems

Organizations

None yet

shailja's activity

New activity in shailja/fine-tuned-codegen-16B-Verilog 11 months ago

Hardware requirement for inference

2
#1 opened about 1 year ago by ronghash
New activity in shailja/fine-tuned-codegen-2B-Verilog about 1 year ago

what's the purpose of the model? Is it to help generate verilog design?

3
#1 opened about 1 year ago by StevenGon
New activity in shailja/Verilog_GitHub about 1 year ago

🚩 Report : Legal issue(s)

3
#1 opened about 1 year ago by zhanghongce
New activity in bigcode/starcoderbase over 1 year ago

Difference between starcoderbase and starcoder

4
#10 opened over 1 year ago by shailja
New activity in bigcode/starcoder over 1 year ago

Unable to load model, error

6
#17 opened over 1 year ago by shailja