problem_id
stringlengths 2
16
| folder_path
stringlengths 21
48
|
---|---|
multi_pipe_8bit | Arithmetic/Multiplier/multi_pipe_8bit |
multi_booth_8bit | Arithmetic/Multiplier/multi_booth_8bit |
multi_pipe_4bit | Arithmetic/Multiplier/multi_pipe_4bit |
multi_16bit | Arithmetic/Multiplier/multi_16bit |
div_16bit | Arithmetic/Divider/div_16bit |
radix2_div | Arithmetic/Divider/radix2_div |
adder_pipe_64bit | Arithmetic/Adder/adder_pipe_64bit |
adder_32bit | Arithmetic/Adder/adder_32bit |
adder_16bit | Arithmetic/Adder/adder_16bit |
adder_8bit | Arithmetic/Adder/adder_8bit |
accu | Arithmetic/Accumulator/accu |
fsm | Control/Finite_State_Machine/fsm |
JC_counter | Control/Counter/JC_counter |
counter_12 | Control/Counter/counter_12 |
right_shifter | Memory/Shifter/right_shifter |
asyn_fifo | Memory/FIFO/asyn_fifo |
signal_generator | Miscellaneous/Signal_generation/signal_generator |
edge_detect | Miscellaneous/Others/edge_detect |
calendar | Miscellaneous/Others/calendar |
parallel2serial | Miscellaneous/Others/parallel2serial |
pulse_detect | Miscellaneous/Others/pulse_detect |
traffic_light | Miscellaneous/Others/traffic_light |
width_8to16 | Miscellaneous/Others/width_8to16 |
synchronizer | Miscellaneous/Others/synchronizer |
serial2parallel | Miscellaneous/Others/serial2parallel |
pe | Miscellaneous/RISC-V/pe |
alu | Miscellaneous/RISC-V/alu |
RAM | Miscellaneous/RISC-V/RAM |
freq_div | Miscellaneous/Frequency_divider/freq_div |
Disclaimer: I am not the original author and uploaded this here only for convenience, it only contains the basename of each folder as well as the relative paths to avoid overhead. Please refer to the original repo for any information. https://github.com/hkust-zhiyao/RTLLM
Notice that the risc_cpu
experiment is missing as it was not provided by the authors.
@inproceedings{lu2024rtllm,
author={Lu, Yao and Liu, Shang and Zhang, Qijun and Xie, Zhiyao},
booktitle={2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC)},
title={RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model},
year={2024},
pages={722-727},
organization={IEEE}
}
@inproceedings{liu2024openllm,
title={OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation(Invited)},
author={Liu, Shang and Lu, Yao and Fang, Wenji and Li, Mengming and Xie, Zhiyao},
booktitle={Proceedings of 2024 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)},
year={2024},
organization={ACM}
}
- Downloads last month
- 3