x86
stringlengths 320
36.1M
| arm
stringlengths 334
36.1M
|
|---|---|
.file "100086.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Introducir radio (entero): "
.LC1:
.string "% d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string " La longitud de la circunferencia vale %0.3f \n"
.section .rodata.str1.1
.LC4:
.string "\tPotencia\n "
.section .rodata.str1.8
.align 8
.LC6:
.string " El \303\241rea del c\303\255rculo vale %0.3f \n "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, 20[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
pxor xmm0, xmm0
mov edi, 1
lea rsi, .LC3[rip]
cvtsi2sd xmm0, DWORD PTR 20[rsp]
mulsd xmm0, QWORD PTR .LC2[rip]
mov eax, 1
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
movsd QWORD PTR 8[rsp], xmm0
call __printf_chk@PLT
movsd xmm0, QWORD PTR 8[rsp]
mov edi, 1
lea rsi, .LC4[rip]
mov eax, 1
call __printf_chk@PLT
pxor xmm0, xmm0
mov edi, 1
lea rsi, .LC6[rip]
cvtsi2sd xmm0, DWORD PTR 20[rsp]
mov eax, 1
mulsd xmm0, xmm0
mulsd xmm0, QWORD PTR .LC5[rip]
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L5
xor eax, eax
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long -266631570
.long 1075388921
.align 8
.LC5:
.long -266631570
.long 1074340345
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100086.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Introducir radio (entero): \000"
.align 2
.LC1:
.ascii "% d\000"
.global __aeabi_i2d
.global __aeabi_dmul
.global __aeabi_d2f
.global __aeabi_f2d
.align 2
.LC2:
.ascii " La longitud de la circunferencia vale %0.3f \012\000"
.align 2
.LC3:
.ascii "\011Potencia\012 \000"
.align 2
.LC4:
.ascii " El \303\241rea del c\303\255rculo vale %0.3f \012 "
.ascii "\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L6
sub sp, sp, #12
ldr r1, .L6+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L6+8
bl __isoc99_scanf
ldr r0, [sp]
bl __aeabi_i2d
ldr r2, .L6+12
ldr r3, .L6+16
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r4
mov r3, r5
ldr r1, .L6+20
mov r0, #1
bl __printf_chk
mov r2, r4
mov r3, r5
ldr r1, .L6+24
mov r0, #1
bl __printf_chk
ldr r0, [sp]
bl __aeabi_i2d
mov r2, r0
mov r3, r1
bl __aeabi_dmul
ldr r2, .L6+12
ldr r3, .L6+28
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L6+32
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC5
.word .LC0
.word .LC1
.word -266631570
.word 1075388921
.word .LC2
.word .LC3
.word 1074340345
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100087.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC3:
.string "%d\n"
.text
.p2align 4
.globl root
.type root, @function
root:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rsi
sub rsp, 48
.cfi_def_cfa_offset 80
movsd QWORD PTR 16[rsp], xmm1
movsd QWORD PTR 40[rsp], xmm2
movsd QWORD PTR 8[rsp], xmm0
call rdi
movsd xmm4, QWORD PTR 8[rsp]
movq r12, xmm0
movapd xmm0, xmm4
call rbx
pxor xmm7, xmm7
movsd xmm4, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR 16[rsp]
movapd xmm2, xmm0
movq xmm0, r12
subsd xmm0, xmm2
comisd xmm0, xmm7
jbe .L2
movq rax, xmm4
movapd xmm4, xmm1
movq xmm1, rax
.L2:
movapd xmm3, xmm4
movsd QWORD PTR 32[rsp], xmm4
xor r12d, r12d
addsd xmm3, xmm1
mulsd xmm3, QWORD PTR .LC1[rip]
movsd QWORD PTR 24[rsp], xmm1
movapd xmm0, xmm3
movsd QWORD PTR 8[rsp], xmm3
call rbp
movsd xmm3, QWORD PTR 8[rsp]
movsd QWORD PTR 16[rsp], xmm0
movapd xmm0, xmm3
call rbx
movsd xmm2, QWORD PTR 16[rsp]
movsd xmm3, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR 32[rsp]
subsd xmm2, xmm0
movapd xmm0, xmm2
jmp .L4
.p2align 4,,10
.p2align 3
.L7:
pxor xmm7, xmm7
add r12d, 1
cmpltsd xmm0, xmm7
movapd xmm2, xmm0
andpd xmm1, xmm0
andnpd xmm2, xmm3
andpd xmm3, xmm0
andnpd xmm0, xmm4
movapd xmm4, xmm0
orpd xmm1, xmm2
orpd xmm4, xmm3
movsd QWORD PTR 24[rsp], xmm1
movapd xmm3, xmm4
movsd QWORD PTR 32[rsp], xmm4
addsd xmm3, xmm1
mulsd xmm3, QWORD PTR .LC1[rip]
movapd xmm0, xmm3
movsd QWORD PTR 8[rsp], xmm3
call rbp
movsd xmm3, QWORD PTR 8[rsp]
movsd QWORD PTR 16[rsp], xmm0
movapd xmm0, xmm3
call rbx
movsd xmm2, QWORD PTR 16[rsp]
cmp r12d, 101
movsd xmm3, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR 24[rsp]
movsd xmm4, QWORD PTR 32[rsp]
subsd xmm2, xmm0
movapd xmm0, xmm2
je .L6
.L4:
movapd xmm2, xmm0
andpd xmm2, XMMWORD PTR .LC2[rip]
comisd xmm2, QWORD PTR 40[rsp]
ja .L7
.L6:
mov edx, r12d
mov edi, 1
xor eax, eax
movsd QWORD PTR 8[rsp], xmm3
lea rsi, .LC3[rip]
call __printf_chk@PLT
movsd xmm3, QWORD PTR 8[rsp]
add rsp, 48
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
movapd xmm0, xmm3
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size root, .-root
.section .rodata.str1.1
.LC5:
.string "%lf %lf\n"
.LC9:
.string "%lf\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
movsd xmm2, QWORD PTR .LC4[rip]
movapd xmm0, xmm2
call f2@PLT
mov rax, QWORD PTR .LC4[rip]
movsd QWORD PTR 8[rsp], xmm0
movq xmm0, rax
call f1@PLT
movsd xmm1, QWORD PTR 8[rsp]
mov edi, 1
lea rsi, .LC5[rip]
mov eax, 2
call __printf_chk@PLT
movsd xmm2, QWORD PTR .LC6[rip]
movsd xmm1, QWORD PTR .LC7[rip]
mov rsi, QWORD PTR f2@GOTPCREL[rip]
mov rdi, QWORD PTR f1@GOTPCREL[rip]
movsd xmm0, QWORD PTR .LC8[rip]
call root
mov edi, 1
mov eax, 1
lea rsi, .LC9[rip]
call __printf_chk@PLT
xor eax, eax
add rsp, 24
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE24:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC1:
.long 0
.long 1071644672
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC2:
.long -1
.long 2147483647
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC4:
.long 652835029
.long 1072957489
.align 8
.LC6:
.long -1598689907
.long 1051772663
.align 8
.LC7:
.long 0
.long 1073741824
.align 8
.LC8:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100087.c"
.text
.global __aeabi_dsub
.global __aeabi_dcmpgt
.global __aeabi_dadd
.global __aeabi_dmul
.global __aeabi_dcmplt
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.text
.align 2
.global root
.syntax unified
.arm
.fpu softvfp
.type root, %function
root:
@ args = 16, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r8, r2
mov r9, r3
mov r3, r1
sub sp, sp, #20
mov r2, r0
str r0, [sp, #8]
mov r1, r9
mov r0, r8
mov fp, r3
blx r2
mov r4, r0
mov r5, r1
mov r0, r8
mov r1, r9
blx fp
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
cmp r0, #0
movne r2, r8
movne r3, r9
addne r9, sp, #56
ldmiane r9, {r8-r9}
strne r2, [sp, #56]
strne r3, [sp, #60]
.L2:
add r3, sp, #56
ldmia r3, {r2-r3}
mov r1, r9
mov r0, r8
bl __aeabi_dadd
mov r2, #0
ldr r3, .L16
bl __aeabi_dmul
ldr r3, [sp, #8]
mov r4, r0
mov r5, r1
blx r3
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
blx fp
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r10, #0
stm sp, {r8-r9}
mov r7, r0
mov r6, r1
mov r9, r10
str fp, [sp, #12]
b .L4
.L15:
str r4, [sp, #56]
str r5, [sp, #60]
.L5:
add r3, sp, #56
ldmia r3, {r2-r3}
ldmia sp, {r0-r1}
bl __aeabi_dadd
mov r2, #0
ldr r3, .L16
bl __aeabi_dmul
ldr r3, [sp, #8]
mov r4, r0
mov r5, r1
blx r3
ldr r3, [sp, #12]
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
blx r3
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
add r9, r9, #1
cmp r9, #101
mov r7, r0
mov r6, r1
beq .L6
.L4:
add r3, sp, #64
ldmia r3, {r2-r3}
mov r0, r7
bic r1, r6, #-2147483648
bl __aeabi_dcmpgt
cmp r0, #0
beq .L6
mov r2, #0
mov r3, #0
mov r0, r7
mov r1, r6
bl __aeabi_dcmplt
cmp r0, #0
beq .L15
stm sp, {r4-r5}
b .L5
.L6:
mov r2, r9
ldr r1, .L16+4
mov r0, #1
bl __printf_chk
mov r0, r4
mov r1, r5
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L17:
.align 2
.L16:
.word 1071644672
.word .LC0
.size root, .-root
.section .rodata.str1.4
.align 2
.LC1:
.ascii "%lf %lf\012\000"
.align 2
.LC2:
.ascii "%lf\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r6, .L20
ldr r7, .L20+4
sub sp, sp, #20
mov r0, r6
mov r1, r7
bl f1
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl f2
mov r2, r4
stm sp, {r0-r1}
mov r3, r5
ldr r1, .L20+8
mov r0, #1
bl __printf_chk
mov r2, #0
mov r3, #1073741824
ldr r0, .L20+12
ldr r1, .L20+16
stm sp, {r2-r3}
str r0, [sp, #8]
str r1, [sp, #12]
mov r2, #0
ldr r3, .L20+20
ldr r1, .L20+24
ldr r0, .L20+28
bl root
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L20+32
bl __printf_chk
mov r0, #0
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, pc}
.L21:
.align 2
.L20:
.word 652835029
.word 1072957489
.word .LC1
.word -1598689907
.word 1051772663
.word 1072693248
.word f2
.word f1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1000878.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Input lines:"
.LC1:
.string "The longest line is: \n%s"
.LC2:
.string "The length is: %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rsi, .LC0[rip]
mov edi, 1
xor r13d, r13d
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 2024
.cfi_def_cfa_offset 2064
mov rax, QWORD PTR fs:40
mov QWORD PTR 2008[rsp], rax
xor eax, eax
mov r12, rsp
call __printf_chk@PLT
.p2align 4,,10
.p2align 3
.L3:
mov rbp, r12
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L6:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, -1
je .L8
add ebx, 1
cmp eax, 10
je .L27
mov BYTE PTR 0[rbp], al
add rbp, 1
cmp ebx, 999
jne .L6
mov BYTE PTR 999[rsp], 0
.L12:
cmp r13d, ebx
jge .L3
movzx edx, BYTE PTR [rsp]
mov eax, 1
lea rcx, 1008[rsp]
mov BYTE PTR 1008[rsp], dl
test dl, dl
je .L5
.p2align 4,,10
.p2align 3
.L4:
movzx edx, BYTE PTR [rax+r12]
mov BYTE PTR [rcx+rax], dl
add rax, 1
test dl, dl
jne .L4
.L5:
mov r13d, ebx
jmp .L3
.p2align 4,,10
.p2align 3
.L27:
movsx rax, ebx
mov BYTE PTR 0[rbp], 10
mov BYTE PTR [rsp+rax], 0
jmp .L12
.p2align 4,,10
.p2align 3
.L8:
mov BYTE PTR 0[rbp], 0
test ebx, ebx
jne .L12
test r13d, r13d
je .L11
lea rdx, 1008[rsp]
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov edx, r13d
mov edi, 1
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
.L11:
mov rax, QWORD PTR 2008[rsp]
sub rax, QWORD PTR fs:40
jne .L28
add rsp, 2024
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L28:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.text
.p2align 4
.globl getnxline
.type getnxline, @function
getnxline:
.LFB24:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea ebp, -1[rsi]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
test ebp, ebp
jle .L34
mov rbx, rdi
xor r12d, r12d
jmp .L31
.p2align 4,,10
.p2align 3
.L40:
add rbx, 1
add r12d, 1
mov rdi, rbx
cmp eax, 10
je .L39
mov BYTE PTR [rdx], al
cmp ebp, r12d
je .L30
.L31:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
mov rdx, rbx
cmp eax, -1
jne .L40
mov rdi, rbx
.L30:
mov BYTE PTR [rdi], 0
mov eax, r12d
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L39:
.cfi_restore_state
mov BYTE PTR [rdx], 10
mov eax, r12d
mov BYTE PTR [rdi], 0
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L34:
.cfi_restore_state
xor r12d, r12d
jmp .L30
.cfi_endproc
.LFE24:
.size getnxline, .-getnxline
.p2align 4
.globl copy
.type copy, @function
copy:
.LFB25:
.cfi_startproc
endbr64
movzx eax, BYTE PTR [rsi]
mov BYTE PTR [rdi], al
test al, al
je .L41
mov eax, 1
.p2align 4,,10
.p2align 3
.L43:
movzx edx, BYTE PTR [rsi+rax]
mov BYTE PTR [rdi+rax], dl
add rax, 1
test dl, dl
jne .L43
.L41:
ret
.cfi_endproc
.LFE25:
.size copy, .-copy
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1000878.c"
.text
.align 2
.global getnxline
.syntax unified
.arm
.fpu softvfp
.type getnxline, %function
getnxline:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #1
push {r4, r5, r6, r7, r8, lr}
mov r4, r0
ble .L6
mov r5, #0
ldr r7, .L15
sub r6, r1, #1
b .L3
.L14:
cmp r0, #10
add r5, r5, #1
add r4, r4, #1
beq .L13
cmp r6, r5
strb r0, [r3]
beq .L2
.L3:
ldr r0, [r7]
bl getc
cmn r0, #1
mov r3, r4
bne .L14
.L2:
mov r3, #0
mov r0, r5
strb r3, [r4]
pop {r4, r5, r6, r7, r8, pc}
.L13:
strb r0, [r3]
b .L2
.L6:
mov r5, #0
b .L2
.L16:
.align 2
.L15:
.word stdin
.size getnxline, .-getnxline
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Input lines:\000"
.align 2
.LC1:
.ascii "The longest line is: \012%s\000"
.align 2
.LC2:
.ascii "The length is: %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 2008
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L36
sub sp, sp, #2000
sub sp, sp, #8
ldr r1, .L36+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #2004]
mov r3,#0
mov r4, #0
bl __printf_chk
b .L19
.L22:
cmp r4, r0
blt .L34
.L19:
mov r1, #1000
add r0, sp, #4
bl getnxline
cmp r0, #0
bgt .L22
cmp r4, #0
beq .L23
ldr r1, .L36+8
add r2, sp, #1004
mov r0, #1
bl __printf_chk
mov r2, r4
mov r0, #1
ldr r1, .L36+12
bl __printf_chk
.L23:
ldr r3, .L36
ldr r2, [r3]
ldr r3, [sp, #2004]
eors r2, r3, r2
mov r3, #0
bne .L35
mov r0, #0
add sp, sp, #2000
add sp, sp, #8
@ sp needed
pop {r4, pc}
.L34:
ldrb r3, [sp, #4] @ zero_extendqisi2
cmp r3, #0
strb r3, [sp, #1004]
beq .L20
add r1, sp, #4
add r2, sp, #1004
.L21:
ldrb r3, [r1, #1]! @ zero_extendqisi2
cmp r3, #0
strb r3, [r2, #1]!
bne .L21
.L20:
mov r4, r0
b .L19
.L35:
bl __stack_chk_fail
.L37:
.align 2
.L36:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.text
.align 2
.global copy
.syntax unified
.arm
.fpu softvfp
.type copy, %function
copy:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldrb r3, [r1] @ zero_extendqisi2
cmp r3, #0
strb r3, [r0]
bxeq lr
.L40:
ldrb r3, [r1, #1]! @ zero_extendqisi2
cmp r3, #0
strb r3, [r0, #1]!
bne .L40
bx lr
.size copy, .-copy
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "10009.c"
.intel_syntax noprefix
.text
.p2align 4
.globl ackermann
.type ackermann, @function
ackermann:
.LFB39:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
movsx rax, edi
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13d, edx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
lea rbp, [rcx+rax*8]
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
movsx rbx, esi
sal rbx, 2
sub rsp, 24
.cfi_def_cfa_offset 64
mov rdx, QWORD PTR 0[rbp]
add rdx, rbx
mov eax, DWORD PTR [rdx]
cmp eax, -1
jne .L1
test edi, edi
jne .L3
add esi, 1
mov ecx, esi
sar ecx, 31
shr ecx, 17
lea eax, [rsi+rcx]
and eax, 32767
sub eax, ecx
mov DWORD PTR [rdx], eax
.L1:
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L3:
.cfi_restore_state
lea r14d, -1[rdi]
test esi, esi
jne .L5
mov edx, r13d
mov esi, r13d
mov edi, r14d
call ackermann
add rbx, QWORD PTR 0[rbp]
mov rdx, rbx
mov DWORD PTR [rdx], eax
jmp .L1
.p2align 4,,10
.p2align 3
.L5:
sub esi, 1
mov edx, r13d
mov QWORD PTR 8[rsp], rcx
call ackermann
mov rcx, QWORD PTR 8[rsp]
mov edx, r13d
mov edi, r14d
mov esi, eax
call ackermann
add rbx, QWORD PTR 0[rbp]
mov rdx, rbx
mov DWORD PTR [rdx], eax
jmp .L1
.cfi_endproc
.LFE39:
.size ackermann, .-ackermann
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "ackermann(4, 1, %d) = %d\n"
.LC1:
.string "Found it! Try $7 = %d.\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB40:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edi, 40
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
call malloc@PLT
mov r12, rax
mov r14, rax
lea rbp, 40[rax]
mov rbx, rax
.L9:
mov edi, 131072
add rbx, 8
call malloc@PLT
mov QWORD PTR -8[rbx], rax
cmp rbp, rbx
jne .L9
mov r13d, 1
lea r15, .LC0[rip]
.L10:
mov rbx, r12
.L11:
mov rdi, QWORD PTR [rbx]
mov edx, 131072
mov esi, 255
add rbx, 8
call memset@PLT
cmp rbp, rbx
jne .L11
mov rcx, r12
mov edx, r13d
mov esi, 1
mov edi, 4
call ackermann
mov edx, r13d
mov rsi, r15
mov edi, 1
mov ebx, eax
mov ecx, eax
xor eax, eax
call __printf_chk@PLT
cmp ebx, 6
je .L22
add r13d, 1
cmp r13d, 32768
jne .L10
.L14:
mov rdi, QWORD PTR [r14]
add r14, 8
call free@PLT
cmp rbp, r14
jne .L14
mov rdi, r12
call free@PLT
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L22:
.cfi_restore_state
mov edx, r13d
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L14
.cfi_endproc
.LFE40:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "10009.c"
.text
.align 2
.global ackermann
.syntax unified
.arm
.fpu softvfp
.type ackermann, %function
ackermann:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr lr, [r3, r0, lsl #2]
ldr ip, [lr, r1, lsl #2]
add lr, lr, r1, lsl #2
cmn ip, #1
bne .L1
cmp r0, #0
mov r4, r0
bne .L3
add r1, r1, #1
add ip, ip, #32768
rsbs r3, r1, #0
and r3, r3, ip
and ip, ip, r1
rsbpl ip, r3, #0
.L4:
str ip, [lr]
.L1:
mov r0, ip
pop {r4, r5, r6, r7, r8, pc}
.L3:
cmp r1, #0
mov r5, r3
mov r8, r2
lsl r6, r1, #2
sub r7, r0, #1
bne .L5
mov r1, r2
mov r0, r7
bl ackermann
ldr lr, [r5, r4, lsl #2]
mov ip, r0
add lr, lr, r6
b .L4
.L5:
sub r1, r1, #1
bl ackermann
mov r3, r5
mov r1, r0
mov r2, r8
mov r0, r7
bl ackermann
ldr lr, [r5, r4, lsl #2]
mov ip, r0
add lr, lr, r6
b .L4
.size ackermann, .-ackermann
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "ackermann(4, 1, %d) = %d\012\000"
.align 2
.LC1:
.ascii "Found it! Try $7 = %d.\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r0, #20
bl malloc
sub r7, r0, #4
mov r6, r0
mov r4, r7
add r5, r0, #16
.L9:
mov r0, #131072
bl malloc
str r0, [r4, #4]!
cmp r4, r5
bne .L9
mov r9, #1
mvn r4, #0
ldr r8, .L26
.L10:
mov r2, r7
.L15:
ldr r3, [r2, #4]!
add r1, r3, #130048
add r1, r1, #1020
sub r3, r3, #4
.L11:
str r4, [r3, #4]!
cmp r1, r3
bne .L11
cmp r2, r5
bne .L15
mov r3, r6
mov r2, r9
mov r1, #1
mov r0, #4
bl ackermann
mov r10, r0
mov r3, r0
mov r2, r9
mov r1, r8
mov r0, #1
bl __printf_chk
cmp r10, #6
beq .L24
add r9, r9, #1
cmp r9, #32768
bne .L10
.L16:
ldr r0, [r7, #4]!
bl free
cmp r7, r5
bne .L16
.L25:
mov r0, r6
bl free
mov r0, #0
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L24:
mov r2, r9
ldr r1, .L26+4
mov r0, #1
bl __printf_chk
ldr r0, [r7, #4]!
bl free
cmp r7, r5
bne .L16
b .L25
.L27:
.align 2
.L26:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100090.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%d %d %d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC0[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
lea rsi, -60[rbp]
push r13
push r12
push rbx
sub rsp, 40
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
call __isoc99_scanf@PLT
movsx rax, DWORD PTR -60[rbp]
mov rcx, rsp
mov rsi, rax
lea rax, 15[0+rax*4]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L3
.L19:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L19
.L3:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L20
.L4:
lea r13, 3[rsp]
mov rax, r13
and r13, -4
shr rax, 2
mov QWORD PTR -72[rbp], rax
test esi, esi
jle .L5
mov rbx, r13
mov r12, r13
lea r14, .LC0[rip]
xor r15d, r15d
.p2align 4,,10
.p2align 3
.L6:
mov rsi, r12
mov rdi, r14
xor eax, eax
add r15d, 1
call __isoc99_scanf@PLT
mov esi, DWORD PTR -60[rbp]
add r12, 4
cmp esi, r15d
jg .L6
test esi, esi
jle .L5
movsx r8, esi
xor edi, edi
.p2align 4,,10
.p2align 3
.L9:
mov rax, rdi
.p2align 4,,10
.p2align 3
.L8:
mov edx, DWORD PTR [rbx]
mov ecx, DWORD PTR 0[r13+rax*4]
cmp edx, ecx
jle .L7
mov DWORD PTR [rbx], ecx
mov DWORD PTR 0[r13+rax*4], edx
.L7:
add rax, 1
cmp esi, eax
jg .L8
add rdi, 1
add rbx, 4
cmp rdi, r8
jne .L9
.L5:
mov eax, esi
lea edx, -1[rsi]
mov edi, 1
shr eax, 31
movsx rdx, edx
add esi, eax
mov r8d, DWORD PTR 0[r13+rdx*4]
sar esi
movsx rax, esi
lea rsi, .LC1[rip]
mov ecx, DWORD PTR 0[r13+rax*4]
mov rax, QWORD PTR -72[rbp]
mov edx, DWORD PTR 0[0+rax*4]
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L21
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L20:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L4
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100090.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%d %d %d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #16
ldr r3, .L14
ldr r0, .L14+4
sub r1, fp, #28
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
bl __isoc99_scanf
ldr lr, [fp, #-28]
lsl r3, lr, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
cmp lr, #0
add r4, sp, #8
ble .L2
mov r6, r4
mov r5, #0
ldr r7, .L14+4
.L3:
mov r1, r6
mov r0, r7
bl __isoc99_scanf
ldr lr, [fp, #-28]
add r5, r5, #1
cmp lr, r5
add r6, r6, #4
bgt .L3
cmp lr, #0
ble .L2
mov r5, #0
sub ip, r4, #4
.L6:
mov r2, ip
mov r3, r5
.L5:
ldr r1, [ip, #4]
ldr r0, [r2, #4]!
add r3, r3, #1
cmp r1, r0
strgt r0, [ip, #4]
strgt r1, [r2]
cmp lr, r3
bgt .L5
add r5, r5, #1
cmp lr, r5
add ip, ip, #4
bne .L6
.L2:
add r3, lr, lr, lsr #31
sub lr, lr, #1
ldr r1, [r4, lr, lsl #2]
asr r3, r3, #1
ldr r3, [r4, r3, lsl #2]
ldr r2, [r4]
mov r0, #1
str r1, [sp]
ldr r1, .L14+8
bl __printf_chk
ldr r3, .L14
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
bne .L13
mov r0, #0
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L13:
bl __stack_chk_fail
.L15:
.align 2
.L14:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1000916.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Usage:"
.LC1:
.string " %s [options]\n"
.LC2:
.string "Options"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string " -w, --warning\t\twarning threshold (in bytes)"
.align 8
.LC4:
.string " -c, --critical\t\tcriticalthreshold (in bytes)"
.align 8
.LC5:
.string " -W, --Warning\t\twarning threshold (in percent)"
.align 8
.LC6:
.string " -C, --Critical\t\tcriticalthreshold (in percent)"
.align 8
.LC7:
.string " -v, --verbose\t\tverbose output"
.align 8
.LC8:
.string " -h, --help\t\tdisplay this help text"
.align 8
.LC9:
.string " -V, --version\t\toutput version information"
.text
.p2align 4
.globl print_help
.type print_help, @function
print_help:
.LFB50:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rdi
lea rdi, .LC0[rip]
call puts@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov edi, 10
call putchar@PLT
lea rdi, .LC2[rip]
call puts@PLT
lea rdi, .LC3[rip]
call puts@PLT
lea rdi, .LC4[rip]
call puts@PLT
lea rdi, .LC5[rip]
call puts@PLT
lea rdi, .LC6[rip]
call puts@PLT
lea rdi, .LC7[rip]
call puts@PLT
mov edi, 10
call putchar@PLT
lea rdi, .LC8[rip]
call puts@PLT
lea rdi, .LC9[rip]
pop r12
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE50:
.size print_help, .-print_help
.section .rodata.str1.1
.LC10:
.string "0.1.1"
.LC11:
.string "check_meminfo (%s)\n"
.text
.p2align 4
.globl print_version
.type print_version, @function
print_version:
.LFB51:
.cfi_startproc
endbr64
lea rdx, .LC10[rip]
lea rsi, .LC11[rip]
mov edi, 1
xor eax, eax
jmp __printf_chk@PLT
.cfi_endproc
.LFE51:
.size print_version, .-print_version
.section .rodata.str1.1
.LC12:
.string "%s\n"
.text
.p2align 4
.globl print_error
.type print_error, @function
print_error:
.LFB52:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rdx, .LC12[rip]
mov esi, 1
xor eax, eax
sub rsp, 8
.cfi_def_cfa_offset 16
mov rcx, rdi
mov rdi, QWORD PTR stderr[rip]
call __fprintf_chk@PLT
mov edi, 3
call exit@PLT
.cfi_endproc
.LFE52:
.size print_error, .-print_error
.section .rodata.str1.1
.LC15:
.string "%.2lf TB"
.LC18:
.string "%.2lf GB"
.LC21:
.string "%.2lf MB"
.LC24:
.string "%.2lf kB"
.LC25:
.string "%.2lf B"
.text
.p2align 4
.globl make_human_readable
.type make_human_readable, @function
make_human_readable:
.LFB53:
.cfi_startproc
endbr64
pxor xmm0, xmm0
cvtsi2sd xmm0, rsi
comisd xmm0, QWORD PTR .LC13[rip]
ja .L24
comisd xmm0, QWORD PTR .LC16[rip]
ja .L25
comisd xmm0, QWORD PTR .LC19[rip]
ja .L26
comisd xmm0, QWORD PTR .LC22[rip]
jbe .L23
mulsd xmm0, QWORD PTR .LC23[rip]
mov esi, 1
mov eax, 1
mov rdx, -1
lea rcx, .LC24[rip]
jmp __sprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L25:
mulsd xmm0, QWORD PTR .LC17[rip]
mov esi, 1
mov eax, 1
mov rdx, -1
lea rcx, .LC18[rip]
jmp __sprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L24:
mulsd xmm0, QWORD PTR .LC14[rip]
mov esi, 1
mov eax, 1
mov rdx, -1
lea rcx, .LC15[rip]
jmp __sprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L23:
lea rcx, .LC25[rip]
mov esi, 1
mov eax, 1
mov rdx, -1
jmp __sprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L26:
mulsd xmm0, QWORD PTR .LC20[rip]
mov esi, 1
mov eax, 1
mov rdx, -1
lea rcx, .LC21[rip]
jmp __sprintf_chk@PLT
.cfi_endproc
.LFE53:
.size make_human_readable, .-make_human_readable
.section .rodata.str1.1
.LC26:
.string "--help"
.LC27:
.string "--version"
.LC28:
.string "--warning"
.section .rodata.str1.8
.align 8
.LC29:
.string "you have to provide a value for warning"
.section .rodata.str1.1
.LC30:
.string "--critical"
.section .rodata.str1.8
.align 8
.LC31:
.string "you have to provide a value for critical"
.section .rodata.str1.1
.LC32:
.string "-W"
.LC33:
.string "--Warning"
.section .rodata.str1.8
.align 8
.LC34:
.string "you have to provide a value for Warning"
.section .rodata.str1.1
.LC35:
.string "-C"
.LC36:
.string "--Critical"
.section .rodata.str1.8
.align 8
.LC37:
.string "you have to provide a value for Critical"
.section .rodata.str1.1
.LC38:
.string "-v"
.LC39:
.string "--verbose"
.LC40:
.string "Variables:"
.LC41:
.string " - verbose:\ton"
.LC42:
.string " - warning:\t%ld\n"
.LC43:
.string " - critical:\t%ld\n"
.LC44:
.string " - Warning:\t%d\n"
.LC45:
.string " - Critical\t%d\n"
.section .rodata.str1.8
.align 8
.LC46:
.string "critical must be smaller then warning"
.align 8
.LC47:
.string "Warning can't be smaler then 0 or greater then 100"
.align 8
.LC48:
.string "Critical can't be smaler then 0 or greater then 100"
.section .rodata.str1.1
.LC49:
.string "fopen PROGFS_MEMINFO"
.LC50:
.string "r"
.LC51:
.string "/proc/meminfo"
.section .rodata.str1.8
.align 8
.LC52:
.string "fopen() (PROGFS_MEMINFO) failed"
.section .rodata.str1.1
.LC53:
.string "MemTotal:%ldkB"
.LC54:
.string "MemFree:%ldkB"
.LC55:
.string "Buffers:%ldkB"
.LC56:
.string "Cached:%ldkB"
.LC57:
.string "SwapTotal:%ldkB"
.LC58:
.string "SwapFree:%ldkB"
.LC59:
.string "fclose PROGFS_MEMINFO"
.LC60:
.string "No memory? quitting..\n"
.LC62:
.string "Variables"
.LC63:
.string " - memtotal:\t%ld\n"
.LC64:
.string " - memfree\t%ld\n"
.LC65:
.string " - membuffer\t%ld\n"
.LC66:
.string " - memcached\t%ld\n"
.LC67:
.string " - swaptotal\t%ld\n"
.LC68:
.string " - swapfree\t%ld\n"
.LC69:
.string "Calculated variables"
.LC70:
.string " - memused\t%ld\n"
.LC71:
.string " - swapused\t%ld\n"
.LC72:
.string " - memavailable\t%ld\n"
.LC73:
.string " - memavailable_percent\t%f\n"
.LC74:
.string "Thresholds"
.LC75:
.string " - warning\t%ld\n"
.LC76:
.string " - critical\t%ld\n"
.section .rodata.str1.8
.align 8
.LC77:
.string "%s - Free: %4.2f %% (%s) |memavailable=%ldB;%ld;%ld;0.0, memtotal=%ld;0.0;0.0;0.0; memused=%ld;0.0;0.0;0.0; membuffer=%ld;0.0;0.0;0.0; memcached=%ld;0.0;0.0;0.0; swaptotal=%ld;0.0;0.0;0.0; swapused=%ld;0.0;0.0;0.0;\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB54:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 408
.cfi_def_cfa_offset 464
mov rax, QWORD PTR fs:40
mov QWORD PTR 392[rsp], rax
xor eax, eax
mov BYTE PTR 104[rsp], 0
movabs rax, 20070800100049239
mov QWORD PTR 105[rsp], rax
movabs rax, 5494747002594480707
mov QWORD PTR 96[rsp], 19279
mov BYTE PTR 113[rsp], 0
mov QWORD PTR 114[rsp], rax
mov BYTE PTR 122[rsp], 0
mov QWORD PTR 48[rsp], 0
mov QWORD PTR 56[rsp], 0
mov QWORD PTR 64[rsp], 0
mov QWORD PTR 72[rsp], 0
mov QWORD PTR 80[rsp], 0
mov QWORD PTR 88[rsp], 0
cmp edi, 1
jle .L73
mov rax, QWORD PTR [rsi]
or rbp, -1
xor r14d, r14d
mov r12d, edi
mov QWORD PTR [rsp], rbp
mov rbx, rsi
lea r15d, -1[rdi]
lea r13, .LC26[rip]
mov QWORD PTR 40[rsp], rax
mov ebp, r14d
mov DWORD PTR 24[rsp], 0
mov DWORD PTR 28[rsp], -1
mov DWORD PTR 20[rsp], -1
mov QWORD PTR 8[rsp], -1
jmp .L50
.p2align 4,,10
.p2align 3
.L137:
cmp BYTE PTR 1[r14], 119
jne .L83
cmp BYTE PTR 2[r14], 0
jne .L83
.L36:
cmp r15d, ebp
jle .L135
mov rdi, QWORD PTR 8[rbx+r9]
mov edx, 10
xor esi, esi
add ebp, 1
call strtol@PLT
cdqe
mov QWORD PTR [rsp], rax
.L39:
add ebp, 1
cmp r12d, ebp
jle .L136
.L50:
movsx rax, ebp
mov r14, QWORD PTR [rbx+rax*8]
lea r9, 0[0+rax*8]
movzx eax, BYTE PTR [r14]
cmp eax, 45
jne .L81
cmp BYTE PTR 1[r14], 104
jne .L81
cmp BYTE PTR 2[r14], 0
je .L30
.L81:
mov ecx, 7
mov rsi, r14
mov rdi, r13
repz cmpsb
seta dl
sbb dl, 0
test dl, dl
je .L30
cmp eax, 45
jne .L82
cmp BYTE PTR 1[r14], 86
jne .L82
cmp BYTE PTR 2[r14], 0
je .L33
.L82:
mov ecx, 10
mov rsi, r14
lea rdi, .LC27[rip]
repz cmpsb
seta dl
sbb dl, 0
test dl, dl
je .L33
cmp eax, 45
je .L137
.L83:
mov ecx, 10
mov rsi, r14
lea rdi, .LC28[rip]
repz cmpsb
seta dl
sbb dl, 0
test dl, dl
je .L36
cmp eax, 45
jne .L84
cmp BYTE PTR 1[r14], 99
je .L138
.L84:
lea rsi, .LC30[rip]
mov rdi, r14
mov QWORD PTR 32[rsp], r9
call strcmp@PLT
mov r9, QWORD PTR 32[rsp]
test eax, eax
jne .L42
.L41:
cmp r15d, ebp
jle .L139
mov rdi, QWORD PTR 8[rbx+r9]
mov edx, 10
xor esi, esi
add ebp, 1
add ebp, 1
call strtol@PLT
cdqe
mov QWORD PTR 8[rsp], rax
cmp r12d, ebp
jg .L50
.L136:
cmp DWORD PTR 24[rsp], 0
mov rbp, QWORD PTR [rsp]
je .L51
lea rdi, .LC40[rip]
call puts@PLT
lea rdi, .LC41[rip]
call puts@PLT
mov rdx, rbp
mov edi, 1
xor eax, eax
lea rsi, .LC42[rip]
call __printf_chk@PLT
mov rdx, QWORD PTR 8[rsp]
lea rsi, .LC43[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov edx, DWORD PTR 20[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC44[rip]
call __printf_chk@PLT
mov edx, DWORD PTR 28[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC45[rip]
call __printf_chk@PLT
.L51:
mov rbx, QWORD PTR 8[rsp]
cmp rbx, -1
setne dl
cmp rbp, -1
setne al
test dl, al
je .L52
cmp rbp, rbx
jge .L52
.L53:
lea rdi, .LC46[rip]
call print_error
.L42:
lea rsi, .LC32[rip]
mov rdi, r14
mov QWORD PTR 32[rsp], r9
call strcmp@PLT
mov r9, QWORD PTR 32[rsp]
test eax, eax
jne .L140
.L44:
cmp r15d, ebp
jle .L141
mov rdi, QWORD PTR 8[rbx+r9]
mov edx, 10
xor esi, esi
add ebp, 1
call strtol@PLT
mov DWORD PTR 20[rsp], eax
jmp .L39
.L138:
cmp BYTE PTR 2[r14], 0
je .L41
jmp .L84
.L73:
mov DWORD PTR 24[rsp], 0
or rbp, -1
mov DWORD PTR 28[rsp], -1
mov DWORD PTR 20[rsp], -1
mov QWORD PTR 8[rsp], -1
.L28:
mov eax, DWORD PTR 28[rsp]
add eax, 1
cmp eax, 101
ja .L142
cmp DWORD PTR 24[rsp], 0
jne .L143
.L56:
lea rsi, .LC50[rip]
lea rdi, .LC51[rip]
call fopen@PLT
lea rbx, 128[rsp]
lea r13, 48[rsp]
mov r12, rax
test rax, rax
je .L144
.p2align 4,,10
.p2align 3
.L57:
mov rdx, r12
mov esi, 127
mov rdi, rbx
call fgets@PLT
test rax, rax
je .L145
xor eax, eax
mov rdx, r13
lea rsi, .LC53[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L58
sal QWORD PTR 48[rsp], 10
jmp .L57
.L30:
mov rdi, QWORD PTR 40[rsp]
call print_help
xor edi, edi
call exit@PLT
.L140:
lea rsi, .LC33[rip]
mov rdi, r14
call strcmp@PLT
mov r9, QWORD PTR 32[rsp]
test eax, eax
je .L44
lea rsi, .LC35[rip]
mov rdi, r14
mov QWORD PTR 32[rsp], r9
call strcmp@PLT
mov r9, QWORD PTR 32[rsp]
test eax, eax
je .L47
lea rsi, .LC36[rip]
mov rdi, r14
call strcmp@PLT
mov r9, QWORD PTR 32[rsp]
test eax, eax
je .L47
lea rsi, .LC38[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
je .L74
lea rsi, .LC39[rip]
mov rdi, r14
call strcmp@PLT
test eax, eax
mov eax, 1
cmovne eax, DWORD PTR 24[rsp]
mov DWORD PTR 24[rsp], eax
jmp .L39
.L142:
lea rdi, .LC48[rip]
call print_error
.L47:
cmp r15d, ebp
jle .L146
mov rdi, QWORD PTR 8[rbx+r9]
mov edx, 10
xor esi, esi
add ebp, 1
call strtol@PLT
mov DWORD PTR 28[rsp], eax
jmp .L39
.L58:
xor eax, eax
lea rdx, 56[rsp]
lea rsi, .LC54[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L60
sal QWORD PTR 56[rsp], 10
jmp .L57
.L33:
mov edi, 1
lea rdx, .LC10[rip]
lea rsi, .LC11[rip]
xor eax, eax
call __printf_chk@PLT
xor edi, edi
call exit@PLT
.L145:
mov rdi, r12
call fclose@PLT
cmp DWORD PTR 24[rsp], 0
jne .L147
.L65:
mov rcx, QWORD PTR 48[rsp]
test rcx, rcx
je .L148
mov r15, QWORD PTR 64[rsp]
pxor xmm1, xmm1
pxor xmm0, xmm0
mov r12, rcx
add r15, QWORD PTR 72[rsp]
cvtsi2sd xmm0, rcx
add r15, QWORD PTR 56[rsp]
cvtsi2sd xmm1, r15
sub r12, QWORD PTR 56[rsp]
mov r13, QWORD PTR 80[rsp]
sub r12, QWORD PTR 64[rsp]
sub r13, QWORD PTR 88[rsp]
sub r12, QWORD PTR 72[rsp]
cmp DWORD PTR 24[rsp], 0
divsd xmm1, xmm0
mulsd xmm1, QWORD PTR .LC61[rip]
movsd QWORD PTR [rsp], xmm1
jne .L149
.L67:
movsx rax, DWORD PTR 20[rsp]
mov esi, 100
mov r9, rbp
mov rbx, QWORD PTR 8[rsp]
imul rax, rcx
mov r14, rbx
cqo
idiv rsi
cmp rax, rbp
cmovge r9, rax
movsx rax, DWORD PTR 28[rsp]
imul rax, rcx
cqo
idiv rsi
cmp rax, rbx
cmovge r14, rax
cmp r9, -1
jne .L68
xor r9d, r9d
.L68:
cmp r14, -1
jne .L69
xor r14d, r14d
.L69:
cmp DWORD PTR 24[rsp], 0
jne .L150
.L70:
mov ebp, 2
cmp r14, r15
jl .L151
.L71:
lea rbx, 256[rsp]
mov rsi, r15
mov QWORD PTR 8[rsp], r9
mov rdi, rbx
call make_human_readable
movsx rax, ebp
mov edi, 1
mov r8, r15
lea rax, [rax+rax*8]
mov rcx, rbx
lea rsi, .LC77[rip]
lea rdx, 96[rsp+rax]
push rax
.cfi_def_cfa_offset 472
mov eax, 1
push r13
.cfi_def_cfa_offset 480
push QWORD PTR 96[rsp]
.cfi_def_cfa_offset 488
push QWORD PTR 96[rsp]
.cfi_def_cfa_offset 496
push QWORD PTR 96[rsp]
.cfi_def_cfa_offset 504
push r12
.cfi_def_cfa_offset 512
push QWORD PTR 96[rsp]
.cfi_def_cfa_offset 520
push r14
.cfi_def_cfa_offset 528
mov r9, QWORD PTR 72[rsp]
movsd xmm0, QWORD PTR 64[rsp]
call __printf_chk@PLT
add rsp, 64
.cfi_def_cfa_offset 464
mov edi, ebp
call exit@PLT
.L60:
xor eax, eax
lea rdx, 64[rsp]
lea rsi, .LC55[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L61
sal QWORD PTR 64[rsp], 10
jmp .L57
.L52:
mov ebx, DWORD PTR 28[rsp]
mov ecx, DWORD PTR 20[rsp]
cmp ebx, -1
setne dl
cmp ecx, -1
setne al
test dl, al
je .L80
cmp ecx, ebx
jl .L53
.L80:
mov eax, DWORD PTR 20[rsp]
add eax, 1
cmp eax, 101
jbe .L28
lea rdi, .LC47[rip]
call print_error
.L135:
lea rdi, .LC29[rip]
call print_error
.L143:
lea rdi, .LC49[rip]
call puts@PLT
jmp .L56
.L151:
xor ebp, ebp
cmp r9, r15
setge bpl
jmp .L71
.L147:
lea rdi, .LC59[rip]
call puts@PLT
jmp .L65
.L148:
mov rcx, QWORD PTR stderr[rip]
mov edx, 22
mov esi, 1
lea rdi, .LC60[rip]
call fwrite@PLT
mov edi, 3
call exit@PLT
.L61:
xor eax, eax
lea rdx, 72[rsp]
lea rsi, .LC56[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L62
sal QWORD PTR 72[rsp], 10
jmp .L57
.L149:
lea rdi, .LC62[rip]
call puts@PLT
mov rdx, QWORD PTR 48[rsp]
lea rsi, .LC63[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdx, QWORD PTR 56[rsp]
lea rsi, .LC64[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdx, QWORD PTR 64[rsp]
lea rsi, .LC65[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdx, QWORD PTR 72[rsp]
lea rsi, .LC66[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdx, QWORD PTR 80[rsp]
lea rsi, .LC67[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdx, QWORD PTR 88[rsp]
lea rsi, .LC68[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
lea rdi, .LC69[rip]
call puts@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC70[rip]
call __printf_chk@PLT
mov rdx, r13
mov edi, 1
xor eax, eax
lea rsi, .LC71[rip]
call __printf_chk@PLT
mov rdx, r15
mov edi, 1
xor eax, eax
lea rsi, .LC72[rip]
call __printf_chk@PLT
movsd xmm0, QWORD PTR [rsp]
mov edi, 1
lea rsi, .LC73[rip]
mov eax, 1
call __printf_chk@PLT
mov rcx, QWORD PTR 48[rsp]
jmp .L67
.L150:
lea rdi, .LC74[rip]
mov QWORD PTR 8[rsp], r9
call puts@PLT
mov r9, QWORD PTR 8[rsp]
lea rsi, .LC75[rip]
xor eax, eax
mov edi, 1
mov rdx, r9
call __printf_chk@PLT
mov rdx, r14
mov edi, 1
xor eax, eax
lea rsi, .LC76[rip]
call __printf_chk@PLT
mov r9, QWORD PTR 8[rsp]
jmp .L70
.L144:
lea rdi, .LC52[rip]
call perror@PLT
mov edi, 3
call exit@PLT
.L139:
lea rdi, .LC31[rip]
call print_error
.L62:
xor eax, eax
lea rdx, 80[rsp]
lea rsi, .LC57[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L63
sal QWORD PTR 80[rsp], 10
jmp .L57
.L74:
mov DWORD PTR 24[rsp], 1
jmp .L39
.L141:
lea rdi, .LC34[rip]
call print_error
.L63:
xor eax, eax
lea rdx, 88[rsp]
lea rsi, .LC58[rip]
mov rdi, rbx
call __isoc99_sscanf@PLT
test eax, eax
je .L57
sal QWORD PTR 88[rsp], 10
jmp .L57
.L146:
lea rdi, .LC37[rip]
call print_error
.cfi_endproc
.LFE54:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC13:
.long 0
.long 1114636288
.align 8
.LC14:
.long 0
.long 1030750208
.align 8
.LC16:
.long 0
.long 1104150528
.align 8
.LC17:
.long 0
.long 1041235968
.align 8
.LC19:
.long 0
.long 1093664768
.align 8
.LC20:
.long 0
.long 1051721728
.align 8
.LC22:
.long 0
.long 1083179008
.align 8
.LC23:
.long 0
.long 1062207488
.align 8
.LC61:
.long 0
.long 1079574528
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1000916.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "Usage:\000"
.align 2
.LC2:
.ascii " %s [options]\012\000"
.align 2
.LC3:
.ascii "Options\000"
.align 2
.LC4:
.ascii " -w, --warning\011\011warning threshold (in bytes)\000"
.align 2
.LC5:
.ascii " -c, --critical\011\011criticalthreshold (in bytes)"
.ascii "\000"
.align 2
.LC6:
.ascii " -W, --Warning\011\011warning threshold (in percent"
.ascii ")\000"
.align 2
.LC7:
.ascii " -C, --Critical\011\011criticalthreshold (in percen"
.ascii "t)\000"
.align 2
.LC8:
.ascii " -v, --verbose\011\011verbose output\000"
.align 2
.LC9:
.ascii " -h, --help\011\011display this help text\000"
.align 2
.LC10:
.ascii " -V, --version\011\011output version information\000"
.text
.align 2
.global print_help
.syntax unified
.arm
.fpu softvfp
.type print_help, %function
print_help:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r0, .L4
bl puts
mov r2, r4
ldr r1, .L4+4
mov r0, #1
bl __printf_chk
mov r0, #10
bl putchar
ldr r0, .L4+8
bl puts
ldr r0, .L4+12
bl puts
ldr r0, .L4+16
bl puts
ldr r0, .L4+20
bl puts
ldr r0, .L4+24
bl puts
ldr r0, .L4+28
bl puts
mov r0, #10
bl putchar
ldr r0, .L4+32
bl puts
pop {r4, lr}
ldr r0, .L4+36
b puts
.L5:
.align 2
.L4:
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.size print_help, .-print_help
.section .rodata.str1.4
.align 2
.LC11:
.ascii "0.1.1\000"
.align 2
.LC12:
.ascii "check_meminfo (%s)\012\000"
.text
.align 2
.global print_version
.syntax unified
.arm
.fpu softvfp
.type print_version, %function
print_version:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #1
ldr r2, .L7
ldr r1, .L7+4
b __printf_chk
.L8:
.align 2
.L7:
.word .LC11
.word .LC12
.size print_version, .-print_version
.section .rodata.str1.4
.align 2
.LC13:
.ascii "%s\012\000"
.text
.align 2
.global print_error
.syntax unified
.arm
.fpu softvfp
.type print_error, %function
print_error:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r2, .L11
mov r3, r0
mov r1, #1
ldr r0, [r2]
push {r4, lr}
ldr r2, .L11+4
bl __fprintf_chk
mov r0, #3
bl exit
.L12:
.align 2
.L11:
.word stderr
.word .LC13
.size print_error, .-print_error
.global __aeabi_i2d
.section .rodata.str1.4
.align 2
.LC14:
.ascii "%.2lf GB\000"
.global __aeabi_dmul
.align 2
.LC15:
.ascii "%.2lf MB\000"
.align 2
.LC16:
.ascii "%.2lf kB\000"
.align 2
.LC17:
.ascii "%.2lf B\000"
.text
.align 2
.global make_human_readable
.syntax unified
.arm
.fpu softvfp
.type make_human_readable, %function
make_human_readable:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
mov r4, r1
mov r5, r0
sub sp, sp, #12
mov r0, r1
bl __aeabi_i2d
cmp r4, #1073741824
bgt .L20
cmp r4, #1048576
bgt .L21
cmp r4, #1024
ble .L17
ldr r3, .L22
mov r2, #0
bl __aeabi_dmul
ldr r3, .L22+4
.L19:
stm sp, {r0-r1}
mvn r2, #0
mov r0, r5
mov r1, #1
bl __sprintf_chk
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L21:
ldr r3, .L22+8
mov r2, #0
bl __aeabi_dmul
ldr r3, .L22+12
b .L19
.L20:
ldr r3, .L22+16
mov r2, #0
bl __aeabi_dmul
ldr r3, .L22+20
b .L19
.L17:
mov r2, r0
mov r3, r1
mov r0, r5
stm sp, {r2-r3}
mov r1, #1
mvn r2, #0
ldr r3, .L22+24
bl __sprintf_chk
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L23:
.align 2
.L22:
.word 1062207488
.word .LC16
.word 1051721728
.word .LC15
.word 1041235968
.word .LC14
.word .LC17
.size make_human_readable, .-make_human_readable
.section .rodata.str1.4
.align 2
.LC18:
.ascii "--help\000"
.align 2
.LC19:
.ascii "--version\000"
.align 2
.LC20:
.ascii "--warning\000"
.align 2
.LC21:
.ascii "you have to provide a value for warning\000"
.align 2
.LC22:
.ascii "--critical\000"
.align 2
.LC23:
.ascii "you have to provide a value for critical\000"
.align 2
.LC24:
.ascii "-W\000"
.align 2
.LC25:
.ascii "--Warning\000"
.align 2
.LC26:
.ascii "you have to provide a value for Warning\000"
.align 2
.LC27:
.ascii "-C\000"
.align 2
.LC28:
.ascii "--Critical\000"
.align 2
.LC29:
.ascii "you have to provide a value for Critical\000"
.align 2
.LC30:
.ascii "-v\000"
.align 2
.LC31:
.ascii "--verbose\000"
.align 2
.LC32:
.ascii "Variables:\000"
.align 2
.LC33:
.ascii " - verbose:\011on\000"
.align 2
.LC34:
.ascii " - warning:\011%ld\012\000"
.align 2
.LC35:
.ascii " - critical:\011%ld\012\000"
.align 2
.LC36:
.ascii " - Warning:\011%d\012\000"
.align 2
.LC37:
.ascii " - Critical\011%d\012\000"
.align 2
.LC38:
.ascii "critical must be smaller then warning\000"
.align 2
.LC39:
.ascii "Warning can't be smaler then 0 or greater then 100\000"
.align 2
.LC40:
.ascii "Critical can't be smaler then 0 or greater then 100"
.ascii "\000"
.align 2
.LC41:
.ascii "fopen PROGFS_MEMINFO\000"
.align 2
.LC42:
.ascii "r\000"
.align 2
.LC43:
.ascii "/proc/meminfo\000"
.align 2
.LC44:
.ascii "fopen() (PROGFS_MEMINFO) failed\000"
.align 2
.LC45:
.ascii "MemTotal:%ldkB\000"
.align 2
.LC46:
.ascii "MemFree:%ldkB\000"
.align 2
.LC47:
.ascii "Buffers:%ldkB\000"
.align 2
.LC48:
.ascii "Cached:%ldkB\000"
.align 2
.LC49:
.ascii "SwapTotal:%ldkB\000"
.align 2
.LC50:
.ascii "SwapFree:%ldkB\000"
.align 2
.LC51:
.ascii "fclose PROGFS_MEMINFO\000"
.align 2
.LC52:
.ascii "No memory? quitting..\012\000"
.global __aeabi_ddiv
.align 2
.LC53:
.ascii "Variables\000"
.align 2
.LC54:
.ascii " - memtotal:\011%ld\012\000"
.align 2
.LC55:
.ascii " - memfree\011%ld\012\000"
.align 2
.LC56:
.ascii " - membuffer\011%ld\012\000"
.align 2
.LC57:
.ascii " - memcached\011%ld\012\000"
.align 2
.LC58:
.ascii " - swaptotal\011%ld\012\000"
.align 2
.LC59:
.ascii " - swapfree\011%ld\012\000"
.align 2
.LC60:
.ascii "Calculated variables\000"
.align 2
.LC61:
.ascii " - memused\011%ld\012\000"
.align 2
.LC62:
.ascii " - swapused\011%ld\012\000"
.align 2
.LC63:
.ascii " - memavailable\011%ld\012\000"
.align 2
.LC64:
.ascii " - memavailable_percent\011%f\012\000"
.align 2
.LC65:
.ascii "Thresholds\000"
.align 2
.LC66:
.ascii " - warning\011%ld\012\000"
.align 2
.LC67:
.ascii " - critical\011%ld\012\000"
.align 2
.LC68:
.ascii "%s - Free: %4.2f %% (%s) |memavailable=%ldB;%ld;%ld"
.ascii ";0.0, memtotal=%ld;0.0;0.0;0.0; memused=%ld;0.0;0.0"
.ascii ";0.0; membuffer=%ld;0.0;0.0;0.0; memcached=%ld;0.0;"
.ascii "0.0;0.0; swaptotal=%ld;0.0;0.0;0.0; swapused=%ld;0."
.ascii "0;0.0;0.0;\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC69:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 344
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, #0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r4, .L136
sub sp, sp, #396
add lr, sp, #104
mov r6, r0
mov r7, r1
cmp r0, #1
ldmia r4!, {r0, r1, r2, r3}
stmia lr!, {r0, r1, r2, r3}
ldm r4, {r0, r1, r2}
stmia lr!, {r0, r1}
lsr r3, r2, #16
strh r2, [lr], #2 @ movhi
ldr r2, .L136+4
ldr r2, [r2]
str r2, [sp, #388]
mov r2,#0
strb r3, [lr]
str ip, [sp, #80]
str ip, [sp, #84]
str ip, [sp, #88]
str ip, [sp, #92]
str ip, [sp, #96]
str ip, [sp, #100]
ble .L69
mvn r3, #0
str r3, [sp, #68]
str r3, [sp, #60]
str r3, [sp, #56]
str r3, [sp, #52]
ldr r3, [r7]
mov fp, ip
ldr r9, .L136+8
ldr r10, .L136+12
str ip, [sp, #64]
str r3, [sp, #72]
b .L47
.L122:
ldrb r1, [r8, #1] @ zero_extendqisi2
cmp r1, #119
bne .L78
ldrb r1, [r8, #2] @ zero_extendqisi2
cmp r1, #0
bne .L78
.L33:
sub r2, r6, #1
cmp r2, fp
ble .L120
add r5, r7, r5
mov r2, #10
mov r1, #0
ldr r0, [r5, #4]
bl strtol
add fp, fp, #1
str r0, [sp, #52]
.L36:
add fp, fp, #1
cmp r6, fp
ble .L121
.L47:
ldr r8, [r7, fp, lsl #2]
lsl r5, fp, #2
ldrb r4, [r8] @ zero_extendqisi2
cmp r4, #45
bne .L76
ldrb r1, [r8, #1] @ zero_extendqisi2
cmp r1, #104
bne .L76
ldrb r1, [r8, #2] @ zero_extendqisi2
cmp r1, #0
beq .L27
.L76:
mov r1, r9
mov r0, r8
bl strcmp
cmp r0, #0
beq .L27
cmp r4, #45
bne .L77
ldrb r1, [r8, #1] @ zero_extendqisi2
cmp r1, #86
bne .L77
ldrb r1, [r8, #2] @ zero_extendqisi2
cmp r1, #0
beq .L30
.L77:
mov r1, r10
mov r0, r8
bl strcmp
cmp r0, #0
beq .L30
cmp r4, #45
beq .L122
.L78:
mov r0, r8
ldr r1, .L136+16
bl strcmp
cmp r0, #0
beq .L33
cmp r4, #45
bne .L79
ldrb r1, [r8, #1] @ zero_extendqisi2
cmp r1, #99
beq .L123
.L79:
mov r0, r8
ldr r1, .L136+20
bl strcmp
cmp r0, #0
bne .L39
.L38:
sub r2, r6, #1
cmp r2, fp
ble .L124
add r5, r7, r5
mov r2, #10
mov r1, #0
ldr r0, [r5, #4]
bl strtol
add fp, fp, #1
add fp, fp, #1
cmp r6, fp
str r0, [sp, #56]
bgt .L47
.L121:
ldr r3, [sp, #64]
cmp r3, #0
beq .L48
ldr r0, .L136+24
bl puts
ldr r0, .L136+28
bl puts
ldr r2, [sp, #52]
ldr r1, .L136+32
mov r0, #1
bl __printf_chk
ldr r2, [sp, #56]
ldr r1, .L136+36
mov r0, #1
bl __printf_chk
ldr r2, [sp, #60]
ldr r1, .L136+40
mov r0, #1
bl __printf_chk
mov r0, #1
ldr r2, [sp, #68]
ldr r1, .L136+44
bl __printf_chk
.L48:
ldr r2, [sp, #52]
ldr r1, [sp, #56]
cmn r2, #1
cmnne r1, #1
movne r3, #1
moveq r3, #0
cmp r2, r1
movge r3, #0
andlt r3, r3, #1
cmp r3, #0
beq .L49
.L50:
ldr r0, .L136+48
bl print_error
.L39:
mov r0, r8
ldr r1, .L136+52
bl strcmp
cmp r0, #0
bne .L125
.L41:
sub r2, r6, #1
cmp r2, fp
ble .L126
add r5, r7, r5
mov r2, #10
mov r1, #0
ldr r0, [r5, #4]
bl strtol
add fp, fp, #1
str r0, [sp, #60]
b .L36
.L123:
ldrb r1, [r8, #2] @ zero_extendqisi2
cmp r1, #0
beq .L38
b .L79
.L69:
mvn r3, #0
str ip, [sp, #64]
str r3, [sp, #68]
str r3, [sp, #60]
str r3, [sp, #56]
str r3, [sp, #52]
.L25:
ldr r3, [sp, #68]
add r3, r3, #1
cmp r3, #101
bhi .L127
ldr r3, [sp, #64]
cmp r3, #0
bne .L128
.L52:
ldr r1, .L136+56
ldr r0, .L136+60
bl fopen
subs r4, r0, #0
beq .L118
ldr r5, .L136+64
ldr r6, .L136+68
ldr r7, .L136+72
.L53:
mov r2, r4
mov r1, #127
add r0, sp, #132
bl fgets
cmp r0, #0
beq .L129
mov r1, r5
add r2, sp, #80
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
beq .L54
ldr r3, [sp, #80]
lsl r3, r3, #10
str r3, [sp, #80]
b .L53
.L27:
ldr r0, [sp, #72]
bl print_help
mov r0, #0
bl exit
.L125:
mov r0, r8
ldr r1, .L136+76
bl strcmp
cmp r0, #0
beq .L41
mov r0, r8
ldr r1, .L136+80
bl strcmp
cmp r0, #0
beq .L44
mov r0, r8
ldr r1, .L136+84
bl strcmp
cmp r0, #0
beq .L44
mov r0, r8
ldr r1, .L136+88
bl strcmp
cmp r0, #0
moveq r3, #1
streq r3, [sp, #64]
beq .L36
mov r0, r8
ldr r1, .L136+92
bl strcmp
cmp r0, #0
ldr r3, [sp, #64]
moveq r3, #1
str r3, [sp, #64]
b .L36
.L127:
ldr r0, .L136+96
bl print_error
.L44:
sub r2, r6, #1
cmp r2, fp
ble .L130
add r5, r7, r5
mov r2, #10
mov r1, #0
ldr r0, [r5, #4]
bl strtol
add fp, fp, #1
str r0, [sp, #68]
b .L36
.L54:
mov r1, r6
add r2, sp, #84
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
beq .L56
ldr r3, [sp, #84]
lsl r3, r3, #10
str r3, [sp, #84]
b .L53
.L30:
mov r0, #1
ldr r2, .L136+100
ldr r1, .L136+104
bl __printf_chk
mov r0, #0
bl exit
.L129:
mov r0, r4
bl fclose
ldr r3, [sp, #64]
cmp r3, #0
bne .L131
.L61:
ldr r4, [sp, #80]
cmp r4, #0
beq .L132
ldr r2, [sp, #92]
ldr r1, [sp, #88]
ldr r3, [sp, #84]
add r9, r1, r2
add r9, r9, r3
sub r5, r4, r3
ldr r10, [sp, #96]
ldr r3, [sp, #100]
sub r5, r5, r1
mov r0, r9
sub r5, r5, r2
sub r10, r10, r3
bl __aeabi_i2d
mov r6, r0
mov r0, r4
mov r7, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
ldr r3, .L136+108
mov r2, #0
bl __aeabi_dmul
ldr r3, [sp, #64]
str r0, [sp, #72]
str r1, [sp, #76]
cmp r3, #0
bne .L133
.L63:
ldr r3, [sp, #68]
ldr r0, [sp, #60]
mul r3, r4, r3
mul r0, r4, r0
mov r4, r3
ldr ip, .L136+112
asr r1, r0, #31
smull r2, r3, r4, ip
smull r6, r7, r0, ip
asr r4, r4, #31
ldr r0, [sp, #52]
rsb r4, r4, r3, asr #5
rsb r1, r1, r7, asr #5
ldr r3, [sp, #56]
cmp r1, r0
movge r8, r1
movlt r8, r0
cmp r4, r3
movlt r4, r3
cmn r8, #1
ldr r3, [sp, #64]
moveq r8, #0
cmn r4, #1
moveq r4, #0
cmp r3, #0
bne .L134
.L66:
cmp r4, r9
movge r6, #2
blt .L135
.L67:
add r7, sp, #260
mov r0, r7
mov r1, r9
bl make_human_readable
ldr r3, [sp, #80]
ldr r0, [sp, #92]
ldr r1, [sp, #88]
ldr ip, [sp, #96]
str r3, [sp, #24]
add r2, r6, r6, lsl #3
add r3, sp, #104
str r5, [sp, #28]
str r4, [sp, #20]
str r0, [sp, #36]
str r1, [sp, #32]
add r5, sp, #72
ldmia r5, {r4-r5}
mov r0, #1
stm sp, {r4-r5}
ldr r1, .L136+116
str r7, [sp, #8]
str r10, [sp, #44]
str r8, [sp, #16]
str r9, [sp, #12]
str ip, [sp, #40]
add r2, r3, r2
bl __printf_chk
mov r0, r6
bl exit
.L56:
mov r1, r7
add r2, sp, #88
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
beq .L57
ldr r3, [sp, #88]
lsl r3, r3, #10
str r3, [sp, #88]
b .L53
.L49:
ldr r2, [sp, #60]
ldr r1, [sp, #68]
cmn r2, #1
cmnne r1, #1
movne r3, #1
moveq r3, #0
cmp r2, r1
movge r3, #0
andlt r3, r3, #1
cmp r3, #0
bne .L50
add r3, r2, #1
cmp r3, #101
bls .L25
ldr r0, .L136+120
bl print_error
.L120:
ldr r0, .L136+124
bl print_error
.L128:
ldr r0, .L136+128
bl puts
b .L52
.L135:
cmp r8, r9
movlt r6, #0
movge r6, #1
b .L67
.L132:
ldr r3, .L136+132
mov r2, #22
mov r1, #1
ldr r3, [r3]
ldr r0, .L136+136
bl fwrite
mov r0, #3
bl exit
.L131:
ldr r0, .L136+140
bl puts
b .L61
.L57:
ldr r1, .L136+144
add r2, sp, #92
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
beq .L58
ldr r3, [sp, #92]
lsl r3, r3, #10
str r3, [sp, #92]
b .L53
.L134:
ldr r0, .L136+148
bl puts
mov r2, r8
ldr r1, .L136+152
mov r0, #1
bl __printf_chk
mov r2, r4
ldr r1, .L136+156
mov r0, #1
bl __printf_chk
b .L66
.L133:
ldr r0, .L136+160
bl puts
ldr r2, [sp, #80]
ldr r1, .L136+164
mov r0, #1
bl __printf_chk
ldr r2, [sp, #84]
ldr r1, .L136+168
mov r0, #1
bl __printf_chk
ldr r2, [sp, #88]
ldr r1, .L136+172
mov r0, #1
bl __printf_chk
ldr r2, [sp, #92]
ldr r1, .L136+176
mov r0, #1
bl __printf_chk
ldr r2, [sp, #96]
ldr r1, .L136+180
mov r0, #1
bl __printf_chk
ldr r2, [sp, #100]
ldr r1, .L136+184
mov r0, #1
bl __printf_chk
ldr r0, .L136+188
bl puts
mov r2, r5
ldr r1, .L136+192
mov r0, #1
bl __printf_chk
mov r2, r10
ldr r1, .L136+196
mov r0, #1
bl __printf_chk
mov r2, r9
ldr r1, .L136+200
mov r0, #1
bl __printf_chk
add r3, sp, #72
ldmia r3, {r2-r3}
mov r0, #1
ldr r1, .L136+204
bl __printf_chk
ldr r4, [sp, #80]
b .L63
.L118:
ldr r0, .L136+208
bl perror
mov r0, #3
bl exit
.L124:
ldr r0, .L136+212
bl print_error
.L58:
ldr r1, .L136+216
add r2, sp, #96
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
beq .L59
ldr r3, [sp, #96]
lsl r3, r3, #10
str r3, [sp, #96]
b .L53
.L126:
ldr r0, .L136+220
bl print_error
.L59:
ldr r1, .L136+224
add r2, sp, #100
add r0, sp, #132
bl __isoc99_sscanf
cmp r0, #0
ldrne r3, [sp, #100]
lslne r3, r3, #10
strne r3, [sp, #100]
b .L53
.L130:
ldr r0, .L136+228
bl print_error
.L137:
.align 2
.L136:
.word .LANCHOR0
.word .LC69
.word .LC18
.word .LC19
.word .LC20
.word .LC22
.word .LC32
.word .LC33
.word .LC34
.word .LC35
.word .LC36
.word .LC37
.word .LC38
.word .LC24
.word .LC42
.word .LC43
.word .LC45
.word .LC46
.word .LC47
.word .LC25
.word .LC27
.word .LC28
.word .LC30
.word .LC31
.word .LC40
.word .LC11
.word .LC12
.word 1079574528
.word 1374389535
.word .LC68
.word .LC39
.word .LC21
.word .LC41
.word stderr
.word .LC52
.word .LC51
.word .LC48
.word .LC65
.word .LC66
.word .LC67
.word .LC53
.word .LC54
.word .LC55
.word .LC56
.word .LC57
.word .LC58
.word .LC59
.word .LC60
.word .LC61
.word .LC62
.word .LC63
.word .LC64
.word .LC44
.word .LC23
.word .LC49
.word .LC26
.word .LC50
.word .LC29
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC0:
.ascii "OK\000"
.space 6
.ascii "WARNING\000"
.space 1
.ascii "CRITICAL\000"
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1000923.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rbp, .LC0[rip]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 32
.p2align 4,,10
.p2align 3
.L2:
mov edx, ebx
mov rsi, rbp
mov edi, 1
xor eax, eax
imul edx, ebx
add ebx, 1
call __printf_chk@PLT
cmp ebx, 10
jne .L2
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1000923.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, #0
ldr r5, .L6
.L2:
mul r2, r4, r4
mov r1, r5
mov r0, #1
add r4, r4, #1
bl __printf_chk
cmp r4, #10
bne .L2
mov r0, #0
pop {r4, r5, r6, pc}
.L7:
.align 2
.L6:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100094.c"
.intel_syntax noprefix
.text
.p2align 4
.globl addlist
.type addlist, @function
addlist:
.LFB0:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
xor eax, eax
mov ebx, edi
call getlist@PLT
cmp eax, -1
je .L1
movsx rcx, eax
lea rdx, list[rip]
mov DWORD PTR [rdx+rcx*4], ebx
mov ecx, DWORD PTR pre_index[rip]
cmp ecx, -1
je .L8
lea esi, 2[rcx]
movsx rsi, esi
mov DWORD PTR [rdx+rsi*4], eax
lea esi, 1[rax]
movsx rsi, esi
mov DWORD PTR [rdx+rsi*4], ecx
.L8:
mov DWORD PTR pre_index[rip], eax
xor eax, eax
.L1:
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE0:
.size addlist, .-addlist
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100094.c"
.text
.align 2
.global addlist
.syntax unified
.arm
.fpu softvfp
.type addlist, %function
addlist:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
bl getlist
cmn r0, #1
popeq {r4, pc}
ldr r1, .L9
ldr r3, .L9+4
ldr r2, [r1]
str r4, [r3, r0, lsl #2]
cmn r2, #1
strne r0, [r1]
addne ip, r2, #2
addne r1, r0, #1
strne r0, [r3, ip, lsl #2]
streq r0, [r1]
strne r2, [r3, r1, lsl #2]
moveq r0, #0
movne r0, #0
pop {r4, pc}
.L10:
.align 2
.L9:
.word pre_index
.word list
.size addlist, .-addlist
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100095.c"
.intel_syntax noprefix
.text
.p2align 4
.globl cmpsize
.type cmpsize, @function
cmpsize:
.LFB65:
.cfi_startproc
endbr64
mov rax, QWORD PTR [rsi]
sub eax, DWORD PTR [rdi]
ret
.cfi_endproc
.LFE65:
.size cmpsize, .-cmpsize
.p2align 4
.globl cmppair
.type cmppair, @function
cmppair:
.LFB66:
.cfi_startproc
endbr64
movsd xmm1, QWORD PTR 8[rdi]
movsd xmm0, QWORD PTR 8[rsi]
xor eax, eax
comisd xmm0, xmm1
seta al
xor edx, edx
comisd xmm1, xmm0
seta dl
sub eax, edx
ret
.cfi_endproc
.LFE66:
.size cmppair, .-cmppair
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "the_stack_data/100095.c"
.LC1:
.string "i < p->i"
.text
.p2align 4
.type vec_seq_idx.part.0, @function
vec_seq_idx.part.0:
.LFB135:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call __assert_fail@PLT
.cfi_endproc
.LFE135:
.size vec_seq_idx.part.0, .-vec_seq_idx.part.0
.p2align 4
.type vec_pair_idx.part.0, @function
vec_pair_idx.part.0:
.LFB137:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 167
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call __assert_fail@PLT
.cfi_endproc
.LFE137:
.size vec_pair_idx.part.0, .-vec_pair_idx.part.0
.section .rodata.str1.1
.LC2:
.string "p->pa != NULL"
.text
.p2align 4
.type vec_seq_add.part.0, @function
vec_seq_add.part.0:
.LFB138:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 85
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call __assert_fail@PLT
.cfi_endproc
.LFE138:
.size vec_seq_add.part.0, .-vec_seq_add.part.0
.p2align 4
.type vec_seq_append.part.0, @function
vec_seq_append.part.0:
.LFB139:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 95
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call __assert_fail@PLT
.cfi_endproc
.LFE139:
.size vec_seq_append.part.0, .-vec_seq_append.part.0
.p2align 4
.type probe_cnt, @function
probe_cnt:
.LFB118:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 248
.cfi_def_cfa_offset 304
mov QWORD PTR 120[rsp], rdi
test rdi, rdi
je .L40
mov QWORD PTR 48[rsp], 0
cmp DWORD PTR [rdi], 1
mov rax, rdi
je .L84
.L14:
mov rax, QWORD PTR 120[rsp]
movzx eax, BYTE PTR 124[rax]
add rax, QWORD PTR 48[rsp]
.L12:
add rsp, 248
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L84:
.cfi_restore_state
lea rdx, 8[rdi]
add rax, 112
mov QWORD PTR [rsp], rdx
mov QWORD PTR 128[rsp], rax
jmp .L39
.p2align 4,,10
.p2align 3
.L16:
movzx eax, BYTE PTR 124[r15]
add rax, QWORD PTR 48[rsp]
add rax, QWORD PTR 56[rsp]
mov QWORD PTR 48[rsp], rax
.L15:
add QWORD PTR [rsp], 8
mov rax, QWORD PTR [rsp]
cmp QWORD PTR 128[rsp], rax
je .L14
.L39:
mov rax, QWORD PTR [rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L15
mov QWORD PTR 56[rsp], 0
cmp DWORD PTR [r15], 1
jne .L16
lea rax, 8[r15]
mov QWORD PTR 176[rsp], r15
mov QWORD PTR 8[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 136[rsp], rax
jmp .L38
.L18:
movzx eax, BYTE PTR 124[r15]
add rax, QWORD PTR 56[rsp]
add rax, QWORD PTR 64[rsp]
mov QWORD PTR 56[rsp], rax
.L17:
add QWORD PTR 8[rsp], 8
mov rax, QWORD PTR 8[rsp]
cmp QWORD PTR 136[rsp], rax
je .L85
.L38:
mov rax, QWORD PTR 8[rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L17
mov QWORD PTR 64[rsp], 0
cmp DWORD PTR [r15], 1
jne .L18
lea rax, 8[r15]
mov QWORD PTR 184[rsp], r15
mov QWORD PTR 16[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 144[rsp], rax
jmp .L37
.L20:
movzx eax, BYTE PTR 124[r15]
add rax, QWORD PTR 64[rsp]
add rax, QWORD PTR 72[rsp]
mov QWORD PTR 64[rsp], rax
.L19:
add QWORD PTR 16[rsp], 8
mov rax, QWORD PTR 16[rsp]
cmp QWORD PTR 144[rsp], rax
je .L86
.L37:
mov rax, QWORD PTR 16[rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L19
mov QWORD PTR 72[rsp], 0
cmp DWORD PTR [r15], 1
jne .L20
lea rax, 8[r15]
mov QWORD PTR 192[rsp], r15
mov QWORD PTR 24[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 152[rsp], rax
jmp .L36
.L22:
movzx eax, BYTE PTR 124[r14]
add rax, QWORD PTR 72[rsp]
add rax, QWORD PTR 80[rsp]
mov QWORD PTR 72[rsp], rax
.L21:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp QWORD PTR 152[rsp], rax
je .L87
.L36:
mov rax, QWORD PTR 24[rsp]
mov r14, QWORD PTR [rax]
test r14, r14
je .L21
mov QWORD PTR 80[rsp], 0
cmp DWORD PTR [r14], 1
jne .L22
lea rax, 8[r14]
mov QWORD PTR 200[rsp], r14
mov QWORD PTR 32[rsp], rax
lea rax, 112[r14]
mov QWORD PTR 160[rsp], rax
.L35:
mov rax, QWORD PTR 32[rsp]
mov r14, QWORD PTR [rax]
test r14, r14
je .L23
xor r15d, r15d
cmp DWORD PTR [r14], 1
je .L88
.p2align 4,,10
.p2align 3
.L24:
movzx eax, BYTE PTR 124[r14]
add rax, QWORD PTR 80[rsp]
add rax, r15
mov QWORD PTR 80[rsp], rax
.L23:
add QWORD PTR 32[rsp], 8
mov rax, QWORD PTR 32[rsp]
cmp QWORD PTR 160[rsp], rax
jne .L35
mov r14, QWORD PTR 200[rsp]
jmp .L22
.L88:
lea rax, 112[r14]
mov QWORD PTR 208[rsp], r14
lea r12, 8[r14]
mov QWORD PTR 104[rsp], rax
.L34:
mov r13, QWORD PTR [r12]
test r13, r13
je .L25
xor r14d, r14d
cmp DWORD PTR 0[r13], 1
je .L89
.p2align 4,,10
.p2align 3
.L26:
movzx eax, BYTE PTR 124[r13]
lea r11, [rax+r15]
lea r15, [r11+r14]
.L25:
add r12, 8
cmp QWORD PTR 104[rsp], r12
jne .L34
mov r14, QWORD PTR 208[rsp]
jmp .L24
.L89:
lea rax, 8[r13]
mov QWORD PTR 216[rsp], r13
mov QWORD PTR 40[rsp], rax
lea rax, 112[r13]
mov QWORD PTR 168[rsp], rax
mov QWORD PTR 224[rsp], r15
mov QWORD PTR 88[rsp], r14
mov QWORD PTR 232[rsp], r12
.L33:
mov rax, QWORD PTR 40[rsp]
mov r12, QWORD PTR [rax]
test r12, r12
je .L27
xor ebx, ebx
cmp DWORD PTR [r12], 1
je .L90
.p2align 4,,10
.p2align 3
.L28:
movzx eax, BYTE PTR 124[r12]
mov r14, QWORD PTR 88[rsp]
add r14, rax
lea rax, [r14+rbx]
mov QWORD PTR 88[rsp], rax
.L27:
add QWORD PTR 40[rsp], 8
mov rax, QWORD PTR 40[rsp]
cmp QWORD PTR 168[rsp], rax
jne .L33
mov r13, QWORD PTR 216[rsp]
mov r15, QWORD PTR 224[rsp]
mov r14, QWORD PTR 88[rsp]
mov r12, QWORD PTR 232[rsp]
jmp .L26
.p2align 4,,10
.p2align 3
.L90:
lea rax, 112[r12]
lea rbp, 8[r12]
mov QWORD PTR 96[rsp], r12
mov QWORD PTR 112[rsp], rax
mov r12, rbp
.L32:
mov r15, QWORD PTR [r12]
test r15, r15
je .L29
xor r14d, r14d
cmp DWORD PTR [r15], 1
je .L91
.p2align 4,,10
.p2align 3
.L30:
movzx eax, BYTE PTR 124[r15]
add rbx, rax
add rbx, r14
.L29:
add r12, 8
cmp QWORD PTR 112[rsp], r12
jne .L32
mov r12, QWORD PTR 96[rsp]
jmp .L28
.p2align 4,,10
.p2align 3
.L91:
lea r13, 8[r15]
lea rbp, 112[r15]
.L31:
mov rdi, QWORD PTR 0[r13]
add r13, 8
call probe_cnt
add r14, rax
cmp rbp, r13
je .L30
jmp .L31
.L87:
mov r15, QWORD PTR 192[rsp]
jmp .L20
.L85:
mov r15, QWORD PTR 176[rsp]
jmp .L16
.L86:
mov r15, QWORD PTR 184[rsp]
jmp .L18
.L40:
xor eax, eax
jmp .L12
.cfi_endproc
.LFE118:
.size probe_cnt, .-probe_cnt
.p2align 4
.type free_tree.part.0, @function
free_tree.part.0:
.LFB142:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov rax, rdi
lea rcx, 8[rdi]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
add rax, 120
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 88
.cfi_def_cfa_offset 144
mov QWORD PTR 72[rsp], rdi
mov QWORD PTR 32[rsp], rcx
mov QWORD PTR 64[rsp], rax
.L107:
mov rax, QWORD PTR 32[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 48[rsp], rax
test rax, rax
je .L93
mov edi, DWORD PTR [rax]
lea rsi, 8[rax]
lea rcx, 120[rax]
mov QWORD PTR 24[rsp], rsi
mov QWORD PTR 56[rsp], rcx
test edi, edi
je .L138
.L106:
mov rax, QWORD PTR 24[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 40[rsp], rax
test rax, rax
je .L95
lea rsi, 120[rax]
lea r12, 8[rax]
mov QWORD PTR 16[rsp], rsi
mov esi, DWORD PTR [rax]
test esi, esi
jne .L105
jmp .L139
.p2align 4,,10
.p2align 3
.L102:
call free_tree.part.0
.L101:
add rbx, 8
cmp rbx, r14
jne .L103
.L136:
mov rdi, r15
call free@PLT
.L99:
add r13, 8
cmp QWORD PTR 8[rsp], r13
jne .L104
.L137:
mov rdi, rbp
call free@PLT
.L97:
add r12, 8
cmp r12, QWORD PTR 16[rsp]
je .L140
.L105:
mov rbp, QWORD PTR [r12]
test rbp, rbp
je .L97
mov ecx, DWORD PTR 0[rbp]
lea rax, 120[rbp]
lea r13, 8[rbp]
mov QWORD PTR 8[rsp], rax
test ecx, ecx
je .L137
.L104:
mov r15, QWORD PTR 0[r13]
test r15, r15
je .L99
mov edx, DWORD PTR [r15]
lea rbx, 8[r15]
lea r14, 120[r15]
test edx, edx
je .L136
.L103:
mov rdi, QWORD PTR [rbx]
test rdi, rdi
je .L101
mov eax, DWORD PTR [rdi]
test eax, eax
jne .L102
call free@PLT
jmp .L101
.L140:
mov rdi, QWORD PTR 40[rsp]
call free@PLT
.L95:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp rax, QWORD PTR 56[rsp]
jne .L106
mov rdi, QWORD PTR 48[rsp]
call free@PLT
.L93:
add QWORD PTR 32[rsp], 8
mov rax, QWORD PTR 32[rsp]
cmp rax, QWORD PTR 64[rsp]
jne .L107
mov rdi, QWORD PTR 72[rsp]
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp free@PLT
.L139:
.cfi_restore_state
mov rdi, rax
call free@PLT
jmp .L95
.L138:
mov rdi, rax
call free@PLT
jmp .L93
.cfi_endproc
.LFE142:
.size free_tree.part.0, .-free_tree.part.0
.p2align 4
.type height_rec, @function
height_rec:
.LFB114:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 328
.cfi_def_cfa_offset 384
mov QWORD PTR 176[rsp], rdi
test rdi, rdi
je .L169
mov QWORD PTR 56[rsp], 0
cmp DWORD PTR [rdi], 1
mov r8, rsi
je .L213
.L143:
mov rax, QWORD PTR 176[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
imul rax, r8
add rax, QWORD PTR 56[rsp]
.L141:
add rsp, 328
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L213:
.cfi_restore_state
lea rax, 1[rsi]
lea rsi, 9[rsi]
mov QWORD PTR 240[rsp], rax
mov rax, rdi
lea rdi, 8[rdi]
add rax, 112
mov QWORD PTR 8[rsp], rdi
mov QWORD PTR 192[rsp], rax
jmp .L168
.p2align 4,,10
.p2align 3
.L145:
mov rax, QWORD PTR 128[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 240[rsp]
add rax, QWORD PTR 56[rsp]
add rax, QWORD PTR 64[rsp]
mov QWORD PTR 56[rsp], rax
.L144:
add QWORD PTR 8[rsp], 8
mov rax, QWORD PTR 8[rsp]
cmp QWORD PTR 192[rsp], rax
je .L143
.L168:
mov rax, QWORD PTR 8[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 128[rsp], rax
test rax, rax
je .L144
mov QWORD PTR 64[rsp], 0
cmp DWORD PTR [rax], 1
jne .L145
lea rax, 2[r8]
mov r15, r8
mov QWORD PTR 248[rsp], rax
mov rax, QWORD PTR 128[rsp]
lea rdi, 8[rax]
add rax, 112
mov QWORD PTR 16[rsp], rdi
mov QWORD PTR 200[rsp], rax
jmp .L167
.L147:
mov rax, QWORD PTR 136[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 248[rsp]
add rax, QWORD PTR 64[rsp]
add rax, QWORD PTR 72[rsp]
mov QWORD PTR 64[rsp], rax
.L146:
add QWORD PTR 16[rsp], 8
mov rax, QWORD PTR 16[rsp]
cmp QWORD PTR 200[rsp], rax
je .L214
.L167:
mov rax, QWORD PTR 16[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 136[rsp], rax
test rax, rax
je .L146
mov QWORD PTR 72[rsp], 0
cmp DWORD PTR [rax], 1
jne .L147
lea rax, 3[r15]
mov QWORD PTR 256[rsp], rax
mov rax, QWORD PTR 136[rsp]
lea rcx, 8[rax]
add rax, 112
mov QWORD PTR 24[rsp], rcx
mov QWORD PTR 208[rsp], rax
jmp .L166
.L149:
mov rax, QWORD PTR 144[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 256[rsp]
add rax, QWORD PTR 72[rsp]
add rax, QWORD PTR 80[rsp]
mov QWORD PTR 72[rsp], rax
.L148:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp QWORD PTR 208[rsp], rax
je .L147
.L166:
mov rax, QWORD PTR 24[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 144[rsp], rax
test rax, rax
je .L148
mov QWORD PTR 80[rsp], 0
cmp DWORD PTR [rax], 1
jne .L149
lea rax, 4[r15]
mov r14, rsi
mov QWORD PTR 264[rsp], rax
mov rax, QWORD PTR 144[rsp]
lea rdi, 8[rax]
add rax, 112
mov QWORD PTR 32[rsp], rdi
mov QWORD PTR 216[rsp], rax
jmp .L165
.L151:
mov rax, QWORD PTR 152[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 264[rsp]
add rax, QWORD PTR 80[rsp]
add rax, QWORD PTR 88[rsp]
mov QWORD PTR 80[rsp], rax
.L150:
add QWORD PTR 32[rsp], 8
mov rax, QWORD PTR 32[rsp]
cmp QWORD PTR 216[rsp], rax
je .L215
.L165:
mov rax, QWORD PTR 32[rsp]
mov rax, QWORD PTR [rax]
mov QWORD PTR 152[rsp], rax
test rax, rax
je .L150
mov QWORD PTR 88[rsp], 0
cmp DWORD PTR [rax], 1
jne .L151
lea rax, 5[r15]
mov QWORD PTR 104[rsp], r15
mov QWORD PTR 272[rsp], rax
mov rax, QWORD PTR 152[rsp]
lea rcx, 8[rax]
add rax, 112
mov QWORD PTR 40[rsp], rcx
mov QWORD PTR 224[rsp], rax
.L164:
mov rax, QWORD PTR 40[rsp]
mov r13, QWORD PTR [rax]
test r13, r13
je .L152
xor r12d, r12d
cmp DWORD PTR 0[r13], 1
je .L216
.p2align 4,,10
.p2align 3
.L153:
movzx eax, BYTE PTR 124[r13]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 272[rsp]
add rax, QWORD PTR 88[rsp]
add rax, r12
mov QWORD PTR 88[rsp], rax
.L152:
add QWORD PTR 40[rsp], 8
mov rax, QWORD PTR 40[rsp]
cmp QWORD PTR 224[rsp], rax
jne .L164
mov r15, QWORD PTR 104[rsp]
jmp .L151
.L216:
mov rax, QWORD PTR 104[rsp]
mov QWORD PTR 288[rsp], r13
lea r15, 8[r13]
add rax, 6
mov QWORD PTR 96[rsp], rax
lea rax, 112[r13]
mov QWORD PTR 160[rsp], rax
mov rax, r14
mov r14, r15
mov r15, r12
mov r12, rax
.L163:
mov rdx, QWORD PTR [r14]
test rdx, rdx
je .L154
xor ebp, ebp
cmp DWORD PTR [rdx], 1
je .L217
.p2align 4,,10
.p2align 3
.L155:
movzx eax, BYTE PTR 124[rdx]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 96[rsp]
lea r11, [rax+r15]
lea r15, [r11+rbp]
.L154:
add r14, 8
cmp QWORD PTR 160[rsp], r14
jne .L163
mov r14, r12
mov r13, QWORD PTR 288[rsp]
mov r12, r15
jmp .L153
.L217:
mov rax, QWORD PTR 104[rsp]
lea rcx, 8[rdx]
mov QWORD PTR 296[rsp], rdx
mov QWORD PTR 48[rsp], rcx
lea rdi, 7[rax]
add rax, 8
mov QWORD PTR 304[rsp], r15
mov QWORD PTR 280[rsp], rdi
lea rdi, 112[rdx]
mov QWORD PTR 232[rsp], rdi
mov QWORD PTR 184[rsp], rax
mov QWORD PTR 112[rsp], rbp
mov QWORD PTR 312[rsp], r14
mov r14, r12
.L162:
mov rax, QWORD PTR 48[rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L156
xor ebx, ebx
cmp DWORD PTR [r15], 1
je .L218
.p2align 4,,10
.p2align 3
.L157:
movzx eax, BYTE PTR 124[r15]
mov r12, QWORD PTR 112[rsp]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 280[rsp]
add r12, rax
lea rax, [r12+rbx]
mov QWORD PTR 112[rsp], rax
.L156:
add QWORD PTR 48[rsp], 8
mov rax, QWORD PTR 48[rsp]
cmp QWORD PTR 232[rsp], rax
jne .L162
mov r12, r14
mov rdx, QWORD PTR 296[rsp]
mov r15, QWORD PTR 304[rsp]
mov rbp, QWORD PTR 112[rsp]
mov r14, QWORD PTR 312[rsp]
jmp .L155
.p2align 4,,10
.p2align 3
.L218:
lea rax, 8[r15]
mov QWORD PTR 120[rsp], r15
mov rbp, rbx
mov QWORD PTR [rsp], rax
lea rax, 112[r15]
mov r15, r14
mov QWORD PTR 168[rsp], rax
.L161:
mov rax, QWORD PTR [rsp]
mov r14, QWORD PTR [rax]
test r14, r14
je .L158
xor r13d, r13d
cmp DWORD PTR [r14], 1
je .L219
.p2align 4,,10
.p2align 3
.L159:
movzx eax, BYTE PTR 124[r14]
xor eax, 1
movzx eax, al
imul rax, QWORD PTR 184[rsp]
lea rbx, [rax+rbp]
lea rbp, [rbx+r13]
.L158:
add QWORD PTR [rsp], 8
mov rax, QWORD PTR [rsp]
cmp QWORD PTR 168[rsp], rax
jne .L161
mov r14, r15
mov rbx, rbp
mov r15, QWORD PTR 120[rsp]
jmp .L157
.p2align 4,,10
.p2align 3
.L219:
lea r12, 8[r14]
lea rbx, 112[r14]
.L160:
mov rdi, QWORD PTR [r12]
mov rsi, r15
add r12, 8
call height_rec
add r13, rax
cmp rbx, r12
je .L159
jmp .L160
.L215:
mov rsi, r14
jmp .L149
.L214:
mov r8, r15
jmp .L145
.L169:
xor eax, eax
jmp .L141
.cfi_endproc
.LFE114:
.size height_rec, .-height_rec
.p2align 4
.type level, @function
level:
.LFB117:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov eax, DWORD PTR [rdi]
mov QWORD PTR 40[rsp], rdi
mov edi, 24
test eax, eax
je .L256
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov r15, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov QWORD PTR 16[r15], rax
mov rax, QWORD PTR 40[rsp]
lea rsi, 8[rax]
add rax, 112
mov QWORD PTR 24[rsp], rsi
mov QWORD PTR 32[rsp], rax
.p2align 4,,10
.p2align 3
.L236:
mov rax, QWORD PTR 24[rsp]
mov rdi, QWORD PTR [rax]
test rdi, rdi
je .L223
call level
mov edi, 24
mov r14, rax
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov rbp, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov r13, QWORD PTR [r15]
cmp QWORD PTR [r14], r13
mov QWORD PTR 16[rbp], rax
mov r10, r13
cmovbe r10, QWORD PTR [r14]
test r10, r10
je .L224
xor ebx, ebx
jmp .L228
.p2align 4,,10
.p2align 3
.L227:
add rbx, 1
mov QWORD PTR 0[rbp], rdx
mov DWORD PTR [rdi+rcx*4], r12d
cmp r10, rbx
je .L224
.L228:
cmp rbx, QWORD PTR [r15]
jnb .L226
mov rax, QWORD PTR 16[r15]
mov r12d, DWORD PTR [rax+rbx*4]
cmp rbx, QWORD PTR [r14]
jnb .L226
mov rax, QWORD PTR 16[r14]
mov rcx, QWORD PTR 0[rbp]
mov rdi, QWORD PTR 16[rbp]
add r12d, DWORD PTR [rax+rbx*4]
lea rdx, 1[rcx]
cmp rdx, QWORD PTR 8[rbp]
jne .L227
lea rax, [rdx+rdx]
lea rsi, 0[0+rdx*8]
mov QWORD PTR 16[rsp], rcx
mov QWORD PTR 8[rbp], rax
mov QWORD PTR 8[rsp], r10
mov QWORD PTR [rsp], rdx
call realloc@PLT
mov rdx, QWORD PTR [rsp]
mov r10, QWORD PTR 8[rsp]
test rax, rax
mov QWORD PTR 16[rbp], rax
mov rcx, QWORD PTR 16[rsp]
mov rdi, rax
jne .L227
.L231:
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 85
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L233:
mov rdi, r10
call free@PLT
mov rdi, r14
call free@PLT
mov rdi, QWORD PTR 16[r15]
call free@PLT
mov rdi, r15
mov r15, rbp
call free@PLT
.L223:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp QWORD PTR 32[rsp], rax
jne .L236
mov edi, 24
call malloc@PLT
mov edi, 64
mov QWORD PTR 8[rax], 16
mov rbx, rax
mov r12, rax
call malloc@PLT
mov rsi, QWORD PTR 40[rsp]
mov rbp, QWORD PTR [r15]
mov QWORD PTR [rbx], 1
mov QWORD PTR 16[rbx], rax
mov rdi, rax
movzx edx, BYTE PTR 124[rsi]
lea r13, 1[rbp]
xor edx, 1
movzx edx, dl
mov DWORD PTR [rax], edx
cmp r13, 15
ja .L257
.L237:
mov r14, QWORD PTR 16[r15]
lea rdi, 4[rax]
lea rdx, 0[0+rbp*4]
mov rsi, r14
call memcpy@PLT
mov QWORD PTR [rbx], r13
mov rdi, r14
call free@PLT
mov rdi, r15
call free@PLT
.L220:
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L224:
.cfi_restore_state
cmp r10, r13
jnb .L238
mov rax, QWORD PTR 0[rbp]
mov rdi, QWORD PTR 16[rbp]
lea rbx, 1[rax]
jmp .L232
.p2align 4,,10
.p2align 3
.L230:
add r10, 1
mov QWORD PTR 0[rbp], rbx
mov DWORD PTR -4[rdi+rbx*4], r12d
add rbx, 1
cmp r13, r10
je .L229
.L232:
mov rax, QWORD PTR 16[r15]
mov r12d, DWORD PTR [rax+r10*4]
cmp rbx, QWORD PTR 8[rbp]
jne .L230
lea rax, [rbx+rbx]
lea rsi, 0[0+rbx*8]
mov QWORD PTR [rsp], r10
mov QWORD PTR 8[rbp], rax
call realloc@PLT
mov r10, QWORD PTR [rsp]
test rax, rax
mov QWORD PTR 16[rbp], rax
mov rdi, rax
jne .L230
jmp .L231
.p2align 4,,10
.p2align 3
.L238:
mov r13, r10
.p2align 4,,10
.p2align 3
.L229:
mov r10, QWORD PTR 16[r14]
cmp r13, QWORD PTR [r14]
jnb .L233
mov rax, QWORD PTR 0[rbp]
mov rdi, QWORD PTR 16[rbp]
lea rbx, 1[rax]
jmp .L235
.p2align 4,,10
.p2align 3
.L234:
mov QWORD PTR 0[rbp], rbx
add r13, 1
mov DWORD PTR -4[rdi+rbx*4], r12d
add rbx, 1
cmp r13, QWORD PTR [r14]
jnb .L233
.L235:
mov r12d, DWORD PTR [r10+r13*4]
cmp QWORD PTR 8[rbp], rbx
jne .L234
lea rax, [rbx+rbx]
lea rsi, 0[0+rbx*8]
mov QWORD PTR 8[rbp], rax
call realloc@PLT
mov QWORD PTR 16[rbp], rax
mov rdi, rax
test rax, rax
je .L231
mov r10, QWORD PTR 16[r14]
jmp .L234
.L257:
mov QWORD PTR 8[rbx], r13
lea rsi, 0[0+r13*4]
call realloc@PLT
mov QWORD PTR 16[rbx], rax
test rax, rax
jne .L237
call vec_seq_append.part.0
.p2align 4,,10
.p2align 3
.L256:
call malloc@PLT
mov edi, 64
mov QWORD PTR 8[rax], 16
mov r12, rax
call malloc@PLT
mov QWORD PTR [r12], 1
mov QWORD PTR 16[r12], rax
mov DWORD PTR [rax], 1
jmp .L220
.L226:
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE117:
.size level, .-level
.section .rodata.str1.1
.LC3:
.string "a <= K"
.LC4:
.string "b <= K"
.LC5:
.string "r != -1"
.text
.p2align 4
.globl sieve
.type sieve, @function
sieve:
.LFB78:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
mov edi, 112
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov DWORD PTR 16[rsp], esi
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
call malloc@PLT
mov r12, rax
mov r14, rax
lea r13, 112[rax]
.p2align 4,,10
.p2align 3
.L259:
mov edi, 24
add r14, 8
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov rbx, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov QWORD PTR -8[r14], rbx
mov QWORD PTR 16[rbx], rax
cmp r13, r14
jne .L259
cmp QWORD PTR 0[rbp], 0
je .L258
xor r15d, r15d
lea r14, 32[rsp]
lea r13, 36[rsp]
lea rbx, 40[rsp]
lea r9, tbl[rip]
.p2align 4,,10
.p2align 3
.L260:
mov rax, QWORD PTR 16[rbp]
xor r11d, r11d
xor edx, edx
xor r10d, r10d
mov ecx, DWORD PTR [rax+r15*4]
mov eax, DWORD PTR 16[rsp]
mov DWORD PTR 32[rsp], ecx
mov DWORD PTR 36[rsp], eax
.L262:
xor eax, eax
movzx edi, BYTE PTR [r14+r11]
cmp BYTE PTR 0[r13+r11], dil
sete al
add r10d, eax
mov rax, r13
.L261:
xor esi, esi
cmp BYTE PTR [rax], dil
sete sil
add rax, 1
add edx, esi
cmp rbx, rax
jne .L261
add r11, 1
cmp r11, 4
jne .L262
cmp r10d, 4
jg .L276
cmp edx, 4
jg .L277
movsx r10, r10d
movsx rdx, edx
lea rax, [r10+r10*4]
add rdx, rax
movsx rax, DWORD PTR [r9+rdx*4]
cmp eax, -1
je .L278
mov rdx, QWORD PTR [r12+rax*8]
mov r11, QWORD PTR [rdx]
mov rdi, QWORD PTR 16[rdx]
lea r10, 1[r11]
cmp r10, QWORD PTR 8[rdx]
je .L279
.L266:
mov QWORD PTR [rdx], r10
add r15, 1
mov DWORD PTR [rdi+r11*4], ecx
cmp r15, QWORD PTR 0[rbp]
je .L258
jb .L260
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L279:
lea rax, [r10+r10]
lea rsi, 0[0+r10*8]
mov QWORD PTR 24[rsp], r11
mov QWORD PTR 8[rdx], rax
mov DWORD PTR 20[rsp], ecx
mov QWORD PTR 8[rsp], rdx
mov QWORD PTR [rsp], r10
call realloc@PLT
mov rdx, QWORD PTR 8[rsp]
mov r10, QWORD PTR [rsp]
lea r9, tbl[rip]
test rax, rax
mov ecx, DWORD PTR 20[rsp]
mov r11, QWORD PTR 24[rsp]
mov rdi, rax
mov QWORD PTR 16[rdx], rax
jne .L266
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 85
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L258:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L280
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L276:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 212
lea rsi, .LC0[rip]
lea rdi, .LC3[rip]
call __assert_fail@PLT
.L280:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L278:
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 215
lea rsi, .LC0[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.L277:
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 213
lea rsi, .LC0[rip]
lea rdi, .LC4[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE78:
.size sieve, .-sieve
.section .rodata.str1.1
.LC6:
.string "is_perm(vec_seq_idx(ss, i))"
.LC7:
.string "is_perm(pivot)"
.text
.p2align 4
.globl sieveg
.type sieveg, @function
sieveg:
.LFB80:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, esi
mov esi, 1
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rdi
mov edi, 112
sub rsp, 40
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea r13, 19[rsp]
call calloc@PLT
mov DWORD PTR 20[rsp], ebp
mov ecx, 1
lea r8, 20[rsp]
mov r12, rax
.L282:
movzx edx, BYTE PTR 0[r13+rcx]
mov rax, rcx
jmp .L285
.p2align 4,,10
.p2align 3
.L310:
add rax, 1
cmp rax, 4
je .L309
.L285:
cmp BYTE PTR [r8+rax], dl
jne .L310
lea rcx, __PRETTY_FUNCTION__.14[rip]
mov edx, 423
lea rsi, .LC0[rip]
lea rdi, .LC7[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L309:
add rcx, 1
cmp rcx, 4
jne .L282
mov rax, QWORD PTR [rbx]
mov QWORD PTR 8[rsp], rax
test rax, rax
je .L281
mov r15, QWORD PTR 16[rbx]
lea r9, 24[rsp]
xor ebx, ebx
lea r14, tbl[rip]
.p2align 4,,10
.p2align 3
.L297:
mov esi, DWORD PTR [r15+rbx*4]
mov ecx, 1
mov DWORD PTR 20[rsp], esi
.L287:
movzx edx, BYTE PTR 0[r13+rcx]
mov rax, rcx
jmp .L290
.p2align 4,,10
.p2align 3
.L312:
add rax, 1
cmp rax, 4
je .L311
.L290:
cmp BYTE PTR [r8+rax], dl
jne .L312
lea rcx, __PRETTY_FUNCTION__.14[rip]
mov edx, 426
lea rsi, .LC0[rip]
lea rdi, .LC6[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L311:
add rcx, 1
cmp rcx, 4
jne .L287
mov DWORD PTR 16[rsp], esi
xor edi, edi
xor edx, edx
xor r10d, r10d
mov DWORD PTR 20[rsp], ebp
lea r11, 16[rsp]
.L293:
xor eax, eax
movzx esi, BYTE PTR [r11+rdi]
cmp BYTE PTR [r8+rdi], sil
sete al
add r10d, eax
mov rax, r8
.L292:
xor ecx, ecx
cmp BYTE PTR [rax], sil
sete cl
add rax, 1
add edx, ecx
cmp r9, rax
jne .L292
add rdi, 1
cmp rdi, 4
jne .L293
cmp r10d, 4
jg .L313
cmp edx, 4
jg .L314
movsx r10, r10d
movsx rdx, edx
lea rax, [r10+r10*4]
add rdx, rax
movsx rax, DWORD PTR [r14+rdx*4]
cmp eax, -1
je .L315
add QWORD PTR [r12+rax*8], 1
add rbx, 1
cmp rbx, QWORD PTR 8[rsp]
jne .L297
.L281:
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L316
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L313:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 212
lea rsi, .LC0[rip]
lea rdi, .LC3[rip]
call __assert_fail@PLT
.L316:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L314:
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 213
lea rsi, .LC0[rip]
lea rdi, .LC4[rip]
call __assert_fail@PLT
.L315:
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 215
lea rsi, .LC0[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE80:
.size sieveg, .-sieveg
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC8:
.string "vec_size(va0) == vec_size(va1)"
.text
.p2align 4
.globl eqkg
.type eqkg, @function
eqkg:
.LFB89:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
xor r14d, r14d
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rsi
sub rsp, 40
.cfi_def_cfa_offset 96
mov QWORD PTR 8[rsp], rdi
mov edi, 24
mov QWORD PTR 16[rsp], rdx
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov r12, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov edi, 24
mov QWORD PTR 16[r12], rax
call malloc@PLT
mov edi, 128
mov QWORD PTR [rax], 0
mov rbp, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
cmp QWORD PTR [rbx], 0
mov QWORD PTR 16[rbp], rax
je .L354
.p2align 4,,10
.p2align 3
.L318:
mov rax, QWORD PTR 16[rbx]
mov rdi, QWORD PTR 8[rsp]
mov r13d, DWORD PTR [rax+r14*4]
mov esi, r13d
call sieveg
mov edx, 8
mov esi, 13
lea rcx, cmpsize[rip]
mov r15, rax
mov rdi, rax
call qsort@PLT
mov rax, r15
lea rcx, 112[r15]
xor edx, edx
.p2align 4,,10
.p2align 3
.L320:
cmp QWORD PTR [rax], 1
sbb rdx, -1
add rax, 8
cmp rcx, rax
jne .L320
cmp rdx, 1
jbe .L321
mov r11, QWORD PTR 0[rbp]
mov r10, QWORD PTR 16[rbp]
xor edi, edi
mov eax, 1
test r11, r11
je .L323
.p2align 4,,10
.p2align 3
.L322:
mov rsi, QWORD PTR [r10+rdi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L326:
mov rcx, QWORD PTR [r15+rax]
mov rdx, QWORD PTR [rsi+rax]
cmp rcx, rdx
jne .L355
add rax, 8
cmp rax, 112
jne .L326
.L321:
mov rdi, r15
add r14, 1
call free@PLT
cmp r14, QWORD PTR [rbx]
je .L356
.L331:
jb .L318
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L355:
cmp ecx, edx
je .L321
add rdi, 1
cmp rdi, r11
jne .L322
lea rax, 1[r11]
.L323:
cmp QWORD PTR 8[rbp], rax
je .L357
.L339:
mov rdx, QWORD PTR [r12]
lea rax, 1[r11]
mov QWORD PTR 0[rbp], rax
mov QWORD PTR [r10+r11*8], r15
lea r15, 1[rdx]
cmp r15, QWORD PTR 8[r12]
je .L358
mov rax, QWORD PTR 16[r12]
.L330:
mov QWORD PTR [r12], r15
add r14, 1
mov DWORD PTR [rax+rdx*4], r13d
cmp r14, QWORD PTR [rbx]
jne .L331
.L356:
mov rax, QWORD PTR [r12]
cmp QWORD PTR 0[rbp], rax
jne .L359
cmp QWORD PTR 16[rsp], 0
je .L360
.L333:
mov rax, QWORD PTR 16[rsp]
mov QWORD PTR [rax], rbp
.L317:
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L357:
.cfi_restore_state
lea rdx, [rax+rax]
sal rax, 4
mov rdi, r10
mov rsi, rax
mov QWORD PTR 8[rbp], rdx
call realloc@PLT
mov QWORD PTR 16[rbp], rax
mov r10, rax
test rax, rax
je .L361
mov r11, QWORD PTR 0[rbp]
jmp .L339
.L358:
mov rdi, QWORD PTR 16[r12]
lea rax, [r15+r15]
mov QWORD PTR 24[rsp], rdx
lea rsi, 0[0+r15*8]
mov QWORD PTR 8[r12], rax
call realloc@PLT
mov rdx, QWORD PTR 24[rsp]
test rax, rax
mov QWORD PTR 16[r12], rax
jne .L330
call vec_seq_add.part.0
.p2align 4,,10
.p2align 3
.L360:
test rax, rax
je .L334
xor ebx, ebx
.L335:
cmp rax, rbx
jbe .L337
mov rax, QWORD PTR 16[rbp]
mov rdi, QWORD PTR [rax+rbx*8]
add rbx, 1
call free@PLT
mov rax, QWORD PTR 0[rbp]
cmp rax, rbx
jne .L335
.L334:
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
jmp .L317
.L354:
cmp QWORD PTR 16[rsp], 0
jne .L333
jmp .L334
.L337:
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 57
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L359:
lea rcx, __PRETTY_FUNCTION__.13[rip]
mov edx, 535
lea rsi, .LC0[rip]
lea rdi, .LC8[rip]
call __assert_fail@PLT
.L361:
lea rcx, __PRETTY_FUNCTION__.11[rip]
mov edx, 50
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE89:
.size eqkg, .-eqkg
.section .rodata.str1.1
.LC11:
.string "vec_size(ss) != 0"
.LC12:
.string "mi != -1"
.text
.p2align 4
.globl selMaxL
.type selMaxL, @function
selMaxL:
.LFB96:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
test rdi, rdi
je .L389
mov rax, QWORD PTR [rsi]
mov rdi, rsi
cmp rax, 1
je .L407
test rax, rax
je .L408
mov rsi, QWORD PTR lst[rip]
lea rdx, 32[rsp]
mov QWORD PTR 32[rsp], 0
call eqkg
cmp QWORD PTR [rax], 0
mov QWORD PTR 24[rsp], rax
je .L382
movsd xmm6, QWORD PTR .LC9[rip]
mov r13, -1
xor ebp, ebp
movsd QWORD PTR 16[rsp], xmm6
.p2align 4,,10
.p2align 3
.L366:
mov rax, QWORD PTR 32[rsp]
cmp QWORD PTR [rax], rbp
jbe .L385
mov rax, QWORD PTR 16[rax]
xor ecx, ecx
mov r12, QWORD PTR [rax+rbp*8]
mov rbx, r12
lea r14, 112[r12]
mov rax, r12
.p2align 4,,10
.p2align 3
.L368:
add rcx, QWORD PTR [rax]
add rax, 8
mov r15, rcx
cmp r14, rax
jne .L368
pxor xmm2, xmm2
jmp .L374
.p2align 4,,10
.p2align 3
.L369:
add rbx, 8
cmp rbx, r14
je .L409
.L374:
mov rax, QWORD PTR [rbx]
test rax, rax
je .L369
js .L370
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r15, r15
js .L372
.L413:
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L373:
pxor xmm3, xmm3
movsd QWORD PTR 8[rsp], xmm2
add rbx, 8
addsd xmm0, xmm3
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm2, QWORD PTR 8[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
cmp rbx, r14
jne .L374
.L409:
mov rax, QWORD PTR 104[r12]
test rax, rax
jne .L410
.L375:
movsd xmm4, QWORD PTR 16[rsp]
mov rax, QWORD PTR 24[rsp]
comisd xmm2, xmm4
maxsd xmm2, xmm4
cmova r13, rbp
movsd QWORD PTR 16[rsp], xmm2
add rbp, 1
cmp rbp, QWORD PTR [rax]
jne .L366
cmp r13, -1
je .L382
cmp rbp, r13
jbe .L411
mov rax, QWORD PTR 24[rsp]
mov rbp, QWORD PTR 32[rsp]
xor ebx, ebx
mov rax, QWORD PTR 16[rax]
cmp QWORD PTR 0[rbp], 0
mov r12d, DWORD PTR [rax+r13*4]
jne .L384
jmp .L387
.p2align 4,,10
.p2align 3
.L386:
jbe .L385
.L384:
mov rax, QWORD PTR 16[rbp]
mov rdi, QWORD PTR [rax+rbx*8]
add rbx, 1
call free@PLT
cmp QWORD PTR 0[rbp], rbx
jne .L386
.L387:
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
mov rbx, QWORD PTR 24[rsp]
mov rdi, QWORD PTR 16[rbx]
call free@PLT
mov rdi, rbx
call free@PLT
.L362:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L412
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L370:
.cfi_restore_state
mov rcx, rax
and eax, 1
pxor xmm1, xmm1
shr rcx
or rcx, rax
cvtsi2sd xmm1, rcx
addsd xmm1, xmm1
test r15, r15
jns .L413
.L372:
mov rax, r15
mov rcx, r15
pxor xmm0, xmm0
shr rax
and ecx, 1
or rax, rcx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L373
.p2align 4,,10
.p2align 3
.L410:
js .L376
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r15, r15
js .L378
.L414:
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L379:
pxor xmm5, xmm5
movsd QWORD PTR 8[rsp], xmm2
addsd xmm0, xmm5
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm2, QWORD PTR 8[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
jmp .L375
.L376:
mov rdx, rax
and eax, 1
pxor xmm1, xmm1
shr rdx
or rdx, rax
cvtsi2sd xmm1, rdx
addsd xmm1, xmm1
test r15, r15
jns .L414
.L378:
mov rax, r15
and r15d, 1
pxor xmm0, xmm0
shr rax
or rax, r15
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L379
.L389:
mov r12d, 50462976
jmp .L362
.L407:
mov rax, QWORD PTR 16[rsi]
mov r12d, DWORD PTR [rax]
jmp .L362
.L382:
lea rcx, __PRETTY_FUNCTION__.8[rip]
mov edx, 650
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L385:
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 57
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L411:
call vec_seq_idx.part.0
.L408:
lea rcx, __PRETTY_FUNCTION__.8[rip]
mov edx, 639
lea rsi, .LC0[rip]
lea rdi, .LC11[rip]
call __assert_fail@PLT
.L412:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE96:
.size selMaxL, .-selMaxL
.section .rodata.str1.1
.LC14:
.string "vec_size(ss) >= 1"
.text
.p2align 4
.globl first
.type first, @function
first:
.LFB94:
.cfi_startproc
endbr64
cmp QWORD PTR [rsi], 0
je .L420
mov rax, QWORD PTR 16[rsi]
mov eax, DWORD PTR [rax]
ret
.L420:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.10[rip]
mov edx, 602
lea rsi, .LC0[rip]
lea rdi, .LC14[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE94:
.size first, .-first
.p2align 4
.globl selMaxE
.type selMaxE, @function
selMaxE:
.LFB95:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
test rdi, rdi
je .L443
mov rax, QWORD PTR [rsi]
mov rdi, rsi
cmp rax, 1
je .L458
test rax, rax
je .L459
mov QWORD PTR 32[rsp], 0
lea rdx, 32[rsp]
call eqkg
cmp QWORD PTR [rax], 0
mov r14, rax
je .L436
movsd xmm5, QWORD PTR .LC9[rip]
mov r13, -1
xor r12d, r12d
movsd QWORD PTR 24[rsp], xmm5
.p2align 4,,10
.p2align 3
.L425:
mov rax, QWORD PTR 32[rsp]
cmp QWORD PTR [rax], r12
jbe .L439
mov rax, QWORD PTR 16[rax]
xor edx, edx
mov rbx, QWORD PTR [rax+r12*8]
lea r15, 112[rbx]
mov rax, rbx
.p2align 4,,10
.p2align 3
.L427:
add rdx, QWORD PTR [rax]
add rax, 8
mov rbp, rdx
cmp rax, r15
jne .L427
pxor xmm2, xmm2
jmp .L433
.p2align 4,,10
.p2align 3
.L428:
add rbx, 8
cmp rbx, r15
je .L460
.L433:
mov rax, QWORD PTR [rbx]
test rax, rax
je .L428
js .L429
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test rbp, rbp
js .L431
.L463:
pxor xmm0, xmm0
cvtsi2sd xmm0, rbp
.L432:
pxor xmm3, xmm3
movsd QWORD PTR 16[rsp], xmm2
add rbx, 8
addsd xmm0, xmm3
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR 8[rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 16[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
cmp rbx, r15
jne .L433
.L460:
movsd xmm4, QWORD PTR 24[rsp]
comisd xmm2, xmm4
maxsd xmm2, xmm4
cmova r13, r12
movsd QWORD PTR 24[rsp], xmm2
add r12, 1
cmp r12, QWORD PTR [r14]
jne .L425
cmp r13, -1
je .L436
cmp r13, r12
jnb .L461
mov rbp, QWORD PTR 32[rsp]
mov rax, QWORD PTR 16[r14]
xor ebx, ebx
cmp QWORD PTR 0[rbp], 0
mov r12d, DWORD PTR [rax+r13*4]
jne .L438
jmp .L441
.p2align 4,,10
.p2align 3
.L440:
jbe .L439
.L438:
mov rax, QWORD PTR 16[rbp]
mov rdi, QWORD PTR [rax+rbx*8]
add rbx, 1
call free@PLT
cmp QWORD PTR 0[rbp], rbx
jne .L440
.L441:
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
mov rdi, QWORD PTR 16[r14]
call free@PLT
mov rdi, r14
call free@PLT
.L421:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L462
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L429:
.cfi_restore_state
mov rdx, rax
and eax, 1
pxor xmm1, xmm1
shr rdx
or rdx, rax
cvtsi2sd xmm1, rdx
addsd xmm1, xmm1
test rbp, rbp
jns .L463
.L431:
mov rax, rbp
mov rdx, rbp
pxor xmm0, xmm0
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L432
.L443:
mov r12d, 50462976
jmp .L421
.L458:
mov rax, QWORD PTR 16[rsi]
mov r12d, DWORD PTR [rax]
jmp .L421
.L436:
lea rcx, __PRETTY_FUNCTION__.9[rip]
mov edx, 626
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L439:
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 57
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L461:
call vec_seq_idx.part.0
.L459:
lea rcx, __PRETTY_FUNCTION__.9[rip]
mov edx, 613
lea rsi, .LC0[rip]
lea rdi, .LC11[rip]
call __assert_fail@PLT
.L462:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE95:
.size selMaxE, .-selMaxE
.p2align 4
.globl cache_init
.type cache_init, @function
cache_init:
.LFB98:
.cfi_startproc
endbr64
mov edx, 3221223576
xor esi, esi
lea rdi, cache_array[rip]
jmp memset@PLT
.cfi_endproc
.LFE98:
.size cache_init, .-cache_init
.p2align 4
.globl cache_deinit
.type cache_deinit, @function
cache_deinit:
.LFB99:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov eax, 3221223584
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
lea rbx, cache_array[rip+8]
lea r12, -8[rbx]
add r12, rax
.p2align 4,,10
.p2align 3
.L467:
mov rbp, QWORD PTR [rbx]
test rbp, rbp
je .L466
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
.L466:
add rbx, 24
cmp rbx, r12
jne .L467
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE99:
.size cache_deinit, .-cache_deinit
.p2align 4
.globl hash
.type hash, @function
hash:
.LFB100:
.cfi_startproc
endbr64
mov rcx, QWORD PTR [rdi]
test rcx, rcx
je .L476
mov rsi, QWORD PTR 16[rdi]
xor r8d, r8d
xor eax, eax
.p2align 4,,10
.p2align 3
.L475:
movsx rdx, DWORD PTR [rsi+rax*4]
add rax, 1
add r8, rdx
cmp rax, rcx
jne .L475
.L473:
mov rax, r8
ret
.L476:
xor r8d, r8d
jmp .L473
.cfi_endproc
.LFE100:
.size hash, .-hash
.p2align 4
.globl vec_seq_eq
.type vec_seq_eq, @function
vec_seq_eq:
.LFB101:
.cfi_startproc
endbr64
test rdi, rdi
sete al
test rsi, rsi
sete r8b
or r8b, al
jne .L483
mov rcx, QWORD PTR [rdi]
cmp rcx, QWORD PTR [rsi]
jne .L478
test rcx, rcx
je .L484
mov rdi, QWORD PTR 16[rdi]
mov rsi, QWORD PTR 16[rsi]
xor eax, eax
mov edx, DWORD PTR [rdi]
jmp .L481
.p2align 4,,10
.p2align 3
.L485:
add rax, 1
cmp rcx, rax
je .L484
mov edx, DWORD PTR [rdi+rax*4]
.L481:
cmp DWORD PTR [rsi+rax*4], edx
je .L485
.L478:
mov eax, r8d
ret
.p2align 4,,10
.p2align 3
.L483:
xor r8d, r8d
mov eax, r8d
ret
.p2align 4,,10
.p2align 3
.L484:
mov r8d, 1
mov eax, r8d
ret
.cfi_endproc
.LFE101:
.size vec_seq_eq, .-vec_seq_eq
.p2align 4
.globl cache_fetch
.type cache_fetch, @function
cache_fetch:
.LFB102:
.cfi_startproc
endbr64
mov rsi, QWORD PTR [rdi]
mov r8, rdi
test rsi, rsi
je .L491
mov rdi, QWORD PTR 16[rdi]
xor eax, eax
xor ecx, ecx
.p2align 4,,10
.p2align 3
.L488:
movsx rdx, DWORD PTR [rdi+rax*4]
add rax, 1
add rcx, rdx
cmp rax, rsi
jne .L488
movabs rdx, 4611688732848316673
mov rax, rcx
mul rdx
mov rax, rcx
shr rdx, 25
imul rdx, rdx, 134217649
sub rax, rdx
lea rdx, [rax+rax*2]
lea rax, cache_array[rip]
lea r9, [rax+rdx*8]
.L487:
cmp QWORD PTR [r9], rcx
je .L501
add QWORD PTR miss[rip], 1
xor eax, eax
ret
.p2align 4,,10
.p2align 3
.L501:
sub rsp, 8
.cfi_def_cfa_offset 16
mov rsi, QWORD PTR 8[r9]
mov rdi, r8
call vec_seq_eq
test al, al
jne .L502
add QWORD PTR miss[rip], 1
xor eax, eax
.L486:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L502:
.cfi_restore_state
add QWORD PTR hit[rip], 1
mov eax, DWORD PTR 16[r9]
jmp .L486
.L491:
.cfi_def_cfa_offset 8
xor ecx, ecx
lea r9, cache_array[rip]
jmp .L487
.cfi_endproc
.LFE102:
.size cache_fetch, .-cache_fetch
.p2align 4
.globl cache_put
.type cache_put, @function
cache_put:
.LFB103:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
mov r12, rdi
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov ebp, esi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
mov rcx, QWORD PTR [rdi]
test rcx, rcx
je .L510
mov rsi, QWORD PTR 16[rdi]
xor ebx, ebx
xor eax, eax
.p2align 4,,10
.p2align 3
.L505:
movsx rdx, DWORD PTR [rsi+rax*4]
add rax, 1
add rbx, rdx
cmp rax, rcx
jne .L505
movabs rdx, 4611688732848316673
mov rax, rbx
mul rdx
mov rax, rbx
shr rdx, 25
imul rdx, rdx, 134217649
sub rax, rdx
lea rdx, [rax+rax*2]
lea rax, cache_array[rip]
lea r13, [rax+rdx*8]
.L504:
mov r14, QWORD PTR 8[r13]
test r14, r14
je .L506
mov rdi, QWORD PTR 16[r14]
call free@PLT
mov rdi, r14
call free@PLT
add QWORD PTR conflict[rip], 1
.L507:
mov QWORD PTR 0[r13], rbx
mov edi, 24
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov rbx, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov rdx, QWORD PTR [r12]
mov QWORD PTR 16[rbx], rax
mov rdi, rax
cmp rdx, 15
ja .L513
lea r14, 0[0+rdx*4]
.L509:
mov rsi, QWORD PTR 16[r12]
mov rdx, r14
call memcpy@PLT
mov rax, QWORD PTR [r12]
mov QWORD PTR 8[r13], rbx
add QWORD PTR [rbx], rax
mov DWORD PTR 16[r13], ebp
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L513:
.cfi_restore_state
mov QWORD PTR 8[rbx], rdx
lea r14, 0[0+rdx*4]
mov rsi, r14
call realloc@PLT
mov QWORD PTR 16[rbx], rax
mov rdi, rax
test rax, rax
jne .L509
call vec_seq_append.part.0
.p2align 4,,10
.p2align 3
.L506:
add QWORD PTR active[rip], 1
jmp .L507
.L510:
xor ebx, ebx
lea r13, cache_array[rip]
jmp .L504
.cfi_endproc
.LFE103:
.size cache_put, .-cache_put
.p2align 4
.globl selMaxEC
.type selMaxEC, @function
selMaxEC:
.LFB106:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 72
.cfi_def_cfa_offset 128
mov QWORD PTR 40[rsp], rsi
mov rax, QWORD PTR fs:40
mov QWORD PTR 56[rsp], rax
xor eax, eax
test rdi, rdi
je .L542
mov rax, QWORD PTR [rsi]
cmp rax, 2
ja .L516
test rax, rax
je .L536
mov rax, QWORD PTR 40[rsp]
mov rax, QWORD PTR 16[rax]
mov r12d, DWORD PTR [rax]
.L514:
mov rax, QWORD PTR 56[rsp]
sub rax, QWORD PTR fs:40
jne .L560
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L516:
.cfi_restore_state
cmp QWORD PTR [rdx], 1
mov r10, rdx
je .L561
mov rbx, QWORD PTR 40[rsp]
mov rdi, rbx
call cache_fetch
mov r12d, eax
test eax, eax
jne .L514
lea rdx, 48[rsp]
mov rsi, r10
mov rdi, rbx
mov QWORD PTR 48[rsp], 0
call eqkg
cmp QWORD PTR [rax], 0
mov QWORD PTR 32[rsp], rax
je .L535
movsd xmm6, QWORD PTR .LC9[rip]
mov r13, -1
xor ebp, ebp
movsd QWORD PTR 24[rsp], xmm6
.p2align 4,,10
.p2align 3
.L519:
mov rax, QWORD PTR 48[rsp]
cmp QWORD PTR [rax], rbp
jbe .L538
mov rax, QWORD PTR 16[rax]
xor esi, esi
mov r12, QWORD PTR [rax+rbp*8]
mov rbx, r12
lea r14, 112[r12]
mov rax, r12
.p2align 4,,10
.p2align 3
.L521:
add rsi, QWORD PTR [rax]
add rax, 8
mov r15, rsi
cmp r14, rax
jne .L521
pxor xmm2, xmm2
jmp .L527
.p2align 4,,10
.p2align 3
.L522:
add rbx, 8
cmp rbx, r14
je .L562
.L527:
mov rax, QWORD PTR [rbx]
test rax, rax
je .L522
js .L523
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r15, r15
js .L525
.L564:
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L526:
pxor xmm3, xmm3
movsd QWORD PTR 16[rsp], xmm2
add rbx, 8
addsd xmm0, xmm3
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR 8[rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 16[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
cmp rbx, r14
jne .L527
.L562:
mov rax, QWORD PTR 104[r12]
test rax, rax
jne .L563
.L528:
movsd xmm4, QWORD PTR 24[rsp]
mov rax, QWORD PTR 32[rsp]
comisd xmm2, xmm4
maxsd xmm2, xmm4
cmova r13, rbp
movsd QWORD PTR 24[rsp], xmm2
add rbp, 1
cmp rbp, QWORD PTR [rax]
jne .L519
cmp r13, -1
je .L535
cmp r13, rbp
jnb .L536
mov rax, QWORD PTR 16[rax]
mov rdi, QWORD PTR 40[rsp]
xor ebx, ebx
mov r12d, DWORD PTR [rax+r13*4]
mov esi, r12d
call cache_put
mov rbp, QWORD PTR 48[rsp]
cmp QWORD PTR 0[rbp], 0
jne .L537
jmp .L540
.p2align 4,,10
.p2align 3
.L539:
jbe .L538
.L537:
mov rax, QWORD PTR 16[rbp]
mov rdi, QWORD PTR [rax+rbx*8]
add rbx, 1
call free@PLT
cmp QWORD PTR 0[rbp], rbx
jne .L539
.L540:
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
mov rbx, QWORD PTR 32[rsp]
mov rdi, QWORD PTR 16[rbx]
call free@PLT
mov rdi, rbx
call free@PLT
jmp .L514
.L542:
mov r12d, 50462976
jmp .L514
.p2align 4,,10
.p2align 3
.L523:
mov rsi, rax
and eax, 1
pxor xmm1, xmm1
shr rsi
or rsi, rax
cvtsi2sd xmm1, rsi
addsd xmm1, xmm1
test r15, r15
jns .L564
.L525:
mov rax, r15
mov rsi, r15
pxor xmm0, xmm0
shr rax
and esi, 1
or rax, rsi
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L526
.p2align 4,,10
.p2align 3
.L563:
js .L529
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r15, r15
js .L531
.L565:
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L532:
pxor xmm5, xmm5
movsd QWORD PTR 16[rsp], xmm2
addsd xmm0, xmm5
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR 8[rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 16[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
jmp .L528
.L529:
mov rcx, rax
and eax, 1
pxor xmm1, xmm1
shr rcx
or rcx, rax
cvtsi2sd xmm1, rcx
addsd xmm1, xmm1
test r15, r15
jns .L565
.L531:
mov rax, r15
mov rdx, r15
pxor xmm0, xmm0
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L532
.L561:
mov rax, QWORD PTR 16[rdx]
mov r12d, DWORD PTR [rax]
jmp .L514
.L535:
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 914
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L538:
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 57
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L536:
call vec_seq_idx.part.0
.L560:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE106:
.size selMaxEC, .-selMaxEC
.p2align 4
.globl buildTh1
.type buildTh1, @function
buildTh1:
.LFB107:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15, rdx
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, rsi
mov esi, 1
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, ecx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
mov edi, 128
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
call calloc@PLT
mov rdx, QWORD PTR [r15]
mov r12, rax
cmp rdx, 1
je .L581
mov DWORD PTR [rax], 1
mov DWORD PTR 120[rax], r13d
test rdx, rdx
je .L574
mov rcx, QWORD PTR 16[r15]
xor eax, eax
jmp .L570
.p2align 4,,10
.p2align 3
.L582:
add rax, 1
cmp rdx, rax
je .L574
.L570:
cmp r13d, DWORD PTR [rcx+rax*4]
jne .L582
xor eax, eax
.L569:
mov esi, r13d
mov rdi, r15
mov BYTE PTR 124[r12], al
add r14, 1
call sieve
xor ebx, ebx
mov r13, rax
jmp .L572
.p2align 4,,10
.p2align 3
.L584:
mov rsi, r15
mov rdi, r14
call rbp
mov rdx, r15
mov rsi, r14
mov rdi, rbp
mov ecx, eax
call buildTh1
mov QWORD PTR 8[r12+rbx*8], rax
add rbx, 1
cmp rbx, 14
je .L583
.L572:
mov r15, QWORD PTR 0[r13+rbx*8]
cmp QWORD PTR [r15], 0
jne .L584
xor eax, eax
mov QWORD PTR 8[r12+rbx*8], rax
add rbx, 1
cmp rbx, 14
jne .L572
.p2align 4,,10
.p2align 3
.L583:
mov rbx, r13
lea r14, 112[r13]
.p2align 4,,10
.p2align 3
.L573:
mov rbp, QWORD PTR [rbx]
add rbx, 8
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
cmp r14, rbx
jne .L573
mov rdi, r13
call free@PLT
.L566:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L574:
.cfi_restore_state
mov eax, 1
jmp .L569
.p2align 4,,10
.p2align 3
.L581:
mov rax, QWORD PTR 16[r15]
mov eax, DWORD PTR [rax]
mov DWORD PTR 120[r12], eax
jmp .L566
.cfi_endproc
.LFE107:
.size buildTh1, .-buildTh1
.p2align 4
.globl selMinH
.type selMinH, @function
selMinH:
.LFB97:
.cfi_startproc
endbr64
test rdi, rdi
je .L600
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
mov rax, QWORD PTR [rsi]
cmp rax, 2
ja .L587
test rax, rax
je .L599
mov rax, QWORD PTR 16[rsi]
mov eax, DWORD PTR [rax]
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L587:
.cfi_restore_state
xor edx, edx
mov r13, rdi
mov rdi, rsi
xor ebx, ebx
call eqkg
mov QWORD PTR [rsp], -1
mov QWORD PTR 8[rsp], -1
cmp QWORD PTR [rax], 0
mov r12, rax
jne .L589
jmp .L598
.p2align 4,,10
.p2align 3
.L591:
movzx r9d, BYTE PTR 124[r10]
xor r9d, 1
movzx r15d, r9b
test eax, eax
jne .L594
mov rdi, r10
call free@PLT
.L590:
cmp QWORD PTR [rsp], r15
jbe .L595
mov rax, QWORD PTR 0[rbp]
mov QWORD PTR 8[rsp], rbx
sub rax, 1
cmp rax, r15
je .L596
mov QWORD PTR [rsp], r15
.L595:
add rbx, 1
cmp QWORD PTR [r12], rbx
je .L596
jbe .L615
.L589:
mov rax, QWORD PTR 16[r12]
mov rdx, rbp
mov rsi, r13
lea rdi, selMinH[rip]
mov ecx, DWORD PTR [rax+rbx*4]
call buildTh1
mov r10, rax
test rax, rax
je .L602
mov eax, DWORD PTR [rax]
cmp eax, 1
jne .L591
lea r14, 8[r10]
lea r15, 112[r10]
xor r9d, r9d
.p2align 4,,10
.p2align 3
.L592:
mov rdi, QWORD PTR [r14]
mov esi, 2
add r14, 8
call height_rec
add r9, rax
cmp r15, r14
jne .L592
movzx r15d, BYTE PTR 124[r10]
xor r15d, 1
movzx r15d, r15b
add r15, r9
.L594:
mov rdi, r10
call free_tree.part.0
jmp .L590
.p2align 4,,10
.p2align 3
.L602:
xor r15d, r15d
jmp .L590
.p2align 4,,10
.p2align 3
.L596:
mov rax, QWORD PTR 8[rsp]
cmp rax, -1
je .L598
cmp rax, QWORD PTR [r12]
jnb .L599
mov rdi, QWORD PTR 16[r12]
mov eax, DWORD PTR [rdi+rax*4]
mov DWORD PTR [rsp], eax
call free@PLT
mov rdi, r12
call free@PLT
mov eax, DWORD PTR [rsp]
add rsp, 24
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L600:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
.cfi_restore 15
mov eax, 50462976
ret
.L598:
.cfi_def_cfa_offset 80
.cfi_offset 3, -56
.cfi_offset 6, -48
.cfi_offset 12, -40
.cfi_offset 13, -32
.cfi_offset 14, -24
.cfi_offset 15, -16
lea rcx, __PRETTY_FUNCTION__.7[rip]
mov edx, 681
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L615:
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L599:
call vec_seq_idx.part.0
.cfi_endproc
.LFE97:
.size selMinH, .-selMinH
.p2align 4
.globl buildThf
.type buildThf, @function
buildThf:
.LFB108:
.cfi_startproc
endbr64
cmp QWORD PTR [rdx], 0
je .L617
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13, rsi
mov rsi, rdx
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, rdi
mov rdi, r13
call rbp
mov rdx, r12
mov rsi, r13
mov rdi, rbp
mov ecx, eax
pop rbp
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12
.cfi_restore 12
.cfi_def_cfa_offset 16
pop r13
.cfi_restore 13
.cfi_def_cfa_offset 8
jmp buildTh1
.p2align 4,,10
.p2align 3
.L617:
xor eax, eax
ret
.cfi_endproc
.LFE108:
.size buildThf, .-buildThf
.p2align 4
.globl buildThc1
.type buildThc1, @function
buildThc1:
.LFB109:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15, rdx
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, rsi
mov esi, 1
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, ecx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
mov edi, 128
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
call calloc@PLT
mov rdx, QWORD PTR [r15]
mov r12, rax
cmp rdx, 1
je .L636
mov DWORD PTR [rax], 1
mov DWORD PTR 120[rax], r13d
test rdx, rdx
je .L629
mov rcx, QWORD PTR 16[r15]
xor eax, eax
jmp .L625
.p2align 4,,10
.p2align 3
.L637:
add rax, 1
cmp rdx, rax
je .L629
.L625:
cmp r13d, DWORD PTR [rcx+rax*4]
jne .L637
xor eax, eax
.L624:
mov esi, r13d
mov rdi, r15
mov BYTE PTR 124[r12], al
add r14, 1
call sieve
xor ebx, ebx
mov r13, rax
jmp .L627
.p2align 4,,10
.p2align 3
.L639:
mov rsi, r15
mov rdi, r14
call rbp
mov rdx, r15
mov rsi, r14
mov rdi, rbp
mov ecx, eax
call buildThc1
mov QWORD PTR 8[r12+rbx*8], rax
add rbx, 1
cmp rbx, 14
je .L638
.L627:
mov r15, QWORD PTR 0[r13+rbx*8]
mov rdx, QWORD PTR lst[rip]
cmp QWORD PTR [r15], 0
jne .L639
xor eax, eax
mov QWORD PTR 8[r12+rbx*8], rax
add rbx, 1
cmp rbx, 14
jne .L627
.p2align 4,,10
.p2align 3
.L638:
mov rbx, r13
lea r14, 112[r13]
.p2align 4,,10
.p2align 3
.L628:
mov rbp, QWORD PTR [rbx]
add rbx, 8
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
cmp r14, rbx
jne .L628
mov rdi, r13
call free@PLT
.L621:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L629:
.cfi_restore_state
mov eax, 1
jmp .L624
.p2align 4,,10
.p2align 3
.L636:
mov rax, QWORD PTR 16[r15]
mov eax, DWORD PTR [rax]
mov DWORD PTR 120[r12], eax
jmp .L621
.cfi_endproc
.LFE109:
.size buildThc1, .-buildThc1
.section .rodata.str1.1
.LC15:
.string "true"
.LC16:
.string "false"
.section .rodata.str1.8
.align 8
.LC17:
.string "h=%zu n=%zu cand=%zu eq=%zu mh=%zu self=%s\n"
.text
.p2align 4
.globl selMinHC
.type selMinHC, @function
selMinHC:
.LFB104:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov QWORD PTR 16[rsp], rdx
test rdi, rdi
je .L659
mov rax, QWORD PTR [rsi]
mov rbp, rsi
cmp rax, 2
ja .L642
test rax, rax
je .L655
mov rax, QWORD PTR 16[rsi]
mov r15d, DWORD PTR [rax]
.L640:
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r15d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L642:
.cfi_restore_state
mov rax, QWORD PTR 16[rsp]
cmp QWORD PTR [rax], 1
je .L673
mov r12, rdi
mov rdi, rsi
call cache_fetch
mov r15d, eax
test eax, eax
jne .L640
mov rsi, QWORD PTR 16[rsp]
xor edx, edx
mov rdi, rbp
xor ebx, ebx
call eqkg
mov QWORD PTR 24[rsp], -1
mov QWORD PTR 8[rsp], -1
cmp QWORD PTR [rax], 0
mov r13, rax
jne .L645
jmp .L654
.p2align 4,,10
.p2align 3
.L647:
movzx r9d, BYTE PTR 124[r10]
xor r9d, 1
movzx r15d, r9b
test eax, eax
jne .L650
mov rdi, r10
call free@PLT
.L646:
cmp QWORD PTR 8[rsp], r15
jbe .L651
mov rax, QWORD PTR 0[rbp]
mov QWORD PTR 24[rsp], rbx
mov QWORD PTR 8[rsp], r15
sub rax, 1
cmp rax, r15
je .L652
.L651:
add rbx, 1
cmp QWORD PTR 0[r13], rbx
je .L652
jbe .L674
.L645:
mov rax, QWORD PTR 16[r13]
mov rdx, rbp
mov rsi, r12
lea rdi, selMinHC[rip]
mov ecx, DWORD PTR [rax+rbx*4]
call buildThc1
mov r10, rax
test rax, rax
je .L661
mov eax, DWORD PTR [rax]
cmp eax, 1
jne .L647
lea r14, 8[r10]
lea r15, 112[r10]
xor r9d, r9d
.p2align 4,,10
.p2align 3
.L648:
mov rdi, QWORD PTR [r14]
mov esi, 2
add r14, 8
call height_rec
add r9, rax
cmp r15, r14
jne .L648
movzx r15d, BYTE PTR 124[r10]
xor r15d, 1
movzx r15d, r15b
add r15, r9
.L650:
mov rdi, r10
call free_tree.part.0
jmp .L646
.p2align 4,,10
.p2align 3
.L659:
mov r15d, 50462976
jmp .L640
.p2align 4,,10
.p2align 3
.L661:
xor r15d, r15d
jmp .L646
.p2align 4,,10
.p2align 3
.L673:
mov rax, QWORD PTR 16[rax]
mov r15d, DWORD PTR [rax]
jmp .L640
.p2align 4,,10
.p2align 3
.L652:
mov rdx, QWORD PTR 24[rsp]
cmp rdx, -1
je .L654
cmp rdx, QWORD PTR 0[r13]
jnb .L655
mov rax, QWORD PTR 16[r13]
mov rdi, rbp
mov r15d, DWORD PTR [rax+rdx*4]
mov esi, r15d
call cache_put
mov rcx, QWORD PTR 0[rbp]
cmp rcx, 100
ja .L675
.L656:
mov rdi, QWORD PTR 16[r13]
call free@PLT
mov rdi, r13
call free@PLT
jmp .L640
.L675:
mov rdx, QWORD PTR 16[rbp]
xor eax, eax
.p2align 4,,10
.p2align 3
.L658:
cmp r15d, DWORD PTR [rdx+rax*4]
je .L663
add rax, 1
cmp rcx, rax
jne .L658
lea rax, .LC16[rip]
.L657:
push rax
.cfi_def_cfa_offset 104
mov rdx, r12
lea rsi, .LC17[rip]
mov edi, 1
push QWORD PTR 16[rsp]
.cfi_def_cfa_offset 112
mov rax, QWORD PTR 32[rsp]
mov r9, QWORD PTR 0[r13]
mov r8, QWORD PTR [rax]
xor eax, eax
call __printf_chk@PLT
pop rax
.cfi_def_cfa_offset 104
pop rdx
.cfi_def_cfa_offset 96
jmp .L656
.L663:
lea rax, .LC15[rip]
jmp .L657
.L654:
lea rcx, __PRETTY_FUNCTION__.5[rip]
mov edx, 821
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L674:
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L655:
call vec_seq_idx.part.0
.cfi_endproc
.LFE104:
.size selMinHC, .-selMinHC
.section .rodata.str1.8
.align 8
.LC19:
.string "h=%zu n=%zu cand=%zu eq=%zu mh=%zu mi=%zu self=%s\n"
.text
.p2align 4
.globl selMinHCE
.type selMinHCE, @function
selMinHCE:
.LFB105:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 104
.cfi_def_cfa_offset 160
mov QWORD PTR 48[rsp], rdi
mov QWORD PTR 32[rsp], rsi
mov QWORD PTR 40[rsp], rdx
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
test rdi, rdi
je .L719
mov rax, QWORD PTR [rsi]
cmp rax, 2
ja .L678
test rax, rax
je .L741
mov rax, QWORD PTR 32[rsp]
mov rax, QWORD PTR 16[rax]
mov r13d, DWORD PTR [rax]
.L676:
mov rax, QWORD PTR 88[rsp]
sub rax, QWORD PTR fs:40
jne .L742
add rsp, 104
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r13d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L678:
.cfi_restore_state
mov rax, QWORD PTR 40[rsp]
cmp QWORD PTR [rax], 1
je .L743
mov rbx, QWORD PTR 32[rsp]
mov rdi, rbx
call cache_fetch
mov r13d, eax
test eax, eax
jne .L676
mov rsi, QWORD PTR 40[rsp]
lea rdx, 80[rsp]
mov rdi, rbx
mov QWORD PTR 80[rsp], 0
xor ebx, ebx
call eqkg
mov edi, 24
mov r14, rax
mov QWORD PTR 16[rsp], rax
call malloc@PLT
mov edi, 256
mov QWORD PTR [rax], 0
mov r12, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
cmp QWORD PTR [r14], 0
mov QWORD PTR 16[r12], rax
je .L700
.p2align 4,,10
.p2align 3
.L682:
mov rax, QWORD PTR 16[rsp]
mov rax, QWORD PTR 16[rax]
mov eax, DWORD PTR [rax+rbx*4]
mov DWORD PTR 24[rsp], eax
mov rax, QWORD PTR 80[rsp]
cmp QWORD PTR [rax], rbx
jbe .L703
mov rax, QWORD PTR 16[rax]
xor esi, esi
mov r13, QWORD PTR [rax+rbx*8]
mov rbp, r13
lea r14, 112[r13]
mov rax, r13
.p2align 4,,10
.p2align 3
.L686:
add rsi, QWORD PTR [rax]
add rax, 8
mov r15, rsi
cmp rax, r14
jne .L686
pxor xmm2, xmm2
jmp .L692
.p2align 4,,10
.p2align 3
.L687:
add rbp, 8
cmp r14, rbp
je .L744
.L692:
mov rax, QWORD PTR 0[rbp]
test rax, rax
je .L687
js .L688
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r15, r15
js .L690
.L747:
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L691:
pxor xmm3, xmm3
movsd QWORD PTR 8[rsp], xmm2
add rbp, 8
addsd xmm0, xmm3
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm2, QWORD PTR 8[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
cmp r14, rbp
jne .L692
.L744:
mov rax, QWORD PTR 104[r13]
test rax, rax
jne .L745
.L693:
mov rbp, QWORD PTR [r12]
mov rdi, QWORD PTR 16[r12]
lea r13, 1[rbp]
cmp r13, QWORD PTR 8[r12]
je .L746
.L698:
mov eax, DWORD PTR 24[rsp]
sal rbp, 4
mov QWORD PTR [r12], r13
add rbx, 1
add rdi, rbp
mov DWORD PTR [rdi], eax
mov rax, QWORD PTR 16[rsp]
movsd QWORD PTR 8[rdi], xmm2
cmp QWORD PTR [rax], rbx
je .L700
ja .L682
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L719:
mov r13d, 50462976
jmp .L676
.p2align 4,,10
.p2align 3
.L688:
mov rsi, rax
and eax, 1
pxor xmm1, xmm1
shr rsi
or rsi, rax
cvtsi2sd xmm1, rsi
addsd xmm1, xmm1
test r15, r15
jns .L747
.L690:
mov rax, r15
mov rsi, r15
pxor xmm0, xmm0
shr rax
and esi, 1
or rax, rsi
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L691
.p2align 4,,10
.p2align 3
.L745:
js .L694
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
.L695:
test r15, r15
js .L696
pxor xmm0, xmm0
cvtsi2sd xmm0, r15
.L697:
pxor xmm6, xmm6
movsd QWORD PTR 8[rsp], xmm2
addsd xmm0, xmm6
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm2, QWORD PTR 8[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
jmp .L693
.p2align 4,,10
.p2align 3
.L746:
lea rax, [r13+r13]
mov rsi, r13
movsd QWORD PTR [rsp], xmm2
mov QWORD PTR 8[r12], rax
sal rsi, 5
call realloc@PLT
movsd xmm2, QWORD PTR [rsp]
test rax, rax
mov QWORD PTR 16[r12], rax
mov rdi, rax
jne .L698
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 161
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L696:
mov rax, r15
mov rdx, r15
pxor xmm0, xmm0
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L697
.L694:
mov rcx, rax
and eax, 1
pxor xmm1, xmm1
shr rcx
or rcx, rax
cvtsi2sd xmm1, rcx
addsd xmm1, xmm1
jmp .L695
.L743:
mov rax, QWORD PTR 16[rax]
mov r13d, DWORD PTR [rax]
jmp .L676
.L700:
mov rbp, QWORD PTR 80[rsp]
xor ebx, ebx
cmp QWORD PTR 0[rbp], 0
jne .L683
jmp .L684
.p2align 4,,10
.p2align 3
.L704:
jbe .L703
.L683:
mov rax, QWORD PTR 16[rbp]
mov rdi, QWORD PTR [rax+rbx*8]
add rbx, 1
call free@PLT
cmp QWORD PTR 0[rbp], rbx
jne .L704
.L684:
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
mov rbx, QWORD PTR 16[rsp]
mov rdi, QWORD PTR 16[rbx]
call free@PLT
mov rdi, rbx
call free@PLT
mov rax, QWORD PTR [r12]
mov rdi, QWORD PTR 16[r12]
lea rcx, cmppair[rip]
mov edx, 16
mov rbx, rax
mov rsi, rax
mov QWORD PTR 16[rsp], rax
mov QWORD PTR 64[rsp], rdi
call qsort@PLT
test rbx, rbx
je .L702
mov rbx, QWORD PTR 64[rsp]
mov QWORD PTR 72[rsp], r12
xor ebp, ebp
mov r14, -1
mov r15, QWORD PTR 48[rsp]
mov r12, QWORD PTR 32[rsp]
mov QWORD PTR 8[rsp], r14
mov QWORD PTR 56[rsp], -1
movsd xmm7, QWORD PTR 8[rbx]
movsd QWORD PTR 24[rsp], xmm7
movsd QWORD PTR [rsp], xmm7
jmp .L705
.p2align 4,,10
.p2align 3
.L707:
movzx r9d, BYTE PTR 124[r10]
xor r9d, 1
movzx r13d, r9b
test eax, eax
jne .L710
mov rdi, r10
call free@PLT
.L706:
cmp QWORD PTR 8[rsp], r13
jbe .L711
mov rax, QWORD PTR [r12]
sub rax, 1
cmp rax, r13
je .L723
mov QWORD PTR 56[rsp], rbp
mov QWORD PTR 8[rsp], r13
.L711:
movsd xmm0, QWORD PTR 24[rsp]
subsd xmm0, QWORD PTR .LC18[rip]
comisd xmm0, QWORD PTR [rsp]
ja .L713
add rbp, 1
cmp rbp, QWORD PTR 16[rsp]
je .L713
movsd xmm5, QWORD PTR 24[rbx]
add rbx, 16
movsd QWORD PTR [rsp], xmm5
.L705:
mov ecx, DWORD PTR [rbx]
mov rdx, r12
mov rsi, r15
lea rdi, selMinHCE[rip]
call buildThc1
mov r10, rax
test rax, rax
je .L722
mov eax, DWORD PTR [rax]
cmp eax, 1
jne .L707
lea r14, 8[r10]
lea r13, 112[r10]
xor r9d, r9d
.p2align 4,,10
.p2align 3
.L708:
mov rdi, QWORD PTR [r14]
mov esi, 2
add r14, 8
call height_rec
add r9, rax
cmp r13, r14
jne .L708
movzx r13d, BYTE PTR 124[r10]
xor r13d, 1
movzx r13d, r13b
add r13, r9
.L710:
mov rdi, r10
call free_tree.part.0
jmp .L706
.L722:
xor r13d, r13d
jmp .L706
.L713:
cmp QWORD PTR 56[rsp], -1
mov r14, QWORD PTR 8[rsp]
mov r12, QWORD PTR 72[rsp]
je .L748
.L712:
mov rax, QWORD PTR 56[rsp]
cmp QWORD PTR 16[rsp], rax
jbe .L702
mov rcx, QWORD PTR 64[rsp]
sal rax, 4
mov rbx, QWORD PTR 32[rsp]
mov r13d, DWORD PTR [rcx+rax]
mov rdi, rbx
mov esi, r13d
call cache_put
mov rcx, QWORD PTR [rbx]
cmp rcx, 100
ja .L749
.L715:
mov rdi, QWORD PTR 64[rsp]
call free@PLT
mov rdi, r12
call free@PLT
jmp .L676
.L749:
mov rax, QWORD PTR 32[rsp]
mov rdx, QWORD PTR 16[rax]
xor eax, eax
.p2align 4,,10
.p2align 3
.L717:
cmp r13d, DWORD PTR [rdx+rax*4]
je .L724
add rax, 1
cmp rcx, rax
jne .L717
lea rax, .LC16[rip]
.L716:
sub rsp, 8
.cfi_def_cfa_offset 168
lea rsi, .LC19[rip]
mov edi, 1
push rax
.cfi_def_cfa_offset 176
push QWORD PTR 72[rsp]
.cfi_def_cfa_offset 184
push r14
.cfi_def_cfa_offset 192
mov rax, QWORD PTR 72[rsp]
mov r9, QWORD PTR 48[rsp]
mov rdx, QWORD PTR 80[rsp]
mov r8, QWORD PTR [rax]
xor eax, eax
call __printf_chk@PLT
add rsp, 32
.cfi_def_cfa_offset 160
jmp .L715
.L723:
mov QWORD PTR 56[rsp], rbp
mov r12, QWORD PTR 72[rsp]
mov r14, r13
jmp .L712
.L724:
lea rax, .LC15[rip]
jmp .L716
.L748:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 877
lea rsi, .LC0[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L702:
call vec_pair_idx.part.0
.p2align 4,,10
.p2align 3
.L703:
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 57
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L741:
call vec_seq_idx.part.0
.L742:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE105:
.size selMinHCE, .-selMinHCE
.p2align 4
.globl buildThc
.type buildThc, @function
buildThc:
.LFB110:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
cmp QWORD PTR [rdx], 0
je .L751
mov r13, rsi
mov rbp, rdi
mov rdx, rcx
mov rsi, r12
mov rdi, r13
call rbp
mov rdx, r12
mov rsi, r13
mov rdi, rbp
mov ecx, eax
pop rbp
.cfi_remember_state
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp buildThc1
.p2align 4,,10
.p2align 3
.L751:
.cfi_restore_state
pop rbp
.cfi_def_cfa_offset 24
xor eax, eax
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE110:
.size buildThc, .-buildThc
.p2align 4
.globl free_tree
.type free_tree, @function
free_tree:
.LFB111:
.cfi_startproc
endbr64
test rdi, rdi
je .L753
mov eax, DWORD PTR [rdi]
test eax, eax
je .L756
jmp free_tree.part.0
.p2align 4,,10
.p2align 3
.L756:
jmp free@PLT
.p2align 4,,10
.p2align 3
.L753:
ret
.cfi_endproc
.LFE111:
.size free_tree, .-free_tree
.p2align 4
.globl buildT
.type buildT, @function
buildT:
.LFB112:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor esi, esi
mov r12, rdi
mov edx, 3221223576
lea rdi, cache_array[rip]
call memset@PLT
cmp QWORD PTR [r12], 0
je .L758
mov rdx, r12
mov ecx, 50462976
xor esi, esi
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
lea rdi, selMaxL[rip]
jmp buildTh1
.p2align 4,,10
.p2align 3
.L758:
.cfi_restore_state
xor eax, eax
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE112:
.size buildT, .-buildT
.p2align 4
.globl cnt
.type cnt, @function
cnt:
.LFB113:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 248
.cfi_def_cfa_offset 304
mov QWORD PTR 120[rsp], rdi
test rdi, rdi
je .L788
mov QWORD PTR 48[rsp], 0
cmp DWORD PTR [rdi], 1
mov rax, rdi
je .L832
.L762:
mov rax, QWORD PTR 120[rsp]
movzx eax, BYTE PTR 124[rax]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 48[rsp]
.L760:
add rsp, 248
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L832:
.cfi_restore_state
lea rdx, 8[rdi]
add rax, 112
mov QWORD PTR [rsp], rdx
mov QWORD PTR 128[rsp], rax
jmp .L787
.p2align 4,,10
.p2align 3
.L764:
movzx eax, BYTE PTR 124[r15]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 48[rsp]
add rax, QWORD PTR 56[rsp]
mov QWORD PTR 48[rsp], rax
.L763:
add QWORD PTR [rsp], 8
mov rax, QWORD PTR [rsp]
cmp QWORD PTR 128[rsp], rax
je .L762
.L787:
mov rax, QWORD PTR [rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L763
mov QWORD PTR 56[rsp], 0
cmp DWORD PTR [r15], 1
jne .L764
lea rax, 8[r15]
mov QWORD PTR 176[rsp], r15
mov QWORD PTR 8[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 136[rsp], rax
jmp .L786
.L766:
movzx eax, BYTE PTR 124[r15]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 56[rsp]
add rax, QWORD PTR 64[rsp]
mov QWORD PTR 56[rsp], rax
.L765:
add QWORD PTR 8[rsp], 8
mov rax, QWORD PTR 8[rsp]
cmp QWORD PTR 136[rsp], rax
je .L833
.L786:
mov rax, QWORD PTR 8[rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L765
mov QWORD PTR 64[rsp], 0
cmp DWORD PTR [r15], 1
jne .L766
lea rax, 8[r15]
mov QWORD PTR 184[rsp], r15
mov QWORD PTR 16[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 144[rsp], rax
jmp .L785
.L768:
movzx eax, BYTE PTR 124[r15]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 64[rsp]
add rax, QWORD PTR 72[rsp]
mov QWORD PTR 64[rsp], rax
.L767:
add QWORD PTR 16[rsp], 8
mov rax, QWORD PTR 16[rsp]
cmp QWORD PTR 144[rsp], rax
je .L834
.L785:
mov rax, QWORD PTR 16[rsp]
mov r15, QWORD PTR [rax]
test r15, r15
je .L767
mov QWORD PTR 72[rsp], 0
cmp DWORD PTR [r15], 1
jne .L768
lea rax, 8[r15]
mov QWORD PTR 192[rsp], r15
mov QWORD PTR 24[rsp], rax
lea rax, 112[r15]
mov QWORD PTR 152[rsp], rax
jmp .L784
.L770:
movzx eax, BYTE PTR 124[r14]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 72[rsp]
add rax, QWORD PTR 80[rsp]
mov QWORD PTR 72[rsp], rax
.L769:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp QWORD PTR 152[rsp], rax
je .L835
.L784:
mov rax, QWORD PTR 24[rsp]
mov r14, QWORD PTR [rax]
test r14, r14
je .L769
mov QWORD PTR 80[rsp], 0
cmp DWORD PTR [r14], 1
jne .L770
lea rax, 8[r14]
mov QWORD PTR 200[rsp], r14
mov QWORD PTR 32[rsp], rax
lea rax, 112[r14]
mov QWORD PTR 160[rsp], rax
.L783:
mov rax, QWORD PTR 32[rsp]
mov r14, QWORD PTR [rax]
test r14, r14
je .L771
xor r15d, r15d
cmp DWORD PTR [r14], 1
je .L836
.p2align 4,,10
.p2align 3
.L772:
movzx eax, BYTE PTR 124[r14]
xor eax, 1
movzx eax, al
add rax, QWORD PTR 80[rsp]
add rax, r15
mov QWORD PTR 80[rsp], rax
.L771:
add QWORD PTR 32[rsp], 8
mov rax, QWORD PTR 32[rsp]
cmp QWORD PTR 160[rsp], rax
jne .L783
mov r14, QWORD PTR 200[rsp]
jmp .L770
.L836:
lea rax, 112[r14]
mov QWORD PTR 208[rsp], r14
lea r12, 8[r14]
mov QWORD PTR 104[rsp], rax
.L782:
mov r14, QWORD PTR [r12]
test r14, r14
je .L773
xor ebp, ebp
cmp DWORD PTR [r14], 1
je .L837
.p2align 4,,10
.p2align 3
.L774:
movzx eax, BYTE PTR 124[r14]
xor eax, 1
movzx eax, al
lea r11, [rax+r15]
lea r15, [r11+rbp]
.L773:
add r12, 8
cmp QWORD PTR 104[rsp], r12
jne .L782
mov r14, QWORD PTR 208[rsp]
jmp .L772
.L837:
lea rax, 8[r14]
mov QWORD PTR 216[rsp], r14
mov QWORD PTR 40[rsp], rax
lea rax, 112[r14]
mov QWORD PTR 168[rsp], rax
mov QWORD PTR 224[rsp], r15
mov QWORD PTR 88[rsp], rbp
mov QWORD PTR 232[rsp], r12
.L781:
mov rax, QWORD PTR 40[rsp]
mov r12, QWORD PTR [rax]
test r12, r12
je .L775
xor ebx, ebx
cmp DWORD PTR [r12], 1
je .L838
.p2align 4,,10
.p2align 3
.L776:
movzx eax, BYTE PTR 124[r12]
mov rbp, QWORD PTR 88[rsp]
xor eax, 1
movzx eax, al
add rbp, rax
lea rax, 0[rbp+rbx]
mov QWORD PTR 88[rsp], rax
.L775:
add QWORD PTR 40[rsp], 8
mov rax, QWORD PTR 40[rsp]
cmp QWORD PTR 168[rsp], rax
jne .L781
mov r14, QWORD PTR 216[rsp]
mov r15, QWORD PTR 224[rsp]
mov rbp, QWORD PTR 88[rsp]
mov r12, QWORD PTR 232[rsp]
jmp .L774
.p2align 4,,10
.p2align 3
.L838:
lea rax, 112[r12]
lea r13, 8[r12]
mov QWORD PTR 96[rsp], r12
mov QWORD PTR 112[rsp], rax
mov r12, r13
.L780:
mov r15, QWORD PTR [r12]
test r15, r15
je .L777
xor r14d, r14d
cmp DWORD PTR [r15], 1
je .L839
.p2align 4,,10
.p2align 3
.L778:
movzx eax, BYTE PTR 124[r15]
xor eax, 1
movzx eax, al
add rbx, rax
add rbx, r14
.L777:
add r12, 8
cmp QWORD PTR 112[rsp], r12
jne .L780
mov r12, QWORD PTR 96[rsp]
jmp .L776
.p2align 4,,10
.p2align 3
.L839:
lea rbp, 8[r15]
lea r13, 112[r15]
.L779:
mov rdi, QWORD PTR 0[rbp]
add rbp, 8
call cnt
add r14, rax
cmp r13, rbp
je .L778
jmp .L779
.L835:
mov r15, QWORD PTR 192[rsp]
jmp .L768
.L833:
mov r15, QWORD PTR 176[rsp]
jmp .L764
.L834:
mov r15, QWORD PTR 184[rsp]
jmp .L766
.L788:
xor eax, eax
jmp .L760
.cfi_endproc
.LFE113:
.size cnt, .-cnt
.section .rodata.str1.1
.LC20:
.string ""
.LC21:
.string "%*s"
.LC22:
.string "%d%d%d%d"
.text
.p2align 4
.globl showT
.type showT, @function
showT:
.LFB119:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 40
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
test rdi, rdi
je .L840
mov rbp, rdi
mov edx, esi
lea rcx, .LC20[rip]
mov r12, rsi
mov edi, 1
lea rsi, .LC21[rip]
lea r13, 14[rsp]
call __printf_chk@PLT
mov eax, DWORD PTR 120[rbp]
mov esi, 1
mov rdi, r13
mov edx, eax
movsx ecx, ah
movsx r8d, al
sar edx, 24
mov r9d, ecx
lea rcx, .LC22[rip]
push rdx
.cfi_def_cfa_offset 88
mov edx, eax
xor eax, eax
sal edx, 8
sar edx, 24
push rdx
.cfi_def_cfa_offset 96
mov edx, 10
call __sprintf_chk@PLT
mov rdi, r13
call puts@PLT
cmp DWORD PTR 0[rbp], 1
pop rax
.cfi_def_cfa_offset 88
pop rdx
.cfi_def_cfa_offset 80
je .L847
.L840:
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L848
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L847:
.cfi_restore_state
lea rbx, 8[rbp]
add r12, 1
add rbp, 112
.p2align 4,,10
.p2align 3
.L843:
mov rdi, QWORD PTR [rbx]
mov rsi, r12
add rbx, 8
call showT
cmp rbx, rbp
jne .L843
jmp .L840
.L848:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE119:
.size showT, .-showT
.section .rodata.str1.1
.LC23:
.string "nd%zu"
.text
.p2align 4
.globl show_node
.type show_node, @function
show_node:
.LFB120:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r8, rsi
mov r12, rdi
lea rcx, .LC23[rip]
mov rdx, -1
mov esi, 1
xor eax, eax
call __sprintf_chk@PLT
mov rax, r12
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE120:
.size show_node, .-show_node
.section .rodata.str1.1
.LC24:
.string "%s [label=%s]\n"
.text
.p2align 4
.globl dotNodeLabel
.type dotNodeLabel, @function
dotNodeLabel:
.LFB121:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov edx, esi
mov eax, esi
movsx r8d, sil
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
sar edx, 24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
sub rsp, 48
.cfi_def_cfa_offset 80
mov rcx, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rcx
xor ecx, ecx
lea r13, 6[rsp]
push rdx
.cfi_def_cfa_offset 88
mov edx, esi
sal edx, 8
movsx ecx, ah
mov esi, 1
mov rdi, r13
sar edx, 24
mov r9d, ecx
lea rcx, .LC22[rip]
xor eax, eax
push rdx
.cfi_def_cfa_offset 96
mov edx, 10
call __sprintf_chk@PLT
lea r12, 32[rsp]
mov r8, rbx
xor eax, eax
lea rcx, .LC23[rip]
mov edx, 24
mov esi, 1
mov rdi, r12
call __sprintf_chk@PLT
mov rdx, r12
mov rcx, r13
mov edi, 1
lea rsi, .LC24[rip]
xor eax, eax
call __printf_chk@PLT
pop rax
.cfi_def_cfa_offset 88
pop rdx
.cfi_def_cfa_offset 80
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L854
add rsp, 48
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L854:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE121:
.size dotNodeLabel, .-dotNodeLabel
.section .rodata.str1.1
.LC25:
.string "%s [label=%zu shape=circle]\n"
.text
.p2align 4
.globl dotNodeGroup
.type dotNodeGroup, @function
dotNodeGroup:
.LFB122:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r8, rdi
mov edx, 24
lea rcx, .LC23[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rsi
mov esi, 1
sub rsp, 40
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov r13, rsp
mov rdi, r13
call __sprintf_chk@PLT
xor eax, eax
mov rcx, r12
mov rdx, r13
lea rsi, .LC25[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L858
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L858:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE122:
.size dotNodeGroup, .-dotNodeGroup
.section .rodata.str1.1
.LC26:
.string "%s [label=%s shape=box]\n"
.text
.p2align 4
.globl dotProbe
.type dotProbe, @function
dotProbe:
.LFB123:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov edx, esi
mov eax, esi
movsx r8d, sil
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
sar edx, 24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
sub rsp, 48
.cfi_def_cfa_offset 80
mov rcx, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rcx
xor ecx, ecx
lea r13, 6[rsp]
push rdx
.cfi_def_cfa_offset 88
mov edx, esi
sal edx, 8
movsx ecx, ah
mov esi, 1
mov rdi, r13
sar edx, 24
mov r9d, ecx
lea rcx, .LC22[rip]
xor eax, eax
push rdx
.cfi_def_cfa_offset 96
mov edx, 10
call __sprintf_chk@PLT
lea r12, 32[rsp]
mov r8, rbx
xor eax, eax
lea rcx, .LC23[rip]
mov edx, 24
mov esi, 1
mov rdi, r12
call __sprintf_chk@PLT
mov rdx, r12
mov rcx, r13
mov edi, 1
lea rsi, .LC26[rip]
xor eax, eax
call __printf_chk@PLT
pop rax
.cfi_def_cfa_offset 88
pop rdx
.cfi_def_cfa_offset 80
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L862
add rsp, 48
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L862:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE123:
.size dotProbe, .-dotProbe
.section .rodata.str1.1
.LC27:
.string "nil"
.LC28:
.string "%zu%zu"
.LC29:
.string "%s -> %s [label=%s]\n"
.text
.p2align 4
.globl dotTree_rec
.type dotTree_rec, @function
dotTree_rec:
.LFB124:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rsi
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 120
.cfi_def_cfa_offset 176
mov QWORD PTR 8[rsp], rdx
mov rbx, QWORD PTR fs:40
mov QWORD PTR 104[rsp], rbx
xor ebx, ebx
test rdx, rdx
je .L882
mov eax, DWORD PTR [rdi]
mov esi, DWORD PTR 120[rdi]
test eax, eax
je .L883
cmp BYTE PTR 124[rbp], 0
mov rdi, r12
je .L868
call dotProbe
.L869:
lea rax, [r12+r12*4]
mov QWORD PTR 24[rsp], r12
xor r15d, r15d
lea r13, [rax+rax*4]
lea rax, 0[0+r13*4]
mov QWORD PTR 16[rsp], rax
.p2align 4,,10
.p2align 3
.L875:
cmp QWORD PTR 8[rbp+r15*8], 0
je .L870
mov rax, QWORD PTR 16[rsp]
xor r8d, r8d
lea r14, [rax+r15]
lea rax, tbl[rip]
.L871:
xor r9d, r9d
.L874:
cmp DWORD PTR [rax+r9*4], r15d
je .L884
add r9, 1
cmp r9, 5
jne .L874
add r8, 1
add rax, 20
cmp r8, 5
jne .L871
lea r12, .LC27[rip]
.L873:
lea rbx, 80[rsp]
mov r8, r14
mov edx, 24
xor eax, eax
lea rcx, .LC23[rip]
mov esi, 1
mov rdi, rbx
call __sprintf_chk@PLT
lea r13, 48[rsp]
mov r8, QWORD PTR 24[rsp]
xor eax, eax
lea rcx, .LC23[rip]
mov edx, 24
mov esi, 1
mov rdi, r13
call __sprintf_chk@PLT
mov rdx, r13
mov edi, 1
mov r8, r12
lea rsi, .LC29[rip]
mov rcx, rbx
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
mov rdi, QWORD PTR 8[rbp+r15*8]
mov rsi, r14
lea rdx, -1[rax]
call dotTree_rec
.L870:
add r15, 1
cmp r15, 13
jne .L875
.L863:
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L881
add rsp, 120
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L883:
.cfi_restore_state
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L881
add rsp, 120
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rdi, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp dotNodeLabel
.p2align 4,,10
.p2align 3
.L884:
.cfi_restore_state
lea r12, 41[rsp]
sub r9, r8
mov edx, 7
xor eax, eax
lea rcx, .LC28[rip]
mov esi, 1
mov rdi, r12
call __sprintf_chk@PLT
jmp .L873
.L882:
call cnt
lea r14, 80[rsp]
mov r8, rsi
lea rcx, .LC23[rip]
mov r13, rax
mov rdi, r14
mov edx, 24
mov esi, 1
xor eax, eax
call __sprintf_chk@PLT
mov rcx, r13
mov rdx, r14
mov edi, 1
lea rsi, .LC25[rip]
xor eax, eax
call __printf_chk@PLT
jmp .L863
.L868:
call dotNodeLabel
jmp .L869
.L881:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE124:
.size dotTree_rec, .-dotTree_rec
.section .rodata.str1.1
.LC30:
.string "digraph tree {"
.LC31:
.string "}"
.text
.p2align 4
.globl dotTree
.type dotTree, @function
dotTree:
.LFB125:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rdi
lea rdi, .LC30[rip]
call puts@PLT
mov rdi, rbp
mov edx, 1000
mov esi, 1
call dotTree_rec
lea rdi, .LC31[rip]
pop rbp
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE125:
.size dotTree, .-dotTree
.p2align 4
.globl dotTreeh
.type dotTreeh, @function
dotTreeh:
.LFB126:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rsi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
lea rdi, .LC30[rip]
sub rsp, 8
.cfi_def_cfa_offset 32
call puts@PLT
mov rdi, rbp
mov rdx, r12
mov esi, 1
call dotTree_rec
add rsp, 8
.cfi_def_cfa_offset 24
lea rdi, .LC31[rip]
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE126:
.size dotTreeh, .-dotTreeh
.p2align 4
.globl init_lst
.type init_lst, @function
init_lst:
.LFB129:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edi, 24
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14d, 50462976
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, -10
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea r13, 19[rsp]
lea rbx, 20[rsp]
call malloc@PLT
mov edi, 64
mov QWORD PTR [rax], 0
mov r12, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov QWORD PTR 16[r12], rax
.p2align 4,,10
.p2align 3
.L897:
mov DWORD PTR 20[rsp], r14d
mov ecx, 1
.L890:
movzx edx, BYTE PTR 0[r13+rcx]
mov rax, rcx
jmp .L893
.p2align 4,,10
.p2align 3
.L914:
add rax, 1
cmp rax, 4
je .L913
.L893:
cmp BYTE PTR [rbx+rax], dl
jne .L914
.L900:
mov DWORD PTR 20[rsp], r14d
sar r14d, 24
lea rsi, 23[rsp]
lea ecx, 1[r14]
movsx dx, cl
mov eax, ecx
mov BYTE PTR 23[rsp], cl
imul edx, edx, 103
sar al, 7
sar dx, 10
sub dl, al
je .L899
.p2align 4,,10
.p2align 3
.L896:
mov eax, edx
sub rsi, 1
imul eax, ebp
add ecx, eax
mov BYTE PTR 1[rsi], cl
movzx ecx, BYTE PTR [rsi]
add ecx, edx
movsx dx, cl
mov eax, ecx
mov BYTE PTR [rsi], cl
imul edx, edx, 103
sar al, 7
sar dx, 10
sub dl, al
jne .L896
.L899:
mov r14d, DWORD PTR 20[rsp]
cmp r14d, 117901321
jne .L897
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L915
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L913:
.cfi_restore_state
add rcx, 1
cmp rcx, 4
jne .L890
mov rdx, QWORD PTR [r12]
mov rdi, QWORD PTR 16[r12]
lea r15, 1[rdx]
cmp r15, QWORD PTR 8[r12]
je .L916
.L895:
mov QWORD PTR [r12], r15
mov DWORD PTR [rdi+rdx*4], r14d
jmp .L900
.L916:
lea rax, [r15+r15]
lea rsi, 0[0+r15*8]
mov QWORD PTR 8[rsp], rdx
mov QWORD PTR 8[r12], rax
call realloc@PLT
mov rdx, QWORD PTR 8[rsp]
test rax, rax
mov QWORD PTR 16[r12], rax
mov rdi, rax
jne .L895
call vec_seq_add.part.0
.L915:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE129:
.size init_lst, .-init_lst
.section .rodata.str1.1
.LC32:
.string "%zu,"
.text
.p2align 4
.globl test_sieveg
.type test_sieveg, @function
test_sieveg:
.LFB130:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor eax, eax
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea rbp, .LC32[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
call init_lst
mov esi, 50462976
mov rdi, rax
call sieveg
mov rbx, rax
lea r12, 112[rax]
.p2align 4,,10
.p2align 3
.L918:
mov rdx, QWORD PTR [rbx]
mov rsi, rbp
mov edi, 1
xor eax, eax
add rbx, 8
call __printf_chk@PLT
cmp rbx, r12
jne .L918
mov edi, 10
call putchar@PLT
pop rbx
.cfi_def_cfa_offset 24
xor eax, eax
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE130:
.size test_sieveg, .-test_sieveg
.section .rodata.str1.1
.LC33:
.string "%s%c\n"
.text
.p2align 4
.globl test_sieve
.type test_sieve, @function
test_sieve:
.LFB131:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
lea r12, .LC22[rip]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
call init_lst
mov esi, 50462976
mov rdi, rax
call sieve
mov r13, rax
lea r14, 112[rax]
.p2align 4,,10
.p2align 3
.L923:
mov r15, QWORD PTR 0[r13]
xor ebx, ebx
lea rbp, 14[rsp]
cmp QWORD PTR [r15], 0
jne .L922
jmp .L926
.p2align 4,,10
.p2align 3
.L925:
jbe .L934
.L922:
mov rax, QWORD PTR 16[r15]
mov esi, 1
mov rdi, rbp
mov eax, DWORD PTR [rax+rbx*4]
add rbx, 1
mov edx, eax
movsx ecx, ah
movsx r8d, al
sar edx, 24
mov r9d, ecx
mov rcx, r12
push rdx
.cfi_def_cfa_offset 104
mov edx, eax
xor eax, eax
sal edx, 8
sar edx, 24
push rdx
.cfi_def_cfa_offset 112
mov edx, 10
call __sprintf_chk@PLT
mov rdx, rbp
mov ecx, 44
xor eax, eax
lea rsi, .LC33[rip]
mov edi, 1
call __printf_chk@PLT
pop rax
.cfi_def_cfa_offset 104
pop rdx
.cfi_def_cfa_offset 96
cmp QWORD PTR [r15], rbx
jne .L925
.L926:
mov edi, 10
add r13, 8
call putchar@PLT
cmp r14, r13
jne .L923
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L935
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L934:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L935:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE131:
.size test_sieve, .-test_sieve
.section .rodata.str1.1
.LC34:
.string "eqk: "
.LC35:
.string "%f\n"
.text
.p2align 4
.globl test_eqk
.type test_eqk, @function
test_eqk:
.LFB132:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 88
.cfi_def_cfa_offset 144
mov rax, QWORD PTR fs:40
mov QWORD PTR 72[rsp], rax
xor eax, eax
call init_lst
mov esi, 50462976
mov rdi, rax
call sieve
mov edi, 24
mov rbp, rax
call malloc@PLT
mov edi, 64
lea r12, 112[rbp]
mov r15, rbp
mov QWORD PTR [rax], 0
mov rbx, rax
mov QWORD PTR 8[rax], 16
call malloc@PLT
mov QWORD PTR 24[rsp], rbp
mov QWORD PTR 16[rbx], rax
jmp .L940
.L979:
mov QWORD PTR 8[rbx], rdx
mov rdi, QWORD PTR 16[rbx]
lea rsi, 0[0+rdx*4]
call realloc@PLT
mov QWORD PTR 32[rsp], rax
mov QWORD PTR 16[rbx], rax
test rax, rax
je .L938
mov rax, QWORD PTR 0[r13]
.L939:
mov rcx, QWORD PTR 32[rsp]
mov rsi, QWORD PTR 16[r13]
lea rdx, 0[0+rax*4]
add r15, 8
lea rdi, [rcx+r14*4]
call memcpy@PLT
add r14, QWORD PTR 0[r13]
mov rdi, QWORD PTR 16[r13]
mov QWORD PTR [rbx], r14
mov QWORD PTR 16[rsp], r14
call free@PLT
mov rdi, r13
call free@PLT
cmp r12, r15
je .L978
.L940:
mov rdi, QWORD PTR [r15]
xor edx, edx
mov rsi, rdi
call eqkg
mov r14, QWORD PTR [rbx]
mov r13, rax
mov rax, QWORD PTR [rax]
lea rdx, [r14+rax]
cmp rdx, QWORD PTR 8[rbx]
jnb .L979
mov rcx, QWORD PTR 16[rbx]
mov QWORD PTR 32[rsp], rcx
jmp .L939
.L978:
xor eax, eax
mov edi, 1
lea r13, 62[rsp]
xor r12d, r12d
lea rsi, .LC34[rip]
lea rbx, .LC22[rip]
call __printf_chk@PLT
cmp QWORD PTR 16[rsp], 0
je .L943
.L941:
mov rax, QWORD PTR 32[rsp]
mov esi, 1
mov rdi, r13
mov eax, DWORD PTR [rax+r12*4]
add r12, 1
mov edx, eax
movsx ecx, ah
movsx r8d, al
sar edx, 24
mov r9d, ecx
mov rcx, rbx
push rdx
.cfi_def_cfa_offset 152
mov edx, eax
xor eax, eax
sal edx, 8
sar edx, 24
push rdx
.cfi_def_cfa_offset 160
mov edx, 10
call __sprintf_chk@PLT
mov edi, 1
mov rdx, r13
xor eax, eax
mov ecx, 44
lea rsi, .LC33[rip]
call __printf_chk@PLT
pop rdi
.cfi_def_cfa_offset 152
pop r8
.cfi_def_cfa_offset 144
cmp QWORD PTR 16[rsp], r12
jne .L941
.L943:
mov edi, 10
call putchar@PLT
lea rax, 104[rbp]
mov QWORD PTR 40[rsp], rax
.L942:
mov rax, QWORD PTR 24[rsp]
xor ebx, ebx
lea r13, 62[rsp]
mov rbp, QWORD PTR [rax]
cmp QWORD PTR 0[rbp], 0
jne .L944
jmp .L949
.p2align 4,,10
.p2align 3
.L948:
jbe .L947
.L944:
mov rax, QWORD PTR 16[rbp]
mov esi, 1
mov rdi, r13
mov eax, DWORD PTR [rax+rbx*4]
add rbx, 1
mov edx, eax
movsx ecx, ah
movsx r8d, al
sar edx, 24
mov r9d, ecx
lea rcx, .LC22[rip]
push rdx
.cfi_def_cfa_offset 152
mov edx, eax
xor eax, eax
sal edx, 8
sar edx, 24
push rdx
.cfi_def_cfa_offset 160
mov edx, 10
call __sprintf_chk@PLT
mov ecx, 44
mov rdx, r13
xor eax, eax
lea rsi, .LC33[rip]
mov edi, 1
call __printf_chk@PLT
pop rcx
.cfi_def_cfa_offset 152
pop rsi
.cfi_def_cfa_offset 144
cmp QWORD PTR 0[rbp], rbx
jne .L948
.L949:
mov edi, 10
xor r12d, r12d
lea r13, 62[rsp]
call putchar@PLT
cmp QWORD PTR 16[rsp], 0
lea rbp, .LC32[rip]
je .L946
.p2align 4,,10
.p2align 3
.L945:
mov rbx, QWORD PTR 32[rsp]
mov esi, 1
mov rdi, r13
mov eax, DWORD PTR [rbx+r12*4]
mov edx, eax
movsx ecx, ah
movsx r8d, al
sar edx, 24
mov r9d, ecx
lea rcx, .LC22[rip]
push rdx
.cfi_def_cfa_offset 152
mov edx, eax
xor eax, eax
sal edx, 8
sar edx, 24
push rdx
.cfi_def_cfa_offset 160
mov edx, 10
call __sprintf_chk@PLT
mov rdi, r13
call puts@PLT
mov rax, QWORD PTR 40[rsp]
mov esi, DWORD PTR [rbx+r12*4]
mov rdi, QWORD PTR [rax]
call sieveg
mov r15, rax
lea rbx, 112[rax]
pop rax
.cfi_def_cfa_offset 152
pop rdx
.cfi_def_cfa_offset 144
mov r14, r15
.p2align 4,,10
.p2align 3
.L951:
mov rdx, QWORD PTR [r14]
mov rsi, rbp
mov edi, 1
xor eax, eax
add r14, 8
call __printf_chk@PLT
cmp rbx, r14
jne .L951
mov edi, 10
call putchar@PLT
mov rax, r15
xor esi, esi
.p2align 4,,10
.p2align 3
.L952:
add rsi, QWORD PTR [rax]
add rax, 8
mov r14, rsi
cmp rbx, rax
jne .L952
pxor xmm2, xmm2
jmp .L958
.p2align 4,,10
.p2align 3
.L953:
add r15, 8
cmp rbx, r15
je .L980
.L958:
mov rax, QWORD PTR [r15]
test rax, rax
je .L953
js .L954
pxor xmm1, xmm1
cvtsi2sd xmm1, rax
test r14, r14
js .L956
.L982:
pxor xmm0, xmm0
cvtsi2sd xmm0, r14
.L957:
pxor xmm3, xmm3
movsd QWORD PTR 8[rsp], xmm2
add r15, 8
addsd xmm0, xmm3
divsd xmm1, xmm0
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call log@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm2, QWORD PTR 8[rsp]
mulsd xmm1, xmm0
subsd xmm2, xmm1
cmp rbx, r15
jne .L958
.L980:
movapd xmm0, xmm2
lea rsi, .LC35[rip]
mov edi, 1
mov eax, 1
call __printf_chk@PLT
add r12, 1
cmp r12, QWORD PTR 16[rsp]
jne .L945
.L946:
add QWORD PTR 24[rsp], 8
mov rax, QWORD PTR 24[rsp]
cmp QWORD PTR 40[rsp], rax
jne .L942
mov rax, QWORD PTR 72[rsp]
sub rax, QWORD PTR fs:40
jne .L981
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L954:
.cfi_restore_state
mov rsi, rax
and eax, 1
pxor xmm1, xmm1
shr rsi
or rsi, rax
cvtsi2sd xmm1, rsi
addsd xmm1, xmm1
test r14, r14
jns .L982
.L956:
mov rax, r14
mov rsi, r14
pxor xmm0, xmm0
shr rax
and esi, 1
or rax, rsi
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L957
.L947:
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.L938:
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 95
lea rsi, .LC0[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.L981:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE132:
.size test_eqk, .-test_eqk
.section .rodata.str1.1
.LC36:
.string "height=%zu\n"
.LC37:
.string "%d,"
.LC38:
.string "sum=%d,hsum=%d\n"
.LC39:
.string "probe=%zu\n"
.section .rodata.str1.8
.align 8
.LC40:
.string "active=%zu hit=%zu miss=%zu conflict=%zu hitrate=%f conflict=%f\n"
.text
.p2align 4
.globl test_build
.type test_build, @function
test_build:
.LFB133:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
xor eax, eax
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
call init_lst
xor esi, esi
mov edx, 3221223576
lea rdi, cache_array[rip]
mov r12, rax
mov QWORD PTR lst[rip], rax
call memset@PLT
cmp QWORD PTR [r12], 0
je .L984
mov ecx, 50462976
mov rdx, r12
xor esi, esi
lea rdi, selMaxL[rip]
call buildTh1
mov QWORD PTR [rsp], rax
test rax, rax
je .L984
xor r10d, r10d
cmp DWORD PTR [rax], 1
je .L1022
.L985:
mov rbx, QWORD PTR [rsp]
lea rsi, .LC36[rip]
mov edi, 1
movzx eax, BYTE PTR 124[rbx]
mov edx, eax
mov BYTE PTR 15[rsp], al
xor eax, eax
xor edx, 1
movzx edx, dl
add rdx, r10
call __printf_chk@PLT
mov rdi, rbx
call level
cmp QWORD PTR [rax], 0
mov r14, rax
je .L987
.L1003:
xor r15d, r15d
xor r12d, r12d
lea rbp, .LC37[rip]
xor r13d, r13d
jmp .L988
.p2align 4,,10
.p2align 3
.L989:
jbe .L1023
.L988:
mov rax, QWORD PTR 16[r14]
mov rsi, rbp
mov edi, 1
mov ebx, DWORD PTR [rax+r15*4]
add r15, 1
xor eax, eax
mov edx, ebx
add r12d, ebx
call __printf_chk@PLT
imul ebx, r15d
add r13d, ebx
cmp QWORD PTR [r14], r15
jne .L989
xor eax, eax
mov ecx, r13d
mov edx, r12d
mov edi, 1
lea rsi, .LC38[rip]
call __printf_chk@PLT
cmp QWORD PTR [rsp], 0
je .L1007
.L1005:
mov rax, QWORD PTR [rsp]
xor esi, esi
cmp DWORD PTR [rax], 1
je .L1024
.L991:
mov rax, QWORD PTR [rsp]
movzx r12d, BYTE PTR 124[rax]
add r12, rsi
.L990:
mov rdx, r12
lea rsi, .LC39[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov r9, QWORD PTR conflict[rip]
mov r8, QWORD PTR miss[rip]
mov rcx, QWORD PTR hit[rip]
test r9, r9
js .L993
pxor xmm1, xmm1
cvtsi2sd xmm1, r9
test r8, r8
js .L995
.L1026:
pxor xmm0, xmm0
cvtsi2sd xmm0, r8
.L996:
pxor xmm3, xmm3
addsd xmm0, xmm3
divsd xmm1, xmm0
test rcx, rcx
js .L997
pxor xmm0, xmm0
cvtsi2sd xmm0, rcx
.L998:
mov rax, r8
add rax, rcx
js .L999
pxor xmm2, xmm2
cvtsi2sd xmm2, rax
.L1000:
addsd xmm2, xmm3
mov edi, 1
mov eax, 2
mov rdx, QWORD PTR active[rip]
lea rsi, .LC40[rip]
divsd xmm0, xmm2
call __printf_chk@PLT
lea rdi, .LC30[rip]
call puts@PLT
mov rbx, QWORD PTR [rsp]
mov edx, 1
mov esi, 1
mov rdi, rbx
call dotTree_rec
lea rdi, .LC31[rip]
call puts@PLT
mov rdi, QWORD PTR 16[r14]
call free@PLT
mov rdi, r14
call free@PLT
mov rbp, QWORD PTR lst[rip]
mov rdi, QWORD PTR 16[rbp]
call free@PLT
mov rdi, rbp
call free@PLT
test rbx, rbx
je .L1012
mov eax, DWORD PTR [rbx]
mov rdi, QWORD PTR [rsp]
test eax, eax
je .L1025
call free_tree.part.0
.L1012:
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L993:
.cfi_restore_state
mov rax, r9
mov rdx, r9
pxor xmm1, xmm1
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm1, rax
addsd xmm1, xmm1
test r8, r8
jns .L1026
.L995:
mov rax, r8
mov rdx, r8
pxor xmm0, xmm0
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L996
.p2align 4,,10
.p2align 3
.L999:
mov rdx, rax
and eax, 1
pxor xmm2, xmm2
shr rdx
or rdx, rax
cvtsi2sd xmm2, rdx
addsd xmm2, xmm2
jmp .L1000
.p2align 4,,10
.p2align 3
.L997:
mov rax, rcx
mov rdx, rcx
pxor xmm0, xmm0
shr rax
and edx, 1
or rax, rdx
cvtsi2sd xmm0, rax
addsd xmm0, xmm0
jmp .L998
.p2align 4,,10
.p2align 3
.L1022:
lea r9, 8[rax]
lea rbx, 112[rax]
.p2align 4,,10
.p2align 3
.L986:
mov rdi, QWORD PTR [r9]
mov esi, 2
add r9, 8
call height_rec
add r10, rax
cmp rbx, r9
jne .L986
jmp .L985
.p2align 4,,10
.p2align 3
.L1024:
lea rcx, 8[rax]
lea r8, 112[rax]
.p2align 4,,10
.p2align 3
.L992:
mov rdi, QWORD PTR [rcx]
add rcx, 8
call probe_cnt
add rsi, rax
cmp r8, rcx
jne .L992
jmp .L991
.p2align 4,,10
.p2align 3
.L1025:
call free@PLT
jmp .L1012
.p2align 4,,10
.p2align 3
.L984:
xor edx, edx
lea rsi, .LC36[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor edi, edi
call level
mov QWORD PTR [rsp], 0
mov r12, QWORD PTR [rax]
mov r14, rax
test r12, r12
jne .L1003
xor ecx, ecx
xor edx, edx
lea rsi, .LC38[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L990
.p2align 4,,10
.p2align 3
.L1007:
xor r12d, r12d
jmp .L990
.L987:
xor ecx, ecx
xor edx, edx
lea rsi, .LC38[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L1005
.L1023:
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 108
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE133:
.size test_build, .-test_build
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB134:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
xor eax, eax
call test_build
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE134:
.size main, .-main
.section .rodata
.align 8
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 9
__PRETTY_FUNCTION__.1:
.string "selMaxEC"
.align 8
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 13
__PRETTY_FUNCTION__.2:
.string "vec_pair_idx"
.align 8
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 13
__PRETTY_FUNCTION__.3:
.string "vec_pair_add"
.align 8
.type __PRETTY_FUNCTION__.4, @object
.size __PRETTY_FUNCTION__.4, 10
__PRETTY_FUNCTION__.4:
.string "selMinHCE"
.align 8
.type __PRETTY_FUNCTION__.5, @object
.size __PRETTY_FUNCTION__.5, 9
__PRETTY_FUNCTION__.5:
.string "selMinHC"
.align 8
.type __PRETTY_FUNCTION__.6, @object
.size __PRETTY_FUNCTION__.6, 15
__PRETTY_FUNCTION__.6:
.string "vec_seq_append"
.align 8
.type __PRETTY_FUNCTION__.7, @object
.size __PRETTY_FUNCTION__.7, 8
__PRETTY_FUNCTION__.7:
.string "selMinH"
.align 8
.type __PRETTY_FUNCTION__.8, @object
.size __PRETTY_FUNCTION__.8, 8
__PRETTY_FUNCTION__.8:
.string "selMaxL"
.align 8
.type __PRETTY_FUNCTION__.9, @object
.size __PRETTY_FUNCTION__.9, 8
__PRETTY_FUNCTION__.9:
.string "selMaxE"
.type __PRETTY_FUNCTION__.10, @object
.size __PRETTY_FUNCTION__.10, 6
__PRETTY_FUNCTION__.10:
.string "first"
.align 8
.type __PRETTY_FUNCTION__.11, @object
.size __PRETTY_FUNCTION__.11, 11
__PRETTY_FUNCTION__.11:
.string "vec_vp_add"
.align 8
.type __PRETTY_FUNCTION__.12, @object
.size __PRETTY_FUNCTION__.12, 11
__PRETTY_FUNCTION__.12:
.string "vec_vp_idx"
.type __PRETTY_FUNCTION__.13, @object
.size __PRETTY_FUNCTION__.13, 5
__PRETTY_FUNCTION__.13:
.string "eqkg"
.type __PRETTY_FUNCTION__.14, @object
.size __PRETTY_FUNCTION__.14, 7
__PRETTY_FUNCTION__.14:
.string "sieveg"
.align 8
.type __PRETTY_FUNCTION__.15, @object
.size __PRETTY_FUNCTION__.15, 12
__PRETTY_FUNCTION__.15:
.string "vec_seq_add"
.align 8
.type __PRETTY_FUNCTION__.16, @object
.size __PRETTY_FUNCTION__.16, 8
__PRETTY_FUNCTION__.16:
.string "chk2idx"
.align 8
.type __PRETTY_FUNCTION__.17, @object
.size __PRETTY_FUNCTION__.17, 12
__PRETTY_FUNCTION__.17:
.string "vec_seq_idx"
.globl conflict
.bss
.align 8
.type conflict, @object
.size conflict, 8
conflict:
.zero 8
.globl miss
.align 8
.type miss, @object
.size miss, 8
miss:
.zero 8
.globl hit
.align 8
.type hit, @object
.size hit, 8
hit:
.zero 8
.globl active
.align 8
.type active, @object
.size active, 8
active:
.zero 8
.globl cache_array
.align 32
.type cache_array, @object
.size cache_array, 3221223576
cache_array:
.zero 3221223576
.globl tbl
.data
.align 32
.type tbl, @object
.size tbl, 100
tbl:
.long 0
.long 1
.long 2
.long 3
.long 4
.long -1
.long 5
.long 6
.long 7
.long 8
.long -1
.long -1
.long 9
.long 10
.long 11
.long -1
.long -1
.long -1
.long 12
.long -1
.long -1
.long -1
.long -1
.long -1
.long 13
.globl lst
.bss
.align 8
.type lst, @object
.size lst, 8
lst:
.zero 8
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC9:
.long 0
.long -1074790400
.align 8
.LC18:
.long -1717986918
.long 1071225241
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100095.c"
.text
.align 2
.global cmpsize
.syntax unified
.arm
.fpu softvfp
.type cmpsize, %function
cmpsize:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, [r0]
ldr r0, [r1]
sub r0, r0, r3
bx lr
.size cmpsize, .-cmpsize
.global __aeabi_dcmplt
.global __aeabi_dcmpgt
.align 2
.global cmppair
.syntax unified
.arm
.fpu softvfp
.type cmppair, %function
cmppair:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r6, r7, r8, r9, lr}
add r9, r1, #8
ldmia r9, {r8-r9}
add r7, r0, #8
ldmia r7, {r6-r7}
mov r2, r8
mov r1, r7
mov r3, r9
mov r0, r6
bl __aeabi_dcmplt
mov r4, r0
mov r2, r8
subs r4, r4, #0
mov r3, r9
mov r0, r6
mov r1, r7
movne r4, #1
bl __aeabi_dcmpgt
cmp r0, #0
moveq r0, r4
subne r0, r4, #1
pop {r4, r6, r7, r8, r9, pc}
.size cmppair, .-cmppair
.align 2
.syntax unified
.arm
.fpu softvfp
.type height_rec, %function
height_rec:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
subs r4, r0, #0
beq .L11
ldr r3, [r4]
mov r7, r1
cmp r3, #1
movne r6, #0
beq .L15
.L9:
ldrb r0, [r4, #64] @ zero_extendqisi2
eor r0, r0, #1
mla r0, r7, r0, r6
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L15:
mov r5, r4
mov r6, #0
add r9, r1, #1
add r8, r4, #52
.L10:
ldr r0, [r5, #4]!
mov r1, r9
bl height_rec
cmp r8, r5
add r6, r6, r0
bne .L10
b .L9
.L11:
mov r0, r4
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.size height_rec, .-height_rec
.align 2
.syntax unified
.arm
.fpu softvfp
.type probe_cnt, %function
probe_cnt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r5, r0, #0
beq .L20
ldr r3, [r5]
cmp r3, #1
movne r6, #0
beq .L24
.L18:
ldrb r0, [r5, #64] @ zero_extendqisi2
add r0, r0, r6
pop {r4, r5, r6, r7, r8, pc}
.L24:
mov r4, r5
mov r6, #0
add r7, r5, #52
.L19:
ldr r0, [r4, #4]!
bl probe_cnt
cmp r7, r4
add r6, r6, r0
bne .L19
b .L18
.L20:
mov r0, r5
pop {r4, r5, r6, r7, r8, pc}
.size probe_cnt, .-probe_cnt
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC2:
.ascii "the_stack_data/100095.c\000"
.align 2
.LC3:
.ascii "i < p->i\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type vec_seq_idx.isra.0.part.0, %function
vec_seq_idx.isra.0.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #108
push {r4, lr}
ldr r3, .L27
ldr r1, .L27+4
ldr r0, .L27+8
bl __assert_fail
.L28:
.align 2
.L27:
.word .LANCHOR0
.word .LC2
.word .LC3
.size vec_seq_idx.isra.0.part.0, .-vec_seq_idx.isra.0.part.0
.align 2
.syntax unified
.arm
.fpu softvfp
.type vec_pair_idx.isra.0.part.0, %function
vec_pair_idx.isra.0.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #167
push {r4, lr}
ldr r3, .L31
ldr r1, .L31+4
ldr r0, .L31+8
bl __assert_fail
.L32:
.align 2
.L31:
.word .LANCHOR0+12
.word .LC2
.word .LC3
.size vec_pair_idx.isra.0.part.0, .-vec_pair_idx.isra.0.part.0
.section .rodata.str1.4
.align 2
.LC4:
.ascii "p->pa != NULL\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type vec_seq_add.part.0, %function
vec_seq_add.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #85
push {r4, lr}
ldr r3, .L35
ldr r1, .L35+4
ldr r0, .L35+8
bl __assert_fail
.L36:
.align 2
.L35:
.word .LANCHOR0+28
.word .LC2
.word .LC4
.size vec_seq_add.part.0, .-vec_seq_add.part.0
.align 2
.syntax unified
.arm
.fpu softvfp
.type vec_seq_append.isra.0.part.0, %function
vec_seq_append.isra.0.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #95
push {r4, lr}
ldr r3, .L39
ldr r1, .L39+4
ldr r0, .L39+8
bl __assert_fail
.L40:
.align 2
.L39:
.word .LANCHOR0+40
.word .LC2
.word .LC4
.size vec_seq_append.isra.0.part.0, .-vec_seq_append.isra.0.part.0
.align 2
.syntax unified
.arm
.fpu softvfp
.type level, %function
level:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, [r0]
sub sp, sp, #28
cmp r3, #0
str r0, [sp, #20]
mov r0, #12
beq .L77
bl malloc
mov r5, #0
mov r4, #16
mov r9, r0
str r5, [r0]
str r4, [r0, #4]
mov r0, #64
bl malloc
ldr r3, [sp, #20]
str r5, [sp, #12]
mov fp, r3
add r3, r3, #52
str r4, [sp, #16]
str r0, [r9, #8]
str r3, [sp, #8]
.L57:
ldr r0, [fp, #4]!
cmp r0, #0
beq .L44
bl level
mov r7, r0
mov r0, #12
bl malloc
mov r4, r0
ldr r3, [sp, #12]
mov r0, #64
str r3, [r4]
ldr r3, [sp, #16]
str r3, [r4, #4]
bl malloc
ldr r5, [r7]
ldr r6, [r9]
str r0, [r4, #8]
cmp r6, r5
movcc r5, r6
cmp r5, #0
beq .L45
str fp, [sp]
mov r8, #0
mov fp, r5
str r6, [sp, #4]
b .L49
.L48:
add r8, r8, #1
cmp fp, r8
str r10, [r4]
str r5, [r0, r6, lsl #2]
beq .L78
.L49:
ldr r1, [r9]
cmp r1, r8
bls .L47
ldr r0, [r7]
ldr r1, [r9, #8]
cmp r0, r8
ldr r5, [r1, r8, lsl #2]
bls .L47
ldr r1, [r7, #8]
ldr r6, [r4]
ldr r0, [r4, #4]
ldr r1, [r1, r8, lsl #2]
add r10, r6, #1
cmp r10, r0
add r5, r5, r1
ldr r0, [r4, #8]
bne .L48
lsl ip, r10, #1
lsl r1, r10, #3
str ip, [r4, #4]
bl realloc
cmp r0, #0
str r0, [r4, #8]
bne .L48
.L52:
mov r2, #85
ldr r3, .L80
ldr r1, .L80+4
ldr r0, .L80+8
bl __assert_fail
.L54:
mov r0, r3
bl free
mov r0, r7
bl free
ldr r0, [r9, #8]
bl free
mov r0, r9
bl free
mov r9, r4
.L44:
ldr r3, [sp, #8]
cmp fp, r3
bne .L57
mov r0, #12
bl malloc
mov r3, #16
mov r4, r0
mov r0, #64
str r3, [r4, #4]
bl malloc
mov r1, #1
ldr r2, [sp, #20]
ldr r6, [r9]
ldrb r2, [r2, #64] @ zero_extendqisi2
add ip, r6, r1
eor r2, r2, r1
cmp ip, #15
mov r3, r0
mov r5, r4
str r1, [r4]
str r2, [r0]
str r0, [r4, #8]
bhi .L79
.L58:
ldr r7, [r9, #8]
lsl r2, r6, #2
mov r1, r7
add r0, r3, #4
bl memcpy
ldr r3, [r4]
mov r0, r7
add r3, r3, r6
str r3, [r4]
bl free
mov r0, r9
bl free
mov r0, r5
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L78:
mov r5, fp
ldr r6, [sp, #4]
ldr fp, [sp]
.L45:
cmp r6, r5
bls .L59
ldr r8, [r4]
ldr r0, [r4, #8]
b .L53
.L51:
add r5, r5, #1
add r3, r0, r8, lsl #2
cmp r6, r5
str r8, [r4]
str r10, [r3, #-4]
beq .L50
.L53:
ldr r2, [r4, #4]
ldr r3, [r9, #8]
add r8, r8, #1
cmp r8, r2
ldr r10, [r3, r5, lsl #2]
bne .L51
lsl r3, r8, #1
lsl r1, r8, #3
str r3, [r4, #4]
bl realloc
cmp r0, #0
str r0, [r4, #8]
bne .L51
b .L52
.L59:
mov r6, r5
.L50:
ldr r2, [r7]
ldr r3, [r7, #8]
cmp r6, r2
bcs .L54
ldr r5, [r4]
ldr r0, [r4, #8]
add r5, r5, #1
b .L56
.L55:
add r2, r0, r5, lsl #2
str r8, [r2, #-4]
ldr r2, [r7]
add r6, r6, #1
cmp r6, r2
str r5, [r4]
add r5, r5, #1
bcs .L54
.L56:
ldr r2, [r4, #4]
ldr r8, [r3, r6, lsl #2]
cmp r2, r5
bne .L55
lsl r3, r5, #1
lsl r1, r5, #3
str r3, [r4, #4]
bl realloc
cmp r0, #0
str r0, [r4, #8]
beq .L52
ldr r3, [r7, #8]
b .L55
.L79:
lsl r1, ip, #2
str ip, [r4, #4]
bl realloc
cmp r0, #0
mov r3, r0
str r0, [r4, #8]
bne .L58
bl vec_seq_append.isra.0.part.0
.L77:
bl malloc
mov r3, #16
mov r5, r0
mov r0, #64
str r3, [r5, #4]
bl malloc
mov r3, #1
str r0, [r5, #8]
str r3, [r0]
mov r0, r5
str r3, [r5]
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L47:
mov r2, #108
ldr r3, .L80+12
ldr r1, .L80+4
ldr r0, .L80+16
bl __assert_fail
.L81:
.align 2
.L80:
.word .LANCHOR0+28
.word .LC2
.word .LC4
.word .LANCHOR0
.word .LC3
.size level, .-level
.align 2
.syntax unified
.arm
.fpu softvfp
.type vec_seq_eq.part.0, %function
vec_seq_eq.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr lr, [r0]
ldr r4, [r1]
cmp lr, r4
bne .L90
cmp lr, #0
beq .L89
mov r3, r1
ldr r1, [r0, #8]
ldr r2, [r3, #8]
ldr r0, [r1]
mov r3, #0
sub r2, r2, #4
b .L85
.L94:
add r3, r3, #1
cmp lr, r3
beq .L89
cmp r4, r3
ldr r0, [r1, #4]!
beq .L92
.L85:
ldr ip, [r2, #4]!
cmp ip, r0
beq .L94
.L90:
mov r0, #0
pop {r4, pc}
.L89:
mov r0, #1
pop {r4, pc}
.L92:
mov r2, #108
ldr r3, .L95
ldr r1, .L95+4
ldr r0, .L95+8
bl __assert_fail
.L96:
.align 2
.L95:
.word .LANCHOR0
.word .LC2
.word .LC3
.size vec_seq_eq.part.0, .-vec_seq_eq.part.0
.section .rodata.str1.4
.align 2
.LC5:
.ascii "a <= K\000"
.align 2
.LC6:
.ascii "b <= K\000"
.align 2
.LC7:
.ascii "r != -1\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC8:
.word __stack_chk_guard
.text
.align 2
.global sieve
.syntax unified
.arm
.fpu softvfp
.type sieve, %function
sieve:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L121
sub sp, sp, #36
mov r8, r0
mov r0, #56
mov r6, r1
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
bl malloc
mov r9, #0
mov r7, #16
str r0, [sp, #12]
sub r10, r0, #4
add r5, r0, #52
.L98:
mov r0, #12
bl malloc
mov r4, r0
mov r0, #64
str r9, [r4]
str r7, [r4, #4]
bl malloc
str r4, [r10, #4]!
cmp r5, r10
str r0, [r4, #8]
bne .L98
ldr r3, [r8]
cmp r3, #0
beq .L97
mov r4, #0
lsr r2, r6, #8
and r2, r2, #255
str r2, [sp, #8]
.L99:
cmp r4, r3
bcs .L115
mov r3, #0
and r9, r6, #255
add lr, sp, #24
mov r2, r3
mov r7, r9
mov fp, lr
ldr r1, [r8, #8]
lsr r0, r6, #16
ldr r5, [r1, r4, lsl #2]
str r6, [sp, #24]
str r5, [sp, #20]
and r0, r0, #255
lsr r10, r6, #24
add ip, sp, #20
str r4, [sp, #4]
.L102:
ldrb r1, [ip], #1 @ zero_extendqisi2
ldr r4, [sp, #8]
cmp r1, r9
addeq r3, r3, #1
cmp r1, r4
addeq r3, r3, #1
cmp r1, r0
addeq r3, r3, #1
cmp r1, r7
addeq r2, r2, #1
cmp r1, r10
addeq r3, r3, #1
cmp fp, ip
ldrbne r7, [lr, #1]! @ zero_extendqisi2
bne .L102
.L101:
cmp r2, #4
ldr r4, [sp, #4]
bgt .L116
cmp r3, #4
bgt .L117
add r2, r2, r2, lsl #2
add r3, r2, r3
ldr r2, .L121+4
ldr r3, [r2, r3, lsl #2]
cmn r3, #1
beq .L118
ldr r2, [sp, #12]
ldr r7, [r2, r3, lsl #2]
ldr r3, [r7]
ldr r2, [r7, #4]
add r1, r3, #1
cmp r1, r2
ldr r0, [r7, #8]
beq .L119
.L106:
str r1, [r7]
str r5, [r0, r3, lsl #2]
ldr r3, [r8]
add r4, r4, #1
cmp r4, r3
bne .L99
.L97:
ldr r3, .L121
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L120
ldr r0, [sp, #12]
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L119:
lsl r3, r1, #1
str r3, [r7, #4]
lsl r1, r1, #3
bl realloc
cmp r0, #0
str r0, [r7, #8]
beq .L107
ldr r3, [r7]
add r1, r3, #1
b .L106
.L115:
mov r2, #108
ldr r3, .L121+8
ldr r1, .L121+12
ldr r0, .L121+16
bl __assert_fail
.L118:
mov r2, #215
ldr r3, .L121+20
ldr r1, .L121+12
ldr r0, .L121+24
bl __assert_fail
.L117:
mov r2, #213
ldr r3, .L121+20
ldr r1, .L121+12
ldr r0, .L121+28
bl __assert_fail
.L116:
mov r2, #212
ldr r3, .L121+20
ldr r1, .L121+12
ldr r0, .L121+32
bl __assert_fail
.L107:
mov r2, #85
ldr r3, .L121+36
ldr r1, .L121+12
ldr r0, .L121+40
bl __assert_fail
.L120:
bl __stack_chk_fail
.L122:
.align 2
.L121:
.word .LC8
.word .LANCHOR1
.word .LANCHOR0
.word .LC2
.word .LC3
.word .LANCHOR0+56
.word .LC7
.word .LC6
.word .LC5
.word .LANCHOR0+28
.word .LC4
.size sieve, .-sieve
.section .rodata.str1.4
.align 2
.LC9:
.ascii "is_perm(vec_seq_idx(ss, i))\000"
.align 2
.LC10:
.ascii "is_perm(pivot)\000"
.section .rodata.cst4
.align 2
.LC11:
.word __stack_chk_guard
.text
.align 2
.global sieveg
.syntax unified
.arm
.fpu softvfp
.type sieveg, %function
sieveg:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, r1
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r3
sub sp, sp, #36
str r3, [sp, #4]
ldr r3, .L159
mov r4, r0
mov r1, #1
mov r0, #56
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
bl calloc
add lr, sp, #24
str r5, [sp, #24]
mov r6, #1
mov r5, lr
.L124:
ldrb ip, [r5], #1 @ zero_extendqisi2
mov r3, r6
mov r2, r5
b .L127
.L151:
add r3, r3, #1
cmp r3, #4
beq .L150
.L127:
ldrb r1, [r2], #1 @ zero_extendqisi2
cmp r1, ip
bne .L151
ldr r3, .L159+4
ldr r2, .L159+8
ldr r1, .L159+12
ldr r0, .L159+16
bl __assert_fail
.L150:
add r6, r6, #1
cmp r6, #4
bne .L124
ldr r3, [r4]
cmp r3, #0
str r3, [sp, #8]
beq .L123
mov r9, #0
ldr r3, [r4, #8]
str r3, [sp, #12]
ldr r3, [sp, #4]
lsr r7, r3, #8
lsr r6, r3, #16
and r7, r7, #255
and r6, r6, #255
and r4, r3, #255
lsr r8, r3, #24
.L129:
mov r5, lr
mov r10, #1
ldr r3, [sp, #12]
ldr fp, [r3, r9, lsl #2]
str fp, [sp, #24]
.L130:
ldrb ip, [r5], #1 @ zero_extendqisi2
mov r3, r10
mov r2, r5
b .L133
.L153:
add r3, r3, #1
cmp r3, #4
beq .L152
.L133:
ldrb r1, [r2], #1 @ zero_extendqisi2
cmp r1, ip
bne .L153
ldr r3, .L159+4
ldr r2, .L159+20
ldr r1, .L159+12
ldr r0, .L159+24
bl __assert_fail
.L152:
add r10, r10, #1
cmp r10, #4
bne .L130
mov r3, #0
mov r10, lr
mov r1, r3
mov r5, r4
ldr r2, [sp, #4]
str fp, [sp, #20]
str r2, [sp, #24]
add ip, sp, #20
.L140:
ldrb r2, [ip], #1 @ zero_extendqisi2
cmp r2, r4
addeq r3, r3, #1
cmp r2, r7
addeq r3, r3, #1
cmp r2, r6
addeq r3, r3, #1
cmp r2, r5
addeq r1, r1, #1
cmp r2, r8
addeq r3, r3, #1
cmp lr, ip
ldrbne r5, [r10, #1]! @ zero_extendqisi2
bne .L140
.L154:
cmp r1, #4
bgt .L155
cmp r3, #4
bgt .L156
ldr r2, .L159+28
add r1, r1, r1, lsl #2
add r3, r1, r3
ldr r3, [r2, r3, lsl #2]
cmn r3, #1
beq .L157
ldr r2, [r0, r3, lsl #2]
ldr r1, [sp, #8]
add r9, r9, #1
add r2, r2, #1
cmp r9, r1
str r2, [r0, r3, lsl #2]
bne .L129
.L123:
ldr r3, .L159
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L158
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L155:
mov r2, #212
ldr r3, .L159+32
ldr r1, .L159+12
ldr r0, .L159+36
bl __assert_fail
.L158:
bl __stack_chk_fail
.L156:
mov r2, #213
ldr r3, .L159+32
ldr r1, .L159+12
ldr r0, .L159+40
bl __assert_fail
.L157:
mov r2, #215
ldr r3, .L159+32
ldr r1, .L159+12
ldr r0, .L159+44
bl __assert_fail
.L160:
.align 2
.L159:
.word .LC11
.word .LANCHOR0+64
.word 423
.word .LC2
.word .LC10
.word 426
.word .LC9
.word .LANCHOR1
.word .LANCHOR0+56
.word .LC5
.word .LC6
.word .LC7
.size sieveg, .-sieveg
.section .rodata.str1.4
.align 2
.LC12:
.ascii "vec_size(va0) == vec_size(va1)\000"
.text
.align 2
.global eqkg
.syntax unified
.arm
.fpu softvfp
.type eqkg, %function
eqkg:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, r0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r0, #12
sub sp, sp, #20
mov r7, r1
str r2, [sp, #12]
str r3, [sp, #8]
bl malloc
mov r5, #0
mov r6, r0
mov r4, #16
str r0, [sp, #4]
str r5, [r6]
str r4, [r6, #4]
mov r0, #64
bl malloc
mov r3, r0
mov r0, #12
str r3, [r6, #8]
bl malloc
mov r6, r0
mov r0, #64
str r4, [r6, #4]
str r5, [r6]
bl malloc
ldr r3, [r7]
str r0, [r6, #8]
cmp r3, r5
strne r6, [sp]
movne r6, r7
beq .L195
.L162:
cmp r3, r5
bls .L196
ldr r3, [r6, #8]
ldr r0, [sp, #8]
ldr r7, [r3, r5, lsl #2]
mov r1, r7
bl sieveg
mov r4, r0
mov r2, #4
ldr r3, .L204
mov r1, #13
sub fp, r4, #4
bl qsort
mov r3, fp
mov r2, #0
add r8, r4, #52
.L166:
ldr r1, [r3, #4]!
cmp r1, #0
addne r2, r2, #1
cmp r3, r8
bne .L166
cmp r2, #1
bls .L167
ldr r3, [sp]
ldr r10, [r3]
cmp r10, #0
beq .L197
mov r1, #0
ldr r3, [sp]
ldr r9, [r3, #8]
.L168:
mov r0, r9
mov r2, fp
ldr r3, [r9, r1, lsl #2]
sub r3, r3, #4
.L173:
ldr lr, [r2, #4]!
ldr ip, [r3, #4]!
cmp lr, ip
bne .L198
cmp r2, r8
bne .L173
.L167:
mov r0, r4
bl free
.L174:
ldr r3, [r6]
add r5, r5, #1
cmp r5, r3
bne .L162
ldr r6, [sp]
ldr r2, [sp, #4]
ldr r3, [r6]
ldr r2, [r2]
cmp r3, r2
bne .L199
ldr r2, [sp, #12]
cmp r2, #0
beq .L200
.L163:
ldr r3, [sp, #12]
ldr r0, [sp, #4]
str r6, [r3]
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L198:
add r1, r1, #1
cmp r1, r10
bne .L168
add r1, r10, #1
.L172:
ldr r3, [sp]
ldr r3, [r3, #4]
cmp r3, r1
beq .L201
.L184:
ldr r2, [sp, #4]
ldr ip, [sp]
ldr r3, [r2]
ldr r2, [r2, #4]
add r1, r3, #1
cmp r1, r2
add r2, r10, #1
str r2, [ip]
str r4, [r0, r10, lsl #2]
beq .L202
ldr r2, [sp, #4]
ldr r0, [r2, #8]
.L178:
ldr r2, [sp, #4]
str r1, [r2]
str r7, [r0, r3, lsl #2]
b .L174
.L201:
ldr r8, [sp]
lsl r3, r1, #1
str r3, [r8, #4]
lsl r1, r1, #3
bl realloc
cmp r0, #0
str r0, [r8, #8]
beq .L203
ldr r3, [sp]
ldr r10, [r3]
b .L184
.L202:
ldr r4, [sp, #4]
lsl r3, r1, #1
ldr r0, [r4, #8]
lsl r1, r1, #3
str r3, [r4, #4]
bl realloc
cmp r0, #0
str r0, [r4, #8]
beq .L177
ldr r3, [r4]
add r1, r3, #1
b .L178
.L197:
ldr r3, [sp]
mov r1, #1
ldr r0, [r3, #8]
b .L172
.L200:
cmp r3, #0
ldrne r4, [sp, #12]
beq .L164
.L180:
cmp r3, r4
bls .L182
ldr r3, [r6, #8]
ldr r0, [r3, r4, lsl #2]
bl free
ldr r3, [r6]
add r4, r4, #1
cmp r3, r4
bne .L180
.L164:
ldr r0, [r6, #8]
bl free
mov r0, r6
bl free
ldr r0, [sp, #4]
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L182:
mov r2, #57
ldr r3, .L204+4
ldr r1, .L204+8
ldr r0, .L204+12
bl __assert_fail
.L195:
ldr r3, [sp, #12]
cmp r3, r5
bne .L163
b .L164
.L203:
mov r2, #50
ldr r3, .L204+16
ldr r1, .L204+8
ldr r0, .L204+20
bl __assert_fail
.L196:
mov r2, #108
ldr r3, .L204+24
ldr r1, .L204+8
ldr r0, .L204+12
bl __assert_fail
.L177:
bl vec_seq_add.part.0
.L199:
ldr r3, .L204+28
ldr r2, .L204+32
ldr r1, .L204+8
ldr r0, .L204+36
bl __assert_fail
.L205:
.align 2
.L204:
.word cmpsize
.word .LANCHOR0+72
.word .LC2
.word .LC3
.word .LANCHOR0+84
.word .LC4
.word .LANCHOR0
.word .LANCHOR0+96
.word 535
.word .LC12
.size eqkg, .-eqkg
.section .rodata.str1.4
.align 2
.LC13:
.ascii "vec_size(ss) != 0\000"
.global __aeabi_ui2d
.global __aeabi_dadd
.global __aeabi_ddiv
.global __aeabi_dmul
.align 2
.LC14:
.ascii "mi != -1\000"
.section .rodata.cst4
.align 2
.LC15:
.word __stack_chk_guard
.text
.align 2
.global selMaxL
.syntax unified
.arm
.fpu softvfp
.type selMaxL, %function
selMaxL:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L254
sub sp, sp, #36
cmp r0, #0
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
beq .L225
ldr r3, [r1]
mov r0, r1
cmp r3, #1
beq .L248
cmp r3, #0
beq .L249
mov fp, #0
ldr r3, .L254+4
add r2, sp, #24
ldr r1, [r3]
str fp, [sp, #24]
bl eqkg
ldr r3, [r0]
mov r9, r0
cmp r3, fp
beq .L210
mvn r3, #0
str r3, [sp, #20]
mov r3, #0
ldr r4, .L254+8
str r3, [sp, #8]
str r4, [sp, #12]
.L218:
ldr r3, [sp, #24]
ldr r2, [r3]
cmp r2, fp
bls .L222
ldr r3, [r3, #8]
mov r6, #0
ldr r7, [r3, fp, lsl #2]
sub r5, r7, #4
mov r3, r5
add r10, r7, #52
.L212:
ldr r2, [r3, #4]!
cmp r10, r3
add r6, r6, r2
bne .L212
mov r3, #0
mov r4, #0
mov r8, r5
stm sp, {r3-r4}
b .L214
.L213:
cmp r10, r8
beq .L250
.L214:
ldr r0, [r8, #4]!
cmp r0, #0
beq .L213
bl __aeabi_ui2d
mov r4, r0
mov r0, r6
mov r5, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r5, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r5
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
cmp r10, r8
stm sp, {r0-r1}
bne .L214
.L250:
ldr r0, [r7, #52]
cmp r0, #0
bne .L251
.L215:
ldmia sp, {r4-r5}
add r3, sp, #8
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #8]
strne r4, [sp, #12]
strne fp, [sp, #20]
.L216:
ldr r3, [r9]
add fp, fp, #1
cmp fp, r3
bne .L218
ldr r3, [sp, #20]
cmn r3, #1
beq .L210
cmp fp, r3
bls .L252
ldr r5, [sp, #24]
ldr r2, [r9, #8]
ldr r3, [r5]
ldr r1, [sp, #20]
cmp r3, #0
ldr r6, [r2, r1, lsl #2]
beq .L221
mov r4, #0
.L223:
cmp r3, r4
bls .L222
ldr r3, [r5, #8]
ldr r0, [r3, r4, lsl #2]
bl free
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L223
.L221:
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
ldr r0, [r9, #8]
bl free
mov r0, r9
bl free
.L206:
ldr r3, .L254
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L253
mov r0, r6
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L251:
bl __aeabi_ui2d
mov r4, r0
mov r0, r6
mov r5, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r5, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r5
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
stm sp, {r0-r1}
b .L215
.L225:
ldr r6, .L254+12
b .L206
.L248:
ldr r3, [r1, #8]
ldr r6, [r3]
b .L206
.L210:
ldr r3, .L254+16
ldr r2, .L254+20
ldr r1, .L254+24
ldr r0, .L254+28
bl __assert_fail
.L222:
mov r2, #57
ldr r3, .L254+32
ldr r1, .L254+24
ldr r0, .L254+36
bl __assert_fail
.L252:
bl vec_seq_idx.isra.0.part.0
.L249:
ldr r3, .L254+16
ldr r2, .L254+40
ldr r1, .L254+24
ldr r0, .L254+44
bl __assert_fail
.L253:
bl __stack_chk_fail
.L255:
.align 2
.L254:
.word .LC15
.word .LANCHOR2
.word -1074790400
.word 50462976
.word .LANCHOR0+104
.word 650
.word .LC2
.word .LC14
.word .LANCHOR0+72
.word .LC3
.word 639
.word .LC13
.size selMaxL, .-selMaxL
.section .rodata.str1.4
.align 2
.LC16:
.ascii "vec_size(ss) >= 1\000"
.text
.align 2
.global first
.syntax unified
.arm
.fpu softvfp
.type first, %function
first:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, [r1]
cmp r3, #0
beq .L261
ldr r3, [r1, #8]
ldr r0, [r3]
bx lr
.L261:
push {r4, lr}
ldr r3, .L262
ldr r2, .L262+4
ldr r1, .L262+8
ldr r0, .L262+12
bl __assert_fail
.L263:
.align 2
.L262:
.word .LANCHOR0+112
.word 602
.word .LC2
.word .LC16
.size first, .-first
.section .rodata.cst4
.align 2
.LC17:
.word __stack_chk_guard
.text
.align 2
.global selMaxE
.syntax unified
.arm
.fpu softvfp
.type selMaxE, %function
selMaxE:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L307
sub sp, sp, #36
cmp r0, #0
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
beq .L282
ldr r3, [r1]
mov r0, r1
cmp r3, #1
beq .L302
cmp r3, #0
beq .L303
mov r7, #0
add r2, sp, #24
str r7, [sp, #24]
bl eqkg
ldr r3, [r0]
str r0, [sp, #16]
cmp r3, r7
beq .L268
mvn r3, #0
str r3, [sp, #20]
mov r3, #0
ldr r4, .L307+4
str r3, [sp, #8]
str r4, [sp, #12]
.L275:
ldr r3, [sp, #24]
ldr r2, [r3]
cmp r2, r7
bls .L279
ldr r3, [r3, #8]
mov fp, #0
ldr r6, [r3, r7, lsl #2]
sub r10, r6, #4
mov r3, r10
add r6, r6, #52
.L270:
ldr r2, [r3, #4]!
cmp r6, r3
add fp, fp, r2
bne .L270
str r7, [sp, #4]
mov r4, #0
mov r5, #0
mov r7, r6
b .L272
.L271:
cmp r7, r10
beq .L304
.L272:
ldr r0, [r10, #4]!
cmp r0, #0
beq .L271
bl __aeabi_ui2d
mov r8, r0
mov r0, fp
mov r9, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
mov r8, r0
mov r6, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r8
add r1, r6, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r7, r10
mov r4, r0
mov r5, r1
bne .L272
.L304:
mov r0, r4
add r3, sp, #8
ldmia r3, {r2-r3}
mov r1, r5
bl __aeabi_dcmpgt
cmp r0, #0
ldr r7, [sp, #4]
strne r4, [sp, #8]
strne r5, [sp, #12]
strne r7, [sp, #20]
.L273:
ldr r3, [sp, #16]
add r7, r7, #1
ldr r3, [r3]
cmp r7, r3
bne .L275
ldr r3, [sp, #20]
cmn r3, #1
beq .L268
cmp r3, r7
bcs .L305
ldr r3, [sp, #16]
ldr r5, [sp, #24]
ldr r2, [r3, #8]
ldr r3, [r5]
ldr r1, [sp, #20]
cmp r3, #0
ldr r6, [r2, r1, lsl #2]
beq .L278
mov r4, #0
.L280:
cmp r4, r3
bcs .L279
ldr r3, [r5, #8]
ldr r0, [r3, r4, lsl #2]
bl free
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L280
.L278:
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
ldr r4, [sp, #16]
ldr r0, [r4, #8]
bl free
mov r0, r4
bl free
.L264:
ldr r3, .L307
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L306
mov r0, r6
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L282:
ldr r6, .L307+8
b .L264
.L302:
ldr r3, [r1, #8]
ldr r6, [r3]
b .L264
.L268:
ldr r3, .L307+12
ldr r2, .L307+16
ldr r1, .L307+20
ldr r0, .L307+24
bl __assert_fail
.L279:
mov r2, #57
ldr r3, .L307+28
ldr r1, .L307+20
ldr r0, .L307+32
bl __assert_fail
.L305:
bl vec_seq_idx.isra.0.part.0
.L303:
ldr r3, .L307+12
ldr r2, .L307+36
ldr r1, .L307+20
ldr r0, .L307+40
bl __assert_fail
.L306:
bl __stack_chk_fail
.L308:
.align 2
.L307:
.word .LC17
.word -1074790400
.word 50462976
.word .LANCHOR0+120
.word 626
.word .LC2
.word .LC14
.word .LANCHOR0+72
.word .LC3
.word 613
.word .LC13
.size selMaxE, .-selMaxE
.align 2
.global cache_init
.syntax unified
.arm
.fpu softvfp
.type cache_init, %function
cache_init:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r1, #0
ldr r2, .L310
ldr r0, .L310+4
b memset
.L311:
.align 2
.L310:
.word 1610611788
.word cache_array
.size cache_init, .-cache_init
.align 2
.global cache_deinit
.syntax unified
.arm
.fpu softvfp
.type cache_deinit, %function
cache_deinit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r4, .L321
add r6, r4, #1610612736
sub r6, r6, #948
.L314:
ldr r5, [r4, #4]
add r4, r4, #12
cmp r5, #0
beq .L313
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
.L313:
cmp r4, r6
bne .L314
pop {r4, r5, r6, pc}
.L322:
.align 2
.L321:
.word cache_array
.size cache_deinit, .-cache_deinit
.align 2
.global hash
.syntax unified
.arm
.fpu softvfp
.type hash, %function
hash:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r1, [r0]
mov r2, r0
cmp r1, #0
beq .L328
mov r0, #0
mov r3, r0
ldr ip, [r2, #8]
.L324:
ldr r2, [ip, r3, lsl #2]
add r3, r3, #1
cmp r3, r1
add r0, r0, r2
bne .L324
bx lr
.L328:
mov r0, r1
bx lr
.size hash, .-hash
.align 2
.global vec_seq_eq
.syntax unified
.arm
.fpu softvfp
.type vec_seq_eq, %function
vec_seq_eq:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r1, #0
cmpne r0, #0
beq .L330
b vec_seq_eq.part.0
.L330:
mov r0, #0
bx lr
.size vec_seq_eq, .-vec_seq_eq
.align 2
.global cache_fetch
.syntax unified
.arm
.fpu softvfp
.type cache_fetch, %function
cache_fetch:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, r0
bl hash
ldr r2, .L339
ldr r1, .L339+4
umull r3, r2, r0, r2
sub r3, r0, r2
add r2, r2, r3, lsr #1
lsr r3, r2, #26
rsb r2, r3, r3, lsl #21
rsb r2, r3, r2, lsl #2
add r3, r3, r2, lsl #4
sub r3, r0, r3
add r3, r3, r3, lsl #1
ldr r2, [r1, r3, lsl #2]
add r5, r1, r3, lsl #2
cmp r2, r0
beq .L338
.L332:
ldr r2, .L339+8
mov r0, #0
ldr r3, [r2, #8]
add r3, r3, #1
str r3, [r2, #8]
pop {r4, r5, r6, pc}
.L338:
ldr r1, [r5, #4]
cmp r4, #0
cmpne r1, #0
beq .L332
mov r0, r4
bl vec_seq_eq.part.0
cmp r0, #0
beq .L332
ldr r2, .L339+8
ldr r0, [r5, #8]
ldr r3, [r2, #4]
add r3, r3, #1
str r3, [r2, #4]
pop {r4, r5, r6, pc}
.L340:
.align 2
.L339:
.word 2529
.word cache_array
.word .LANCHOR2
.size cache_fetch, .-cache_fetch
.align 2
.global cache_put
.syntax unified
.arm
.fpu softvfp
.type cache_put, %function
cache_put:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r6, r1
mov r5, r0
bl hash
ldr r3, .L348
ldr r8, .L348+4
umull r2, r3, r0, r3
sub r2, r0, r3
add r3, r3, r2, lsr #1
lsr r3, r3, #26
rsb r2, r3, r3, lsl #21
rsb r2, r3, r2, lsl #2
add r3, r3, r2, lsl #4
sub r3, r0, r3
add r3, r3, r3, lsl #1
add r9, r8, r3, lsl #2
ldr r10, [r9, #4]
mov r7, r0
cmp r10, #0
lsl r4, r3, #2
beq .L342
ldr r0, [r10, #8]
bl free
mov r0, r10
bl free
ldr r2, .L348+8
ldr r3, [r2, #12]
add r3, r3, #1
str r3, [r2, #12]
.L343:
mov r0, #12
str r7, [r4, r8]
bl malloc
mov r3, #16
mov r4, r0
mov r2, #0
mov r0, #64
stm r4, {r2, r3}
bl malloc
ldr ip, [r5]
mov r3, r0
cmp ip, #15
str r0, [r4, #8]
lsl r7, ip, #2
bls .L345
mov r1, r7
str ip, [r4, #4]
bl realloc
cmp r0, #0
mov r3, r0
str r0, [r4, #8]
beq .L347
.L345:
mov r2, r7
mov r0, r3
ldr r1, [r5, #8]
bl memcpy
ldr r2, [r5]
ldr r3, [r4]
str r4, [r9, #4]
add r3, r3, r2
str r6, [r9, #8]
str r3, [r4]
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L342:
ldr r2, .L348+8
ldr r3, [r2, #16]
add r3, r3, #1
str r3, [r2, #16]
b .L343
.L347:
bl vec_seq_append.isra.0.part.0
.L349:
.align 2
.L348:
.word 2529
.word cache_array
.word .LANCHOR2
.size cache_put, .-cache_put
.section .rodata.cst4
.align 2
.LC18:
.word __stack_chk_guard
.text
.align 2
.global selMaxEC
.syntax unified
.arm
.fpu softvfp
.type selMaxEC, %function
selMaxEC:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L397
sub sp, sp, #36
str r1, [sp, #16]
cmp r0, #0
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
beq .L370
ldr r3, [r1]
cmp r3, #2
bhi .L352
cmp r3, #0
beq .L365
ldr r3, [sp, #16]
ldr r3, [r3, #8]
ldr r6, [r3]
.L350:
ldr r3, .L397
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L393
mov r0, r6
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L352:
ldr r3, [r2]
mov r4, r2
cmp r3, #1
beq .L394
ldr r5, [sp, #16]
mov r0, r5
bl cache_fetch
subs r6, r0, #0
bne .L350
mov r1, r4
mov r0, r5
add r2, sp, #24
str r6, [sp, #24]
bl eqkg
ldr r3, [r0]
mov r9, r0
cmp r3, #0
beq .L355
mvn r3, #0
str r3, [sp, #20]
mov r3, #0
mov fp, r6
ldr r4, .L397+4
str r3, [sp, #8]
str r4, [sp, #12]
.L363:
ldr r3, [sp, #24]
ldr r2, [r3]
cmp r2, fp
bls .L367
ldr r3, [r3, #8]
mov r6, #0
ldr r7, [r3, fp, lsl #2]
sub r5, r7, #4
mov r3, r5
add r10, r7, #52
.L357:
ldr r2, [r3, #4]!
cmp r10, r3
add r6, r6, r2
bne .L357
mov r3, #0
mov r4, #0
mov r8, r5
stm sp, {r3-r4}
b .L359
.L358:
cmp r10, r8
beq .L395
.L359:
ldr r0, [r8, #4]!
cmp r0, #0
beq .L358
bl __aeabi_ui2d
mov r4, r0
mov r0, r6
mov r5, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r5, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r5
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
cmp r10, r8
stm sp, {r0-r1}
bne .L359
.L395:
ldr r0, [r7, #52]
cmp r0, #0
bne .L396
.L360:
ldmia sp, {r4-r5}
add r3, sp, #8
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #8]
strne r4, [sp, #12]
strne fp, [sp, #20]
.L361:
ldr r3, [r9]
add fp, fp, #1
cmp fp, r3
bne .L363
ldr r2, [sp, #20]
cmn r2, #1
beq .L355
cmp r2, fp
bcs .L365
ldr r3, [r9, #8]
ldr r0, [sp, #16]
ldr r6, [r3, r2, lsl #2]
mov r1, r6
bl cache_put
ldr r5, [sp, #24]
ldr r3, [r5]
cmp r3, #0
beq .L366
mov r4, #0
.L368:
cmp r4, r3
bcs .L367
ldr r3, [r5, #8]
ldr r0, [r3, r4, lsl #2]
bl free
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L368
.L366:
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
ldr r0, [r9, #8]
bl free
mov r0, r9
bl free
b .L350
.L370:
ldr r6, .L397+8
b .L350
.L396:
bl __aeabi_ui2d
mov r4, r0
mov r0, r6
mov r5, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r5, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r5
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
stm sp, {r0-r1}
b .L360
.L394:
ldr r3, [r2, #8]
ldr r6, [r3]
b .L350
.L355:
ldr r3, .L397+12
ldr r2, .L397+16
ldr r1, .L397+20
ldr r0, .L397+24
bl __assert_fail
.L367:
mov r2, #57
ldr r3, .L397+28
ldr r1, .L397+20
ldr r0, .L397+32
bl __assert_fail
.L393:
bl __stack_chk_fail
.L365:
bl vec_seq_idx.isra.0.part.0
.L398:
.align 2
.L397:
.word .LC18
.word -1074790400
.word 50462976
.word .LANCHOR0+128
.word 914
.word .LC2
.word .LC14
.word .LANCHOR0+72
.word .LC3
.size selMaxEC, .-selMaxEC
.align 2
.global buildThf
.syntax unified
.arm
.fpu softvfp
.type buildThf, %function
buildThf:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, [r2]
cmp r3, #0
beq .L400
push {r4, r5, r6, lr}
mov r6, r1
mov r5, r0
mov r1, r2
mov r0, r6
mov r4, r2
blx r5
mov r2, r4
mov r3, r0
mov r1, r6
mov r0, r5
pop {r4, r5, r6, lr}
b buildTh1
.L400:
mov r0, r3
bx lr
.size buildThf, .-buildThf
.align 2
.global buildTh1
.syntax unified
.arm
.fpu softvfp
.type buildTh1, %function
buildTh1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r2
mov r8, r0
mov r0, #68
mov r4, r3
mov fp, r1
bl malloc
ldr r3, [r5]
mov r7, r0
cmp r3, #1
beq .L417
mov r2, #1
cmp r3, #0
str r4, [r0, #60]
str r2, [r0]
beq .L407
ldr lr, [r5, #8]
mov ip, #0
sub lr, lr, #4
b .L408
.L419:
cmp r3, ip
beq .L418
.L408:
ldr r0, [lr, #4]!
add ip, ip, #1
cmp r4, r0
bne .L419
mov r2, #0
.L407:
mov r1, r4
mov r0, r5
strb r2, [r7, #64]
bl sieve
sub r4, r0, #4
mov r9, r0
mov r5, r4
mov r10, r7
add fp, fp, #1
add r6, r0, #52
.L409:
ldr r2, [r5, #4]!
mov r1, fp
mov r0, r8
bl buildThf
cmp r5, r6
str r0, [r10, #4]!
bne .L409
.L410:
ldr r5, [r4, #4]!
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
cmp r4, r6
bne .L410
mov r0, r9
bl free
mov r0, r7
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L418:
mov r2, #1
b .L407
.L417:
mov r2, #64
mov r1, #0
add r0, r0, #4
bl memset
mov r3, #0
ldr r2, [r5, #8]
str r3, [r7]
ldr r2, [r2]
mov r0, r7
strb r3, [r7, #64]
str r2, [r7, #60]
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size buildTh1, .-buildTh1
.align 2
.global buildThc
.syntax unified
.arm
.fpu softvfp
.type buildThc, %function
buildThc:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr ip, [r2]
cmp ip, #0
beq .L421
push {r4, r5, r6, lr}
mov r4, r2
mov r6, r1
mov r5, r0
mov r2, r3
mov r1, r4
mov r0, r6
blx r5
mov r2, r4
mov r3, r0
mov r1, r6
mov r0, r5
pop {r4, r5, r6, lr}
b buildThc1
.L421:
mov r0, ip
bx lr
.size buildThc, .-buildThc
.align 2
.global buildThc1
.syntax unified
.arm
.fpu softvfp
.type buildThc1, %function
buildThc1:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r2
mov r8, r0
sub sp, sp, #12
mov r0, #68
mov r4, r3
mov r10, r1
bl malloc
ldr r3, [r5]
mov r9, r0
cmp r3, #1
beq .L438
mov r2, #1
cmp r3, #0
str r4, [r0, #60]
str r2, [r0]
beq .L428
ldr ip, [r5, #8]
mov r0, #0
sub ip, ip, #4
b .L429
.L440:
cmp r3, r0
beq .L439
.L429:
ldr r2, [ip, #4]!
add r0, r0, #1
cmp r4, r2
bne .L440
mov r2, #0
.L428:
mov r1, r4
mov r0, r5
strb r2, [r9, #64]
bl sieve
sub r4, r0, #4
mov r5, r4
mov r7, r9
ldr fp, .L441
str r0, [sp, #4]
add r10, r10, #1
add r6, r0, #52
.L430:
ldr r2, [r5, #4]!
mov r1, r10
mov r0, r8
ldr r3, [fp]
bl buildThc
cmp r5, r6
str r0, [r7, #4]!
bne .L430
.L431:
ldr r5, [r4, #4]!
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
cmp r4, r6
bne .L431
ldr r0, [sp, #4]
bl free
mov r0, r9
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L439:
mov r2, #1
b .L428
.L438:
mov r2, #64
mov r1, #0
add r0, r0, #4
bl memset
mov r3, #0
mov r0, r9
ldr r2, [r5, #8]
str r3, [r9]
ldr r2, [r2]
strb r3, [r9, #64]
str r2, [r9, #60]
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L442:
.align 2
.L441:
.word .LANCHOR2
.size buildThc1, .-buildThc1
.align 2
.global free_tree
.syntax unified
.arm
.fpu softvfp
.type free_tree, %function
free_tree:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
subs r6, r0, #0
popeq {r4, r5, r6, pc}
ldr r3, [r6]
cmp r3, #0
movne r4, r6
addne r5, r6, #56
beq .L447
.L446:
ldr r0, [r4, #4]!
bl free_tree
cmp r4, r5
bne .L446
.L447:
mov r0, r6
pop {r4, r5, r6, lr}
b free
.size free_tree, .-free_tree
.align 2
.global selMinH
.syntax unified
.arm
.fpu softvfp
.type selMinH, %function
selMinH:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r8, r0, #0
sub sp, sp, #12
beq .L463
ldr r3, [r1]
mov r6, r1
cmp r3, #2
bhi .L452
cmp r3, #0
beq .L462
ldr r3, [r1, #8]
ldr r4, [r3]
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L452:
mov r2, #0
mov r0, r1
bl eqkg
ldr r3, [r0]
mov r7, r0
cmp r3, #0
beq .L454
mvn r2, #0
mov r4, #0
mov r9, r2
ldr r10, .L477
str r2, [sp]
b .L461
.L457:
ldrb r3, [r2, #64] @ zero_extendqisi2
eor r3, r3, #1
add r5, r3, r5
.L456:
mov r0, r2
bl free_tree
cmp r5, r9
bcs .L459
ldr r3, [r6]
sub r3, r3, #1
cmp r3, r5
beq .L466
mov r9, r5
str r4, [sp]
.L459:
ldr r3, [r7]
add r4, r4, #1
cmp r3, r4
beq .L460
.L461:
cmp r3, r4
bls .L476
ldr r3, [r7, #8]
mov r2, r6
mov r1, r8
mov r0, r10
ldr r3, [r3, r4, lsl #2]
bl buildTh1
subs r2, r0, #0
moveq r5, r2
beq .L456
ldr r3, [r2]
cmp r3, #1
movne r5, #0
bne .L457
mov r5, #0
mov r1, r5
add r3, r2, #52
mov fp, r2
mov r5, r4
str r2, [sp, #4]
mov r4, r1
mov r2, r3
.L458:
ldr r0, [fp, #4]!
mov r1, #2
bl height_rec
cmp r2, fp
add r4, r4, r0
bne .L458
mov r3, r4
ldr r2, [sp, #4]
mov r4, r5
mov r5, r3
b .L457
.L466:
str r4, [sp]
.L460:
ldr r2, [sp]
cmn r2, #1
beq .L454
ldr r3, [r7]
cmp r2, r3
bcs .L462
ldr r0, [r7, #8]
ldr r4, [r0, r2, lsl #2]
bl free
mov r0, r7
bl free
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L463:
ldr r4, .L477+4
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L454:
ldr r3, .L477+8
ldr r2, .L477+12
ldr r1, .L477+16
ldr r0, .L477+20
bl __assert_fail
.L476:
mov r2, #108
ldr r3, .L477+24
ldr r1, .L477+16
ldr r0, .L477+28
bl __assert_fail
.L462:
bl vec_seq_idx.isra.0.part.0
.L478:
.align 2
.L477:
.word selMinH
.word 50462976
.word .LANCHOR0+140
.word 681
.word .LC2
.word .LC14
.word .LANCHOR0
.word .LC3
.size selMinH, .-selMinH
.section .rodata.str1.4
.align 2
.LC19:
.ascii "true\000"
.align 2
.LC20:
.ascii "false\000"
.align 2
.LC21:
.ascii "h=%zu n=%zu cand=%zu eq=%zu mh=%zu self=%s\012\000"
.text
.align 2
.global selMinHC
.syntax unified
.arm
.fpu softvfp
.type selMinHC, %function
selMinHC:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r7, r0, #0
sub sp, sp, #36
str r2, [sp, #20]
beq .L495
ldr r3, [r1]
mov r6, r1
cmp r3, #2
bhi .L481
cmp r3, #0
beq .L485
ldr r3, [r1, #8]
ldr r5, [r3]
.L479:
mov r0, r5
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L481:
ldr r3, [sp, #20]
ldr r3, [r3]
cmp r3, #1
beq .L508
mov r0, r1
bl cache_fetch
subs r5, r0, #0
bne .L479
mov r2, r5
mov r0, r6
ldr r1, [sp, #20]
bl eqkg
ldr r3, [r0]
mov r8, r0
cmp r3, #0
beq .L491
mvn r9, #0
ldr r10, .L510
str r9, [sp, #24]
b .L484
.L487:
ldrb r3, [r2, #64] @ zero_extendqisi2
eor r3, r3, #1
add r4, r3, r4
.L486:
mov r0, r2
bl free_tree
cmp r4, r9
bcs .L489
ldr r3, [r6]
sub r3, r3, #1
cmp r3, r4
beq .L499
mov r9, r4
str r5, [sp, #24]
.L489:
ldr r3, [r8]
add r5, r5, #1
cmp r3, r5
beq .L490
.L484:
cmp r5, r3
bcs .L485
ldr r3, [r8, #8]
mov r2, r6
mov r1, r7
mov r0, r10
ldr r3, [r3, r5, lsl #2]
bl buildThc1
subs r2, r0, #0
moveq r4, r2
beq .L486
ldr r3, [r2]
cmp r3, #1
movne r4, #0
bne .L487
add r3, r2, #52
mov fp, r2
str r2, [sp, #28]
mov r4, #0
mov r2, r3
.L488:
ldr r0, [fp, #4]!
mov r1, #2
bl height_rec
cmp r2, fp
add r4, r4, r0
bne .L488
ldr r2, [sp, #28]
b .L487
.L495:
ldr r5, .L510+4
mov r0, r5
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L508:
ldr r3, [sp, #20]
ldr r3, [r3, #8]
ldr r5, [r3]
mov r0, r5
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L499:
mov r9, r4
str r5, [sp, #24]
.L490:
ldr r2, [sp, #24]
cmn r2, #1
beq .L491
ldr r3, [r8]
cmp r2, r3
bcs .L485
ldr r3, [r8, #8]
mov r0, r6
ldr r5, [r3, r2, lsl #2]
mov r1, r5
bl cache_put
ldr r3, [r6]
cmp r3, #100
bhi .L509
.L492:
ldr r0, [r8, #8]
bl free
mov r0, r8
bl free
mov r0, r5
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L509:
mov r2, #0
ldr r0, [sp, #20]
ldr r1, [r6, #8]
ldr ip, [r0]
ldr lr, [r8]
sub r1, r1, #4
.L494:
ldr r0, [r1, #4]!
cmp r5, r0
beq .L500
add r2, r2, #1
cmp r3, r2
bne .L494
ldr r2, .L510+8
.L493:
str r2, [sp, #12]
stm sp, {ip, lr}
mov r2, r7
ldr r1, .L510+12
str r9, [sp, #8]
mov r0, #1
bl __printf_chk
b .L492
.L500:
ldr r2, .L510+16
b .L493
.L491:
ldr r3, .L510+20
ldr r2, .L510+24
ldr r1, .L510+28
ldr r0, .L510+32
bl __assert_fail
.L485:
bl vec_seq_idx.isra.0.part.0
.L511:
.align 2
.L510:
.word selMinHC
.word 50462976
.word .LC20
.word .LC21
.word .LC19
.word .LANCHOR0+148
.word 821
.word .LC2
.word .LC14
.size selMinHC, .-selMinHC
.global __aeabi_dsub
.section .rodata.str1.4
.align 2
.LC22:
.ascii "h=%zu n=%zu cand=%zu eq=%zu mh=%zu mi=%zu self=%s\012"
.ascii "\000"
.section .rodata.cst4
.align 2
.LC23:
.word __stack_chk_guard
.text
.align 2
.global selMinHCE
.syntax unified
.arm
.fpu softvfp
.type selMinHCE, %function
selMinHCE:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r3, r0, #0
sub sp, sp, #84
str r3, [sp, #56]
ldr r3, .L573
str r1, [sp, #44]
str r2, [sp, #48]
ldr r3, [r3]
str r3, [sp, #76]
mov r3,#0
beq .L543
ldr r3, [r1]
cmp r3, #2
bhi .L514
cmp r3, #0
beq .L564
ldr r3, [sp, #44]
ldr r3, [r3, #8]
ldr r4, [r3]
.L512:
ldr r3, .L573
ldr r2, [r3]
ldr r3, [sp, #76]
eors r2, r3, r2
mov r3, #0
bne .L565
mov r0, r4
add sp, sp, #84
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L514:
ldr r3, [sp, #48]
ldr r3, [r3]
cmp r3, #1
beq .L566
ldr r5, [sp, #44]
mov r0, r5
bl cache_fetch
subs r4, r0, #0
bne .L512
ldr r1, [sp, #48]
add r2, sp, #72
mov r0, r5
str r4, [sp, #72]
bl eqkg
mov r3, r0
mov r0, #12
mov r5, r3
str r3, [sp, #40]
bl malloc
mov r3, #16
mov fp, r0
mov r0, #256
str r3, [fp, #4]
str r4, [fp]
bl malloc
ldr r3, [r5]
str r0, [fp, #8]
cmp r3, #0
movne r10, r4
beq .L527
.L517:
cmp r3, r10
bls .L567
ldr r2, [sp, #40]
ldr r3, [sp, #72]
ldr r1, [r2, #8]
ldr r2, [r3]
ldr r1, [r1, r10, lsl #2]
cmp r2, r10
str r1, [sp, #32]
bls .L530
ldr r3, [r3, #8]
mov r5, #0
ldr r8, [r3, r10, lsl #2]
sub r4, r8, #4
mov r3, r4
add r9, r8, #52
.L522:
ldr r2, [r3, #4]!
cmp r3, r9
add r5, r5, r2
bne .L522
mov r2, #0
mov r3, #0
str r2, [sp, #24]
str r3, [sp, #28]
b .L524
.L523:
cmp r4, r9
beq .L568
.L524:
ldr r0, [r4, #4]!
cmp r0, #0
beq .L523
bl __aeabi_ui2d
mov r6, r0
mov r0, r5
mov r7, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
mov r7, r0
mov r6, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r7
add r1, r6, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dadd
cmp r4, r9
str r0, [sp, #24]
str r1, [sp, #28]
bne .L524
.L568:
ldr r0, [r8, #52]
cmp r0, #0
bne .L569
.L525:
ldr r5, [fp]
ldr r3, [fp, #4]
add r4, r5, #1
cmp r4, r3
ldr r0, [fp, #8]
beq .L570
.L526:
ldr r3, [sp, #40]
ldr r2, [sp, #32]
ldr r3, [r3]
add r10, r10, #1
str r2, [r0, r5, lsl #4]
cmp r3, r10
add r0, r0, r5, lsl #4
add r2, sp, #24
ldmia r2, {r1-r2}
str r4, [fp]
str r1, [r0, #8]
str r2, [r0, #12]
bne .L517
.L527:
ldr r5, [sp, #72]
ldr r3, [r5]
cmp r3, #0
movne r4, #0
beq .L519
.L518:
cmp r3, r4
bls .L530
ldr r3, [r5, #8]
ldr r0, [r3, r4, lsl #2]
bl free
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L518
.L519:
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
ldr r4, [sp, #40]
ldr r0, [r4, #8]
bl free
mov r0, r4
bl free
ldr r3, [fp]
ldr r0, [fp, #8]
mov r4, r3
mov r1, r3
str r3, [sp, #40]
mov r2, #16
ldr r3, .L573+4
str r0, [sp, #64]
bl qsort
cmp r4, #0
beq .L529
mvn r10, #0
ldr r2, [sp, #64]
str fp, [sp, #68]
add r4, r2, #8
ldmia r4, {r3-r4}
mov r8, #0
str r3, [sp, #32]
str r4, [sp, #36]
ldr r9, .L573+8
ldr fp, [sp, #56]
ldr r5, [sp, #44]
str r10, [sp, #52]
add r6, r2, #8
b .L531
.L533:
ldrb r3, [r2, #64] @ zero_extendqisi2
eor r3, r3, #1
add r4, r3, r4
.L532:
mov r0, r2
bl free_tree
cmp r10, r4
bls .L535
ldr r3, [r5]
sub r3, r3, #1
cmp r3, r4
beq .L548
mov r10, r4
str r8, [sp, #52]
.L535:
ldr r2, .L573+12
ldr r3, .L573+16
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dcmplt
cmp r0, #0
bne .L537
ldr r3, [sp, #40]
add r8, r8, #1
cmp r8, r3
add r6, r6, #16
beq .L537
.L531:
ldmia r6, {r0-r1}
mov r2, r5
str r0, [sp, #24]
str r1, [sp, #28]
ldr r3, [r6, #-8]
mov r1, fp
mov r0, r9
bl buildThc1
subs r2, r0, #0
moveq r4, r2
beq .L532
ldr r3, [r2]
cmp r3, #1
movne r4, #0
bne .L533
add r3, r2, #52
mov r7, r2
str r2, [sp, #60]
mov r4, #0
mov r2, r3
.L534:
ldr r0, [r7, #4]!
mov r1, #2
bl height_rec
cmp r7, r2
add r4, r4, r0
bne .L534
ldr r2, [sp, #60]
b .L533
.L543:
ldr r4, .L573+20
b .L512
.L569:
bl __aeabi_ui2d
mov r2, r0
mov r0, r5
mov r4, r2
mov r5, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
mov r5, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r5
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
add r1, sp, #24
ldmia r1, {r0-r1}
bl __aeabi_dadd
str r0, [sp, #24]
str r1, [sp, #28]
b .L525
.L570:
lsl r3, r4, #1
lsl r1, r4, #5
str r3, [fp, #4]
bl realloc
cmp r0, #0
str r0, [fp, #8]
bne .L526
mov r2, #161
ldr r3, .L573+24
ldr r1, .L573+28
ldr r0, .L573+32
bl __assert_fail
.L566:
ldr r3, [sp, #48]
ldr r3, [r3, #8]
ldr r4, [r3]
b .L512
.L537:
ldr r3, [sp, #52]
mov r6, r10
cmn r3, #1
ldr fp, [sp, #68]
beq .L571
.L536:
ldr r2, [sp, #40]
ldr r3, [sp, #52]
cmp r2, r3
bls .L529
ldr r2, [sp, #64]
ldr r5, [sp, #44]
ldr r4, [r2, r3, lsl #4]
mov r0, r5
mov r1, r4
bl cache_put
ldr r3, [r5]
cmp r3, #100
bhi .L572
.L539:
ldr r0, [sp, #64]
bl free
mov r0, fp
bl free
b .L512
.L572:
mov r2, #0
ldr r1, [sp, #44]
ldr r0, [sp, #48]
ldr r1, [r1, #8]
ldr ip, [r0]
sub r1, r1, #4
.L541:
ldr r0, [r1, #4]!
cmp r0, r4
beq .L549
add r2, r2, #1
cmp r3, r2
bne .L541
ldr r2, .L573+36
.L540:
str r2, [sp, #16]
ldr r2, [sp, #52]
ldr r1, .L573+40
str r2, [sp, #12]
ldr r2, [sp, #40]
str r6, [sp, #8]
str r2, [sp, #4]
str ip, [sp]
ldr r2, [sp, #56]
mov r0, #1
bl __printf_chk
b .L539
.L548:
mov r6, r4
ldr fp, [sp, #68]
str r8, [sp, #52]
b .L536
.L549:
ldr r2, .L573+44
b .L540
.L530:
mov r2, #57
ldr r3, .L573+48
ldr r1, .L573+28
ldr r0, .L573+52
bl __assert_fail
.L567:
mov r2, #108
ldr r3, .L573+56
ldr r1, .L573+28
ldr r0, .L573+52
bl __assert_fail
.L565:
bl __stack_chk_fail
.L564:
bl vec_seq_idx.isra.0.part.0
.L529:
bl vec_pair_idx.isra.0.part.0
.L571:
ldr r3, .L573+60
ldr r2, .L573+64
ldr r1, .L573+28
ldr r0, .L573+68
bl __assert_fail
.L574:
.align 2
.L573:
.word .LC23
.word cmppair
.word selMinHCE
.word -1717986918
.word 1071225241
.word 50462976
.word .LANCHOR0+160
.word .LC2
.word .LC4
.word .LC20
.word .LC22
.word .LC19
.word .LANCHOR0+72
.word .LC3
.word .LANCHOR0
.word .LANCHOR0+176
.word 877
.word .LC14
.size selMinHCE, .-selMinHCE
.align 2
.global buildT
.syntax unified
.arm
.fpu softvfp
.type buildT, %function
buildT:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
mov r1, #0
ldr r2, .L577
ldr r0, .L577+4
bl memset
mov r2, r4
pop {r4, lr}
mov r1, #0
ldr r0, .L577+8
b buildThf
.L578:
.align 2
.L577:
.word 1610611788
.word cache_array
.word selMaxL
.size buildT, .-buildT
.align 2
.global cnt
.syntax unified
.arm
.fpu softvfp
.type cnt, %function
cnt:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r4, r0, #0
beq .L583
ldr r3, [r4]
cmp r3, #1
movne r6, #0
beq .L587
.L581:
ldrb r0, [r4, #64] @ zero_extendqisi2
eor r0, r0, #1
add r0, r0, r6
pop {r4, r5, r6, r7, r8, pc}
.L587:
mov r5, r4
mov r6, #0
add r7, r4, #52
.L582:
ldr r0, [r5, #4]!
bl cnt
cmp r7, r5
add r6, r6, r0
bne .L582
b .L581
.L583:
mov r0, r4
pop {r4, r5, r6, r7, r8, pc}
.size cnt, .-cnt
.section .rodata.str1.4
.align 2
.LC24:
.ascii "\000"
.align 2
.LC25:
.ascii "%*s\000"
.align 2
.LC26:
.ascii "%d%d%d%d\000"
.section .rodata.cst4
.align 2
.LC27:
.word __stack_chk_guard
.text
.align 2
.global showT
.syntax unified
.arm
.fpu softvfp
.type showT, %function
showT:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L597
sub sp, sp, #32
subs r4, r0, #0
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
beq .L588
mov r2, r1
ldr r3, .L597+4
mov r5, r1
mov r0, #1
ldr r1, .L597+8
bl __printf_chk
ldr r3, [r4, #60]
lsr r1, r3, #16
lsr r2, r3, #8
lsr r0, r3, #24
and r1, r1, #255
and r2, r2, #255
and r3, r3, #255
str r1, [sp, #8]
str r2, [sp, #4]
mov r1, #1
mov r2, #10
str r0, [sp, #12]
str r3, [sp]
add r0, sp, #16
ldr r3, .L597+12
bl __sprintf_chk
add r0, sp, #16
bl puts
ldr r3, [r4]
cmp r3, #1
beq .L595
.L588:
ldr r3, .L597
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L596
add sp, sp, #32
@ sp needed
pop {r4, r5, r6, pc}
.L595:
add r5, r5, #1
add r6, r4, #52
.L591:
ldr r0, [r4, #4]!
mov r1, r5
bl showT
cmp r4, r6
bne .L591
b .L588
.L596:
bl __stack_chk_fail
.L598:
.align 2
.L597:
.word .LC27
.word .LC24
.word .LC25
.word .LC26
.size showT, .-showT
.section .rodata.str1.4
.align 2
.LC28:
.ascii "nd%zu\000"
.text
.align 2
.global show_node
.syntax unified
.arm
.fpu softvfp
.type show_node, %function
show_node:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
sub sp, sp, #8
str r1, [sp]
mvn r2, #0
mov r1, #1
ldr r3, .L601
bl __sprintf_chk
mov r0, r4
add sp, sp, #8
@ sp needed
pop {r4, pc}
.L602:
.align 2
.L601:
.word .LC28
.size show_node, .-show_node
.section .rodata.str1.4
.align 2
.LC29:
.ascii "%s [label=%s]\012\000"
.section .rodata.cst4
.align 2
.LC30:
.word __stack_chk_guard
.text
.align 2
.global dotNodeLabel
.syntax unified
.arm
.fpu softvfp
.type dotNodeLabel, %function
dotNodeLabel:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r1
sub sp, sp, #56
ldr ip, .L607
str r0, [sp]
mov r2, #24
mov r1, #1
ldr r3, .L607+4
add r0, sp, #28
ldr ip, [ip]
str ip, [sp, #52]
mov ip,#0
bl __sprintf_chk
lsr r2, r4, #16
lsr r3, r4, #8
lsr r1, r4, #24
and r2, r2, #255
and r3, r3, #255
and r4, r4, #255
str r2, [sp, #8]
str r3, [sp, #4]
mov r2, #10
ldr r3, .L607+8
str r1, [sp, #12]
str r4, [sp]
mov r1, #1
add r0, sp, #16
bl __sprintf_chk
add r3, sp, #16
add r2, sp, #28
mov r0, #1
ldr r1, .L607+12
bl __printf_chk
ldr r3, .L607
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L606
add sp, sp, #56
@ sp needed
pop {r4, pc}
.L606:
bl __stack_chk_fail
.L608:
.align 2
.L607:
.word .LC30
.word .LC28
.word .LC26
.word .LC29
.size dotNodeLabel, .-dotNodeLabel
.section .rodata.str1.4
.align 2
.LC31:
.ascii "%s [label=%zu shape=circle]\012\000"
.section .rodata.cst4
.align 2
.LC32:
.word __stack_chk_guard
.text
.align 2
.global dotNodeGroup
.syntax unified
.arm
.fpu softvfp
.type dotNodeGroup, %function
dotNodeGroup:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r1
sub sp, sp, #40
ldr ip, .L613
str r0, [sp]
mov r2, #24
mov r1, #1
ldr r3, .L613+4
add r0, sp, #12
ldr ip, [ip]
str ip, [sp, #36]
mov ip,#0
bl __sprintf_chk
mov r3, r4
add r2, sp, #12
mov r0, #1
ldr r1, .L613+8
bl __printf_chk
ldr r3, .L613
ldr r2, [r3]
ldr r3, [sp, #36]
eors r2, r3, r2
mov r3, #0
bne .L612
add sp, sp, #40
@ sp needed
pop {r4, pc}
.L612:
bl __stack_chk_fail
.L614:
.align 2
.L613:
.word .LC32
.word .LC28
.word .LC31
.size dotNodeGroup, .-dotNodeGroup
.section .rodata.str1.4
.align 2
.LC33:
.ascii "%s [label=%s shape=box]\012\000"
.section .rodata.cst4
.align 2
.LC34:
.word __stack_chk_guard
.text
.align 2
.global dotProbe
.syntax unified
.arm
.fpu softvfp
.type dotProbe, %function
dotProbe:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r1
sub sp, sp, #56
ldr ip, .L619
str r0, [sp]
mov r2, #24
mov r1, #1
ldr r3, .L619+4
add r0, sp, #28
ldr ip, [ip]
str ip, [sp, #52]
mov ip,#0
bl __sprintf_chk
lsr r2, r4, #16
lsr r3, r4, #8
lsr r1, r4, #24
and r2, r2, #255
and r3, r3, #255
and r4, r4, #255
str r2, [sp, #8]
str r3, [sp, #4]
mov r2, #10
ldr r3, .L619+8
str r1, [sp, #12]
str r4, [sp]
mov r1, #1
add r0, sp, #16
bl __sprintf_chk
add r3, sp, #16
add r2, sp, #28
mov r0, #1
ldr r1, .L619+12
bl __printf_chk
ldr r3, .L619
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L618
add sp, sp, #56
@ sp needed
pop {r4, pc}
.L618:
bl __stack_chk_fail
.L620:
.align 2
.L619:
.word .LC34
.word .LC28
.word .LC26
.word .LC33
.size dotProbe, .-dotProbe
.section .rodata.str1.4
.align 2
.LC35:
.ascii "nil\000"
.align 2
.LC36:
.ascii "%zu%zu\000"
.align 2
.LC37:
.ascii "%s -> %s [label=%s]\012\000"
.section .rodata.cst4
.align 2
.LC38:
.word __stack_chk_guard
.text
.align 2
.global dotTree_rec
.syntax unified
.arm
.fpu softvfp
.type dotTree_rec, %function
dotTree_rec:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L645
sub sp, sp, #76
subs r8, r2, #0
mov r7, r1
ldr r3, [r3]
str r3, [sp, #68]
mov r3,#0
beq .L641
ldr r3, [r0]
mov r5, r0
cmp r3, #0
ldr r1, [r0, #60]
beq .L642
ldrb r3, [r0, #64] @ zero_extendqisi2
mov r0, r7
cmp r3, #0
beq .L625
bl dotProbe
.L626:
mov r4, #0
add r10, r7, r7, lsl #2
add r10, r10, r10, lsl #2
ldr r9, .L645+4
ldr fp, .L645+8
lsl r10, r10, #2
.L632:
ldr r3, [r5, #4]!
cmp r3, #0
beq .L627
mov r3, r9
mov r2, #24
mov r1, #1
str r7, [sp]
add r0, sp, #20
add r6, r10, r4
bl __sprintf_chk
mov r2, #24
mov r1, #1
mov r3, r9
str r6, [sp]
add r0, sp, #44
bl __sprintf_chk
mov r2, #0
ldr r1, .L645+12
.L628:
mov r0, r1
mov r3, #0
.L631:
ldr ip, [r0, #4]!
cmp ip, r4
beq .L643
add r3, r3, #1
cmp r3, #5
bne .L631
add r2, r2, #1
cmp r2, #5
add r1, r1, #20
bne .L628
ldr r3, .L645+16
.L630:
mov r1, fp
str r3, [sp]
add r2, sp, #20
mov r0, #1
add r3, sp, #44
bl __printf_chk
mov r1, r6
ldr r0, [r5]
sub r2, r8, #1
bl dotTree_rec
.L627:
add r4, r4, #1
cmp r4, #13
bne .L632
.L621:
ldr r3, .L645
ldr r2, [r3]
ldr r3, [sp, #68]
eors r2, r3, r2
mov r3, #0
bne .L644
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L642:
mov r0, r7
bl dotNodeLabel
b .L621
.L643:
sub r3, r3, r2
stm sp, {r2, r3}
mov r1, #1
ldr r3, .L645+20
mov r2, #7
add r0, sp, #12
bl __sprintf_chk
add r3, sp, #12
b .L630
.L641:
bl cnt
mov r1, r0
mov r0, r7
bl dotNodeGroup
b .L621
.L625:
bl dotNodeLabel
b .L626
.L644:
bl __stack_chk_fail
.L646:
.align 2
.L645:
.word .LC38
.word .LC28
.word .LC37
.word .LANCHOR1-4
.word .LC35
.word .LC36
.size dotTree_rec, .-dotTree_rec
.section .rodata.str1.4
.align 2
.LC39:
.ascii "digraph tree {\000"
.align 2
.LC40:
.ascii "}\000"
.text
.align 2
.global dotTree
.syntax unified
.arm
.fpu softvfp
.type dotTree, %function
dotTree:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r0, .L649
bl puts
mov r0, r4
mov r2, #1000
mov r1, #1
bl dotTree_rec
pop {r4, lr}
ldr r0, .L649+4
b puts
.L650:
.align 2
.L649:
.word .LC39
.word .LC40
.size dotTree, .-dotTree
.align 2
.global dotTreeh
.syntax unified
.arm
.fpu softvfp
.type dotTreeh, %function
dotTreeh:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, r1
mov r4, r0
ldr r0, .L653
bl puts
mov r0, r4
mov r2, r5
mov r1, #1
bl dotTree_rec
pop {r4, r5, r6, lr}
ldr r0, .L653+4
b puts
.L654:
.align 2
.L653:
.word .LC39
.word .LC40
.size dotTreeh, .-dotTreeh
.section .rodata.cst4
.align 2
.LC41:
.word __stack_chk_guard
.text
.align 2
.global init_lst
.syntax unified
.arm
.fpu softvfp
.type init_lst, %function
init_lst:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L681
sub sp, sp, #12
mov r0, #12
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl malloc
mov r2, #0
mov r5, r0
mov r3, #16
mov r0, #64
stm r5, {r2, r3}
bl malloc
ldr r7, .L681+4
ldr r4, .L681+8
ldr r6, .L681+12
str r0, [r5, #8]
.L663:
mov ip, sp
mov lr, #1
str r7, [sp]
.L656:
ldrb r0, [ip], #1 @ zero_extendqisi2
mov r3, lr
mov r2, ip
b .L659
.L677:
add r3, r3, #1
cmp r3, #4
beq .L676
.L659:
ldrb r1, [r2], #1 @ zero_extendqisi2
cmp r1, r0
bne .L677
.L667:
lsr r3, r7, #24
add r3, r3, #1
and r1, r3, #255
umull r3, r2, r4, r1
cmp r1, #9
str r7, [sp]
lsr r3, r2, #3
strb r1, [sp, #3]
addhi r2, sp, #3
bls .L665
.L666:
rsb r0, r3, r3, lsl #5
rsb r0, r3, r0, lsl #2
add r1, r1, r0, lsl #1
strb r1, [r2]
ldrb r1, [r2, #-1]! @ zero_extendqisi2
add r3, r3, r1
and r1, r3, #255
umull r0, r3, r4, r1
cmp r1, #9
lsr r3, r3, #3
strb r1, [r2]
and r3, r3, #255
bhi .L666
.L665:
ldr r7, [sp]
cmp r7, r6
bne .L663
ldr r3, .L681
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L678
mov r0, r5
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L676:
add lr, lr, #1
cmp lr, #4
bne .L656
ldr r3, [r5]
ldr r2, [r5, #4]
add r1, r3, #1
cmp r1, r2
ldr r0, [r5, #8]
beq .L679
.L669:
str r1, [r5]
str r7, [r0, r3, lsl #2]
b .L667
.L679:
lsl r3, r1, #1
lsl r1, r1, #3
str r3, [r5, #4]
bl realloc
cmp r0, #0
str r0, [r5, #8]
beq .L680
ldr r3, [r5]
add r1, r3, #1
b .L669
.L678:
bl __stack_chk_fail
.L680:
bl vec_seq_add.part.0
.L682:
.align 2
.L681:
.word .LC41
.word 50462976
.word -858993459
.word 117901321
.size init_lst, .-init_lst
.section .rodata.str1.4
.align 2
.LC42:
.ascii "%zu,\000"
.text
.align 2
.global test_sieveg
.syntax unified
.arm
.fpu softvfp
.type test_sieveg, %function
test_sieveg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
bl init_lst
ldr r1, .L687
bl sieveg
ldr r6, .L687+4
sub r5, r0, #4
add r4, r0, #52
.L684:
ldr r2, [r5, #4]!
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r5, r4
bne .L684
mov r0, #10
bl putchar
mov r0, #0
pop {r4, r5, r6, pc}
.L688:
.align 2
.L687:
.word 50462976
.word .LC42
.size test_sieveg, .-test_sieveg
.section .rodata.str1.4
.align 2
.LC43:
.ascii "%s%c\012\000"
.section .rodata.cst4
.align 2
.LC44:
.word __stack_chk_guard
.text
.align 2
.global test_sieve
.syntax unified
.arm
.fpu softvfp
.type test_sieve, %function
test_sieve:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r3, .L703
sub sp, sp, #36
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
bl init_lst
ldr r1, .L703+4
bl sieve
ldr r9, .L703+8
ldr r8, .L703+12
sub r6, r0, #4
add r7, r0, #52
.L693:
ldr r5, [r6, #4]!
ldr r3, [r5]
cmp r3, #0
beq .L690
mov r4, #0
.L692:
cmp r3, r4
bls .L701
ldr r2, [r5, #8]
mov r3, r9
ldr r1, [r2, r4, lsl #2]
mov r2, #10
lsr ip, r1, #16
lsr r0, r1, #8
lsr lr, r1, #24
and ip, ip, #255
and r0, r0, #255
and r1, r1, #255
stmib sp, {r0, ip, lr}
str r1, [sp]
add r0, sp, #16
mov r1, #1
bl __sprintf_chk
mov r3, #44
mov r1, r8
mov r0, #1
add r2, sp, #16
bl __printf_chk
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L692
.L690:
mov r0, #10
bl putchar
cmp r6, r7
bne .L693
ldr r3, .L703
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L702
mov r0, #0
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L701:
mov r2, #108
ldr r3, .L703+16
ldr r1, .L703+20
ldr r0, .L703+24
bl __assert_fail
.L702:
bl __stack_chk_fail
.L704:
.align 2
.L703:
.word .LC44
.word 50462976
.word .LC26
.word .LC43
.word .LANCHOR0
.word .LC2
.word .LC3
.size test_sieve, .-test_sieve
.section .rodata.str1.4
.align 2
.LC45:
.ascii "eqk: \000"
.align 2
.LC46:
.ascii "%f\012\000"
.section .rodata.cst4
.align 2
.LC47:
.word __stack_chk_guard
.text
.align 2
.global test_eqk
.syntax unified
.arm
.fpu softvfp
.type test_eqk, %function
test_eqk:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L745
sub sp, sp, #68
ldr r3, [r3]
str r3, [sp, #60]
mov r3,#0
bl init_lst
ldr r1, .L745+4
bl sieve
mov r4, r0
mov r0, #12
bl malloc
mov r2, #0
mov r6, r0
mov r3, #16
mov r0, #64
stm r6, {r2, r3}
bl malloc
mov r10, r0
sub r7, r4, #4
str r7, [sp, #32]
str r0, [r6, #8]
add r8, r4, #52
.L708:
ldr r1, [r7, #4]!
mov r2, #0
mov r0, r1
bl eqkg
ldr r9, [r6]
ldr r2, [r0]
ldr r1, [r6, #4]
add r3, r9, r2
cmp r3, r1
mov r5, r0
bcc .L706
mov r0, r10
lsl r1, r3, #2
str r3, [r6, #4]
bl realloc
cmp r0, #0
mov r10, r0
str r0, [r6, #8]
beq .L707
ldr r2, [r5]
.L706:
ldr r1, [r5, #8]
lsl r2, r2, #2
add r0, r10, r9, lsl #2
bl memcpy
ldr r3, [r5]
ldr r0, [r5, #8]
add r9, r9, r3
str r9, [r6]
bl free
mov r0, r5
bl free
cmp r7, r8
bne .L708
mov r0, #1
ldr r1, .L745+8
str r9, [sp, #36]
str r10, [sp, #40]
bl __printf_chk
cmp r9, #0
mov r3, r9
beq .L709
sub r7, r10, #4
mov r5, #0
mov r10, r3
ldr r9, .L745+12
ldr r8, .L745+16
add r6, sp, #48
.L710:
ldr r2, [r7, #4]!
mov r3, r9
lsr r1, r2, #8
and r1, r1, #255
str r1, [sp, #4]
mov r1, #1
lsr r0, r2, #16
lsr ip, r2, #24
and r0, r0, #255
and r2, r2, #255
str r0, [sp, #8]
str ip, [sp, #12]
str r2, [sp]
mov r0, r6
mov r2, #10
add r5, r5, r1
bl __sprintf_chk
mov r3, #44
mov r2, r6
mov r1, r8
mov r0, #1
bl __printf_chk
cmp r10, r5
bne .L710
.L709:
mov r0, #10
bl putchar
add r3, r4, #48
str r3, [sp, #44]
.L717:
ldr r3, [sp, #32]
ldr r5, [r3, #4]!
str r3, [sp, #32]
ldr r3, [r5]
cmp r3, #0
movne r4, #0
beq .L716
.L712:
cmp r3, r4
bls .L715
ldr r2, [r5, #8]
ldr r3, .L745+12
ldr r1, [r2, r4, lsl #2]
mov r2, #10
lsr ip, r1, #16
lsr r0, r1, #8
and ip, ip, #255
and r0, r0, #255
str ip, [sp, #8]
lsr ip, r1, #24
and r1, r1, #255
str r0, [sp, #4]
str ip, [sp, #12]
str r1, [sp]
add r0, sp, #48
mov r1, #1
bl __sprintf_chk
mov r3, #44
mov r0, #1
ldr r1, .L745+16
add r2, sp, #48
bl __printf_chk
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bne .L712
.L716:
mov r0, #10
bl putchar
ldr r3, [sp, #36]
cmp r3, #0
beq .L713
ldr r3, [sp, #40]
add fp, sp, #48
sub r3, r3, #4
str r3, [sp, #24]
mov r3, #0
str r3, [sp, #20]
.L714:
ldr r4, [sp, #24]
ldr r3, .L745+12
ldr r2, [r4, #4]!
lsr r0, r2, #16
lsr r1, r2, #8
lsr ip, r2, #24
and r0, r0, #255
and r1, r1, #255
and r2, r2, #255
str ip, [sp, #12]
str r0, [sp, #8]
str r1, [sp, #4]
str r2, [sp]
mov r1, #1
mov r2, #10
mov r0, fp
str r4, [sp, #24]
bl __sprintf_chk
mov r0, fp
bl puts
ldr r3, [sp, #32]
ldr r1, [r4]
ldr r0, [r3]
bl sieveg
sub r5, r0, #4
mov r6, r5
add r4, r0, #52
.L719:
ldr r2, [r6, #4]!
mov r0, #1
ldr r1, .L745+20
bl __printf_chk
cmp r4, r6
bne .L719
mov r0, #10
bl putchar
mov r10, #0
mov r3, r5
.L720:
ldr r2, [r3, #4]!
cmp r3, r4
add r10, r10, r2
bne .L720
str fp, [sp, #28]
mov r6, #0
mov r7, #0
mov fp, r4
b .L722
.L721:
cmp r5, fp
beq .L743
.L722:
ldr r0, [r5, #4]!
cmp r0, #0
beq .L721
bl __aeabi_ui2d
mov r8, r0
mov r0, r10
mov r9, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
mov r8, r0
mov r4, r1
bl log
mov r2, r0
mov r3, r1
mov r0, r8
add r1, r4, #-2147483648
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
cmp r5, fp
mov r6, r0
mov r7, r1
bne .L722
.L743:
ldr r1, [sp, #20]
mov r3, r7
add r1, r1, #1
mov r4, r1
str r1, [sp, #20]
mov r2, r6
mov r0, #1
ldr r1, .L745+24
ldr fp, [sp, #28]
bl __printf_chk
ldr r3, [sp, #36]
cmp r3, r4
bne .L714
.L713:
ldr r3, [sp, #32]
ldr r2, [sp, #44]
cmp r3, r2
bne .L717
ldr r3, .L745
ldr r2, [r3]
ldr r3, [sp, #60]
eors r2, r3, r2
mov r3, #0
bne .L744
mov r0, #0
add sp, sp, #68
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L715:
mov r2, #108
ldr r3, .L745+28
ldr r1, .L745+32
ldr r0, .L745+36
bl __assert_fail
.L744:
bl __stack_chk_fail
.L707:
mov r2, #95
ldr r3, .L745+40
ldr r1, .L745+32
ldr r0, .L745+44
bl __assert_fail
.L746:
.align 2
.L745:
.word .LC47
.word 50462976
.word .LC45
.word .LC26
.word .LC43
.word .LC42
.word .LC46
.word .LANCHOR0
.word .LC2
.word .LC3
.word .LANCHOR0+40
.word .LC4
.size test_eqk, .-test_eqk
.section .rodata.str1.4
.align 2
.LC48:
.ascii "height=%zu\012\000"
.align 2
.LC49:
.ascii "%d,\000"
.align 2
.LC50:
.ascii "sum=%d,hsum=%d\012\000"
.align 2
.LC51:
.ascii "probe=%zu\012\000"
.align 2
.LC52:
.ascii "active=%zu hit=%zu miss=%zu conflict=%zu hitrate=%f"
.ascii " conflict=%f\012\000"
.text
.align 2
.global test_build
.syntax unified
.arm
.fpu softvfp
.type test_build, %function
test_build:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #36
bl init_lst
ldr r6, .L772
str r0, [r6]
bl buildT
subs r4, r0, #0
beq .L748
ldr r3, [r4]
cmp r3, #1
movne r5, #0
beq .L769
.L749:
ldrb r2, [r4, #64] @ zero_extendqisi2
ldr r1, .L772+4
eor r2, r2, #1
add r2, r2, r5
mov r0, #1
bl __printf_chk
mov r0, r4
bl level
ldr r3, [r0]
mov r5, r0
cmp r3, #0
beq .L751
.L757:
mov r7, #0
ldr fp, .L772+8
mov r9, r7
mov r10, r7
b .L752
.L753:
bls .L770
.L752:
ldr r3, [r5, #8]
mov r1, fp
ldr r8, [r3, r7, lsl #2]
mov r0, #1
mov r2, r8
bl __printf_chk
ldr r3, [r5]
add r7, r7, #1
cmp r3, r7
mla r10, r7, r8, r10
add r9, r9, r8
bne .L753
mov r2, r9
mov r3, r10
mov r0, #1
ldr r1, .L772+12
bl __printf_chk
cmp r4, #0
moveq r2, r4
beq .L754
.L759:
ldr r3, [r4]
cmp r3, #1
movne r1, #0
beq .L771
.L755:
ldrb r2, [r4, #64] @ zero_extendqisi2
add r2, r2, r1
.L754:
ldr r1, .L772+16
mov r0, #1
bl __printf_chk
ldr r10, [r6, #12]
ldr r7, [r6, #8]
mov r0, r10
bl __aeabi_ui2d
mov r8, r0
mov r0, r7
mov r9, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
ldr fp, [r6, #4]
str r0, [sp, #16]
str r1, [sp, #20]
mov r0, fp
bl __aeabi_ui2d
mov r8, r0
add r0, fp, r7
mov r9, r1
bl __aeabi_ui2d
mov r2, #0
mov r3, #0
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
mov r3, fp
ldr r2, [r6, #16]
str r0, [sp, #8]
str r1, [sp, #12]
stm sp, {r7, r10}
ldr r1, .L772+20
mov r0, #1
bl __printf_chk
mov r1, #1
mov r0, r4
bl dotTreeh
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
ldr r5, [r6]
ldr r0, [r5, #8]
bl free
mov r0, r5
bl free
mov r0, r4
bl free_tree
mov r0, #0
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L769:
mov r2, r4
mov r5, #0
add r7, r4, #52
.L750:
ldr r0, [r2, #4]!
mov r1, #2
bl height_rec
cmp r2, r7
add r5, r5, r0
bne .L750
b .L749
.L771:
mov r2, r4
mov r1, #0
add r7, r4, #52
.L756:
ldr r0, [r2, #4]!
bl probe_cnt
cmp r7, r2
add r1, r1, r0
bne .L756
b .L755
.L748:
mov r2, r4
ldr r1, .L772+4
mov r0, #1
bl __printf_chk
mov r0, r4
bl level
ldr r2, [r0]
mov r5, r0
cmp r2, #0
bne .L757
mov r3, r2
mov r0, #1
ldr r1, .L772+12
str r2, [sp, #28]
bl __printf_chk
ldr r2, [sp, #28]
b .L754
.L751:
mov r2, r3
ldr r1, .L772+12
mov r0, #1
bl __printf_chk
b .L759
.L770:
mov r2, #108
ldr r3, .L772+24
ldr r1, .L772+28
ldr r0, .L772+32
bl __assert_fail
.L773:
.align 2
.L772:
.word .LANCHOR2
.word .LC48
.word .LC49
.word .LC50
.word .LC51
.word .LC52
.word .LANCHOR0
.word .LC2
.word .LC3
.size test_build, .-test_build
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl test_build
mov r0, #0
pop {r4, pc}
.size main, .-main
.global conflict
.global miss
.global hit
.global active
.comm cache_array,1610611788,4
.global tbl
.global lst
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type __PRETTY_FUNCTION__.6799, %object
.size __PRETTY_FUNCTION__.6799, 12
__PRETTY_FUNCTION__.6799:
.ascii "vec_seq_idx\000"
.type __PRETTY_FUNCTION__.6845, %object
.size __PRETTY_FUNCTION__.6845, 13
__PRETTY_FUNCTION__.6845:
.ascii "vec_pair_idx\000"
.space 3
.type __PRETTY_FUNCTION__.6785, %object
.size __PRETTY_FUNCTION__.6785, 12
__PRETTY_FUNCTION__.6785:
.ascii "vec_seq_add\000"
.type __PRETTY_FUNCTION__.6790, %object
.size __PRETTY_FUNCTION__.6790, 15
__PRETTY_FUNCTION__.6790:
.ascii "vec_seq_append\000"
.space 1
.type __PRETTY_FUNCTION__.6869, %object
.size __PRETTY_FUNCTION__.6869, 8
__PRETTY_FUNCTION__.6869:
.ascii "chk2idx\000"
.type __PRETTY_FUNCTION__.6966, %object
.size __PRETTY_FUNCTION__.6966, 7
__PRETTY_FUNCTION__.6966:
.ascii "sieveg\000"
.space 1
.type __PRETTY_FUNCTION__.6767, %object
.size __PRETTY_FUNCTION__.6767, 11
__PRETTY_FUNCTION__.6767:
.ascii "vec_vp_idx\000"
.space 1
.type __PRETTY_FUNCTION__.6762, %object
.size __PRETTY_FUNCTION__.6762, 11
__PRETTY_FUNCTION__.6762:
.ascii "vec_vp_add\000"
.space 1
.type __PRETTY_FUNCTION__.7049, %object
.size __PRETTY_FUNCTION__.7049, 5
__PRETTY_FUNCTION__.7049:
.ascii "eqkg\000"
.space 3
.type __PRETTY_FUNCTION__.7115, %object
.size __PRETTY_FUNCTION__.7115, 8
__PRETTY_FUNCTION__.7115:
.ascii "selMaxL\000"
.type __PRETTY_FUNCTION__.7095, %object
.size __PRETTY_FUNCTION__.7095, 6
__PRETTY_FUNCTION__.7095:
.ascii "first\000"
.space 2
.type __PRETTY_FUNCTION__.7100, %object
.size __PRETTY_FUNCTION__.7100, 8
__PRETTY_FUNCTION__.7100:
.ascii "selMaxE\000"
.type __PRETTY_FUNCTION__.7262, %object
.size __PRETTY_FUNCTION__.7262, 9
__PRETTY_FUNCTION__.7262:
.ascii "selMaxEC\000"
.space 3
.type __PRETTY_FUNCTION__.7148, %object
.size __PRETTY_FUNCTION__.7148, 8
__PRETTY_FUNCTION__.7148:
.ascii "selMinH\000"
.type __PRETTY_FUNCTION__.7225, %object
.size __PRETTY_FUNCTION__.7225, 9
__PRETTY_FUNCTION__.7225:
.ascii "selMinHC\000"
.space 3
.type __PRETTY_FUNCTION__.6840, %object
.size __PRETTY_FUNCTION__.6840, 13
__PRETTY_FUNCTION__.6840:
.ascii "vec_pair_add\000"
.space 3
.type __PRETTY_FUNCTION__.7245, %object
.size __PRETTY_FUNCTION__.7245, 10
__PRETTY_FUNCTION__.7245:
.ascii "selMinHCE\000"
.data
.align 2
.set .LANCHOR1,. + 0
.type tbl, %object
.size tbl, 100
tbl:
.word 0
.word 1
.word 2
.word 3
.word 4
.word -1
.word 5
.word 6
.word 7
.word 8
.word -1
.word -1
.word 9
.word 10
.word 11
.word -1
.word -1
.word -1
.word 12
.word -1
.word -1
.word -1
.word -1
.word -1
.word 13
.bss
.align 2
.set .LANCHOR2,. + 0
.type lst, %object
.size lst, 4
lst:
.space 4
.type hit, %object
.size hit, 4
hit:
.space 4
.type miss, %object
.size miss, 4
miss:
.space 4
.type conflict, %object
.size conflict, 4
conflict:
.space 4
.type active, %object
.size active, 4
active:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1000964.c"
.intel_syntax noprefix
.text
.p2align 4
.globl product_handler
.type product_handler, @function
product_handler:
.LFB51:
.cfi_startproc
endbr64
test rdi, rdi
je .L6
xor eax, eax
ret
.L6:
mov rsi, QWORD PTR v1[rip]
mov rcx, QWORD PTR v2[rip]
xor eax, eax
mov rdx, QWORD PTR temp[rip]
.p2align 4,,10
.p2align 3
.L3:
movsd xmm0, QWORD PTR [rsi+rax]
mulsd xmm0, QWORD PTR [rcx+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 8
cmp rax, 40000000
jne .L3
xor eax, eax
ret
.cfi_endproc
.LFE51:
.size product_handler, .-product_handler
.p2align 4
.globl sum_handler
.type sum_handler, @function
sum_handler:
.LFB52:
.cfi_startproc
endbr64
test rdi, rdi
je .L13
xor eax, eax
ret
.L13:
mov rax, QWORD PTR temp[rip]
movsd xmm0, QWORD PTR result[rip]
lea rdx, 40000000[rax]
.p2align 4,,10
.p2align 3
.L9:
addsd xmm0, QWORD PTR [rax]
add rax, 8
movsd QWORD PTR result[rip], xmm0
cmp rax, rdx
jne .L9
xor eax, eax
ret
.cfi_endproc
.LFE52:
.size sum_handler, .-sum_handler
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Non-parallel method computed dot product in %ld uses.\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB53:
.cfi_startproc
endbr64
sub rsp, 56
.cfi_def_cfa_offset 64
mov edi, 40000000
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
call malloc@PLT
mov edi, 40000000
mov QWORD PTR v1[rip], rax
call malloc@PLT
mov edi, 40000000
mov QWORD PTR v2[rip], rax
call malloc@PLT
xor edi, edi
mov QWORD PTR temp[rip], rax
call time@PLT
mov rdi, rax
call srand@PLT
mov rdi, QWORD PTR v1[rip]
xor eax, eax
mov rsi, QWORD PTR v2[rip]
mov ecx, 5000000
.p2align 4,,10
.p2align 3
.L15:
pxor xmm0, xmm0
mov edx, ecx
cvtsi2sd xmm0, eax
sub edx, eax
movsd QWORD PTR [rdi+rax*8], xmm0
pxor xmm0, xmm0
cvtsi2sd xmm0, edx
movsd QWORD PTR [rsi+rax*8], xmm0
add rax, 1
cmp rax, 5000000
jne .L15
xor esi, esi
mov rdi, rsp
call gettimeofday@PLT
mov rsi, QWORD PTR v1[rip]
mov rcx, QWORD PTR v2[rip]
xor eax, eax
mov rdx, QWORD PTR temp[rip]
.p2align 4,,10
.p2align 3
.L16:
movsd xmm0, QWORD PTR [rsi+rax]
mulsd xmm0, QWORD PTR [rcx+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 8
cmp rax, 40000000
jne .L16
movsd xmm0, QWORD PTR result[rip]
mov rax, rdx
lea rdx, 40000000[rdx]
.p2align 4,,10
.p2align 3
.L17:
addsd xmm0, QWORD PTR [rax]
add rax, 8
movsd QWORD PTR result[rip], xmm0
cmp rdx, rax
jne .L17
xor esi, esi
lea rdi, 16[rsp]
call gettimeofday@PLT
mov rdx, QWORD PTR 24[rsp]
lea rsi, .LC0[rip]
xor eax, eax
sub rdx, QWORD PTR 8[rsp]
mov edi, 1
call __printf_chk@PLT
mov rdi, QWORD PTR temp[rip]
xor esi, esi
mov edx, 40000000
call memset@PLT
mov rdi, QWORD PTR v1[rip]
mov QWORD PTR result[rip], 0x000000000
call free@PLT
mov rdi, QWORD PTR v2[rip]
call free@PLT
mov rdi, QWORD PTR temp[rip]
call free@PLT
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L23
xor eax, eax
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L23:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE53:
.size main, .-main
.globl result
.bss
.align 8
.type result, @object
.size result, 8
result:
.zero 8
.globl temp
.align 8
.type temp, @object
.size temp, 8
temp:
.zero 8
.globl v2
.align 8
.type v2, @object
.size v2, 8
v2:
.zero 8
.globl v1
.align 8
.type v1, @object
.size v1, 8
v1:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1000964.c"
.text
.global __aeabi_dmul
.align 2
.syntax unified
.arm
.fpu softvfp
.type product_handler.part.0, %function
product_handler.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r1, .L7
ldr r2, .L7+4
ldr r3, .L7+8
push {r4, r5, r6, r7, r8, lr}
ldr r4, [r1]
ldr r7, .L7+12
ldr r6, [r2]
ldr r5, [r3]
add r7, r4, r7
.L2:
ldmia r4!, {r0-r1}
ldmia r6!, {r2-r3}
bl __aeabi_dmul
cmp r4, r7
stm r5!, {r0-r1}
bne .L2
pop {r4, r5, r6, r7, r8, pc}
.L8:
.align 2
.L7:
.word v1
.word v2
.word temp
.word 40000000
.size product_handler.part.0, .-product_handler.part.0
.global __aeabi_dadd
.align 2
.syntax unified
.arm
.fpu softvfp
.type sum_handler.part.0, %function
sum_handler.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L14
push {r4, r5, r6, lr}
ldr r5, .L14+4
ldr r4, [r3]
ldr r6, .L14+8
add r5, r4, r5
ldmia r6, {r0-r1}
.L10:
ldmia r4!, {r2-r3}
bl __aeabi_dadd
cmp r4, r5
stm r6, {r0-r1}
bne .L10
pop {r4, r5, r6, pc}
.L15:
.align 2
.L14:
.word temp
.word 40000000
.word .LANCHOR0
.size sum_handler.part.0, .-sum_handler.part.0
.align 2
.global product_handler
.syntax unified
.arm
.fpu softvfp
.type product_handler, %function
product_handler:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
beq .L22
mov r0, #0
bx lr
.L22:
push {r4, lr}
bl product_handler.part.0
mov r0, #0
pop {r4, pc}
.size product_handler, .-product_handler
.align 2
.global sum_handler
.syntax unified
.arm
.fpu softvfp
.type sum_handler, %function
sum_handler:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
beq .L29
mov r0, #0
bx lr
.L29:
push {r4, lr}
bl sum_handler.part.0
mov r0, #0
pop {r4, pc}
.size sum_handler, .-sum_handler
.global __aeabi_i2d
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Non-parallel method computed dot product in %ld use"
.ascii "s.\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r3, .L36
sub sp, sp, #24
ldr r0, .L36+4
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
bl malloc
mov r3, r0
ldr r10, .L36+8
ldr r0, .L36+4
str r3, [r10]
bl malloc
mov r3, r0
ldr r9, .L36+12
ldr r0, .L36+4
str r3, [r9]
bl malloc
mov r4, #0
mov r3, r0
ldr r8, .L36+16
mov r0, r4
str r3, [r8]
bl time
bl srand
ldr r7, .L36+20
ldr r6, [r10]
ldr r5, [r9]
.L31:
mov r0, r4
bl __aeabi_i2d
mov r2, r0
mov r3, r1
sub r0, r7, r4
stm r6!, {r2-r3}
bl __aeabi_i2d
add r4, r4, #1
cmp r4, r7
stm r5!, {r0-r1}
bne .L31
mov r4, #0
mov r5, #0
mov r1, #0
add r0, sp, #4
bl gettimeofday
bl product_handler.part.0
bl sum_handler.part.0
mov r1, #0
add r0, sp, #12
bl gettimeofday
ldr r3, [sp, #8]
ldr r2, [sp, #16]
ldr r1, .L36+24
sub r2, r2, r3
mov r0, #1
bl __printf_chk
ldr r2, .L36+4
mov r1, #0
ldr r0, [r8]
bl memset
ldr r3, .L36+28
ldr r0, [r10]
stm r3, {r4-r5}
bl free
ldr r0, [r9]
bl free
ldr r0, [r8]
bl free
ldr r3, .L36
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L35
mov r0, #0
add sp, sp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L35:
bl __stack_chk_fail
.L37:
.align 2
.L36:
.word .LC1
.word 40000000
.word v1
.word v2
.word temp
.word 5000000
.word .LC0
.word .LANCHOR0
.size main, .-main
.global result
.comm temp,4,4
.comm v2,4,4
.comm v1,4,4
.bss
.align 3
.set .LANCHOR0,. + 0
.type result, %object
.size result, 8
result:
.space 8
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1000966.c"
.intel_syntax noprefix
.text
.p2align 4
.globl timeout_do
.type timeout_do, @function
timeout_do:
.LFB67:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edi, 1
call sleep@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE67:
.size timeout_do, .-timeout_do
.p2align 4
.globl yield
.type yield, @function
yield:
.LFB62:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call rand@PLT
add rsp, 8
.cfi_def_cfa_offset 8
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1759218605
sar ecx, 31
sar rdx, 43
sub edx, ecx
imul edx, edx, 5000
sub eax, edx
lea edi, 5000[rax]
jmp usleep@PLT
.cfi_endproc
.LFE62:
.size yield, .-yield
.p2align 4
.globl printf_log
.type printf_log, @function
printf_log:
.LFB63:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rdi
sub rsp, 208
.cfi_def_cfa_offset 224
mov QWORD PTR 40[rsp], rsi
mov QWORD PTR 48[rsp], rdx
mov QWORD PTR 56[rsp], rcx
mov QWORD PTR 64[rsp], r8
mov QWORD PTR 72[rsp], r9
test al, al
je .L7
movaps XMMWORD PTR 80[rsp], xmm0
movaps XMMWORD PTR 96[rsp], xmm1
movaps XMMWORD PTR 112[rsp], xmm2
movaps XMMWORD PTR 128[rsp], xmm3
movaps XMMWORD PTR 144[rsp], xmm4
movaps XMMWORD PTR 160[rsp], xmm5
movaps XMMWORD PTR 176[rsp], xmm6
movaps XMMWORD PTR 192[rsp], xmm7
.L7:
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea rdi, info_lock[rip]
lea rax, 224[rsp]
mov DWORD PTR [rsp], 8
mov QWORD PTR 8[rsp], rax
lea rax, 32[rsp]
mov DWORD PTR 4[rsp], 48
mov QWORD PTR 16[rsp], rax
call pthread_mutex_lock@PLT
mov rdx, r12
mov rcx, rsp
mov esi, 1
mov rdi, QWORD PTR stdout[rip]
call __vfprintf_chk@PLT
lea rdi, info_lock[rip]
mov r12d, eax
call pthread_mutex_unlock@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L10
add rsp, 208
.cfi_remember_state
.cfi_def_cfa_offset 16
mov eax, r12d
pop r12
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE63:
.size printf_log, .-printf_log
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s make a burger.\n"
.text
.p2align 4
.globl cook_do
.type cook_do, @function
cook_do:
.LFB64:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
xor eax, eax
lea rbp, rack_full[rip]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov rbx, rdi
add rbx, 12
sub rsp, 8
.cfi_def_cfa_offset 32
call yield
.p2align 4,,10
.p2align 3
.L12:
mov rdi, rbp
call sem_wait@PLT
mov rsi, rbx
lea rdi, .LC0[rip]
xor eax, eax
call printf_log
lea rdi, rack_empty[rip]
call sem_post@PLT
call rand@PLT
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1759218605
sar ecx, 31
sar rdx, 43
sub edx, ecx
imul edx, edx, 5000
sub eax, edx
lea edi, 5000[rax]
call usleep@PLT
jmp .L12
.cfi_endproc
.LFE64:
.size cook_do, .-cook_do
.section .rodata.str1.1
.LC1:
.string "%s accepts an order.\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "%s take a burger to customer.\n"
.text
.p2align 4
.globl cashier_do
.type cashier_do, @function
cashier_do:
.LFB65:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
xor eax, eax
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
lea r12, .LC1[rip]
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
lea r14, 272[rbp]
lea rbx, 12[rbp]
lea r13, 304[rbp]
add rbp, 336
call yield
.p2align 4,,10
.p2align 3
.L15:
mov rdi, r14
call sem_wait@PLT
mov rsi, rbx
mov rdi, r12
xor eax, eax
call printf_log
mov rdi, r13
call sem_post@PLT
lea rdi, rack_empty[rip]
call sem_wait@PLT
mov rsi, rbx
lea rdi, .LC2[rip]
xor eax, eax
call printf_log
lea rdi, rack_full[rip]
call sem_post@PLT
mov rdi, rbp
call sem_post@PLT
call rand@PLT
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1759218605
sar ecx, 31
sar rdx, 43
sub edx, ecx
imul edx, edx, 5000
sub eax, edx
lea edi, 5000[rax]
call usleep@PLT
jmp .L15
.cfi_endproc
.LFE65:
.size cashier_do, .-cashier_do
.section .rodata.str1.1
.LC3:
.string "%s come.\n"
.LC4:
.string "%s get a burger.\n"
.text
.p2align 4
.globl customer_do
.type customer_do, @function
customer_do:
.LFB66:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor eax, eax
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea rbp, .LC3[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
add rbx, 12
call yield
.p2align 4,,10
.p2align 3
.L18:
mov r12, QWORD PTR cashiers[rip]
call rand@PLT
mov rsi, rbx
mov rdi, rbp
cdq
idiv DWORD PTR MAX_CASHIER[rip]
xor eax, eax
movsx rdx, edx
imul rdx, rdx, 376
add r12, rdx
call printf_log
lea rdi, 272[r12]
call sem_post@PLT
lea rdi, 304[r12]
call sem_wait@PLT
lea rdi, 336[r12]
call sem_wait@PLT
mov rsi, rbx
lea rdi, .LC4[rip]
xor eax, eax
call printf_log
call rand@PLT
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1759218605
sar ecx, 31
sar rdx, 43
sub edx, ecx
imul edx, edx, 5000
sub eax, edx
lea edi, 5000[rax]
call usleep@PLT
jmp .L18
.cfi_endproc
.LFE66:
.size customer_do, .-customer_do
.section .rodata.str1.8
.align 8
.LC5:
.string "Cooks [%d], Cashiers [%d], Customers [%d], Rack[%d]\n"
.align 8
.LC6:
.string "usage: BBC cookers cashiers customers rack_size"
.align 8
.LC7:
.string "failed to initialize info lock"
.align 8
.LC8:
.string "failed to initialize rack full semaphore.\n"
.align 8
.LC9:
.string "failed to initialize rack empty semaphore.\n"
.section .rodata.str1.1
.LC10:
.string "Cook [%d]"
.LC11:
.string "Customer [%d]"
.LC12:
.string "Cashier [%d]"
.LC13:
.string "Begin run."
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB68:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 24
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
cmp edi, 5
jne .L21
mov rdi, QWORD PTR 8[rsi]
mov rbx, rsi
mov edx, 10
xor esi, esi
call strtol@PLT
mov rdi, QWORD PTR 16[rbx]
xor esi, esi
mov edx, 10
mov DWORD PTR MAX_COOK[rip], eax
call strtol@PLT
mov rdi, QWORD PTR 24[rbx]
xor esi, esi
mov edx, 10
mov DWORD PTR MAX_CASHIER[rip], eax
call strtol@PLT
mov rdi, QWORD PTR 32[rbx]
xor esi, esi
mov edx, 10
mov DWORD PTR MAX_CUSTOMER[rip], eax
call strtol@PLT
mov ecx, DWORD PTR MAX_CASHIER[rip]
mov r8d, DWORD PTR MAX_CUSTOMER[rip]
lea rsi, .LC5[rip]
mov edx, DWORD PTR MAX_COOK[rip]
mov r9, rax
mov DWORD PTR MAX_ON_RACK[rip], eax
mov edi, 1
xor eax, eax
call __printf_chk@PLT
movsx rdi, DWORD PTR MAX_COOK[rip]
imul rdi, rdi, 272
call malloc@PLT
movsx rdi, DWORD PTR MAX_CASHIER[rip]
mov QWORD PTR cooks[rip], rax
imul rdi, rdi, 376
call malloc@PLT
movsx rdi, DWORD PTR MAX_CUSTOMER[rip]
mov QWORD PTR cashiers[rip], rax
imul rdi, rdi, 272
call malloc@PLT
xor esi, esi
lea rdi, info_lock[rip]
mov QWORD PTR customers[rip], rax
call pthread_mutex_init@PLT
test eax, eax
jne .L50
mov edx, DWORD PTR MAX_ON_RACK[rip]
xor esi, esi
lea rdi, rack_full[rip]
call sem_init@PLT
test eax, eax
jne .L51
xor edx, edx
xor esi, esi
lea rdi, rack_empty[rip]
call sem_init@PLT
mov r12d, eax
test eax, eax
jne .L26
xor ebx, ebx
xor ebp, ebp
cmp DWORD PTR MAX_COOK[rip], 0
lea r13, .LC10[rip]
jle .L28
.p2align 4,,10
.p2align 3
.L27:
mov rdi, QWORD PTR cooks[rip]
mov r8d, ebx
xor eax, eax
mov rcx, r13
mov rdx, -1
mov esi, 1
add rdi, rbp
add rbp, 272
mov DWORD PTR 8[rdi], ebx
add rdi, 12
add ebx, 1
call __sprintf_chk@PLT
cmp DWORD PTR MAX_COOK[rip], ebx
jg .L27
.L28:
cmp DWORD PTR MAX_CUSTOMER[rip], 0
jle .L29
xor ebx, ebx
xor ebp, ebp
lea r13, .LC11[rip]
.p2align 4,,10
.p2align 3
.L30:
mov rdi, QWORD PTR customers[rip]
mov r8d, ebx
xor eax, eax
mov rcx, r13
mov rdx, -1
mov esi, 1
add rdi, rbp
add rbp, 272
mov DWORD PTR 8[rdi], ebx
add rdi, 12
add ebx, 1
call __sprintf_chk@PLT
cmp DWORD PTR MAX_CUSTOMER[rip], ebx
jg .L30
.L29:
cmp DWORD PTR MAX_CASHIER[rip], 0
jle .L31
xor ebp, ebp
xor ebx, ebx
lea r13, .LC12[rip]
.p2align 4,,10
.p2align 3
.L32:
mov rdi, QWORD PTR cashiers[rip]
mov r8d, ebp
mov rcx, r13
xor eax, eax
mov edx, 256
mov esi, 1
add rdi, rbx
mov DWORD PTR 8[rdi], ebp
add rdi, 12
add ebp, 1
mov DWORD PTR 356[rdi], -1
call __sprintf_chk@PLT
mov rdi, QWORD PTR cashiers[rip]
xor edx, edx
xor esi, esi
add rdi, rbx
add rdi, 272
call sem_init@PLT
mov rdi, QWORD PTR cashiers[rip]
xor edx, edx
xor esi, esi
add rdi, rbx
add rdi, 304
call sem_init@PLT
mov rdi, QWORD PTR cashiers[rip]
xor edx, edx
xor esi, esi
add rdi, rbx
add rbx, 376
add rdi, 336
call sem_init@PLT
cmp DWORD PTR MAX_CASHIER[rip], ebp
jg .L32
.L31:
lea rdi, .LC13[rip]
call puts@PLT
cmp DWORD PTR MAX_COOK[rip], 0
jle .L33
xor ebp, ebp
xor ebx, ebx
lea r13, cook_do[rip]
.p2align 4,,10
.p2align 3
.L34:
mov rdi, QWORD PTR cooks[rip]
xor esi, esi
mov rdx, r13
add ebp, 1
add rdi, rbx
add rbx, 272
mov rcx, rdi
call pthread_create@PLT
cmp DWORD PTR MAX_COOK[rip], ebp
jg .L34
.L33:
cmp DWORD PTR MAX_CUSTOMER[rip], 0
jle .L35
xor ebp, ebp
xor ebx, ebx
lea r13, customer_do[rip]
.p2align 4,,10
.p2align 3
.L36:
mov rdi, QWORD PTR customers[rip]
xor esi, esi
mov rdx, r13
add ebp, 1
add rdi, rbx
add rbx, 272
mov rcx, rdi
call pthread_create@PLT
cmp DWORD PTR MAX_CUSTOMER[rip], ebp
jg .L36
.L35:
cmp DWORD PTR MAX_CASHIER[rip], 0
jle .L37
xor ebp, ebp
xor ebx, ebx
lea r13, cashier_do[rip]
.p2align 4,,10
.p2align 3
.L38:
mov rdi, QWORD PTR cashiers[rip]
xor esi, esi
mov rdx, r13
add ebp, 1
add rdi, rbx
add rbx, 376
mov rcx, rdi
call pthread_create@PLT
cmp DWORD PTR MAX_CASHIER[rip], ebp
jg .L38
.L37:
mov rdi, rsp
xor esi, esi
lea rdx, timeout_do[rip]
xor ecx, ecx
call pthread_create@PLT
mov rdi, QWORD PTR [rsp]
xor esi, esi
call pthread_join@PLT
jmp .L20
.L21:
lea rdi, .LC6[rip]
mov r12d, 1
call puts@PLT
.L20:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L52
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 40
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore_state
lea rdi, .LC7[rip]
mov r12d, 1
call puts@PLT
jmp .L20
.L51:
lea rdi, .LC8[rip]
xor eax, eax
mov r12d, 1
call printf_log
jmp .L20
.L26:
lea rdi, .LC9[rip]
xor eax, eax
mov r12d, 1
call printf_log
jmp .L20
.L52:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE68:
.size main, .-main
.globl MAX_CASHIER
.bss
.align 4
.type MAX_CASHIER, @object
.size MAX_CASHIER, 4
MAX_CASHIER:
.zero 4
.globl MAX_CUSTOMER
.align 4
.type MAX_CUSTOMER, @object
.size MAX_CUSTOMER, 4
MAX_CUSTOMER:
.zero 4
.globl MAX_COOK
.align 4
.type MAX_COOK, @object
.size MAX_COOK, 4
MAX_COOK:
.zero 4
.globl MAX_ON_RACK
.align 4
.type MAX_ON_RACK, @object
.size MAX_ON_RACK, 4
MAX_ON_RACK:
.zero 4
.globl info_lock
.align 32
.type info_lock, @object
.size info_lock, 40
info_lock:
.zero 40
.globl rack_full
.align 32
.type rack_full, @object
.size rack_full, 32
rack_full:
.zero 32
.globl rack_empty
.align 32
.type rack_empty, @object
.size rack_empty, 32
rack_empty:
.zero 32
.globl customers
.align 8
.type customers, @object
.size customers, 8
customers:
.zero 8
.globl cashiers
.align 8
.type cashiers, @object
.size cashiers, 8
cashiers:
.zero 8
.globl cooks
.align 8
.type cooks, @object
.size cooks, 8
cooks:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1000966.c"
.text
.align 2
.global timeout_do
.syntax unified
.arm
.fpu softvfp
.type timeout_do, %function
timeout_do:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r0, #1
bl sleep
mov r0, #0
pop {r4, pc}
.size timeout_do, .-timeout_do
.align 2
.global yield
.syntax unified
.arm
.fpu softvfp
.type yield, %function
yield:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl rand
pop {r4, lr}
ldr r3, .L6
asr r2, r0, #31
smull r1, r3, r0, r3
rsb r3, r2, r3, asr #11
rsb r2, r3, r3, lsl #5
add r3, r3, r2, lsl #2
add r3, r3, r3, lsl #2
sub r0, r0, r3, lsl #3
add r0, r0, #4992
add r0, r0, #8
b usleep
.L7:
.align 2
.L6:
.word 1759218605
.size yield, .-yield
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global printf_log
.syntax unified
.arm
.fpu softvfp
.type printf_log, %function
printf_log:
@ args = 4, pretend = 16, frame = 8
@ frame_needed = 0, uses_anonymous_args = 1
push {r0, r1, r2, r3}
push {r4, lr}
ldr r2, .L12
sub sp, sp, #8
add r3, sp, #20
ldr r0, .L12+4
ldr r2, [r2]
str r2, [sp, #4]
mov r2,#0
ldr r4, [sp, #16]
str r3, [sp]
bl pthread_mutex_lock
ldr r3, .L12+8
mov r2, r4
mov r1, #1
ldr r0, [r3]
ldr r3, [sp]
bl __vfprintf_chk
mov r4, r0
ldr r0, .L12+4
bl pthread_mutex_unlock
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L11
mov r0, r4
add sp, sp, #8
@ sp needed
pop {r4, lr}
add sp, sp, #16
bx lr
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC0
.word info_lock
.word stdout
.size printf_log, .-printf_log
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%s make a burger.\012\000"
.text
.align 2
.global cook_do
.syntax unified
.arm
.fpu softvfp
.type cook_do, %function
cook_do:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r4, r0
bl yield
ldr r7, .L17
ldr r6, .L17+4
ldr r5, .L17+8
add r4, r4, #8
.L15:
mov r0, r7
bl sem_wait
mov r1, r4
mov r0, r6
bl printf_log
mov r0, r5
bl sem_post
bl yield
b .L15
.L18:
.align 2
.L17:
.word rack_full
.word .LC1
.word rack_empty
.size cook_do, .-cook_do
.section .rodata.str1.4
.align 2
.LC2:
.ascii "%s accepts an order.\012\000"
.align 2
.LC3:
.ascii "%s take a burger to customer.\012\000"
.text
.align 2
.global cashier_do
.syntax unified
.arm
.fpu softvfp
.type cashier_do, %function
cashier_do:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r0
bl yield
ldr fp, .L22
ldr r10, .L22+4
ldr r9, .L22+8
ldr r8, .L22+12
add r7, r5, #264
add r4, r5, #8
add r6, r5, #280
add r5, r5, #296
.L20:
mov r0, r7
bl sem_wait
mov r1, r4
mov r0, fp
bl printf_log
mov r0, r6
bl sem_post
mov r0, r10
bl sem_wait
mov r1, r4
mov r0, r9
bl printf_log
mov r0, r8
bl sem_post
mov r0, r5
bl sem_post
bl yield
b .L20
.L23:
.align 2
.L22:
.word .LC2
.word rack_empty
.word .LC3
.word rack_full
.size cashier_do, .-cashier_do
.global __aeabi_idivmod
.section .rodata.str1.4
.align 2
.LC4:
.ascii "%s come.\012\000"
.align 2
.LC5:
.ascii "%s get a burger.\012\000"
.text
.align 2
.global customer_do
.syntax unified
.arm
.fpu softvfp
.type customer_do, %function
customer_do:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r5, r0
bl yield
ldr r9, .L27
ldr r8, .L27+4
ldr r7, .L27+8
ldr r6, .L27+12
add r5, r5, #8
.L25:
ldr r4, [r9]
bl rand
ldr r1, [r8]
bl __aeabi_idivmod
add r3, r1, r1, lsl #2
rsb r1, r1, r3, lsl #4
add r4, r4, r1, lsl #2
mov r0, r7
mov r1, r5
bl printf_log
add r0, r4, #264
bl sem_post
add r0, r4, #280
bl sem_wait
add r0, r4, #296
bl sem_wait
mov r1, r5
mov r0, r6
bl printf_log
bl yield
b .L25
.L28:
.align 2
.L27:
.word cashiers
.word .LANCHOR0
.word .LC4
.word .LC5
.size customer_do, .-customer_do
.section .rodata.str1.4
.align 2
.LC6:
.ascii "Cooks [%d], Cashiers [%d], Customers [%d], Rack[%d]"
.ascii "\012\000"
.align 2
.LC7:
.ascii "usage: BBC cookers cashiers customers rack_size\000"
.align 2
.LC8:
.ascii "failed to initialize info lock\000"
.align 2
.LC9:
.ascii "failed to initialize rack full semaphore.\012\000"
.align 2
.LC10:
.ascii "failed to initialize rack empty semaphore.\012\000"
.align 2
.LC11:
.ascii "Cook [%d]\000"
.align 2
.LC12:
.ascii "Customer [%d]\000"
.align 2
.LC13:
.ascii "Cashier [%d]\000"
.align 2
.LC14:
.ascii "Begin run.\000"
.section .rodata.cst4
.align 2
.LC15:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L61
sub sp, sp, #20
cmp r0, #5
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bne .L30
mov r5, r1
mov r2, #10
mov r1, #0
ldr r0, [r5, #4]
bl strtol
mov r3, r0
ldr r4, .L61+4
mov r2, #10
mov r1, #0
ldr r0, [r5, #8]
str r3, [r4, #4]
bl strtol
mov r3, r0
mov r2, #10
mov r1, #0
ldr r0, [r5, #12]
str r3, [r4]
bl strtol
mov r3, r0
mov r2, #10
mov r1, #0
ldr r0, [r5, #16]
str r3, [r4, #8]
bl strtol
mov ip, r0
mov r5, #264
ldr r3, [r4, #8]
ldr r1, .L61+8
stm sp, {r3, ip}
ldr r2, [r4, #4]
ldr r3, [r4]
mov r0, #1
str ip, [r4, #12]
bl __printf_chk
ldr r0, [r4, #4]
ldr r9, .L61+12
mul r0, r5, r0
bl malloc
mov r2, #316
ldr r3, [r4]
str r0, [r9]
mul r0, r2, r3
bl malloc
mov r3, r0
ldr r0, [r4, #8]
ldr r6, .L61+16
mul r0, r5, r0
str r3, [r6]
bl malloc
mov r3, r0
ldr r8, .L61+20
mov r1, #0
ldr r0, .L61+24
str r3, [r8]
bl pthread_mutex_init
subs r1, r0, #0
bne .L58
ldr r2, [r4, #12]
ldr r0, .L61+28
bl sem_init
subs r2, r0, #0
bne .L59
mov r1, r2
ldr r0, .L61+32
bl sem_init
subs r10, r0, #0
bne .L35
ldr r3, [r4, #4]
cmp r3, #0
movgt r5, r10
movgt r7, r10
ldrgt fp, .L61+36
ble .L37
.L36:
ldr r0, [r9]
mov r3, fp
add r0, r0, r7
str r5, [r0, #4]
mvn r2, #0
str r5, [sp]
mov r1, #1
add r0, r0, #8
bl __sprintf_chk
ldr r3, [r4, #4]
add r5, r5, #1
cmp r3, r5
add r7, r7, #264
bgt .L36
.L37:
ldr r3, [r4, #8]
cmp r3, #0
ble .L38
mov r5, #0
mov r7, r5
ldr fp, .L61+40
.L39:
ldr r0, [r8]
mov r3, fp
add r0, r0, r7
str r5, [r0, #4]
mvn r2, #0
str r5, [sp]
mov r1, #1
add r0, r0, #8
bl __sprintf_chk
ldr r3, [r4, #8]
add r5, r5, #1
cmp r3, r5
add r7, r7, #264
bgt .L39
.L38:
ldr r3, [r4]
cmp r3, #0
ble .L40
mov r7, #0
mov r5, r7
ldr fp, .L61+44
.L41:
mvn r2, #0
ldr r0, [r6]
mov r3, fp
add r0, r0, r5
str r7, [r0, #4]
str r2, [r0, #312]
mov r1, #1
mov r2, #256
str r7, [sp]
add r0, r0, #8
bl __sprintf_chk
mov r2, #0
ldr r0, [r6]
mov r1, r2
add r0, r0, r5
add r0, r0, #264
bl sem_init
mov r2, #0
ldr r0, [r6]
mov r1, r2
add r0, r0, r5
add r0, r0, #280
bl sem_init
mov r2, #0
ldr r0, [r6]
mov r1, r2
add r0, r0, r5
add r0, r0, #296
bl sem_init
ldr r3, [r4]
add r7, r7, #1
cmp r3, r7
add r5, r5, #316
bgt .L41
.L40:
ldr r0, .L61+48
bl puts
ldr r3, [r4, #4]
cmp r3, #0
ble .L42
mov r5, #0
mov r7, r5
ldr fp, .L61+52
.L43:
ldr r3, [r9]
mov r2, fp
add r3, r3, r7
mov r0, r3
mov r1, #0
bl pthread_create
ldr r3, [r4, #4]
add r5, r5, #1
cmp r3, r5
add r7, r7, #264
bgt .L43
.L42:
ldr r3, [r4, #8]
cmp r3, #0
ble .L44
mov r5, #0
mov r7, r5
ldr r9, .L61+56
.L45:
ldr r3, [r8]
mov r2, r9
add r3, r3, r7
mov r0, r3
mov r1, #0
bl pthread_create
ldr r3, [r4, #8]
add r5, r5, #1
cmp r3, r5
add r7, r7, #264
bgt .L45
.L44:
ldr r3, [r4]
cmp r3, #0
ble .L46
mov r5, #0
mov r7, r5
ldr r8, .L61+60
.L47:
ldr r3, [r6]
mov r2, r8
add r3, r3, r7
mov r0, r3
mov r1, #0
bl pthread_create
ldr r3, [r4]
add r5, r5, #1
cmp r3, r5
add r7, r7, #316
bgt .L47
.L46:
mov r3, #0
ldr r2, .L61+64
mov r1, r3
add r0, sp, #8
bl pthread_create
mov r1, #0
ldr r0, [sp, #8]
bl pthread_join
b .L29
.L30:
ldr r0, .L61+68
bl puts
mov r10, #1
.L29:
ldr r3, .L61
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L60
mov r0, r10
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L58:
ldr r0, .L61+72
bl puts
mov r10, #1
b .L29
.L59:
ldr r0, .L61+76
bl printf_log
mov r10, #1
b .L29
.L35:
ldr r0, .L61+80
bl printf_log
mov r10, #1
b .L29
.L60:
bl __stack_chk_fail
.L62:
.align 2
.L61:
.word .LC15
.word .LANCHOR0
.word .LC6
.word cooks
.word cashiers
.word customers
.word info_lock
.word rack_full
.word rack_empty
.word .LC11
.word .LC12
.word .LC13
.word .LC14
.word cook_do
.word customer_do
.word cashier_do
.word timeout_do
.word .LC7
.word .LC8
.word .LC9
.word .LC10
.size main, .-main
.global MAX_CASHIER
.global MAX_CUSTOMER
.global MAX_COOK
.global MAX_ON_RACK
.comm info_lock,24,4
.comm rack_full,16,4
.comm rack_empty,16,4
.comm customers,4,4
.comm cashiers,4,4
.comm cooks,4,4
.bss
.align 2
.set .LANCHOR0,. + 0
.type MAX_CASHIER, %object
.size MAX_CASHIER, 4
MAX_CASHIER:
.space 4
.type MAX_COOK, %object
.size MAX_COOK, 4
MAX_COOK:
.space 4
.type MAX_CUSTOMER, %object
.size MAX_CUSTOMER, 4
MAX_CUSTOMER:
.space 4
.type MAX_ON_RACK, %object
.size MAX_ON_RACK, 4
MAX_ON_RACK:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100097.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100097.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001.c"
.intel_syntax noprefix
.text
.p2align 4
.globl creating
.type creating, @function
creating:
.LFB52:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx rax, edx
xor r15d, r15d
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
lea rax, [rax+rax*4]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea rax, [rax+rax*4]
mov r13, rcx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, r13
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, [rdi+rax*4]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 88
.cfi_def_cfa_offset 144
mov QWORD PTR 72[rsp], rdi
mov rdi, rbp
mov DWORD PTR 56[rsp], esi
mov DWORD PTR 60[rsp], edx
mov QWORD PTR 64[rsp], r8
call strlen@PLT
mov QWORD PTR 32[rsp], rbp
mov QWORD PTR 24[rsp], rax
mov QWORD PTR 16[rsp], 0
.L2:
mov rax, QWORD PTR 16[rsp]
mov rcx, QWORD PTR 24[rsp]
mov DWORD PTR 52[rsp], eax
mov DWORD PTR 48[rsp], eax
mov DWORD PTR 40[rsp], eax
cmp ecx, eax
jle .L15
mov ebx, ecx
mov rsi, QWORD PTR 32[rsp]
mov edx, 1
sub ebx, eax
xor eax, eax
movsx rcx, ebx
test ebx, ebx
jle .L17
.p2align 4,,10
.p2align 3
.L4:
movzx edi, BYTE PTR [r12+rax]
cmp BYTE PTR [rsi+rax], dil
cmovne edx, r15d
add rax, 1
cmp rax, rcx
jne .L4
test edx, edx
jne .L17
.L5:
mov rax, QWORD PTR 16[rsp]
sub rax, QWORD PTR 24[rsp]
xor r14d, r14d
mov r13d, 1
mov QWORD PTR 8[rsp], rax
mov rax, r12
mov r12, r14
mov r14, rax
jmp .L8
.p2align 4,,10
.p2align 3
.L10:
mov rdi, r14
call strlen@PLT
mov rsi, QWORD PTR 8[rsp]
add rax, r14
add rax, r12
movzx eax, BYTE PTR [rax+rsi]
cmp BYTE PTR 0[rbp+r12], al
cmovne r13d, r15d
add r12, 1
.L8:
cmp ebx, r12d
jg .L10
mov r12, r14
test r13d, r13d
jne .L32
.L11:
add QWORD PTR 16[rsp], 1
add QWORD PTR 32[rsp], 1
jmp .L2
.p2align 4,,10
.p2align 3
.L15:
mov ecx, DWORD PTR 56[rsp]
mov r13, r12
cmp DWORD PTR 60[rsp], ecx
jl .L33
jne .L19
mov rdi, r12
call strlen@PLT
mov rcx, QWORD PTR 64[rsp]
cmp DWORD PTR [rcx], eax
jle .L19
mov DWORD PTR [rcx], eax
.L19:
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rdi, r13
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp free@PLT
.p2align 4,,10
.p2align 3
.L17:
.cfi_restore_state
mov edi, 100
call malloc@PLT
mov esi, DWORD PTR 40[rsp]
mov rcx, rax
test esi, esi
je .L7
mov eax, DWORD PTR 52[rsp]
mov rdi, rcx
mov rsi, rbp
lea edx, -1[rax]
add rdx, 1
call memcpy@PLT
mov rcx, rax
.L7:
mov rax, QWORD PTR 16[rsp]
mov rdi, rcx
mov edx, 100
mov rsi, r12
mov BYTE PTR [rcx+rax], 0
call __strcat_chk@PLT
mov r8, QWORD PTR 64[rsp]
mov esi, DWORD PTR 56[rsp]
mov rcx, rax
mov eax, DWORD PTR 60[rsp]
mov rdi, QWORD PTR 72[rsp]
lea edx, 1[rax]
call creating
mov rdi, rbp
call strlen@PLT
mov ebx, eax
mov QWORD PTR 24[rsp], rax
sub ebx, DWORD PTR 48[rsp]
jmp .L5
.p2align 4,,10
.p2align 3
.L32:
mov edi, 100
call malloc@PLT
mov edx, 100
mov rsi, r14
mov rdi, rax
mov rbx, rax
mov QWORD PTR 8[rsp], rax
call __stpcpy_chk@PLT
mov edx, DWORD PTR 40[rsp]
sub rax, rbx
mov QWORD PTR 24[rsp], rax
test edx, edx
je .L14
mov ecx, DWORD PTR 52[rsp]
cdqe
mov QWORD PTR 40[rsp], r12
mov r12, rbp
xor r13d, r13d
lea r14d, -1[rcx]
mov rcx, QWORD PTR 8[rsp]
lea rbx, [rcx+rax]
mov rbp, rbx
mov rbx, QWORD PTR 16[rsp]
.p2align 4,,10
.p2align 3
.L13:
mov rdi, r12
call strlen@PLT
lea rcx, [r12+r13]
sub rax, rbx
movzx eax, BYTE PTR [rcx+rax]
mov BYTE PTR 0[rbp+r13], al
mov rax, r13
add r13, 1
cmp r14, rax
jne .L13
mov rbp, r12
mov r12, QWORD PTR 40[rsp]
.L14:
mov rcx, QWORD PTR 8[rsp]
mov eax, DWORD PTR 48[rsp]
add eax, DWORD PTR 24[rsp]
mov r8, QWORD PTR 64[rsp]
cdqe
mov esi, DWORD PTR 56[rsp]
mov rdi, QWORD PTR 72[rsp]
mov BYTE PTR [rcx+rax], 0
mov eax, DWORD PTR 60[rsp]
lea edx, 1[rax]
call creating
mov rdi, rbp
call strlen@PLT
mov QWORD PTR 24[rsp], rax
jmp .L11
.p2align 4,,10
.p2align 3
.L33:
mov edi, 100
call malloc@PLT
mov edi, 100
mov r14, rax
call malloc@PLT
mov BYTE PTR [r14], 0
mov rsi, r12
mov rdi, r14
mov BYTE PTR [rax], 0
mov r15, rax
mov edx, 100
call __stpcpy_chk@PLT
mov rsi, rbp
mov rdi, r15
mov edx, 100
mov r12, rax
call __stpcpy_chk@PLT
mov rdx, r15
mov rsi, r13
sub rdx, rax
mov rdi, rax
add rdx, 100
call __strcpy_chk@PLT
mov rdx, r14
mov rsi, rbp
mov rdi, r12
sub rdx, r12
add rdx, 100
call __strcpy_chk@PLT
mov r12d, DWORD PTR 60[rsp]
mov rbp, QWORD PTR 64[rsp]
mov rcx, r14
mov rbx, QWORD PTR 72[rsp]
mov r14d, DWORD PTR 56[rsp]
add r12d, 1
mov r8, rbp
mov edx, r12d
mov esi, r14d
mov rdi, rbx
call creating
mov r8, rbp
mov rcx, r15
mov edx, r12d
mov esi, r14d
mov rdi, rbx
call creating
jmp .L19
.cfi_endproc
.LFE52:
.size creating, .-creating
.p2align 4
.globl createSuper
.type createSuper, @function
createSuper:
.LFB51:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12d, esi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
mov edi, 100
sub rsp, 24
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov DWORD PTR 4[rsp], 100
call malloc@PLT
mov edx, 100
mov rsi, rbp
mov rdi, rax
call __strcpy_chk@PLT
lea r8, 4[rsp]
mov esi, r12d
mov rdi, rbp
mov rcx, rax
mov edx, 1
call creating
mov eax, DWORD PTR 4[rsp]
mov rdx, QWORD PTR 8[rsp]
sub rdx, QWORD PTR fs:40
jne .L37
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L37:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE51:
.size createSuper, .-createSuper
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%s"
.LC2:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB50:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC0[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r14
push r13
lea rsi, -44[rbp]
push r12
push rbx
sub rsp, 16
.cfi_offset 14, -24
.cfi_offset 13, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
call __isoc99_scanf@PLT
movsx rax, DWORD PTR -44[rbp]
mov rcx, rsp
mov rsi, rax
lea rax, [rax+rax*4]
lea rax, [rax+rax*4]
lea rax, 15[0+rax*4]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L40
.L50:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L50
.L40:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L51
.L41:
mov r14, rsp
test esi, esi
jle .L42
mov r12, rsp
xor ebx, ebx
lea r13, .LC1[rip]
.p2align 4,,10
.p2align 3
.L43:
mov rsi, r12
mov rdi, r13
xor eax, eax
add ebx, 1
call __isoc99_scanf@PLT
mov esi, DWORD PTR -44[rbp]
add r12, 100
cmp esi, ebx
jg .L43
.L42:
mov rdi, r14
call createSuper
lea rsi, .LC2[rip]
mov edi, 1
mov edx, eax
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L52
lea rsp, -32[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L51:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L41
.L52:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE50:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001.c"
.text
.align 2
.global creating
.syntax unified
.arm
.fpu softvfp
.type creating, %function
creating:
@ args = 4, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add r9, r2, r2, lsl #2
add r9, r9, r9, lsl #2
sub sp, sp, #36
add r9, r0, r9, lsl #2
str r0, [sp, #28]
mov r0, r9
mov r4, r3
str r2, [sp, #20]
str r1, [sp, #16]
bl strlen
mov r8, #0
sub r3, r9, #1
str r3, [sp, #12]
ldr r3, [sp, #72]
str r0, [sp, #8]
str r3, [sp, #24]
ldr r3, [sp, #8]
cmp r3, r8
ble .L16
.L33:
sub r5, r3, r8
cmp r5, #0
ble .L18
mov r2, #1
ldr r1, [sp, #12]
sub r3, r4, #1
add lr, r3, r5
add r1, r1, r8
.L4:
ldrb r0, [r3, #1]! @ zero_extendqisi2
ldrb ip, [r1, #1]! @ zero_extendqisi2
cmp ip, r0
movne r2, #0
cmp r3, lr
bne .L4
cmp r2, #0
bne .L18
.L5:
mov fp, #1
ldr r3, [sp, #8]
sub r6, r8, r9
ldr r10, [sp, #12]
sub r6, r6, r3
sub r7, fp, r9
b .L9
.L11:
mov r0, r4
bl strlen
add r0, r4, r0
add r0, r0, r10
ldrb r3, [r0, r6] @ zero_extendqisi2
ldrb r2, [r10] @ zero_extendqisi2
cmp r2, r3
movne fp, #0
.L9:
add r3, r7, r10
cmp r5, r3
add r10, r10, #1
bgt .L11
cmp fp, #0
bne .L32
.L12:
ldr r3, [sp, #8]
add r8, r8, #1
cmp r3, r8
bgt .L33
.L16:
ldr r3, [sp, #20]
ldr r2, [sp, #16]
cmp r3, r2
blt .L34
bne .L20
mov r0, r4
bl strlen
ldr r2, [sp, #24]
ldr r3, [r2]
cmp r3, r0
strgt r0, [r2]
.L20:
mov r0, r4
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b free
.L18:
mov r0, #100
bl malloc
cmp r8, #0
mov r3, r0
beq .L8
ldr r0, [sp, #12]
sub r1, r3, #1
mov r2, r0
add lr, r0, r8
.L7:
ldrb r0, [r2, #1]! @ zero_extendqisi2
cmp r2, lr
strb r0, [r1, #1]!
bne .L7
.L8:
mov ip, #0
mov r2, #100
strb ip, [r3, r8]
mov r1, r4
mov r0, r3
bl __strcat_chk
ldr r2, [sp, #24]
mov r3, r0
str r2, [sp]
ldr r2, [sp, #20]
ldr r1, [sp, #16]
ldr r0, [sp, #28]
add r2, r2, #1
bl creating
mov r0, r9
bl strlen
str r0, [sp, #8]
sub r5, r0, r8
b .L5
.L32:
mov r0, #100
bl malloc
mov r2, #100
mov r1, r4
mov r7, r0
bl __stpcpy_chk
cmp r8, #0
sub fp, r0, r7
addne r6, fp, r8
mov r5, r0
movne r10, r0
addne r6, r7, r6
beq .L15
.L14:
mov r0, r9
bl strlen
sub r0, r0, r8
sub r3, r10, r5
add r0, r9, r0
ldrb r3, [r0, r3] @ zero_extendqisi2
strb r3, [r10], #1
cmp r6, r10
bne .L14
.L15:
mov ip, #0
ldr r3, [sp, #24]
ldr r2, [sp, #20]
add r0, r7, r8
str r3, [sp]
ldr r1, [sp, #16]
strb ip, [r0, fp]
mov r3, r7
ldr r0, [sp, #28]
add r2, r2, #1
bl creating
mov r0, r9
bl strlen
str r0, [sp, #8]
b .L12
.L34:
mov r0, #100
bl malloc
mov r7, r0
mov r0, #100
bl malloc
mov r3, #0
mov r6, r0
strb r3, [r7]
strb r3, [r6]
mov r1, r4
mov r0, r7
mov r2, #100
bl __stpcpy_chk
mov r1, r9
mov r8, r0
mov r2, #100
mov r0, r6
bl __stpcpy_chk
sub r2, r6, r0
mov r1, r4
add r2, r2, #100
bl __strcpy_chk
ldr r3, [sp, #20]
sub r2, r7, r8
mov r1, r9
mov r0, r8
add r2, r2, #100
add r5, r3, #1
bl __strcpy_chk
ldr r9, [sp, #16]
ldr r8, [sp, #28]
mov r3, r7
ldr r7, [sp, #24]
mov r2, r5
mov r1, r9
mov r0, r8
str r7, [sp]
bl creating
mov r0, r8
mov r3, r6
mov r2, r5
mov r1, r9
str r7, [sp]
bl creating
mov r0, r4
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b free
.size creating, .-creating
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global createSuper
.syntax unified
.arm
.fpu softvfp
.type createSuper, %function
createSuper:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
mov r7, #100
ldr r3, .L39
sub sp, sp, #20
mov r4, r0
mov r0, r7
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
mov r5, r1
str r7, [sp, #8]
bl malloc
mov r6, r0
mov r2, r7
mov r1, r4
bl __strcpy_chk
add r2, sp, #8
mov r3, r6
mov r0, r4
str r2, [sp]
mov r1, r5
mov r2, #1
bl creating
ldr r3, .L39
ldr r0, [sp, #8]
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L38
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, pc}
.L38:
bl __stack_chk_fail
.L40:
.align 2
.L39:
.word .LC0
.size createSuper, .-createSuper
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "%s\000"
.align 2
.LC3:
.ascii "%d\012\000"
.section .rodata.cst4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #8
ldr r3, .L48
sub r1, fp, #28
ldr r0, .L48+4
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
bl __isoc99_scanf
ldr r1, [fp, #-28]
add r3, r1, r1, lsl #2
add r3, r3, r3, lsl #2
lsl r3, r3, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
cmp r1, #0
mov r7, sp
ble .L42
mov r5, sp
mov r4, #0
ldr r6, .L48+8
.L43:
mov r1, r5
mov r0, r6
bl __isoc99_scanf
ldr r1, [fp, #-28]
add r4, r4, #1
cmp r1, r4
add r5, r5, #100
bgt .L43
.L42:
mov r0, r7
bl createSuper
ldr r1, .L48+12
mov r2, r0
mov r0, #1
bl __printf_chk
ldr r3, .L48
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
bne .L47
mov r0, #0
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L47:
bl __stack_chk_fail
.L49:
.align 2
.L48:
.word .LC4
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "10010.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\nThread %d has started.\n"
.LC1:
.string "\nThe binary value of %d is : "
.LC2:
.string "\nThread %d has finished.\n\n"
.LC3:
.string "%d"
.text
.p2align 4
.globl fun
.type fun, @function
fun:
.LFB40:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea rdi, loc[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
xor ebp, ebp
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 416
.cfi_def_cfa_offset 448
mov rax, QWORD PTR fs:40
mov QWORD PTR 408[rsp], rax
xor eax, eax
call pthread_mutex_lock@PLT
mov eax, DWORD PTR num[rip]
lea r12d, [rax+rax]
call rand@PLT
lea rsi, .LC0[rip]
mov edi, 1
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1374389535
sar ecx, 31
sar rdx, 37
sub edx, ecx
imul edx, edx, 100
sub eax, edx
mov edx, DWORD PTR count[rip]
add r12d, eax
xor eax, eax
call __printf_chk@PLT
mov eax, DWORD PTR count[rip]
mov edi, 1
lea rsi, .LC0[rip]
lea edx, 1[rax]
xor eax, eax
mov DWORD PTR count[rip], edx
call __printf_chk@PLT
test r12d, r12d
je .L2
mov rdx, rsp
mov eax, r12d
.p2align 4,,10
.p2align 3
.L3:
mov ecx, eax
mov ebx, ebp
add rdx, 4
add ebp, 1
and ecx, 1
mov DWORD PTR -4[rdx], ecx
mov ecx, eax
shr ecx, 31
add eax, ecx
sar eax
jne .L3
.L4:
xor eax, eax
mov edx, r12d
mov edi, 1
lea rsi, .LC1[rip]
call __printf_chk@PLT
test ebp, ebp
jle .L7
movsx rbx, ebx
lea edx, -1[rbp]
lea r12, .LC3[rip]
lea rax, 0[0+rbx*4]
sal rdx, 2
lea rbx, [rsp+rax]
lea rax, -4[rsp+rax]
sub rax, rdx
mov rbp, rax
.p2align 4,,10
.p2align 3
.L6:
mov edx, DWORD PTR [rbx]
mov rsi, r12
mov edi, 1
xor eax, eax
sub rbx, 4
call __printf_chk@PLT
cmp rbx, rbp
jne .L6
.L7:
mov edx, DWORD PTR count[rip]
mov edi, 1
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
lea rdi, loc[rip]
call pthread_mutex_unlock@PLT
mov rax, QWORD PTR 408[rsp]
sub rax, QWORD PTR fs:40
jne .L14
add rsp, 416
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L2:
.cfi_restore_state
lea ebx, -1[rbp]
jmp .L4
.L14:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE40:
.size fun, .-fun
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB41:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
xor ecx, ecx
lea rdx, fun[rip]
xor esi, esi
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov rdi, rsp
call pthread_create@PLT
xor ecx, ecx
xor esi, esi
lea rdi, 8[rsp]
lea rdx, fun[rip]
call pthread_create@PLT
xor ecx, ecx
lea rdx, fun[rip]
xor esi, esi
lea rdi, 16[rsp]
call pthread_create@PLT
mov rdi, QWORD PTR [rsp]
xor esi, esi
call pthread_join@PLT
mov rdi, QWORD PTR 8[rsp]
xor esi, esi
call pthread_join@PLT
mov rdi, QWORD PTR 16[rsp]
xor esi, esi
call pthread_join@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L18
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE41:
.size main, .-main
.globl loc
.bss
.align 32
.type loc, @object
.size loc, 40
loc:
.zero 40
.globl num
.data
.align 4
.type num, @object
.size num, 4
num:
.long 965
.globl count
.bss
.align 4
.type count, @object
.size count, 4
count:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "10010.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012Thread %d has started.\012\000"
.align 2
.LC1:
.ascii "\012The binary value of %d is : \000"
.align 2
.LC2:
.ascii "\012Thread %d has finished.\012\012\000"
.align 2
.LC3:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.global fun
.syntax unified
.arm
.fpu softvfp
.type fun, %function
fun:
@ args = 0, pretend = 0, frame = 408
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L15
sub sp, sp, #412
ldr r0, .L15+4
ldr r3, [r3]
str r3, [sp, #404]
mov r3,#0
bl pthread_mutex_lock
ldr r3, .L15+8
ldr r6, .L15+12
ldr r7, [r3]
bl rand
ldr r2, .L15+16
asr r3, r0, #31
smull r1, r2, r0, r2
rsb r3, r3, r2, asr #5
add r3, r3, r3, lsl #2
add r3, r3, r3, lsl #2
sub r3, r0, r3, lsl #2
ldr r2, [r6]
ldr r1, .L15+20
mov r0, #1
lsl r7, r7, #1
add r7, r3, r7
bl __printf_chk
ldr r2, [r6]
mov r0, #1
add r2, r2, #1
ldr r1, .L15+20
str r2, [r6]
bl __printf_chk
cmp r7, #0
mov r4, #0
beq .L2
mov r3, r7
add r1, sp, #4
.L3:
add r2, r3, r3, lsr #31
and r0, r3, #1
asrs r3, r2, #1
mov r5, r4
str r0, [r1], #4
add r4, r4, #1
bne .L3
.L4:
mov r2, r7
mov r0, #1
ldr r1, .L15+24
bl __printf_chk
cmp r4, #0
ble .L8
add r3, sp, #4
add r5, r3, r5, lsl #2
ldr r7, .L15+28
sub r4, r5, r4, lsl #2
.L7:
ldr r2, [r5], #-4
mov r1, r7
mov r0, #1
bl __printf_chk
cmp r5, r4
bne .L7
.L8:
ldr r2, [r6]
mov r0, #1
ldr r1, .L15+32
bl __printf_chk
ldr r3, .L15
ldr r2, [r3]
ldr r3, [sp, #404]
eors r2, r3, r2
mov r3, #0
bne .L14
ldr r0, .L15+4
add sp, sp, #412
@ sp needed
pop {r4, r5, r6, r7, lr}
b pthread_mutex_unlock
.L2:
sub r5, r4, #1
b .L4
.L14:
bl __stack_chk_fail
.L16:
.align 2
.L15:
.word .LC4
.word loc
.word .LANCHOR0
.word .LANCHOR1
.word 1374389535
.word .LC0
.word .LC1
.word .LC3
.word .LC2
.size fun, .-fun
.section .rodata.cst4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
str lr, [sp, #-4]!
ldr ip, .L21
sub sp, sp, #20
mov r1, r3
ldr r2, .L21+4
mov r0, sp
ldr ip, [ip]
str ip, [sp, #12]
mov ip,#0
bl pthread_create
mov r3, #0
ldr r2, .L21+4
mov r1, r3
add r0, sp, #4
bl pthread_create
mov r3, #0
ldr r2, .L21+4
mov r1, r3
add r0, sp, #8
bl pthread_create
mov r1, #0
ldr r0, [sp]
bl pthread_join
mov r1, #0
ldr r0, [sp, #4]
bl pthread_join
mov r1, #0
ldr r0, [sp, #8]
bl pthread_join
ldr r3, .L21
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L20
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L20:
bl __stack_chk_fail
.L22:
.align 2
.L21:
.word .LC5
.word fun
.size main, .-main
.comm loc,24,4
.global num
.global count
.data
.align 2
.set .LANCHOR0,. + 0
.type num, %object
.size num, 4
num:
.word 965
.bss
.align 2
.set .LANCHOR1,. + 0
.type count, %object
.size count, 4
count:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100100.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB11:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov esi, 115
sub rsp, 32
.cfi_def_cfa_offset 48
movdqa xmm0, XMMWORD PTR .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov rbx, rsp
movabs rax, 29113321772053280
mov rdi, rbx
mov QWORD PTR 16[rsp], rax
movups XMMWORD PTR [rsp], xmm0
call strrchr@PLT
xor edi, edi
sub rax, rbx
cmp rax, 17
sete dil
xor eax, eax
call assert@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop rbx
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE11:
.size main, .-main
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC0:
.quad 2338328219631577172
.quad 7308339910404153441
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100100.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "This is a sample string\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr lr, .L6
sub sp, sp, #32
add ip, sp, #4
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1}
stm ip, {r0, r1}
ldr r3, .L6+4
add r4, sp, #4
mov r1, #115
mov r0, r4
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
bl strrchr
sub r0, r0, r4
sub r0, r0, #17
clz r0, r0
lsr r0, r0, #5
bl assert
ldr r3, .L6+4
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #32
@ sp needed
pop {r4, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100101.c"
.intel_syntax noprefix
.text
.p2align 4
.globl hello
.type hello, @function
hello:
.LFB23:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE23:
.size hello, .-hello
.p2align 4
.globl dasum
.type dasum, @function
dasum:
.LFB24:
.cfi_startproc
endbr64
test rsi, rsi
je .L7
pxor xmm2, xmm2
movq xmm3, QWORD PTR .LC1[rip]
lea rax, [rdi+rsi*8]
movapd xmm1, xmm2
.p2align 4,,10
.p2align 3
.L6:
movsd xmm0, QWORD PTR [rdi]
comisd xmm0, xmm2
ja .L5
xorpd xmm0, xmm3
.L5:
add rdi, 8
addsd xmm1, xmm0
cmp rdi, rax
jne .L6
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L7:
pxor xmm1, xmm1
movapd xmm0, xmm1
ret
.cfi_endproc
.LFE24:
.size dasum, .-dasum
.p2align 4
.globl pdasum
.type pdasum, @function
pdasum:
.LFB28:
.cfi_startproc
endbr64
test rsi, rsi
je .L13
pxor xmm2, xmm2
movq xmm3, QWORD PTR .LC1[rip]
lea rax, [rdi+rsi*8]
movapd xmm1, xmm2
.p2align 4,,10
.p2align 3
.L12:
movsd xmm0, QWORD PTR [rdi]
comisd xmm0, xmm2
ja .L11
xorpd xmm0, xmm3
.L11:
add rdi, 8
addsd xmm1, xmm0
cmp rdi, rax
jne .L12
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L13:
pxor xmm1, xmm1
movapd xmm0, xmm1
ret
.cfi_endproc
.LFE28:
.size pdasum, .-pdasum
.section .rodata.str1.1,"aMS",@progbits,1
.LC2:
.string "%.2f "
.text
.p2align 4
.globl dvdump
.type dvdump, @function
dvdump:
.LFB26:
.cfi_startproc
endbr64
test rsi, rsi
je .L23
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea r13, .LC2[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 48
.p2align 4,,10
.p2align 3
.L17:
movsd xmm0, QWORD PTR [r12+rbx*8]
mov rsi, r13
mov edi, 1
mov eax, 1
add rbx, 1
call __printf_chk@PLT
cmp rbp, rbx
jne .L17
add rsp, 8
.cfi_def_cfa_offset 40
mov edi, 10
pop rbx
.cfi_restore 3
.cfi_def_cfa_offset 32
pop rbp
.cfi_restore 6
.cfi_def_cfa_offset 24
pop r12
.cfi_restore 12
.cfi_def_cfa_offset 16
pop r13
.cfi_restore 13
.cfi_def_cfa_offset 8
jmp putchar@PLT
.p2align 4,,10
.p2align 3
.L23:
mov edi, 10
jmp putchar@PLT
.cfi_endproc
.LFE26:
.size dvdump, .-dvdump
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC1:
.long 0
.long -2147483648
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100101.c"
.text
.align 2
.global hello
.syntax unified
.arm
.fpu softvfp
.type hello, %function
hello:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size hello, .-hello
.global __aeabi_dcmpgt
.global __aeabi_dadd
.align 2
.global dasum
.syntax unified
.arm
.fpu softvfp
.type dasum, %function
dasum:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r6, #0
mov r7, #0
beq .L3
mov r4, r0
mov r8, r6
mov r9, r7
add fp, r0, r1, lsl #3
.L6:
ldr r5, [r4, #4]
ldr r10, [r4]
mov r1, r5
mov r2, r8
mov r3, r9
mov r0, r10
bl __aeabi_dcmpgt
mov ip, r0
cmp ip, #0
addeq r5, r5, #-2147483648
mov r0, r6
mov r1, r7
mov r2, r10
mov r3, r5
bl __aeabi_dadd
add r4, r4, #8
cmp r4, fp
mov r6, r0
mov r7, r1
bne .L6
.L3:
mov r0, r6
mov r1, r7
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size dasum, .-dasum
.align 2
.global pdasum
.syntax unified
.arm
.fpu softvfp
.type pdasum, %function
pdasum:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b dasum
.size pdasum, .-pdasum
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%.2f \000"
.text
.align 2
.global dvdump
.syntax unified
.arm
.fpu softvfp
.type dvdump, %function
dvdump:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
subs r5, r1, #0
beq .L12
mov r4, r0
ldr r6, .L19
add r5, r0, r5, lsl #3
.L13:
ldmia r4!, {r2-r3}
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L13
.L12:
pop {r4, r5, r6, lr}
mov r0, #10
b putchar
.L20:
.align 2
.L19:
.word .LC0
.size dvdump, .-dvdump
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100102.c"
.intel_syntax noprefix
.text
.p2align 4
.globl squeeze
.type squeeze, @function
squeeze:
.LFB24:
.cfi_startproc
endbr64
mov r8, rsi
movzx esi, BYTE PTR [rdi]
mov r10, rdi
xor r9d, r9d
lea rdi, 1[rdi]
test sil, sil
je .L3
.p2align 4,,10
.p2align 3
.L7:
movzx eax, BYTE PTR [r8]
lea rdx, 1[r8]
test al, al
jne .L5
jmp .L9
.p2align 4,,10
.p2align 3
.L15:
add rdx, 1
cmp cl, sil
je .L6
.L5:
mov ecx, eax
movzx eax, BYTE PTR [rdx]
test al, al
jne .L15
cmp cl, sil
je .L6
.L9:
movsx rax, r9d
add r9d, 1
mov BYTE PTR [r10+rax], sil
.L6:
movzx esi, BYTE PTR [rdi]
add rdi, 1
test sil, sil
jne .L7
movsx r9, r9d
add r10, r9
.L3:
mov BYTE PTR [r10], 0
ret
.cfi_endproc
.LFE24:
.size squeeze, .-squeeze
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%s"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea r11, 3[rsp]
mov eax, 98
lea rsi, 1[rsp]
mov rdi, r11
mov WORD PTR 1[rsp], ax
mov DWORD PTR 3[rsp], 1684234849
mov BYTE PTR 7[rsp], 0
call squeeze
xor eax, eax
mov rdx, r11
mov edi, 1
lea rsi, .LC0[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L19
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100102.c"
.text
.align 2
.global squeeze
.syntax unified
.arm
.fpu softvfp
.type squeeze, %function
squeeze:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldrb lr, [r0] @ zero_extendqisi2
cmp lr, #0
movne r4, r0
movne r5, #0
beq .L3
.L7:
ldrb r3, [r1] @ zero_extendqisi2
cmp r3, #0
movne r2, r1
bne .L5
b .L9
.L14:
cmp ip, lr
beq .L6
.L5:
mov ip, r3
ldrb r3, [r2, #1]! @ zero_extendqisi2
cmp r3, #0
bne .L14
cmp ip, lr
beq .L6
.L9:
strb lr, [r0, r5]
add r5, r5, #1
.L6:
ldrb lr, [r4, #1]! @ zero_extendqisi2
cmp lr, #0
bne .L7
add r0, r0, r5
.L3:
mov r3, #0
strb r3, [r0]
pop {r4, r5, pc}
.size squeeze, .-squeeze
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%s\000"
.align 2
.LC0:
.ascii "abcd\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #98
str lr, [sp, #-4]!
ldr r3, .L19
sub sp, sp, #20
ldm r3, {r0, r1}
ldr r3, .L19+4
str r0, [sp, #4]
strb r1, [sp, #8]
add r0, sp, #4
mov r1, sp
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
strh r2, [sp] @ movhi
bl squeeze
add r2, sp, #4
mov r0, #1
ldr r1, .L19+8
bl __printf_chk
ldr r3, .L19+4
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L18
mov r0, #0
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L18:
bl __stack_chk_fail
.L20:
.align 2
.L19:
.word .LC0
.word .LC2
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100103.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "enter the last number "
.LC1:
.string "%d"
.LC2:
.string "Sum of 1 to n :- %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, 4[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov ecx, DWORD PTR 4[rsp]
test ecx, ecx
jle .L5
add ecx, 1
xor edx, edx
mov eax, 1
.p2align 4,,10
.p2align 3
.L3:
add edx, eax
add eax, 1
cmp ecx, eax
jne .L3
.L2:
xor eax, eax
lea rsi, .LC2[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L9
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
xor edx, edx
jmp .L2
.L9:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100103.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "enter the last number \000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "Sum of 1 to n :- %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L10
sub sp, sp, #12
ldr r1, .L10+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L10+8
bl __isoc99_scanf
ldr r1, [sp]
mov r2, #0
cmp r1, #0
ble .L2
mov r3, #1
add r1, r1, r3
.L3:
add r2, r2, r3
add r3, r3, #1
cmp r1, r3
bne .L3
.L2:
mov r0, #1
ldr r1, .L10+12
bl __printf_chk
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001045.c"
.intel_syntax noprefix
.text
.p2align 4
.globl __VERIFIER_assert
.type __VERIFIER_assert, @function
__VERIFIER_assert:
.LFB0:
.cfi_startproc
endbr64
test edi, edi
je .L8
ret
.L8:
.L3:
push rax
.cfi_def_cfa_offset 16
xor eax, eax
call __VERIFIER_error@PLT
.cfi_endproc
.LFE0:
.size __VERIFIER_assert, .-__VERIFIER_assert
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
lea r11, -397312[rsp]
.cfi_def_cfa 11, 397320
.LPSRL0:
sub rsp, 4096
or DWORD PTR [rsp], 0
cmp rsp, r11
jne .LPSRL0
.cfi_def_cfa_register 7
sub rsp, 2712
.cfi_def_cfa_offset 400032
mov r8d, DWORD PTR [rsp]
mov edx, r8d
mov rax, QWORD PTR fs:40
mov QWORD PTR 400008[rsp], rax
xor eax, eax
lea rcx, 4[rsp]
lea rdi, 400000[rsp]
mov rax, rcx
.p2align 4,,10
.p2align 3
.L10:
mov esi, DWORD PTR [rax]
cmp edx, esi
cmovl edx, esi
add rax, 4
cmp rax, rdi
jne .L10
jmp .L14
.p2align 4,,10
.p2align 3
.L19:
mov r8d, DWORD PTR [rcx]
add rcx, 4
.L14:
cmp edx, r8d
jl .L18
cmp rcx, rdi
jne .L19
mov rax, QWORD PTR 400008[rsp]
sub rax, QWORD PTR fs:40
jne .L20
xor eax, eax
add rsp, 400024
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L18:
.cfi_restore_state
.L12:
xor eax, eax
call __VERIFIER_error@PLT
.L20:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001045.c"
.text
.align 2
.global __VERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_assert, %function
__VERIFIER_assert:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
bxne lr
.L3:
push {r4, lr}
bl __VERIFIER_error
.size __VERIFIER_assert, .-__VERIFIER_assert
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 400008
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
sub sp, sp, #397312
sub sp, sp, #2688
sub sp, sp, #12
ldr r3, .L20
ldr r2, .L20+4
ldr lr, [sp, #4]
add r3, sp, r3
add r0, sp, #4
ldr r2, [r2]
str r2, [r3]
mov r2,#0
mov r3, lr
mov r2, r0
add ip, sp, #397312
add ip, ip, #2688
.L9:
ldr r1, [r2, #4]!
cmp r3, r1
movlt r3, r1
cmp r2, ip
bne .L9
b .L13
.L18:
ldr lr, [r0, #4]!
.L13:
cmp r3, lr
blt .L17
cmp r0, ip
bne .L18
ldr r3, .L20
ldr r2, .L20+4
add r3, sp, r3
ldr r1, [r2]
ldr r2, [r3]
eors r1, r2, r1
mov r2, #0
bne .L19
mov r0, #0
add sp, sp, #397312
add sp, sp, #2688
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L17:
.L11:
bl __VERIFIER_error
.L19:
bl __stack_chk_fail
.L21:
.align 2
.L20:
.word 400004
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001077.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001077.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001079.c"
.intel_syntax noprefix
.text
.p2align 4
.globl lower
.type lower, @function
lower:
.LFB39:
.cfi_startproc
endbr64
lea edx, -65[rdi]
lea eax, 32[rdi]
cmp dl, 26
cmovnb eax, edi
ret
.cfi_endproc
.LFE39:
.size lower, .-lower
.p2align 4
.globl clean_string
.type clean_string, @function
clean_string:
.LFB40:
.cfi_startproc
endbr64
mov QWORD PTR [rdi], 0
mov rax, rdi
lea rdi, 8[rdi]
mov QWORD PTR 240[rdi], 0
and rdi, -8
sub rax, rdi
lea ecx, 256[rax]
xor eax, eax
shr ecx, 3
rep stosq
ret
.cfi_endproc
.LFE40:
.size clean_string, .-clean_string
.p2align 4
.globl escape
.type escape, @function
escape:
.LFB41:
.cfi_startproc
endbr64
mov r9d, 1
mov r8, rsi
xor edx, edx
sub r9d, edi
jmp .L6
.p2align 4,,10
.p2align 3
.L17:
cmp al, 9
je .L16
mov BYTE PTR [rcx], al
mov esi, edx
.L11:
lea eax, [r9+rdi]
lea edx, 1[rsi]
cmp ax, 255
setbe cl
cmp dx, 255
setbe al
add rdi, 1
test cl, al
je .L5
.L6:
movzx eax, BYTE PTR [rdi]
test al, al
je .L5
movzx ecx, dx
lea esi, 1[rdx]
add rcx, r8
cmp al, 10
je .L7
cmp al, 92
jne .L17
movzx eax, si
mov BYTE PTR [rcx], 92
mov BYTE PTR [r8+rax], 92
jmp .L11
.p2align 4,,10
.p2align 3
.L7:
movzx eax, si
mov BYTE PTR [rcx], 92
mov BYTE PTR [r8+rax], 110
jmp .L11
.p2align 4,,10
.p2align 3
.L16:
movzx eax, si
mov BYTE PTR [rcx], 92
mov BYTE PTR [r8+rax], 116
jmp .L11
.p2align 4,,10
.p2align 3
.L5:
ret
.cfi_endproc
.LFE41:
.size escape, .-escape
.p2align 4
.globl unescape
.type unescape, @function
unescape:
.LFB42:
.cfi_startproc
endbr64
mov r8, rsi
xor eax, eax
xor esi, esi
mov r9d, 9
jmp .L19
.p2align 4,,10
.p2align 3
.L20:
mov BYTE PTR [rdx], cl
.L23:
add eax, 1
add esi, 1
cmp ax, 255
ja .L18
.L19:
movzx edx, ax
movzx ecx, BYTE PTR [rdi+rdx]
test cl, cl
je .L18
movzx edx, si
add rdx, r8
cmp cl, 92
jne .L20
add eax, 1
movzx ecx, ax
movzx ecx, BYTE PTR [rdi+rcx]
cmp cl, 110
je .L21
cmp cl, 116
cmove ecx, r9d
add eax, 1
add esi, 1
mov BYTE PTR [rdx], cl
cmp ax, 255
jbe .L19
.L18:
ret
.p2align 4,,10
.p2align 3
.L21:
mov BYTE PTR [rdx], 10
jmp .L23
.cfi_endproc
.LFE42:
.size unescape, .-unescape
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "original:\t%s\nescaped:\t%s\nunescaped:\t%s\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB43:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
sub rsp, 528
.cfi_def_cfa_offset 544
mov rax, QWORD PTR fs:40
mov QWORD PTR 520[rsp], rax
xor eax, eax
mov eax, 1
cmp edi, 2
jne .L27
mov r11, rsp
xor eax, eax
lea rbp, 256[rsp]
mov r10, rsi
mov rdi, r11
mov ecx, 32
rep stosq
mov ecx, 32
mov rdi, rbp
rep stosq
mov rdi, QWORD PTR 8[rsi]
mov rsi, r11
call escape
mov rdi, r11
mov rsi, rbp
call unescape
mov rdx, QWORD PTR 8[r10]
mov r8, rbp
mov rcx, r11
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
xor eax, eax
.L27:
mov rdx, QWORD PTR 520[rsp]
sub rdx, QWORD PTR fs:40
jne .L33
add rsp, 528
.cfi_remember_state
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.L33:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE43:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001079.c"
.text
.align 2
.global lower
.syntax unified
.arm
.fpu softvfp
.type lower, %function
lower:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
sub r3, r0, #65
cmp r3, #25
addls r0, r0, #32
andls r0, r0, #255
bx lr
.size lower, .-lower
.align 2
.global clean_string
.syntax unified
.arm
.fpu softvfp
.type clean_string, %function
clean_string:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r1, #0
sub r3, r0, #1
add r2, r0, #255
.L5:
strb r1, [r3, #1]!
cmp r3, r2
bne .L5
bx lr
.size clean_string, .-clean_string
.align 2
.global escape
.syntax unified
.arm
.fpu softvfp
.type escape, %function
escape:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
push {r4, r5, r6, r7, r8, lr}
mov r2, r3
mov r6, #92
mov r8, #110
mov r7, #116
sub r0, r0, #1
b .L9
.L21:
cmp lr, #9
movne r3, r5
strbne lr, [r4]
beq .L20
.L14:
add r2, r2, #1
lsl r2, r2, #16
lsr r2, r2, #16
cmp r2, #255
cmpls r3, #255
pophi {r4, r5, r6, r7, r8, pc}
.L9:
ldrb lr, [r0, #1]! @ zero_extendqisi2
add ip, r3, #1
cmp lr, #0
lsl ip, ip, #16
popeq {r4, r5, r6, r7, r8, pc}
cmp lr, #10
add r4, r1, r3
lsr r5, ip, #16
beq .L10
cmp lr, #92
bne .L21
add r3, r3, #2
lsl r3, r3, #16
strb lr, [r4]
lsr r3, r3, #16
strb lr, [r1, ip, lsr #16]
b .L14
.L10:
add lr, r3, #2
strb r6, [r1, r3]
lsl r3, lr, #16
lsr r3, r3, #16
strb r8, [r1, ip, lsr #16]
b .L14
.L20:
add r3, r3, #2
lsl r3, r3, #16
strb r6, [r4]
lsr r3, r3, #16
strb r7, [r1, ip, lsr #16]
b .L14
.size escape, .-escape
.align 2
.global unescape
.syntax unified
.arm
.fpu softvfp
.type unescape, %function
unescape:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov lr, #0
mov r8, #10
mov r2, lr
mov r7, #9
ldr r6, .L32
b .L23
.L27:
cmp r2, #255
add lr, lr, #1
pophi {r4, r5, r6, r7, r8, pc}
.L23:
ldrb ip, [r0, r2] @ zero_extendqisi2
add r3, r2, #1
cmp ip, #0
lsl r3, r3, #16
popeq {r4, r5, r6, r7, r8, pc}
cmp ip, #92
and r4, lr, r6
lsr r5, r3, #16
movne r2, r5
strbne ip, [r1, r4]
bne .L27
ldrb r3, [r0, r3, lsr #16] @ zero_extendqisi2
add r2, r2, #2
lsl r2, r2, #16
cmp r3, #110
lsr r2, r2, #16
strbeq r8, [r1, r4]
beq .L27
cmp r3, #116
strbeq r7, [r1, r4]
strbne r3, [r1, r4]
b .L27
.L33:
.align 2
.L32:
.word 65535
.size unescape, .-unescape
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "original:\011%s\012escaped:\011%s\012unescaped:\011"
.ascii "%s\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 520
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L44
sub sp, sp, #532
cmp r0, #2
ldr r3, [r3]
str r3, [sp, #524]
mov r3,#0
movne r0, #1
bne .L34
mov r4, r1
mov r0, #0
add r2, sp, #12
add r3, sp, #11
add r2, r2, #255
.L36:
strb r0, [r3, #1]!
cmp r3, r2
bne .L36
mov r0, #0
add r5, sp, #268
add r2, sp, #520
sub r3, r5, #1
add r2, r2, #3
.L37:
strb r0, [r3, #1]!
cmp r3, r2
bne .L37
ldr r0, [r4, #4]
add r1, sp, #12
bl escape
mov r1, r5
add r0, sp, #12
bl unescape
str r5, [sp]
mov r0, #1
ldr r2, [r4, #4]
ldr r1, .L44+4
add r3, sp, #12
bl __printf_chk
mov r0, #0
.L34:
ldr r3, .L44
ldr r2, [r3]
ldr r3, [sp, #524]
eors r2, r3, r2
mov r3, #0
bne .L43
add sp, sp, #532
@ sp needed
pop {r4, r5, pc}
.L43:
bl __stack_chk_fail
.L45:
.align 2
.L44:
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100108.c"
.intel_syntax noprefix
.text
.p2align 4
.type comment, @function
comment:
.LFB65:
.cfi_startproc
endbr64
ret
.cfi_endproc
.LFE65:
.size comment, .-comment
.p2align 4
.type define, @function
define:
.LFB60:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov rax, QWORD PTR 96[rdi]
mov rbx, rdi
mov rdx, QWORD PTR 80[rdi]
mov rsi, QWORD PTR 24[rax]
lea rcx, 2[rsi]
lea rsi, 72[rdi]
sal rcx, 4
add rcx, rax
mov QWORD PTR 8[rcx], rdx
mov rdi, rcx
call memcpy@PLT
mov rcx, rax
mov rax, QWORD PTR 96[rbx]
mov QWORD PTR 24[rcx], 0
mov QWORD PTR 16[rcx], rax
mov QWORD PTR 96[rbx], rcx
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE60:
.size define, .-define
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%li "
.LC1:
.string "%.*s "
.LC2:
.string "unknown opcode"
.text
.p2align 4
.type execute_, @function
execute_:
.LFB63:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea r13, 32[rsi]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
mov rcx, QWORD PTR 24[rsi]
lea rax, 2[rcx]
sal rax, 4
add rax, rsi
cmp r13, rax
jnb .L5
mov r14, rdi
mov r15, rsi
lea r12, .L9[rip]
lea rbx, .LC1[rip]
.p2align 4,,10
.p2align 3
.L6:
cmp DWORD PTR 0[r13], 26
ja .L7
mov edx, DWORD PTR 0[r13]
movsx rdx, DWORD PTR [r12+rdx*4]
add rdx, r12
notrack jmp rdx
.section .rodata
.align 4
.align 4
.L9:
.long .L35-.L9
.long .L34-.L9
.long .L33-.L9
.long .L32-.L9
.long .L31-.L9
.long .L30-.L9
.long .L29-.L9
.long .L28-.L9
.long .L27-.L9
.long .L26-.L9
.long .L25-.L9
.long .L24-.L9
.long .L23-.L9
.long .L22-.L9
.long .L21-.L9
.long .L20-.L9
.long .L19-.L9
.long .L18-.L9
.long .L17-.L9
.long .L16-.L9
.long .L15-.L9
.long .L14-.L9
.long .L13-.L9
.long .L12-.L9
.long .L11-.L9
.long .L10-.L9
.long .L8-.L9
.text
.p2align 4,,10
.p2align 3
.L16:
movsx rdx, DWORD PTR 64[r14]
mov rsi, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
je .L63
lea edi, -1[rdx]
cmp edi, 7
mov DWORD PTR 64[r14], edi
mov edi, 0
movsx rsi, BYTE PTR [rsi]
cmove eax, edi
mov edi, 0
cmove rdx, rdi
.L64:
mov DWORD PTR 64[r14], eax
mov QWORD PTR [r14+rdx*8], rsi
.p2align 4,,10
.p2align 3
.L21:
lea rax, 2[rcx]
add r13, 16
sal rax, 4
add rax, r15
cmp rax, r13
ja .L6
.L5:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L10:
.cfi_restore_state
lea rsi, 104[r14]
.L135:
mov edx, DWORD PTR 64[r14]
.L133:
lea eax, 1[rdx]
cmp edx, 7
mov edi, 0
cmove eax, edi
.L134:
mov DWORD PTR 64[r14], eax
cdqe
mov QWORD PTR [r14+rax*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L11:
mov rsi, QWORD PTR 8[r13]
jmp .L135
.p2align 4,,10
.p2align 3
.L12:
lea r13, 16[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L13:
mov rsi, QWORD PTR 8[r13]
mov rdi, r14
call execute_
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L14:
mov edx, DWORD PTR 64[r14]
mov edi, 0
lea eax, 1[rdx]
cmp edx, 7
cmove eax, edi
mov DWORD PTR 64[r14], eax
cdqe
mov QWORD PTR [r14+rax*8], 8
jmp .L21
.p2align 4,,10
.p2align 3
.L15:
movsx rdx, DWORD PTR 64[r14]
mov rcx, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
je .L65
lea esi, -1[rdx]
movsx rdx, esi
mov DWORD PTR 64[r14], esi
mov rdx, QWORD PTR [r14+rdx*8]
test esi, esi
jne .L146
mov eax, 7
.L66:
mov DWORD PTR 64[r14], eax
mov BYTE PTR [rcx], dl
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L17:
movsx rdx, DWORD PTR 64[r14]
mov rcx, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
jne .L147
mov rdx, QWORD PTR 56[r14]
mov eax, 6
.L62:
mov DWORD PTR 64[r14], eax
mov QWORD PTR [rcx], rdx
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L19:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
movsx rdx, al
.L137:
mov ecx, DWORD PTR 64[r14]
mov edi, 0
lea eax, 1[rcx]
cmp ecx, 7
cmove eax, edi
mov DWORD PTR 64[r14], eax
cdqe
mov QWORD PTR [r14+rax*8], rdx
.L136:
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L20:
movsx rax, DWORD PTR 64[r14]
mov ecx, 7
mov rsi, QWORD PTR stdout[rip]
mov rdx, rax
mov rdi, QWORD PTR [r14+rax*8]
lea eax, -1[rax]
test edx, edx
cmove eax, ecx
movsx edi, dil
mov DWORD PTR 64[r14], eax
call putc@PLT
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L18:
movsx rdx, DWORD PTR 64[r14]
mov rsi, QWORD PTR [r14+rdx*8]
mov rax, rdx
mov rsi, QWORD PTR [rsi]
test edx, edx
je .L64
cmp edx, 8
jne .L64
.L139:
xor eax, eax
xor edx, edx
jmp .L64
.p2align 4,,10
.p2align 3
.L22:
mov r13, rax
jmp .L21
.p2align 4,,10
.p2align 3
.L23:
mov rbp, QWORD PTR 96[r14]
test rbp, rbp
je .L21
.p2align 4,,10
.p2align 3
.L57:
mov edx, DWORD PTR 8[rbp]
mov rcx, rbp
mov rsi, rbx
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rbp, QWORD PTR 16[rbp]
test rbp, rbp
jne .L57
jmp .L136
.p2align 4,,10
.p2align 3
.L30:
movsx rdx, DWORD PTR 64[r14]
mov rax, rdx
mov rdx, QWORD PTR [r14+rdx*8]
test eax, eax
jne .L148
add rdx, QWORD PTR 56[r14]
mov eax, 7
mov esi, 7
jmp .L51
.p2align 4,,10
.p2align 3
.L31:
mov edx, DWORD PTR 64[r14]
mov edi, 7
lea eax, -1[rdx]
test edx, edx
cmove eax, edi
mov DWORD PTR 64[r14], eax
jmp .L21
.p2align 4,,10
.p2align 3
.L32:
movsx rdx, DWORD PTR 64[r14]
mov rdi, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
je .L42
lea r9d, -1[rdx]
movsx r10, r9d
mov rsi, QWORD PTR [r14+r10*8]
test r9d, r9d
jne .L149
.L43:
mov eax, 1
mov edx, 1
mov QWORD PTR [r14], rdi
mov DWORD PTR 64[r14], eax
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L33:
movsx rax, DWORD PTR 64[r14]
mov rdi, QWORD PTR [r14+rax*8]
mov rdx, rax
test eax, eax
je .L38
lea eax, -1[rax]
movsx rsi, eax
mov rsi, QWORD PTR [r14+rsi*8]
test eax, eax
jne .L150
.L39:
mov QWORD PTR [r14], rsi
mov edx, 1
mov QWORD PTR 8[r14], rdi
.L74:
lea eax, 1[rdx]
jmp .L134
.p2align 4,,10
.p2align 3
.L34:
movsx rax, DWORD PTR 64[r14]
mov rsi, QWORD PTR [r14+rax*8]
mov rdx, rax
jmp .L133
.p2align 4,,10
.p2align 3
.L35:
movsx rax, DWORD PTR 64[r14]
mov edi, 7
lea rsi, .LC0[rip]
mov rdx, rax
mov r9, QWORD PTR [r14+rax*8]
lea eax, -1[rax]
test edx, edx
cmove eax, edi
mov rdx, r9
mov edi, 1
mov DWORD PTR 64[r14], eax
xor eax, eax
call __printf_chk@PLT
mov rdi, QWORD PTR stdout[rip]
call fflush@PLT
mov rcx, QWORD PTR 24[r15]
jmp .L21
.p2align 4,,10
.p2align 3
.L8:
movsx rax, DWORD PTR 64[r14]
mov ecx, 7
mov rdx, rax
mov rdi, QWORD PTR [r14+rax*8]
lea eax, -1[rax]
test edx, edx
cmove eax, ecx
mov DWORD PTR 64[r14], eax
call system@PLT
movsx rdx, eax
jmp .L137
.p2align 4,,10
.p2align 3
.L26:
movsx rdx, DWORD PTR 64[r14]
mov rsi, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
jne .L151
cmp rsi, QWORD PTR 56[r14]
mov eax, 7
mov edx, 7
seta sil
mov DWORD PTR 64[r14], eax
movzx esi, sil
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L27:
movsx rdx, DWORD PTR 64[r14]
mov rsi, QWORD PTR [r14+rdx*8]
mov rax, rdx
test edx, edx
jne .L152
cmp QWORD PTR 56[r14], rsi
mov eax, 7
mov edx, 7
sete sil
mov DWORD PTR 64[r14], eax
movzx esi, sil
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L28:
movsx rdx, DWORD PTR 64[r14]
mov rax, rdx
mov rdx, QWORD PTR [r14+rdx*8]
test eax, eax
jne .L153
imul rdx, QWORD PTR 56[r14]
mov eax, 7
mov esi, 7
jmp .L51
.p2align 4,,10
.p2align 3
.L29:
movsx rdx, DWORD PTR 64[r14]
mov rax, rdx
mov rdx, QWORD PTR [r14+rdx*8]
test eax, eax
je .L48
sub eax, 1
movsx rsi, eax
sub rdx, QWORD PTR [r14+rsi*8]
test eax, eax
jne .L141
.p2align 4,,10
.p2align 3
.L51:
mov DWORD PTR 64[r14], eax
mov QWORD PTR [r14+rsi*8], rdx
jmp .L21
.p2align 4,,10
.p2align 3
.L24:
xor edi, edi
call exit@PLT
.p2align 4,,10
.p2align 3
.L25:
movsx rax, DWORD PTR 64[r14]
mov edi, 7
mov rdx, rax
mov rsi, QWORD PTR [r14+rax*8]
lea eax, -1[rax]
test edx, edx
cmove eax, edi
test rsi, rsi
mov DWORD PTR 64[r14], eax
lea rax, 16[r13]
cmove r13, rax
jmp .L21
.p2align 4,,10
.p2align 3
.L48:
sub rdx, QWORD PTR 56[r14]
mov eax, 7
mov esi, 7
jmp .L51
.p2align 4,,10
.p2align 3
.L152:
sub eax, 1
movsx rdx, eax
cmp QWORD PTR [r14+rdx*8], rsi
sete sil
movzx esi, sil
test eax, eax
je .L64
.L144:
cmp eax, 8
je .L139
jmp .L64
.p2align 4,,10
.p2align 3
.L153:
sub eax, 1
movsx rsi, eax
imul rdx, QWORD PTR [r14+rsi*8]
test eax, eax
je .L51
.L141:
cmp eax, 8
jne .L51
xor eax, eax
xor esi, esi
jmp .L51
.p2align 4,,10
.p2align 3
.L151:
sub eax, 1
movsx rdx, eax
cmp QWORD PTR [r14+rdx*8], rsi
setb sil
movzx esi, sil
test eax, eax
jne .L144
mov DWORD PTR 64[r14], eax
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L38:
mov rsi, QWORD PTR 56[r14]
.L40:
mov QWORD PTR [r14], rdi
mov eax, 1
jmp .L134
.p2align 4,,10
.p2align 3
.L42:
mov rsi, QWORD PTR 56[r14]
mov DWORD PTR 64[r14], eax
mov QWORD PTR 56[r14], rdi
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.p2align 4,,10
.p2align 3
.L148:
sub eax, 1
movsx rsi, eax
add rdx, QWORD PTR [r14+rsi*8]
test eax, eax
je .L51
jmp .L141
.p2align 4,,10
.p2align 3
.L65:
mov rdx, QWORD PTR 56[r14]
mov eax, 6
jmp .L66
.p2align 4,,10
.p2align 3
.L147:
lea esi, -1[rdx]
movsx rdx, esi
mov DWORD PTR 64[r14], esi
mov rdx, QWORD PTR [r14+rdx*8]
test esi, esi
jne .L154
mov eax, 7
jmp .L62
.p2align 4,,10
.p2align 3
.L63:
mov DWORD PTR 64[r14], 7
movsx rsi, BYTE PTR [rsi]
mov DWORD PTR 64[r14], eax
mov QWORD PTR [r14+rdx*8], rsi
jmp .L21
.L149:
cmp r9d, 8
je .L43
cmp r9d, 7
mov DWORD PTR 64[r14], r9d
mov QWORD PTR [r14+r10*8], rdi
mov edi, 0
cmove eax, edi
mov edi, 0
cmove rdx, rdi
jmp .L64
.L150:
cmp eax, 8
je .L39
cmp eax, 7
je .L40
xor eax, eax
cmp edx, 7
je .L134
jmp .L74
.L7:
lea rdi, .LC2[rip]
call puts@PLT
mov edi, 1
call exit@PLT
.L154:
sub eax, 2
jmp .L62
.L146:
sub eax, 2
jmp .L66
.cfi_endproc
.LFE63:
.size execute_, .-execute_
.section .rodata.str1.1
.LC3:
.string "? "
.text
.p2align 4
.type compile, @function
compile:
.LFB62:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13, rdi
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
mov r12, QWORD PTR 96[rdi]
mov rbp, QWORD PTR 80[rdi]
test r12, r12
je .L156
mov rbx, r12
lea r14, 72[rdi]
jmp .L159
.p2align 4,,10
.p2align 3
.L157:
mov rbx, QWORD PTR 16[rbx]
test rbx, rbx
je .L156
.L159:
cmp rbp, QWORD PTR 8[rbx]
jne .L157
mov rdx, rbp
mov rsi, r14
mov rdi, rbx
call memcmp@PLT
test eax, eax
jne .L157
mov rax, QWORD PTR 24[r12]
cmp r12, rbx
je .L180
cmp BYTE PTR [rbx], 105
je .L181
.L162:
mov rdx, rax
sal rdx, 4
add rdx, r12
cmp BYTE PTR [rbx], 59
jne .L164
cmp BYTE PTR 1[rbx], 0
jne .L164
mov DWORD PTR 32[rdx], 13
mov QWORD PTR 40[rdx], 0
jmp .L179
.p2align 4,,10
.p2align 3
.L181:
cmp BYTE PTR 1[rbx], 102
jne .L162
cmp BYTE PTR 2[rbx], 0
jne .L162
mov rdx, rax
sal rdx, 4
add rdx, r12
mov DWORD PTR 32[rdx], 10
mov QWORD PTR 40[rdx], 0
jmp .L179
.p2align 4,,10
.p2align 3
.L180:
mov rdx, rax
sal rdx, 4
add rdx, r12
mov DWORD PTR 32[rdx], 23
mov QWORD PTR 40[rdx], 0
.L179:
add rax, 1
mov QWORD PTR 24[r12], rax
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L164:
.cfi_restore_state
mov DWORD PTR 32[rdx], 22
mov QWORD PTR 40[rdx], rbx
jmp .L179
.p2align 4,,10
.p2align 3
.L156:
test rbp, rbp
je .L168
call __ctype_b_loc@PLT
lea rsi, 0[r13+rbp]
mov rdi, r13
xor ebp, ebp
mov rcx, QWORD PTR [rax]
jmp .L167
.p2align 4,,10
.p2align 3
.L182:
sub eax, 48
lea rdx, 0[rbp+rbp*4]
add rdi, 1
cdqe
lea rbp, [rax+rdx*2]
cmp rsi, rdi
je .L168
.L167:
movsx rdx, BYTE PTR 72[rdi]
mov rax, rdx
test BYTE PTR 1[rcx+rdx*2], 8
jne .L182
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
lea rsi, .LC3[rip]
pop rbp
.cfi_def_cfa_offset 32
mov edi, 1
pop r12
.cfi_def_cfa_offset 24
xor eax, eax
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
jmp __printf_chk@PLT
.L168:
.cfi_restore_state
mov rax, QWORD PTR 24[r12]
mov rdx, rax
sal rdx, 4
add rdx, r12
mov DWORD PTR 32[rdx], 24
mov QWORD PTR 40[rdx], rbp
jmp .L179
.cfi_endproc
.LFE62:
.size compile, .-compile
.p2align 4
.type execute, @function
execute:
.LFB64:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
mov rbp, QWORD PTR 96[rdi]
mov rbx, QWORD PTR 80[rdi]
test rbp, rbp
je .L184
lea r13, 72[rdi]
jmp .L187
.p2align 4,,10
.p2align 3
.L185:
mov rbp, QWORD PTR 16[rbp]
test rbp, rbp
je .L184
.L187:
cmp QWORD PTR 8[rbp], rbx
jne .L185
mov rdx, rbx
mov rsi, r13
mov rdi, rbp
call memcmp@PLT
test eax, eax
jne .L185
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
mov rsi, rbp
mov rdi, r12
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp execute_
.p2align 4,,10
.p2align 3
.L184:
.cfi_restore_state
test rbx, rbx
je .L188
call __ctype_b_loc@PLT
lea rdi, [r12+rbx]
mov rdx, r12
xor ebx, ebx
mov rsi, QWORD PTR [rax]
jmp .L190
.p2align 4,,10
.p2align 3
.L204:
sub eax, 48
lea rcx, [rbx+rbx*4]
add rdx, 1
cdqe
lea rbx, [rax+rcx*2]
cmp rdi, rdx
je .L188
.L190:
movsx rcx, BYTE PTR 72[rdx]
mov rax, rcx
test BYTE PTR 1[rsi+rcx*2], 8
jne .L204
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp __printf_chk@PLT
.p2align 4,,10
.p2align 3
.L188:
.cfi_restore_state
mov edx, DWORD PTR 64[r12]
cmp edx, 7
lea eax, 1[rdx]
mov edx, 0
cmove eax, edx
mov DWORD PTR 64[r12], eax
cdqe
mov QWORD PTR [r12+rax*8], rbx
add rsp, 8
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE64:
.size execute, .-execute
.p2align 4
.globl colorforth_newstate
.type colorforth_newstate, @function
colorforth_newstate:
.LFB66:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov esi, 112
mov edi, 1
call calloc@PLT
mov esi, 4096
mov edi, 1
mov r12, rax
call calloc@PLT
mov esi, 4096
mov edi, 1
mov QWORD PTR 88[r12], rax
mov QWORD PTR 96[r12], rax
call calloc@PLT
mov QWORD PTR 104[r12], rax
mov rax, r12
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE66:
.size colorforth_newstate, .-colorforth_newstate
.section .rodata.str1.1
.LC4:
.string "."
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB67:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea r15, .LC4[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
lea r14, primitive_map.0[rip+16]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
lea r12, 368[r14]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
xor ebp, ebp
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
call colorforth_newstate
mov edx, 1
mov rbx, QWORD PTR 96[rax]
mov r13, rax
mov rax, QWORD PTR 24[rbx]
jmp .L209
.L231:
mov r15, QWORD PTR [r14]
mov ebp, DWORD PTR 8[r14]
add r14, 16
mov rdi, r15
call strlen@PLT
mov rdx, rax
mov eax, 1
.L209:
add rax, 2
mov rsi, r15
sal rax, 4
add rbx, rax
mov QWORD PTR 8[rbx], rdx
mov rdi, rbx
call memcpy@PLT
mov rax, QWORD PTR 96[r13]
mov DWORD PTR 32[rbx], ebp
mov QWORD PTR 40[rbx], 0
mov QWORD PTR 16[rbx], rax
mov QWORD PTR 24[rbx], 1
mov QWORD PTR 96[r13], rbx
cmp r12, r14
jne .L231
lea rbp, execute[rip]
lea r12, define[rip]
mov rbx, rbp
lea r15, compile[rip]
lea r14, comment[rip]
.p2align 4,,10
.p2align 3
.L208:
mov QWORD PTR 80[r13], 0
.p2align 4,,10
.p2align 3
.L210:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, 40
je .L221
jle .L232
cmp eax, 94
je .L217
cmp eax, 126
jne .L233
mov rbx, rbp
jmp .L210
.p2align 4,,10
.p2align 3
.L232:
cmp eax, 10
jg .L214
cmp eax, 8
jg .L215
cmp eax, -1
je .L210
.L216:
mov rdx, QWORD PTR 80[r13]
cmp rdx, 7
ja .L210
lea rcx, 1[rdx]
mov QWORD PTR 80[r13], rcx
mov BYTE PTR 72[r13+rdx], al
jmp .L210
.p2align 4,,10
.p2align 3
.L214:
cmp eax, 32
jne .L216
.L215:
cmp QWORD PTR 80[r13], 0
je .L210
mov rdi, r13
call rbx
jmp .L208
.p2align 4,,10
.p2align 3
.L233:
cmp eax, 58
jne .L216
mov rbx, r12
jmp .L210
.p2align 4,,10
.p2align 3
.L221:
mov rbx, r14
jmp .L210
.p2align 4,,10
.p2align 3
.L217:
cmp rbx, rbp
je .L234
mov rbx, r15
jmp .L210
.p2align 4,,10
.p2align 3
.L234:
mov rcx, QWORD PTR 96[r13]
movsx rsi, DWORD PTR 64[r13]
mov rbx, r15
mov rax, QWORD PTR 24[rcx]
mov rdi, rsi
mov r8, QWORD PTR 0[r13+rsi*8]
lea esi, -1[rsi]
mov rdx, rax
sal rdx, 4
add rdx, rcx
test edi, edi
mov edi, 7
cmove esi, edi
add rax, 1
mov DWORD PTR 32[rdx], 24
mov DWORD PTR 64[r13], esi
mov QWORD PTR 40[rdx], r8
mov QWORD PTR 24[rcx], rax
jmp .L210
.cfi_endproc
.LFE67:
.size main, .-main
.section .rodata.str1.1
.LC5:
.string "dup"
.LC6:
.string "over"
.LC7:
.string "swap"
.LC8:
.string "drop"
.LC9:
.string "+"
.LC10:
.string "-"
.LC11:
.string "*"
.LC12:
.string "="
.LC13:
.string "<"
.LC14:
.string "if"
.LC15:
.string "bye"
.LC16:
.string "words"
.LC17:
.string ";"
.LC18:
.string "'"
.LC19:
.string "emit"
.LC20:
.string "key"
.LC21:
.string "@"
.LC22:
.string "!"
.LC23:
.string "c@"
.LC24:
.string "c!"
.LC25:
.string "cell"
.LC26:
.string "here"
.LC27:
.string "system"
.section .data.rel.ro.local,"aw"
.align 32
.type primitive_map.0, @object
.size primitive_map.0, 384
primitive_map.0:
.quad .LC4
.long 0
.zero 4
.quad .LC5
.long 1
.zero 4
.quad .LC6
.long 2
.zero 4
.quad .LC7
.long 3
.zero 4
.quad .LC8
.long 4
.zero 4
.quad .LC9
.long 5
.zero 4
.quad .LC10
.long 6
.zero 4
.quad .LC11
.long 7
.zero 4
.quad .LC12
.long 8
.zero 4
.quad .LC13
.long 9
.zero 4
.quad .LC14
.long 10
.zero 4
.quad .LC15
.long 11
.zero 4
.quad .LC16
.long 12
.zero 4
.quad .LC17
.long 13
.zero 4
.quad .LC18
.long 14
.zero 4
.quad .LC19
.long 15
.zero 4
.quad .LC20
.long 16
.zero 4
.quad .LC21
.long 17
.zero 4
.quad .LC22
.long 18
.zero 4
.quad .LC23
.long 19
.zero 4
.quad .LC24
.long 20
.zero 4
.quad .LC25
.long 21
.zero 4
.quad .LC26
.long 25
.zero 4
.quad .LC27
.long 26
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100108.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type comment, %function
comment:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size comment, .-comment
.align 2
.syntax unified
.arm
.fpu softvfp
.type find_entry, %function
find_entry:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r4, [r0, #52]
cmp r4, #0
beq .L3
ldr r5, [r0, #44]
add r6, r0, #36
b .L6
.L5:
ldr r4, [r4, #12]
cmp r4, #0
beq .L3
.L6:
ldr r3, [r4, #8]
cmp r3, r5
bne .L5
mov r2, r5
mov r1, r6
mov r0, r4
bl memcmp
cmp r0, #0
bne .L5
.L3:
mov r0, r4
pop {r4, r5, r6, pc}
.size find_entry, .-find_entry
.align 2
.syntax unified
.arm
.fpu softvfp
.type define, %function
define:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r3, [r0, #52]
ldr r2, [r0, #44]
ldr r1, [r3, #16]
add r3, r3, r1, lsl #3
str r2, [r3, #28]
add r3, r3, #20
add r1, r4, #36
mov r0, r3
bl memcpy
mov r1, #0
ldr r2, [r4, #52]
str r1, [r0, #16]
str r2, [r0, #12]
str r0, [r4, #52]
pop {r4, pc}
.size define, .-define
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%i \000"
.align 2
.LC1:
.ascii "%.*s \000"
.align 2
.LC2:
.ascii "unknown opcode\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type execute_, %function
execute_:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r6, r1
ldr r1, [r1, #16]
add r8, r6, #20
add r3, r6, r1, lsl #3
add r3, r3, #20
cmp r8, r3
popcs {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
mov r5, r0
mov r4, r8
ldr r9, .L159
ldr r7, .L159+4
ldr fp, .L159+8
.L18:
ldr r2, [r4]
cmp r2, #26
ldrls pc, [pc, r2, asl #2]
b .L19
.L21:
.word .L47
.word .L46
.word .L45
.word .L44
.word .L43
.word .L42
.word .L41
.word .L40
.word .L39
.word .L38
.word .L37
.word .L36
.word .L35
.word .L34
.word .L33
.word .L32
.word .L31
.word .L30
.word .L29
.word .L28
.word .L27
.word .L26
.word .L25
.word .L24
.word .L23
.word .L22
.word .L20
.L20:
ldr r3, [r5, #32]
cmp r3, #0
ldr r0, [r5, r3, lsl #2]
moveq r3, #7
subne r3, r3, #1
str r3, [r5, #32]
bl system
ldr r3, [r5, #32]
cmp r3, #7
beq .L106
.L148:
add r3, r3, #1
.L85:
str r3, [r5, #32]
add r4, r4, #8
str r0, [r5, r3, lsl #2]
.L145:
ldr r1, [r6, #16]
.L49:
add r3, r6, r1, lsl #3
add r3, r3, #20
cmp r3, r4
bhi .L18
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L22:
ldr r3, [r5, #32]
add r2, r5, #56
cmp r3, #7
beq .L104
.L147:
add r3, r3, #1
.L83:
str r3, [r5, #32]
add r4, r4, #8
str r2, [r5, r3, lsl #2]
b .L49
.L23:
ldr r3, [r5, #32]
ldr r2, [r4, #4]
cmp r3, #7
bne .L147
.L104:
mov r3, #0
b .L83
.L24:
mov r4, r8
b .L49
.L25:
ldr r1, [r4, #4]
mov r0, r5
bl execute_
add r4, r4, #8
ldr r1, [r6, #16]
b .L49
.L26:
ldr r3, [r5, #32]
mov r2, #4
cmp r3, #7
moveq r3, #0
addne r3, r3, #1
str r3, [r5, #32]
add r4, r4, #8
str r2, [r5, r3, lsl #2]
b .L49
.L27:
ldr r3, [r5, #32]
cmp r3, #0
ldr r1, [r5, r3, lsl #2]
add r2, r5, r3, lsl #2
beq .L79
sub r0, r3, #1
cmp r0, #0
moveq r3, #7
str r0, [r5, #32]
ldr r2, [r2, #-4]
subne r3, r3, #2
.L80:
str r3, [r5, #32]
strb r2, [r1]
ldr r1, [r6, #16]
add r4, r4, #8
b .L49
.L28:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
bne .L150
mov r0, #7
str r0, [r5, #32]
ldrb r2, [r2] @ zero_extendqisi2
b .L83
.L29:
ldr r3, [r5, #32]
cmp r3, #0
ldr r1, [r5, r3, lsl #2]
add r2, r5, r3, lsl #2
beq .L75
sub r0, r3, #1
cmp r0, #0
moveq r3, #7
str r0, [r5, #32]
ldr r2, [r2, #-4]
subne r3, r3, #2
.L76:
str r3, [r5, #32]
str r2, [r1]
ldr r1, [r6, #16]
add r4, r4, #8
b .L49
.L31:
ldr r3, .L159+12
ldr r0, [r3]
bl getc
ldr r3, [r5, #32]
and r0, r0, #255
cmp r3, #7
bne .L148
.L106:
mov r3, #0
b .L85
.L32:
ldr r3, [r5, #32]
ldr r1, [r9]
cmp r3, #0
ldr r0, [r5, r3, lsl #2]
moveq r3, #7
subne r3, r3, #1
str r3, [r5, #32]
and r0, r0, #255
bl putc
add r4, r4, #8
ldr r1, [r6, #16]
b .L49
.L30:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
bne .L151
mov r0, #7
str r0, [r5, #32]
ldr r2, [r2]
b .L83
.L33:
add r4, r4, #8
b .L49
.L41:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
add r0, r5, r3, lsl #2
bne .L152
ldr r3, [r5, #28]
mov r0, #7
sub r2, r2, r3
b .L68
.L42:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
add r0, r5, r3, lsl #2
bne .L153
ldr r3, [r5, #28]
mov r0, #7
add r2, r2, r3
b .L68
.L43:
ldr r3, [r5, #32]
add r4, r4, #8
cmp r3, #0
moveq r3, #7
subne r3, r3, #1
str r3, [r5, #32]
b .L49
.L44:
ldr r3, [r5, #32]
cmp r3, #0
ldr r0, [r5, r3, lsl #2]
add r2, r5, r3, lsl #2
bne .L154
ldr r2, [r5, #28]
str r0, [r5, #28]
b .L83
.L45:
ldr r3, [r5, #32]
cmp r3, #0
ldr r0, [r5, r3, lsl #2]
add r2, r5, r3, lsl #2
bne .L155
ldr r2, [r5, #28]
.L56:
mov r3, #1
str r0, [r5]
b .L83
.L46:
ldr r3, [r5, #32]
cmp r3, #7
ldr r2, [r5, r3, lsl #2]
bne .L147
mov r3, #0
b .L83
.L47:
ldr r3, [r5, #32]
mov r1, fp
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
moveq r3, #7
subne r3, r3, #1
str r3, [r5, #32]
mov r0, #1
bl __printf_chk
ldr r0, [r9]
bl fflush
add r4, r4, #8
ldr r1, [r6, #16]
b .L49
.L37:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
moveq r3, #7
subne r3, r3, #1
cmp r2, #0
str r3, [r5, #32]
add r3, r4, #8
addeq r4, r4, #16
movne r4, r3
b .L49
.L38:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
add r0, r5, r3, lsl #2
bne .L156
ldr r3, [r5, #28]
mov r0, #7
cmp r2, r3
movls r2, #0
movhi r2, #1
b .L68
.L39:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
add r0, r5, r3, lsl #2
bne .L157
ldr r3, [r5, #28]
mov r0, #7
sub r2, r3, r2
clz r2, r2
lsr r2, r2, #5
b .L68
.L40:
ldr r3, [r5, #32]
cmp r3, #0
ldr r2, [r5, r3, lsl #2]
add r0, r5, r3, lsl #2
beq .L63
ldr ip, [r0, #-4]
subs r0, r3, #1
mul r2, ip, r2
bne .L146
.L68:
str r0, [r5, #32]
add r4, r4, #8
str r2, [r5, r0, lsl #2]
b .L49
.L35:
ldr r10, [r5, #52]
add r4, r4, #8
cmp r10, #0
beq .L49
.L70:
mov r3, r10
ldr r2, [r10, #8]
mov r1, r7
mov r0, #1
bl __printf_chk
ldr r10, [r10, #12]
cmp r10, #0
bne .L70
b .L145
.L36:
mov r0, #0
bl exit
.L34:
add r4, r3, #8
b .L49
.L151:
sub r0, r3, #1
cmp r0, #7
str r0, [r5, #32]
moveq r3, #0
ldr r2, [r2]
b .L83
.L150:
sub r0, r3, #1
cmp r0, #7
str r0, [r5, #32]
moveq r3, #0
ldrb r2, [r2] @ zero_extendqisi2
b .L83
.L63:
ldr r3, [r5, #28]
mov r0, #7
mul r2, r3, r2
b .L68
.L157:
ldr r0, [r0, #-4]
sub r2, r0, r2
clz r2, r2
subs r0, r3, #1
lsr r2, r2, #5
beq .L68
.L146:
cmp r3, #9
moveq r0, #0
b .L68
.L156:
ldr r0, [r0, #-4]
cmp r0, r2
movcs r2, #0
movcc r2, #1
subs r0, r3, #1
beq .L68
b .L146
.L155:
subs ip, r3, #1
ldr r2, [r2, #-4]
bne .L158
.L52:
mov r3, #1
str r2, [r5]
str r0, [r5, #4]
b .L147
.L154:
subs ip, r3, #1
ldr r2, [r2, #-4]
beq .L56
cmp r3, #9
beq .L56
cmp ip, #7
str ip, [r5, #32]
moveq r3, #0
str r0, [r5, ip, lsl #2]
b .L83
.L152:
ldr ip, [r0, #-4]
subs r0, r3, #1
sub r2, r2, ip
beq .L68
b .L146
.L153:
ldr ip, [r0, #-4]
subs r0, r3, #1
add r2, r2, ip
beq .L68
b .L146
.L75:
mov r3, #6
ldr r2, [r5, #28]
b .L76
.L79:
mov r3, #6
ldr r2, [r5, #28]
b .L80
.L158:
cmp r3, #9
beq .L52
cmp ip, #7
str r2, [r5, ip, lsl #2]
beq .L56
cmp r3, #7
str r3, [r5, #32]
str r0, [r5, r3, lsl #2]
beq .L104
b .L147
.L19:
ldr r0, .L159+16
bl puts
mov r0, #1
bl exit
.L160:
.align 2
.L159:
.word stdout
.word .LC1
.word .LC0
.word stdin
.word .LC2
.size execute_, .-execute_
.align 2
.syntax unified
.arm
.fpu softvfp
.type tib_to_number.constprop.0, %function
tib_to_number.constprop.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r4, [r0, #44]
mov r5, r1
cmp r4, #0
beq .L162
mov r6, r0
bl __ctype_b_loc
add ip, r6, r4
mov r4, #0
ldr lr, [r0]
add ip, ip, #36
add r2, r6, #36
.L164:
ldrb r3, [r2], #1 @ zero_extendqisi2
add r4, r4, r4, lsl #2
lsl r1, r3, #1
ldrh r0, [lr, r1]
add r4, r3, r4, lsl #1
ands r0, r0, #2048
popeq {r4, r5, r6, pc}
cmp ip, r2
sub r4, r4, #48
bne .L164
.L162:
mov r0, #1
str r4, [r5]
pop {r4, r5, r6, pc}
.size tib_to_number.constprop.0, .-tib_to_number.constprop.0
.section .rodata.str1.4
.align 2
.LC3:
.ascii "? \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type execute, %function
execute:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L181
sub sp, sp, #12
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
mov r5, r0
bl find_entry
subs r4, r0, #0
beq .L172
mov r1, r4
mov r0, r5
bl execute_
.L171:
ldr r3, .L181
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L180
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L172:
mov r1, sp
mov r0, r5
str r4, [sp]
bl tib_to_number.constprop.0
cmp r0, #0
beq .L174
ldr r0, [r5, #32]
ldr r3, [sp]
cmp r0, #7
addne r4, r0, #1
str r4, [r5, #32]
str r3, [r5, r4, lsl #2]
b .L171
.L174:
ldr r1, .L181+4
mov r0, #1
bl __printf_chk
b .L171
.L180:
bl __stack_chk_fail
.L182:
.align 2
.L181:
.word .LC4
.word .LC3
.size execute, .-execute
.section .rodata.str1.4
.align 2
.LC5:
.ascii "if\000"
.align 2
.LC6:
.ascii ";\000"
.section .rodata.cst4
.align 2
.LC7:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type compile, %function
compile:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L202
mov r5, r0
sub sp, sp, #8
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl find_entry
ldr r4, [r5, #52]
subs r3, r0, #0
ldr r6, [r4, #16]
beq .L184
cmp r4, r3
beq .L198
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #105
beq .L199
.L187:
ldrb r2, [r3] @ zero_extendqisi2
cmp r2, #59
beq .L200
.L190:
mov r1, #22
add r2, r4, r6, lsl #3
str r1, [r2, #20]
str r3, [r2, #24]
.L186:
add r6, r6, #1
str r6, [r4, #16]
.L183:
ldr r3, .L202
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L201
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, pc}
.L198:
mov r1, #23
mov r2, #0
add r3, r4, r6, lsl #3
str r1, [r3, #20]
str r2, [r3, #24]
b .L186
.L199:
ldrb r2, [r3, #1] @ zero_extendqisi2
cmp r2, #102
bne .L187
ldrb r2, [r3, #2] @ zero_extendqisi2
cmp r2, #0
bne .L187
mov r1, #10
add r3, r4, r6, lsl #3
str r1, [r3, #20]
str r2, [r3, #24]
b .L186
.L200:
ldrb r2, [r3, #1] @ zero_extendqisi2
cmp r2, #0
bne .L190
mov r1, #13
add r3, r4, r6, lsl #3
str r1, [r3, #20]
str r2, [r3, #24]
b .L186
.L184:
mov r1, sp
mov r0, r5
str r3, [sp]
bl tib_to_number.constprop.0
cmp r0, #0
beq .L194
mov r1, #24
ldr r3, [sp]
ldr r2, [r5, #52]
add r4, r4, r6, lsl #3
str r1, [r4, #20]
str r3, [r4, #24]
ldr r3, [r2, #16]
add r3, r3, #1
str r3, [r2, #16]
b .L183
.L194:
ldr r1, .L202+4
mov r0, #1
bl __printf_chk
b .L183
.L201:
bl __stack_chk_fail
.L203:
.align 2
.L202:
.word .LC7
.word .LC3
.size compile, .-compile
.align 2
.global colorforth_newstate
.syntax unified
.arm
.fpu softvfp
.type colorforth_newstate, %function
colorforth_newstate:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r1, #60
mov r0, #1
bl calloc
mov r1, #4096
mov r4, r0
mov r0, #1
bl calloc
mov r3, r0
mov r1, #4096
str r3, [r4, #48]
str r3, [r4, #52]
mov r0, #1
bl calloc
mov r3, r0
mov r0, r4
str r3, [r4, #56]
pop {r4, pc}
.size colorforth_newstate, .-colorforth_newstate
.section .rodata.str1.4
.align 2
.LC8:
.ascii ".\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
bl colorforth_newstate
mov r10, #0
mov r2, #1
ldr r4, [r0, #52]
ldr r5, .L236
mov r8, r0
mov r9, r2
mov r7, r10
ldr r3, [r4, #16]
ldr fp, .L236+4
add r6, r5, #192
b .L208
.L233:
ldr fp, [r5, #-8]
ldr r10, [r5, #-4]
mov r0, fp
bl strlen
mov r3, #1
mov r2, r0
.L208:
add r4, r4, r3, lsl #3
add r4, r4, #20
mov r1, fp
mov r0, r4
str r2, [r4, #8]
bl memcpy
add r5, r5, #8
ldr r3, [r8, #52]
cmp r5, r6
str r3, [r4, #12]
str r10, [r4, #20]
str r7, [r4, #24]
str r9, [r4, #16]
str r4, [r8, #52]
bne .L233
ldr r6, .L236+8
ldr r5, .L236+12
mov r4, r6
ldr r7, .L236+16
ldr r10, .L236+20
ldr r9, .L236+24
.L207:
mov r3, #0
mov fp, #24
str r3, [r8, #44]
.L209:
ldr r0, [r5]
bl getc
cmp r0, #40
beq .L220
.L235:
ble .L234
cmp r0, #94
beq .L216
cmp r0, #126
moveq r4, r6
beq .L209
cmp r0, #58
moveq r4, r7
beq .L209
.L215:
ldr r3, [r8, #44]
cmp r3, #7
bhi .L209
add r2, r3, #1
add r3, r8, r3
str r2, [r8, #44]
strb r0, [r3, #36]
ldr r0, [r5]
bl getc
cmp r0, #40
bne .L235
.L220:
mov r4, r9
b .L209
.L234:
cmp r0, #10
bgt .L213
cmp r0, #8
bgt .L214
cmn r0, #1
beq .L209
b .L215
.L213:
cmp r0, #32
bne .L215
.L214:
ldr r3, [r8, #44]
cmp r3, #0
beq .L209
mov r0, r8
blx r4
b .L207
.L216:
cmp r4, r6
movne r4, r10
bne .L209
ldr r3, [r8, #32]
ldr r1, [r8, #52]
cmp r3, #0
ldr ip, [r8, r3, lsl #2]
moveq r3, #7
ldr r2, [r1, #16]
subne r3, r3, #1
add r0, r1, r2, lsl #3
add r2, r2, #1
str fp, [r0, #20]
mov r4, r10
str r3, [r8, #32]
str ip, [r0, #24]
str r2, [r1, #16]
b .L209
.L237:
.align 2
.L236:
.word .LANCHOR0+8
.word .LC8
.word execute
.word stdin
.word define
.word compile
.word comment
.size main, .-main
.section .rodata.str1.4
.align 2
.LC9:
.ascii "dup\000"
.align 2
.LC10:
.ascii "over\000"
.align 2
.LC11:
.ascii "swap\000"
.align 2
.LC12:
.ascii "drop\000"
.align 2
.LC13:
.ascii "+\000"
.align 2
.LC14:
.ascii "-\000"
.align 2
.LC15:
.ascii "*\000"
.align 2
.LC16:
.ascii "=\000"
.align 2
.LC17:
.ascii "<\000"
.align 2
.LC18:
.ascii "bye\000"
.align 2
.LC19:
.ascii "words\000"
.align 2
.LC20:
.ascii "'\000"
.align 2
.LC21:
.ascii "emit\000"
.align 2
.LC22:
.ascii "key\000"
.align 2
.LC23:
.ascii "@\000"
.align 2
.LC24:
.ascii "!\000"
.align 2
.LC25:
.ascii "c@\000"
.align 2
.LC26:
.ascii "c!\000"
.align 2
.LC27:
.ascii "cell\000"
.align 2
.LC28:
.ascii "here\000"
.align 2
.LC29:
.ascii "system\000"
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type primitive_map.6040, %object
.size primitive_map.6040, 192
primitive_map.6040:
.word .LC8
.word 0
.word .LC9
.word 1
.word .LC10
.word 2
.word .LC11
.word 3
.word .LC12
.word 4
.word .LC13
.word 5
.word .LC14
.word 6
.word .LC15
.word 7
.word .LC16
.word 8
.word .LC17
.word 9
.word .LC5
.word 10
.word .LC18
.word 11
.word .LC19
.word 12
.word .LC6
.word 13
.word .LC20
.word 14
.word .LC21
.word 15
.word .LC22
.word 16
.word .LC23
.word 17
.word .LC24
.word 18
.word .LC25
.word 19
.word .LC26
.word 20
.word .LC27
.word 21
.word .LC28
.word 25
.word .LC29
.word 26
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100109.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Nano sleep system call failed "
.text
.p2align 4
.globl second
.type second, @function
second:
.LFB39:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movsx rdi, edi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
imul rdi, rdi, 1000000
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 32
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov eax, 25710
mov QWORD PTR 8[rsp], rdi
mov rbp, rsp
mov WORD PTR 21[rsp], ax
lea rbx, 18[rsp]
lea r12, 24[rsp]
mov edi, 83
mov QWORD PTR [rsp], 0
mov DWORD PTR 17[rsp], 1868784979
mov BYTE PTR 23[rsp], 32
jmp .L5
.p2align 4,,10
.p2align 3
.L10:
movsx edi, BYTE PTR [rbx]
add rbx, 1
.L5:
call putchar@PLT
mov rdi, QWORD PTR stdout[rip]
call fflush@PLT
xor esi, esi
mov rdi, rbp
call nanosleep@PLT
test eax, eax
js .L9
cmp rbx, r12
jne .L10
.L1:
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L9:
.cfi_restore_state
lea rdi, .LC0[rip]
call puts@PLT
jmp .L1
.L11:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size second, .-second
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Usage : <time MSEC>\n"
.LC2:
.string "/tmp"
.LC3:
.string "ftok\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB40:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 32
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
cmp edi, 2
je .L13
lea rdi, .LC1[rip]
call perror@PLT
mov edi, 1
call exit@PLT
.L13:
mov rbx, rsi
lea rdi, .LC2[rip]
mov esi, 51
call ftok@PLT
mov ebp, eax
cmp eax, -1
je .L15
mov esi, 50
lea rdi, .LC2[rip]
call ftok@PLT
mov r13d, eax
cmp eax, -1
je .L15
mov edi, ebp
xor edx, edx
lea r14, 12[rsp]
mov esi, 1
call semget@PLT
mov edi, r13d
xor edx, edx
mov esi, 1
mov r12d, eax
lea r13, 18[rsp]
call semget@PLT
mov DWORD PTR 12[rsp], -65536
mov WORD PTR 16[rsp], 0
mov ebp, eax
mov DWORD PTR 18[rsp], 65536
mov WORD PTR 22[rsp], 0
.p2align 4,,10
.p2align 3
.L16:
mov rsi, r14
mov edi, ebp
mov edx, 1
call semop@PLT
mov rdi, QWORD PTR 8[rbx]
xor esi, esi
mov edx, 10
call strtol@PLT
mov rdi, rax
call second
mov edx, 1
mov rsi, r13
mov edi, r12d
call semop@PLT
jmp .L16
.L15:
lea rdi, .LC3[rip]
call perror@PLT
mov edi, 2
call exit@PLT
.cfi_endproc
.LFE40:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100109.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "Nano sleep system call failed \000"
.align 2
.LC0:
.ascii "Second \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global second
.syntax unified
.arm
.fpu softvfp
.type second, %function
second:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, #0
push {r4, r5, r6, lr}
rsb r2, r0, r0, lsl #5
rsb r2, r2, r2, lsl #6
ldr r3, .L12
add r0, r0, r2, lsl #3
ldr r1, .L12+4
sub sp, sp, #24
lsl r2, r0, #6
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
ldm r1, {r0, r1}
str r2, [sp, #8]
lsr r2, r1, #16
mov r3, #83
ldr r5, .L12+8
str r0, [sp, #12]
strh r1, [sp, #16] @ movhi
strb r2, [sp, #18]
str ip, [sp, #4]
add r4, sp, #13
add r6, sp, #19
b .L5
.L10:
ldrb r3, [r4], #1 @ zero_extendqisi2
.L5:
mov r0, r3
bl putchar
ldr r0, [r5]
bl fflush
mov r1, #0
add r0, sp, #4
bl nanosleep
cmp r0, #0
blt .L9
cmp r4, r6
bne .L10
.L1:
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L11
add sp, sp, #24
@ sp needed
pop {r4, r5, r6, pc}
.L9:
ldr r0, .L12+12
bl puts
b .L1
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC2
.word .LC0
.word stdout
.word .LC1
.size second, .-second
.section .rodata.str1.4
.align 2
.LC3:
.ascii "Usage : <time MSEC>\012\000"
.align 2
.LC4:
.ascii "/tmp\000"
.align 2
.LC5:
.ascii "ftok\012\000"
.section .rodata.cst4
.align 2
.LC6:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L24
sub sp, sp, #24
cmp r0, #2
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
beq .L15
ldr r0, .L24+4
bl perror
mov r0, #1
bl exit
.L15:
mov r6, r1
ldr r0, .L24+8
mov r1, #51
bl ftok
cmn r0, #1
mov r5, r0
beq .L17
mov r1, #50
ldr r0, .L24+8
bl ftok
cmn r0, #1
mov r4, r0
beq .L17
mov r0, r5
mov r2, #0
mov r1, #1
bl semget
mov r2, #0
mov r1, #1
mov r5, r0
mov r0, r4
bl semget
mov r3, #0
mov r1, #65536
mov r4, r0
ldr r2, .L24+12
strh r3, [sp, #8] @ movhi
strh r3, [sp, #16] @ movhi
str r1, [sp, #12]
str r2, [sp, #4]
.L18:
add r1, sp, #4
mov r2, #1
mov r0, r4
bl semop
mov r2, #10
mov r1, #0
ldr r0, [r6, #4]
bl strtol
bl second
mov r2, #1
mov r0, r5
add r1, sp, #12
bl semop
b .L18
.L17:
ldr r0, .L24+16
bl perror
mov r0, #2
bl exit
.L25:
.align 2
.L24:
.word .LC6
.word .LC3
.word .LC4
.word -65536
.word .LC5
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001090.c"
.intel_syntax noprefix
.text
.p2align 4
.type yygrowstack.constprop.0, @function
yygrowstack.constprop.0:
.LFB57:
.cfi_startproc
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
mov ebx, DWORD PTR yystack[rip]
test ebx, ebx
je .L6
cmp ebx, 9999
ja .L5
add ebx, ebx
mov eax, 10000
cmp ebx, 10000
cmova ebx, eax
mov r13d, ebx
lea rbp, [r13+r13]
.L2:
mov rdi, QWORD PTR yystack[rip+8]
mov r12, QWORD PTR yystack[rip+16]
mov rsi, rbp
sub r12, rdi
sar r12
call realloc@PLT
test rax, rax
je .L5
movsx r12, r12d
mov rdi, QWORD PTR yystack[rip+32]
mov QWORD PTR yystack[rip+8], rax
lea rsi, 0[0+r13*4]
lea rax, [rax+r12*2]
mov QWORD PTR yystack[rip+16], rax
call realloc@PLT
test rax, rax
je .L5
mov QWORD PTR yystack[rip+32], rax
lea rax, [rax+r12*4]
mov QWORD PTR yystack[rip+40], rax
mov rax, QWORD PTR yystack[rip+8]
mov DWORD PTR yystack[rip], ebx
lea rax, -2[rax+rbp]
mov QWORD PTR yystack[rip+24], rax
xor eax, eax
.L1:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L6:
.cfi_restore_state
mov ebp, 400
mov r13d, 200
mov ebx, 200
jmp .L2
.L5:
mov eax, -2
jmp .L1
.cfi_endproc
.LFE57:
.size yygrowstack.constprop.0, .-yygrowstack.constprop.0
.p2align 4
.globl quote_calc2_lex
.type quote_calc2_lex, @function
quote_calc2_lex:
.LFB27:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
.p2align 4,,10
.p2align 3
.L16:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, 32
je .L16
mov r12d, eax
call __ctype_b_loc@PLT
mov r8, rax
movsx rax, r12d
mov rdx, QWORD PTR [r8]
movzx eax, WORD PTR [rdx+rax*2]
test ah, 2
jne .L25
test ah, 8
jne .L26
mov eax, r12d
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L25:
.cfi_restore_state
sub r12d, 97
mov DWORD PTR quote_calc2_lval[rip], r12d
mov r12d, 270
mov eax, r12d
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L26:
.cfi_restore_state
sub r12d, 48
mov DWORD PTR quote_calc2_lval[rip], r12d
mov r12d, 269
mov eax, r12d
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE27:
.size quote_calc2_lex, .-quote_calc2_lex
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "syntax error"
.LC1:
.string "%s\n"
.LC2:
.string "%d\n"
.LC3:
.string "yacc stack overflow"
.text
.p2align 4
.globl quote_calc2_parse
.type quote_calc2_parse, @function
quote_calc2_parse:
.LFB56:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
mov rax, QWORD PTR yystack[rip+8]
mov DWORD PTR quote_calc2_nerrs[rip], 0
mov DWORD PTR quote_calc2_errflag[rip], 0
mov DWORD PTR quote_calc2_char[rip], -1
test rax, rax
je .L111
.L28:
mov rdx, QWORD PTR yystack[rip+32]
xor esi, esi
mov QWORD PTR yystack[rip+16], rax
mov r13d, 1
xor r15d, r15d
lea r12, quote_calc2_len[rip]
lea rbp, quote_calc2_lhs[rip]
mov QWORD PTR yystack[rip+40], rdx
lea rbx, quote_calc2_check[rip]
mov WORD PTR [rax], si
.L30:
movsx r13d, r13w
test r13d, r13d
jne .L31
.L117:
mov ecx, DWORD PTR quote_calc2_char[rip]
test ecx, ecx
js .L112
.L33:
lea r13, quote_calc2_sindex[rip]
movsx rdx, r15d
movsx eax, WORD PTR 0[r13+rdx*2]
test eax, eax
je .L36
mov ecx, DWORD PTR quote_calc2_char[rip]
add eax, ecx
cmp eax, 259
jbe .L113
.L36:
lea rax, quote_calc2_rindex[rip]
movsx eax, WORD PTR [rax+rdx*2]
test eax, eax
je .L39
mov edx, DWORD PTR quote_calc2_char[rip]
add eax, edx
cmp eax, 259
jbe .L114
.L39:
mov eax, DWORD PTR quote_calc2_errflag[rip]
test eax, eax
je .L115
.L40:
cmp eax, 2
jle .L116
.L41:
mov edx, DWORD PTR quote_calc2_char[rip]
test edx, edx
je .L47
mov DWORD PTR quote_calc2_char[rip], -1
xor r13d, r13d
movsx r13d, r13w
test r13d, r13d
je .L117
.L31:
movsx r15, r13d
mov rcx, QWORD PTR yystack[rip+40]
movsx edx, WORD PTR [r12+r15*2]
mov r14d, edx
test edx, edx
jle .L50
mov eax, 1
sub eax, edx
cdqe
mov eax, DWORD PTR [rcx+rax*4]
mov DWORD PTR quote_calc2_val[rip], eax
.L51:
sub r13d, 3
cmp r13d, 15
ja .L52
lea rdx, .L54[rip]
movsx rax, DWORD PTR [rdx+r13*4]
add rax, rdx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L54:
.long .L68-.L54
.long .L67-.L54
.long .L66-.L54
.long .L65-.L54
.long .L64-.L54
.long .L63-.L54
.long .L62-.L54
.long .L61-.L54
.long .L60-.L54
.long .L59-.L54
.long .L58-.L54
.long .L57-.L54
.long .L56-.L54
.long .L52-.L54
.long .L55-.L54
.long .L53-.L54
.text
.L68:
mov DWORD PTR quote_calc2_errflag[rip], 0
.p2align 4,,10
.p2align 3
.L52:
mov rdx, QWORD PTR yystack[rip+16]
movsx rax, r14w
lea rsi, [rax+rax]
sal rax, 2
sub rdx, rsi
sub rcx, rax
movsx rax, WORD PTR 0[rbp+r15*2]
movzx esi, WORD PTR [rdx]
mov QWORD PTR yystack[rip+16], rdx
mov QWORD PTR yystack[rip+40], rcx
mov r13d, esi
or r13w, ax
jne .L70
lea rax, 2[rdx]
mov QWORD PTR yystack[rip+16], rax
mov eax, 1
mov WORD PTR 2[rdx], ax
lea rax, 4[rcx]
mov QWORD PTR yystack[rip+40], rax
mov eax, DWORD PTR quote_calc2_val[rip]
mov DWORD PTR 4[rcx], eax
mov eax, DWORD PTR quote_calc2_char[rip]
test eax, eax
js .L118
.L71:
test eax, eax
je .L27
mov r15d, 1
jmp .L30
.p2align 4,,10
.p2align 3
.L115:
mov rdi, QWORD PTR stderr[rip]
lea rcx, .LC0[rip]
mov esi, 1
lea rdx, .LC1[rip]
call __fprintf_chk@PLT
mov eax, DWORD PTR quote_calc2_errflag[rip]
add DWORD PTR quote_calc2_nerrs[rip], 1
cmp eax, 2
jg .L41
.L116:
mov rax, QWORD PTR yystack[rip+16]
mov rdi, QWORD PTR yystack[rip+8]
xor esi, esi
mov DWORD PTR quote_calc2_errflag[rip], 3
mov rcx, QWORD PTR yystack[rip+40]
jmp .L49
.p2align 4,,10
.p2align 3
.L42:
sub rcx, 4
cmp rdi, rax
jnb .L119
sub rax, 2
mov esi, 1
.L49:
movsx rdx, WORD PTR [rax]
mov r8, rcx
movsx edx, WORD PTR 0[r13+rdx*2]
test edx, edx
je .L42
add edx, 256
cmp edx, 259
ja .L42
movsx r14, edx
cmp WORD PTR [rbx+r14*2], 256
jne .L42
test sil, sil
je .L43
mov QWORD PTR yystack[rip+16], rax
mov QWORD PTR yystack[rip+40], rcx
.L43:
cmp QWORD PTR yystack[rip+24], rax
ja .L45
call yygrowstack.constprop.0
cmp eax, -2
je .L29
.L45:
mov rdx, QWORD PTR yystack[rip+16]
lea rax, quote_calc2_table[rip]
movsx r15, WORD PTR [rax+r14*2]
lea rcx, 2[rdx]
mov QWORD PTR yystack[rip+16], rcx
mov WORD PTR 2[rdx], r15w
mov rdx, QWORD PTR yystack[rip+40]
lea rcx, 4[rdx]
mov QWORD PTR yystack[rip+40], rcx
mov ecx, DWORD PTR quote_calc2_lval[rip]
mov DWORD PTR 4[rdx], ecx
lea rdx, quote_calc2_defred[rip]
movzx r13d, WORD PTR [rdx+r15*2]
jmp .L30
.p2align 4,,10
.p2align 3
.L70:
lea rdi, quote_calc2_gindex[rip]
movsx edi, WORD PTR [rdi+rax*2]
test edi, edi
je .L73
movsx r8d, si
add edi, r8d
cmp edi, 259
jbe .L120
.L73:
lea rsi, quote_calc2_dgoto[rip]
movsx r15d, WORD PTR [rsi+rax*2]
.L74:
cmp rdx, QWORD PTR yystack[rip+24]
jb .L75
call yygrowstack.constprop.0
cmp eax, -2
je .L29
mov rdx, QWORD PTR yystack[rip+16]
mov rcx, QWORD PTR yystack[rip+40]
.L75:
lea rax, 2[rdx]
mov QWORD PTR yystack[rip+16], rax
lea rax, 4[rcx]
mov WORD PTR 2[rdx], r15w
lea rdx, quote_calc2_defred[rip]
mov QWORD PTR yystack[rip+40], rax
mov eax, DWORD PTR quote_calc2_val[rip]
mov DWORD PTR 4[rcx], eax
movsx rax, r15d
movzx r13d, WORD PTR [rdx+rax*2]
jmp .L30
.p2align 4,,10
.p2align 3
.L112:
call quote_calc2_lex
test eax, eax
cmovs eax, r13d
mov DWORD PTR quote_calc2_char[rip], eax
jmp .L33
.p2align 4,,10
.p2align 3
.L119:
test sil, sil
je .L47
mov QWORD PTR yystack[rip+16], rax
mov QWORD PTR yystack[rip+40], r8
.L47:
mov eax, 1
.L27:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L50:
.cfi_restore_state
mov DWORD PTR quote_calc2_val[rip], 0
jmp .L51
.p2align 4,,10
.p2align 3
.L113:
movsx r14, eax
cmp WORD PTR [rbx+r14*2], cx
jne .L36
mov rdx, QWORD PTR yystack[rip+16]
cmp rdx, QWORD PTR yystack[rip+24]
jnb .L121
.L37:
lea rax, quote_calc2_table[rip]
lea rcx, 2[rdx]
movsx r15, WORD PTR [rax+r14*2]
mov QWORD PTR yystack[rip+16], rcx
mov WORD PTR 2[rdx], r15w
mov rdx, QWORD PTR yystack[rip+40]
mov DWORD PTR quote_calc2_char[rip], -1
lea rcx, 4[rdx]
mov QWORD PTR yystack[rip+40], rcx
mov ecx, DWORD PTR quote_calc2_lval[rip]
mov DWORD PTR 4[rdx], ecx
mov edx, DWORD PTR quote_calc2_errflag[rip]
lea rcx, quote_calc2_defred[rip]
movzx r13d, WORD PTR [rcx+r15*2]
test edx, edx
jle .L30
sub edx, 1
mov DWORD PTR quote_calc2_errflag[rip], edx
jmp .L30
.p2align 4,,10
.p2align 3
.L114:
cdqe
cmp WORD PTR [rbx+rax*2], dx
jne .L39
lea rdx, quote_calc2_table[rip]
movsx r13d, WORD PTR [rdx+rax*2]
jmp .L31
.p2align 4,,10
.p2align 3
.L118:
call quote_calc2_lex
test eax, eax
js .L72
mov DWORD PTR quote_calc2_char[rip], eax
jmp .L71
.p2align 4,,10
.p2align 3
.L120:
movsx rdi, edi
cmp si, WORD PTR [rbx+rdi*2]
jne .L73
lea rax, quote_calc2_table[rip]
movsx r15d, WORD PTR [rax+rdi*2]
jmp .L74
.L67:
mov edx, DWORD PTR [rcx]
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rcx, QWORD PTR yystack[rip+40]
jmp .L52
.L66:
mov esi, DWORD PTR [rcx]
movsx rdx, DWORD PTR -8[rcx]
lea rax, regs[rip]
mov DWORD PTR [rax+rdx*4], esi
jmp .L52
.L57:
mov eax, DWORD PTR [rcx]
neg eax
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L56:
movsx rdx, DWORD PTR [rcx]
lea rax, regs[rip]
mov eax, DWORD PTR [rax+rdx*4]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L55:
mov eax, DWORD PTR [rcx]
cmp eax, 1
mov DWORD PTR quote_calc2_val[rip], eax
sbb eax, eax
and eax, -2
add eax, 10
mov DWORD PTR base[rip], eax
jmp .L52
.L53:
mov eax, DWORD PTR -4[rcx]
imul eax, DWORD PTR base[rip]
add eax, DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L65:
mov eax, DWORD PTR -4[rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L64:
mov eax, DWORD PTR [rcx]
add eax, DWORD PTR -8[rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L63:
mov eax, DWORD PTR -8[rcx]
sub eax, DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L62:
mov eax, DWORD PTR -8[rcx]
imul eax, DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L61:
mov eax, DWORD PTR -8[rcx]
cdq
idiv DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L60:
mov eax, DWORD PTR -8[rcx]
cdq
idiv DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], edx
jmp .L52
.L59:
mov eax, DWORD PTR -8[rcx]
and eax, DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L58:
mov eax, DWORD PTR -8[rcx]
or eax, DWORD PTR [rcx]
mov DWORD PTR quote_calc2_val[rip], eax
jmp .L52
.L72:
mov DWORD PTR quote_calc2_char[rip], 0
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L121:
.cfi_restore_state
call yygrowstack.constprop.0
cmp eax, -2
je .L29
mov rdx, QWORD PTR yystack[rip+16]
jmp .L37
.p2align 4,,10
.p2align 3
.L111:
call yygrowstack.constprop.0
cmp eax, -2
je .L29
mov rax, QWORD PTR yystack[rip+8]
jmp .L28
.L29:
.L48:
mov rdi, QWORD PTR stderr[rip]
lea rcx, .LC3[rip]
lea rdx, .LC1[rip]
xor eax, eax
mov esi, 1
call __fprintf_chk@PLT
mov eax, 2
jmp .L27
.cfi_endproc
.LFE56:
.size quote_calc2_parse, .-quote_calc2_parse
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB25:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
jmp .L123
.p2align 4,,10
.p2align 3
.L124:
call quote_calc2_parse
.L123:
mov rdi, QWORD PTR stdin[rip]
call feof@PLT
test eax, eax
je .L124
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE25:
.size main, .-main
.local yystack
.comm yystack,48,32
.globl quote_calc2_lval
.bss
.align 4
.type quote_calc2_lval, @object
.size quote_calc2_lval, 4
quote_calc2_lval:
.zero 4
.globl quote_calc2_val
.align 4
.type quote_calc2_val, @object
.size quote_calc2_val, 4
quote_calc2_val:
.zero 4
.globl quote_calc2_char
.align 4
.type quote_calc2_char, @object
.size quote_calc2_char, 4
quote_calc2_char:
.zero 4
.globl quote_calc2_errflag
.align 4
.type quote_calc2_errflag, @object
.size quote_calc2_errflag, 4
quote_calc2_errflag:
.zero 4
.globl quote_calc2_nerrs
.align 4
.type quote_calc2_nerrs, @object
.size quote_calc2_nerrs, 4
quote_calc2_nerrs:
.zero 4
.globl quote_calc2_debug
.align 4
.type quote_calc2_debug, @object
.size quote_calc2_debug, 4
quote_calc2_debug:
.zero 4
.section .rodata
.align 32
.type quote_calc2_check, @object
.size quote_calc2_check, 520
quote_calc2_check:
.value 10
.value 10
.value 40
.value 124
.value 40
.value 10
.value 10
.value 10
.value 10
.value 10
.value 61
.value 10
.value 10
.value 10
.value 10
.value 258
.value 10
.value 260
.value 41
.value 262
.value 269
.value 264
.value 10
.value 266
.value 10
.value 268
.value -1
.value -1
.value -1
.value -1
.value -1
.value 41
.value -1
.value -1
.value -1
.value -1
.value 41
.value 41
.value 41
.value 41
.value 41
.value -1
.value 41
.value 41
.value 41
.value 3
.value -1
.value -1
.value 6
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 13
.value -1
.value -1
.value 16
.value 17
.value 18
.value 19
.value 20
.value 21
.value 22
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 124
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 124
.value 124
.value -1
.value -1
.value -1
.value 124
.value 124
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 258
.value -1
.value 260
.value -1
.value 262
.value -1
.value 264
.value -1
.value 266
.value -1
.value 268
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 256
.value -1
.value -1
.value -1
.value 260
.value -1
.value 260
.value -1
.value -1
.value -1
.value -1
.value -1
.value -1
.value 269
.value 270
.value 269
.value 270
.value 258
.value -1
.value 260
.value -1
.value 262
.value -1
.value 264
.value -1
.value 266
.value -1
.value 268
.value -1
.value -1
.value 258
.value 258
.value 260
.value 260
.value 262
.value 262
.value 264
.value 264
.value 266
.value 266
.value 268
.value 268
.align 32
.type quote_calc2_table, @object
.size quote_calc2_table, 520
quote_calc2_table:
.value 16
.value 15
.value 6
.value 22
.value 6
.value 14
.value 13
.value 7
.value 8
.value 9
.value 13
.value 10
.value 11
.value 12
.value 10
.value 16
.value 15
.value 17
.value 25
.value 18
.value 23
.value 19
.value 4
.value 20
.value 5
.value 21
.value 0
.value 0
.value 0
.value 0
.value 0
.value 16
.value 0
.value 0
.value 0
.value 0
.value 14
.value 13
.value 7
.value 8
.value 9
.value 0
.value 10
.value 11
.value 12
.value 12
.value 0
.value 0
.value 14
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 24
.value 0
.value 0
.value 26
.value 27
.value 28
.value 29
.value 30
.value 31
.value 32
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 22
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 16
.value 15
.value 0
.value 0
.value 0
.value 14
.value 13
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 16
.value 0
.value 17
.value 0
.value 18
.value 0
.value 19
.value 0
.value 20
.value 0
.value 21
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 2
.value 0
.value 0
.value 0
.value 3
.value 0
.value 3
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 4
.value 5
.value 4
.value 11
.value 16
.value 0
.value 17
.value 0
.value 18
.value 0
.value 19
.value 0
.value 20
.value 0
.value 21
.value 0
.value 0
.value 16
.value 15
.value 16
.value 15
.value 16
.value 15
.value 16
.value 15
.value 16
.value 15
.value 16
.value 15
.align 8
.type quote_calc2_gindex, @object
.size quote_calc2_gindex, 8
quote_calc2_gindex:
.value 0
.value 0
.value 42
.value 0
.align 32
.type quote_calc2_rindex, @object
.size quote_calc2_rindex, 66
quote_calc2_rindex:
.value 0
.value 0
.value 0
.value 0
.value 0
.value -9
.value 0
.value 0
.value 12
.value -10
.value 0
.value 0
.value -5
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 14
.value 0
.value -3
.value -2
.value -1
.value 1
.value 2
.value 3
.value -4
.align 32
.type quote_calc2_sindex, @object
.size quote_calc2_sindex, 66
quote_calc2_sindex:
.value 0
.value -38
.value 4
.value -36
.value 0
.value -51
.value -36
.value 6
.value -121
.value -249
.value 0
.value 0
.value -243
.value -36
.value -23
.value 0
.value -36
.value -36
.value -36
.value -36
.value -36
.value -36
.value -36
.value 0
.value -121
.value 0
.value -121
.value -121
.value -121
.value -121
.value -121
.value -121
.value -243
.align 8
.type quote_calc2_dgoto, @object
.size quote_calc2_dgoto, 8
quote_calc2_dgoto:
.value 1
.value 7
.value 8
.value 9
.align 32
.type quote_calc2_defred, @object
.size quote_calc2_defred, 66
quote_calc2_defred:
.value 1
.value 0
.value 0
.value 0
.value 17
.value 0
.value 0
.value 0
.value 0
.value 0
.value 3
.value 15
.value 0
.value 0
.value 0
.value 2
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 18
.value 0
.value 6
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.value 0
.align 32
.type quote_calc2_len, @object
.size quote_calc2_len, 38
quote_calc2_len:
.value 2
.value 0
.value 3
.value 3
.value 1
.value 3
.value 3
.value 3
.value 3
.value 3
.value 3
.value 3
.value 3
.value 3
.value 2
.value 1
.value 1
.value 1
.value 2
.align 32
.type quote_calc2_lhs, @object
.size quote_calc2_lhs, 38
quote_calc2_lhs:
.value -1
.value 0
.value 0
.value 0
.value 1
.value 1
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 2
.value 3
.value 3
.globl base
.bss
.align 4
.type base, @object
.size base, 4
base:
.zero 4
.globl regs
.align 32
.type regs, @object
.size regs, 104
regs:
.zero 104
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001090.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type yygrowstack.constprop.0, %function
yygrowstack.constprop.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr r4, .L15
ldr r5, [r4]
cmp r5, #0
beq .L6
ldr r3, .L15+4
cmp r5, r3
bhi .L5
ldr r3, .L15+8
lsl r5, r5, #1
cmp r5, r3
movcs r5, r3
lsl r1, r5, #1
.L2:
ldmib r4, {r0, r6}
sub r6, r6, r0
bl realloc
subs r3, r0, #0
asr r7, r6, #1
beq .L5
add r6, r3, r6
ldr r0, [r4, #16]
lsl r1, r5, #2
str r3, [r4, #4]
str r6, [r4, #8]
bl realloc
subs r3, r0, #0
beq .L5
ldr r2, [r4, #4]
sub r1, r5, #-2147483647
add r7, r3, r7, lsl #2
add r2, r2, r1, lsl #1
mov r0, #0
str r7, [r4, #20]
str r3, [r4, #16]
str r5, [r4]
str r2, [r4, #12]
pop {r4, r5, r6, r7, r8, pc}
.L6:
mov r1, #400
mov r5, #200
b .L2
.L5:
mvn r0, #1
pop {r4, r5, r6, r7, r8, pc}
.L16:
.align 2
.L15:
.word .LANCHOR0
.word 9999
.word 10000
.size yygrowstack.constprop.0, .-yygrowstack.constprop.0
.align 2
.global quote_calc2_lex
.syntax unified
.arm
.fpu softvfp
.type quote_calc2_lex, %function
quote_calc2_lex:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r5, .L28
.L18:
ldr r0, [r5]
bl getc
cmp r0, #32
mov r4, r0
beq .L18
bl __ctype_b_loc
ldr r2, [r0]
lsl r3, r4, #1
ldrh r3, [r2, r3]
tst r3, #512
bne .L27
tst r3, #2048
subne r2, r4, #48
ldrne r3, .L28+4
ldrne r4, .L28+8
strne r2, [r3]
mov r0, r4
pop {r4, r5, r6, pc}
.L27:
ldr r3, .L28+4
sub r4, r4, #97
str r4, [r3]
ldr r4, .L28+12
mov r0, r4
pop {r4, r5, r6, pc}
.L29:
.align 2
.L28:
.word stdin
.word quote_calc2_lval
.word 269
.word 270
.size quote_calc2_lex, .-quote_calc2_lex
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "syntax error\000"
.align 2
.LC1:
.ascii "%s\012\000"
.align 2
.LC2:
.ascii "%d\012\000"
.global __aeabi_idiv
.global __aeabi_idivmod
.align 2
.LC3:
.ascii "yacc stack overflow\000"
.text
.align 2
.global quote_calc2_parse
.syntax unified
.arm
.fpu softvfp
.type quote_calc2_parse, %function
quote_calc2_parse:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #0
mvn r1, #0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r5, .L130
ldr r8, .L130+4
ldr r3, [r5, #4]
ldr r7, .L130+8
ldr r6, .L130+12
cmp r3, r2
sub sp, sp, #20
str r2, [r8]
str r2, [r7]
str r1, [r6]
beq .L118
.L31:
mov r2, #0
mov r9, #1
mov r10, r2
ldr r4, .L130+16
ldr r1, [r5, #16]
add r0, r4, #1232
add r0, r0, #12
add ip, r4, #1312
str r0, [sp, #4]
add r0, ip, #12
str r3, [r5, #8]
str r1, [r5, #20]
str r0, [sp, #8]
strh r2, [r3] @ movhi
.L33:
cmp r9, #0
mov r2, r9
bne .L34
.L124:
ldr r3, [r6]
cmp r3, #0
blt .L119
.L36:
lsl r2, r10, #1
ldrsh r3, [r4, r2]
cmp r3, #0
beq .L39
ldr r1, [r6]
add r3, r1, r3
cmp r3, #260
bcc .L120
.L39:
ldr r1, .L130+20
ldrsh r3, [r1, r2]
cmp r3, #0
beq .L42
ldr r2, [r6]
add r3, r2, r3
cmp r3, #260
bcc .L121
.L42:
ldr r3, [r7]
cmp r3, #0
beq .L122
.L43:
cmp r3, #2
ble .L123
.L44:
ldr r3, [r6]
cmp r3, #0
beq .L50
mov r9, #0
mvn r3, #0
cmp r9, #0
mov r2, r9
str r3, [r6]
beq .L124
.L34:
ldr r1, [sp, #4]
lsl r3, r2, #1
ldrsh r10, [r1, r3]
ldr r9, [r5, #20]
cmp r10, #0
movle r1, #0
rsbgt r1, r10, #1
ldrgt r1, [r9, r1, lsl #2]
ldr fp, .L130+24
sub r2, r2, #3
str r1, [fp]
cmp r2, #15
ldrls pc, [pc, r2, asl #2]
b .L54
.L56:
.word .L70
.word .L69
.word .L68
.word .L67
.word .L66
.word .L65
.word .L64
.word .L63
.word .L62
.word .L61
.word .L60
.word .L59
.word .L58
.word .L54
.word .L57
.word .L55
.L70:
mov r2, #0
str r2, [r7]
.L54:
ldr r2, [r5, #8]
ldr r0, .L130+28
sub r2, r2, r10, lsl #1
ldrsh r1, [r2]
ldrsh r3, [r0, r3]
sub ip, r9, r10, lsl #2
orrs r9, r1, r3
str r2, [r5, #8]
str ip, [r5, #20]
bne .L72
mov r1, #1
ldr r0, [r6]
ldr r3, [fp]
add lr, r2, #2
str lr, [r5, #8]
cmp r0, #0
strh r1, [r2, #2] @ movhi
add r2, ip, #4
str r2, [r5, #20]
str r3, [ip, #4]
blt .L125
.L73:
cmp r0, #0
beq .L30
mov r10, #1
b .L33
.L122:
ldr r2, .L130+32
ldr r3, .L130+36
ldr r0, [r2]
mov r1, #1
ldr r2, .L130+40
bl __fprintf_chk
ldr r2, [r8]
ldr r3, [r7]
add r2, r2, #1
cmp r3, #2
str r2, [r8]
bgt .L44
.L123:
mov r3, #3
mov ip, #0
str r3, [r7]
ldr fp, [r5, #4]
ldr r0, [r5, #20]
ldr r3, [r5, #8]
b .L49
.L45:
cmp fp, lr
sub r0, r0, #4
bcs .L126
mov ip, #1
.L49:
mov r2, r3
ldrsh r1, [r3], #-2
mov lr, r2
lsl r1, r1, #1
ldrsh r1, [r4, r1]
mov r10, r0
cmp r1, #0
add r9, r1, #256
beq .L45
cmp r9, #260
bcs .L45
add r1, r4, r9, lsl #1
ldrsh r1, [r1, #68]
lsl r9, r9, #1
cmp r1, #256
bne .L45
ldr r3, [r5, #12]
cmp ip, #0
strne r2, [r5, #8]
strne r0, [r5, #20]
cmp r3, r2
bhi .L48
bl yygrowstack.constprop.0
cmn r0, #2
beq .L32
.L48:
ldr r3, .L130+44
ldr r1, [r5, #8]
ldr r2, .L130+48
ldrsh r10, [r3, r9]
ldr r0, [r2]
add ip, r1, #2
ldr r2, [r5, #20]
add r3, r3, #520
str ip, [r5, #8]
strh r10, [r1, #2] @ movhi
lsl r1, r10, #1
ldrsh r9, [r3, r1]
add r3, r2, #4
str r3, [r5, #20]
str r0, [r2, #4]
b .L33
.L72:
ldr lr, [sp, #8]
lsl r3, r3, #1
ldrsh lr, [lr, r3]
cmp lr, #0
beq .L75
add lr, r1, lr
cmp lr, #260
bcc .L127
.L75:
ldr r1, .L130+52
ldrsh r10, [r1, r3]
.L76:
ldr r3, [r5, #12]
cmp r2, r3
bcc .L77
bl yygrowstack.constprop.0
cmn r0, #2
beq .L32
ldr r2, [r5, #8]
ldr ip, [r5, #20]
.L77:
ldr r1, [fp]
add r3, r2, #2
ldr r0, .L130+56
str r3, [r5, #8]
add lr, ip, #4
lsl r3, r10, #1
strh r10, [r2, #2] @ movhi
ldrsh r9, [r0, r3]
str lr, [r5, #20]
str r1, [ip, #4]
b .L33
.L119:
bl quote_calc2_lex
cmp r0, #0
movlt r0, r9
str r0, [r6]
b .L36
.L125:
bl quote_calc2_lex
cmp r0, #0
bge .L128
mov r0, r9
str r9, [r6]
.L30:
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L126:
cmp ip, #0
strne r2, [r5, #8]
strne r10, [r5, #20]
.L50:
mov r0, #1
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L120:
add r0, r4, r3, lsl #1
ldrsh r0, [r0, #68]
lsl r1, r1, #16
asr r1, r1, #16
cmp r0, r1
lsl r9, r3, #1
bne .L39
ldr r2, [r5, #8]
ldr r3, [r5, #12]
cmp r2, r3
bcs .L129
.L40:
mvn r0, #0
ldr r3, .L130+44
ldr r1, .L130+48
ldrsh r10, [r3, r9]
ldr ip, [r1]
add r3, r3, #520
lsl r1, r10, #1
ldrsh r9, [r3, r1]
ldr r1, [r5, #20]
add r3, r2, #2
str r3, [r5, #8]
add r3, r1, #4
strh r10, [r2, #2] @ movhi
str r3, [r5, #20]
ldr r3, [r7]
str ip, [r1, #4]
cmp r3, #0
addgt r3, r3, r0
str r0, [r6]
strgt r3, [r7]
b .L33
.L121:
add r0, r4, r3, lsl #1
ldrsh r0, [r0, #68]
lsl r2, r2, #16
asr r2, r2, #16
cmp r0, r2
lsl r3, r3, #1
bne .L42
sub r1, r1, #588
ldrsh r2, [r1, r3]
b .L34
.L128:
str r0, [r6]
b .L73
.L127:
add r9, r4, lr, lsl #1
ldrsh r9, [r9, #68]
lsl lr, lr, #1
cmp r9, r1
bne .L75
sub r0, r0, #696
ldrsh r10, [r0, lr]
b .L76
.L69:
ldr r2, [r9]
mov r0, #1
ldr r1, .L130+60
str r3, [sp, #12]
bl __printf_chk
ldr r9, [r5, #20]
ldr r3, [sp, #12]
b .L54
.L68:
ldr r1, [r9, #-8]
ldr r0, [r9]
ldr r2, .L130+64
str r0, [r2, r1, lsl #2]
b .L54
.L59:
ldr r2, [r9]
rsb r2, r2, #0
str r2, [fp]
b .L54
.L58:
ldr r1, [r9]
ldr r2, .L130+64
ldr r2, [r2, r1, lsl #2]
str r2, [fp]
b .L54
.L57:
ldr r1, [r9]
ldr r2, .L130+68
str r1, [fp]
ldr r1, [r9]
cmp r1, #0
moveq r1, #8
movne r1, #10
str r1, [r2]
b .L54
.L55:
ldr r1, .L130+68
ldr r2, [r9, #-4]
ldr r0, [r1]
ldr r1, [r9]
mla r2, r0, r2, r1
str r2, [fp]
b .L54
.L67:
ldr r2, [r9, #-4]
str r2, [fp]
b .L54
.L66:
ldr r2, [r9, #-8]
ldr r1, [r9]
add r2, r2, r1
str r2, [fp]
b .L54
.L65:
ldr r2, [r9, #-8]
ldr r1, [r9]
sub r2, r2, r1
str r2, [fp]
b .L54
.L64:
ldr r2, [r9, #-8]
ldr r1, [r9]
mul r2, r1, r2
str r2, [fp]
b .L54
.L63:
ldr r1, [r9]
ldr r0, [r9, #-8]
str r3, [sp, #12]
bl __aeabi_idiv
ldr r3, [sp, #12]
str r0, [fp]
b .L54
.L62:
ldr r1, [r9]
ldr r0, [r9, #-8]
str r3, [sp, #12]
bl __aeabi_idivmod
ldr r3, [sp, #12]
str r1, [fp]
b .L54
.L61:
ldr r2, [r9, #-8]
ldr r1, [r9]
and r2, r2, r1
str r2, [fp]
b .L54
.L60:
ldr r2, [r9, #-8]
ldr r1, [r9]
orr r2, r2, r1
str r2, [fp]
b .L54
.L129:
bl yygrowstack.constprop.0
cmn r0, #2
beq .L32
ldr r2, [r5, #8]
b .L40
.L118:
bl yygrowstack.constprop.0
cmn r0, #2
ldrne r3, [r5, #4]
bne .L31
.L32:
.L51:
ldr r2, .L130+32
mov r1, #1
ldr r0, [r2]
ldr r3, .L130+72
ldr r2, .L130+40
bl __fprintf_chk
mov r0, #2
b .L30
.L131:
.align 2
.L130:
.word .LANCHOR0
.word quote_calc2_nerrs
.word quote_calc2_errflag
.word quote_calc2_char
.word .LANCHOR1
.word .LANCHOR1+1176
.word quote_calc2_val
.word .LANCHOR1+1284
.word stderr
.word .LC0
.word .LC1
.word .LANCHOR1+588
.word quote_calc2_lval
.word .LANCHOR1+1332
.word .LANCHOR1+1108
.word .LC2
.word regs
.word base
.word .LC3
.size quote_calc2_parse, .-quote_calc2_parse
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L136
b .L133
.L134:
bl quote_calc2_parse
.L133:
ldr r0, [r4]
bl feof
cmp r0, #0
beq .L134
mov r0, #0
pop {r4, pc}
.L137:
.align 2
.L136:
.word stdin
.size main, .-main
.comm quote_calc2_lval,4,4
.comm quote_calc2_val,4,4
.comm quote_calc2_char,4,4
.comm quote_calc2_errflag,4,4
.comm quote_calc2_nerrs,4,4
.comm quote_calc2_debug,4,4
.comm base,4,4
.comm regs,104,4
.section .rodata
.align 2
.set .LANCHOR1,. + 0
.type quote_calc2_sindex, %object
.size quote_calc2_sindex, 66
quote_calc2_sindex:
.short 0
.short -38
.short 4
.short -36
.short 0
.short -51
.short -36
.short 6
.short -121
.short -249
.short 0
.short 0
.short -243
.short -36
.short -23
.short 0
.short -36
.short -36
.short -36
.short -36
.short -36
.short -36
.short -36
.short 0
.short -121
.short 0
.short -121
.short -121
.short -121
.short -121
.short -121
.short -121
.short -243
.space 2
.type quote_calc2_check, %object
.size quote_calc2_check, 520
quote_calc2_check:
.short 10
.short 10
.short 40
.short 124
.short 40
.short 10
.short 10
.short 10
.short 10
.short 10
.short 61
.short 10
.short 10
.short 10
.short 10
.short 258
.short 10
.short 260
.short 41
.short 262
.short 269
.short 264
.short 10
.short 266
.short 10
.short 268
.short -1
.short -1
.short -1
.short -1
.short -1
.short 41
.short -1
.short -1
.short -1
.short -1
.short 41
.short 41
.short 41
.short 41
.short 41
.short -1
.short 41
.short 41
.short 41
.short 3
.short -1
.short -1
.short 6
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 13
.short -1
.short -1
.short 16
.short 17
.short 18
.short 19
.short 20
.short 21
.short 22
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 124
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 124
.short 124
.short -1
.short -1
.short -1
.short 124
.short 124
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 258
.short -1
.short 260
.short -1
.short 262
.short -1
.short 264
.short -1
.short 266
.short -1
.short 268
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 256
.short -1
.short -1
.short -1
.short 260
.short -1
.short 260
.short -1
.short -1
.short -1
.short -1
.short -1
.short -1
.short 269
.short 270
.short 269
.short 270
.short 258
.short -1
.short 260
.short -1
.short 262
.short -1
.short 264
.short -1
.short 266
.short -1
.short 268
.short -1
.short -1
.short 258
.short 258
.short 260
.short 260
.short 262
.short 262
.short 264
.short 264
.short 266
.short 266
.short 268
.short 268
.type quote_calc2_table, %object
.size quote_calc2_table, 520
quote_calc2_table:
.short 16
.short 15
.short 6
.short 22
.short 6
.short 14
.short 13
.short 7
.short 8
.short 9
.short 13
.short 10
.short 11
.short 12
.short 10
.short 16
.short 15
.short 17
.short 25
.short 18
.short 23
.short 19
.short 4
.short 20
.short 5
.short 21
.short 0
.short 0
.short 0
.short 0
.short 0
.short 16
.short 0
.short 0
.short 0
.short 0
.short 14
.short 13
.short 7
.short 8
.short 9
.short 0
.short 10
.short 11
.short 12
.short 12
.short 0
.short 0
.short 14
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 24
.short 0
.short 0
.short 26
.short 27
.short 28
.short 29
.short 30
.short 31
.short 32
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 22
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 16
.short 15
.short 0
.short 0
.short 0
.short 14
.short 13
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 16
.short 0
.short 17
.short 0
.short 18
.short 0
.short 19
.short 0
.short 20
.short 0
.short 21
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 2
.short 0
.short 0
.short 0
.short 3
.short 0
.short 3
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 4
.short 5
.short 4
.short 11
.short 16
.short 0
.short 17
.short 0
.short 18
.short 0
.short 19
.short 0
.short 20
.short 0
.short 21
.short 0
.short 0
.short 16
.short 15
.short 16
.short 15
.short 16
.short 15
.short 16
.short 15
.short 16
.short 15
.short 16
.short 15
.type quote_calc2_defred, %object
.size quote_calc2_defred, 66
quote_calc2_defred:
.short 1
.short 0
.short 0
.short 0
.short 17
.short 0
.short 0
.short 0
.short 0
.short 0
.short 3
.short 15
.short 0
.short 0
.short 0
.short 2
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 18
.short 0
.short 6
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.space 2
.type quote_calc2_rindex, %object
.size quote_calc2_rindex, 66
quote_calc2_rindex:
.short 0
.short 0
.short 0
.short 0
.short 0
.short -9
.short 0
.short 0
.short 12
.short -10
.short 0
.short 0
.short -5
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 0
.short 14
.short 0
.short -3
.short -2
.short -1
.short 1
.short 2
.short 3
.short -4
.space 2
.type quote_calc2_len, %object
.size quote_calc2_len, 38
quote_calc2_len:
.short 2
.short 0
.short 3
.short 3
.short 1
.short 3
.short 3
.short 3
.short 3
.short 3
.short 3
.short 3
.short 3
.short 3
.short 2
.short 1
.short 1
.short 1
.short 2
.space 2
.type quote_calc2_lhs, %object
.size quote_calc2_lhs, 38
quote_calc2_lhs:
.short -1
.short 0
.short 0
.short 0
.short 1
.short 1
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 2
.short 3
.short 3
.space 2
.type quote_calc2_gindex, %object
.size quote_calc2_gindex, 8
quote_calc2_gindex:
.short 0
.short 0
.short 42
.short 0
.type quote_calc2_dgoto, %object
.size quote_calc2_dgoto, 8
quote_calc2_dgoto:
.short 1
.short 7
.short 8
.short 9
.bss
.align 2
.set .LANCHOR0,. + 0
.type yystack, %object
.size yystack, 24
yystack:
.space 24
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "10011.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%s"
.LC2:
.string "Case %d: "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rdi, .LC0[rip]
lea r13, .LC1[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12d, 1
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 136
.cfi_def_cfa_offset 176
mov rax, QWORD PTR fs:40
mov QWORD PTR 120[rsp], rax
xor eax, eax
lea rsi, 12[rsp]
lea rbp, 16[rsp]
call __isoc99_scanf@PLT
mov eax, DWORD PTR 12[rsp]
test eax, eax
jle .L4
.p2align 4,,10
.p2align 3
.L2:
mov rsi, rbp
mov rdi, r13
xor eax, eax
mov ebx, 1
call __isoc99_scanf@PLT
mov edi, 1
mov edx, r12d
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
movsx edi, BYTE PTR 16[rsp]
test dil, dil
jne .L3
jmp .L7
.p2align 4,,10
.p2align 3
.L5:
add rbx, 1
.L3:
call putchar@PLT
movsx edi, BYTE PTR 0[rbp+rbx]
test dil, dil
je .L7
cmp dil, 115
je .L5
cmp ebx, 4
jne .L5
mov edi, 115
call putchar@PLT
movsx edi, BYTE PTR 0[rbp+rbx]
jmp .L5
.p2align 4,,10
.p2align 3
.L7:
mov edi, 10
add r12d, 1
call putchar@PLT
cmp DWORD PTR 12[rsp], r12d
jge .L2
.L4:
mov rax, QWORD PTR 120[rsp]
sub rax, QWORD PTR fs:40
jne .L24
add rsp, 136
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L24:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "10011.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%s\000"
.align 2
.LC2:
.ascii "Case %d: \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r3, .L21
sub sp, sp, #116
ldr r0, .L21+4
add r1, sp, #4
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
bl __isoc99_scanf
ldr r3, [sp, #4]
cmp r3, #0
ble .L5
mov r5, #1
ldr r8, .L21+8
ldr r7, .L21+12
add r6, sp, #8
.L2:
mov r1, r6
mov r0, r8
bl __isoc99_scanf
mov r2, r5
mov r1, r7
mov r0, #1
bl __printf_chk
ldrb r0, [sp, #8] @ zero_extendqisi2
cmp r0, #0
beq .L3
mvn r4, r6
add r9, sp, #9
.L4:
bl putchar
ldrb r0, [r9], #1 @ zero_extendqisi2
cmp r0, #0
beq .L3
.L7:
add r3, r4, r9
sub r3, r3, #4
clz r3, r3
cmp r0, #115
lsr r3, r3, #5
moveq r3, #0
cmp r3, #0
beq .L4
mov r0, #115
bl putchar
ldrb r0, [r9, #-1] @ zero_extendqisi2
bl putchar
ldrb r0, [r9], #1 @ zero_extendqisi2
cmp r0, #0
bne .L7
.L3:
mov r0, #10
bl putchar
ldr r3, [sp, #4]
add r5, r5, #1
cmp r3, r5
bge .L2
.L5:
ldr r3, .L21
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L20
mov r0, #0
add sp, sp, #116
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L20:
bl __stack_chk_fail
.L22:
.align 2
.L21:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100110.c"
.intel_syntax noprefix
.text
.p2align 4
.globl thread_function2
.type thread_function2, @function
thread_function2:
.LFB12:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
sub rsp, 8
.cfi_def_cfa_offset 16
.p2align 4,,10
.p2align 3
.L2:
mov edi, 1
call sleep@PLT
jmp .L2
.cfi_endproc
.LFE12:
.size thread_function2, .-thread_function2
.p2align 4
.globl thread_function1
.type thread_function1, @function
thread_function1:
.LFB13:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
xor ecx, ecx
lea rdx, thread_function2[rip]
xor esi, esi
lea rdi, child_thread[rip+8]
sub rsp, 8
.cfi_def_cfa_offset 16
call pthread_create@PLT
.p2align 4,,10
.p2align 3
.L6:
mov edi, 1
call sleep@PLT
jmp .L6
.cfi_endproc
.LFE13:
.size thread_function1, .-thread_function1
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB14:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edi, 300
call alarm@PLT
xor ecx, ecx
lea rdx, thread_function1[rip]
xor esi, esi
lea rdi, child_thread[rip]
call pthread_create@PLT
mov rdi, QWORD PTR child_thread[rip]
xor esi, esi
call pthread_join@PLT
mov rdi, QWORD PTR child_thread[rip+8]
xor esi, esi
call pthread_join@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE14:
.size main, .-main
.globl child_thread
.bss
.align 16
.type child_thread, @object
.size child_thread, 16
child_thread:
.zero 16
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100110.c"
.text
.align 2
.global thread_function2
.syntax unified
.arm
.fpu softvfp
.type thread_function2, %function
thread_function2:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
.L2:
mov r0, #1
bl sleep
b .L2
.size thread_function2, .-thread_function2
.align 2
.global thread_function1
.syntax unified
.arm
.fpu softvfp
.type thread_function1, %function
thread_function1:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
push {r4, lr}
mov r1, r3
ldr r2, .L8
ldr r0, .L8+4
bl pthread_create
.L6:
mov r0, #1
bl sleep
b .L6
.L9:
.align 2
.L8:
.word thread_function2
.word child_thread+4
.size thread_function1, .-thread_function1
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r0, #300
bl alarm
mov r3, #0
ldr r4, .L12
mov r1, r3
ldr r2, .L12+4
mov r0, r4
bl pthread_create
mov r1, #0
ldr r0, [r4]
bl pthread_join
mov r1, #0
ldr r0, [r4, #4]
bl pthread_join
mov r0, #0
pop {r4, pc}
.L13:
.align 2
.L12:
.word child_thread
.word thread_function1
.size main, .-main
.comm child_thread,8,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100111.c"
.intel_syntax noprefix
.text
.p2align 4
.globl fopen64
.type fopen64, @function
fopen64:
.LFB23:
.cfi_startproc
endbr64
jmp fopen@PLT
.cfi_endproc
.LFE23:
.size fopen64, .-fopen64
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100111.c"
.text
.align 2
.global fopen64
.syntax unified
.arm
.fpu softvfp
.type fopen64, %function
fopen64:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b fopen
.size fopen64, .-fopen64
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001115.c"
.intel_syntax noprefix
.text
.p2align 4
.globl __VERIFIER_nondet_bool
.type __VERIFIER_nondet_bool, @function
__VERIFIER_nondet_bool:
.LFB0:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call __VERIFIER_nondet_int@PLT
test eax, eax
setne al
add rsp, 8
.cfi_def_cfa_offset 8
movzx eax, al
ret
.cfi_endproc
.LFE0:
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 392
.cfi_def_cfa_offset 448
call __VERIFIER_nondet_int@PLT
mov r15d, eax
call __VERIFIER_nondet_int@PLT
test eax, eax
setne r12b
setne r13b
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 128[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 216[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 136[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 224[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movd ebx, xmm0
call __VERIFIER_nondet_float@PLT
movd ebp, xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 232[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR [rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 152[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 240[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 160[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 248[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 256[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 144[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 264[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 272[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 280[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 288[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 296[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 304[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 312[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 320[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 168[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 328[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 120[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 208[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 336[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movd r14d, xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 344[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 192[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 352[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss xmm1, DWORD PTR [rsp]
movss DWORD PTR 364[rsp], xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 152[rsp]
cvtss2sd xmm1, xmm1
subsd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
movsd xmm1, QWORD PTR .LC0[rip]
comisd xmm1, xmm0
jb .L5
movd xmm7, ebp
pxor xmm1, xmm1
movd xmm6, ebx
movzx r13d, r13b
pxor xmm5, xmm5
cvtss2sd xmm1, xmm7
movsd QWORD PTR 184[rsp], xmm1
cvtss2sd xmm5, xmm6
subsd xmm1, xmm5
comisd xmm1, QWORD PTR .LC1[rip]
movsd QWORD PTR 176[rsp], xmm5
jnb .L1217
.L7:
test r15d, r15d
js .L5
.p2align 4,,10
.p2align 3
.L560:
movsd xmm7, QWORD PTR 184[rsp]
movsd xmm6, QWORD PTR 176[rsp]
movsd QWORD PTR 200[rsp], xmm7
subsd xmm7, xmm6
comisd xmm7, QWORD PTR .LC1[rip]
movsd QWORD PTR 368[rsp], xmm6
jb .L9
pxor xmm0, xmm0
pxor xmm1, xmm1
cvtss2sd xmm0, DWORD PTR 136[rsp]
cvtss2sd xmm1, DWORD PTR 128[rsp]
subsd xmm0, xmm1
comisd xmm0, QWORD PTR .LC2[rip]
jb .L9
sub r15d, 1
test r13b, 1
jne .L13
.L9:
call __VERIFIER_nondet_int@PLT
mov r15d, eax
.L13:
call __VERIFIER_nondet_int@PLT
xor r12d, r12d
test eax, eax
mov ebp, eax
setne r12b
call __VERIFIER_nondet_float@PLT
movd ebx, xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 16[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 20[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 24[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 376[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 380[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 28[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 32[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 36[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 40[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 44[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 48[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 52[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 56[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 60[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 64[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 68[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 72[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 76[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 80[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 84[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 88[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 92[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 96[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 100[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 104[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 8[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 108[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 112[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 116[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss DWORD PTR 360[rsp], xmm0
call __VERIFIER_nondet_float@PLT
movss xmm15, DWORD PTR 8[rsp]
movsd xmm1, QWORD PTR [rsp]
movaps xmm14, xmm0
pxor xmm0, xmm0
movsd xmm5, QWORD PTR .LC3[rip]
cvtss2sd xmm0, xmm15
subsd xmm1, xmm0
comisd xmm5, xmm1
jb .L5
pxor xmm11, xmm11
movsd xmm7, QWORD PTR .LC4[rip]
cvtss2sd xmm11, DWORD PTR 120[rsp]
movapd xmm2, xmm11
subsd xmm2, xmm0
comisd xmm7, xmm2
jb .L5
pxor xmm13, xmm13
movsd xmm6, QWORD PTR .LC5[rip]
cvtss2sd xmm13, DWORD PTR 144[rsp]
movapd xmm3, xmm13
subsd xmm3, xmm0
comisd xmm6, xmm3
jb .L5
pxor xmm12, xmm12
movsd xmm7, QWORD PTR .LC6[rip]
cvtss2sd xmm12, DWORD PTR 160[rsp]
movapd xmm4, xmm12
subsd xmm4, xmm0
comisd xmm7, xmm4
jb .L5
pxor xmm10, xmm10
movsd xmm7, QWORD PTR .LC1[rip]
cvtss2sd xmm10, DWORD PTR 168[rsp]
movapd xmm5, xmm10
subsd xmm5, xmm0
comisd xmm7, xmm5
jb .L5
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR 128[rsp]
movapd xmm6, xmm7
movq rsi, xmm7
movsd xmm7, QWORD PTR .LC7[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm8, QWORD PTR .LC6[rip]
pxor xmm7, xmm7
cvtss2sd xmm7, DWORD PTR 192[rsp]
movq r9, xmm7
subsd xmm7, xmm0
comisd xmm8, xmm7
jb .L5
movd xmm9, r14d
cvtss2sd xmm9, xmm9
movapd xmm8, xmm9
movsd QWORD PTR 8[rsp], xmm9
movsd xmm9, QWORD PTR .LC5[rip]
subsd xmm8, xmm0
movsd QWORD PTR 144[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm8, QWORD PTR .LC8[rip]
pxor xmm9, xmm9
cvtss2sd xmm9, DWORD PTR 208[rsp]
movsd QWORD PTR 120[rsp], xmm9
subsd xmm9, xmm0
movsd QWORD PTR 160[rsp], xmm9
comisd xmm8, xmm9
jb .L5
movsd xmm9, QWORD PTR .LC1[rip]
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 328[rsp]
movsd QWORD PTR 328[rsp], xmm8
subsd xmm8, xmm0
movsd QWORD PTR 168[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC4[rip]
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 256[rsp]
movq rdx, xmm8
subsd xmm8, xmm0
movsd QWORD PTR 192[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC9[rip]
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 136[rsp]
movsd QWORD PTR 256[rsp], xmm8
subsd xmm8, xmm0
movsd QWORD PTR 136[rsp], xmm8
comisd xmm9, xmm8
jb .L5
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 304[rsp]
movq r8, xmm8
subsd xmm8, xmm0
movsd QWORD PTR 208[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC1[rip]
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 280[rsp]
movsd QWORD PTR 128[rsp], xmm8
subsd xmm8, xmm0
movsd QWORD PTR 304[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC10[rip]
pxor xmm8, xmm8
cvtss2sd xmm8, DWORD PTR 336[rsp]
movsd QWORD PTR 280[rsp], xmm8
subsd xmm8, xmm0
movsd QWORD PTR 336[rsp], xmm8
comisd xmm9, xmm8
jb .L5
movsd xmm8, QWORD PTR 184[rsp]
movsd xmm9, QWORD PTR .LC11[rip]
subsd xmm8, xmm0
comisd xmm9, xmm8
movapd xmm0, xmm8
jb .L5
ucomisd xmm2, QWORD PTR .LC4[rip]
mov r14d, 0
movsd xmm2, QWORD PTR 160[rsp]
movsd xmm8, QWORD PTR 168[rsp]
setnp r11b
cmovne r11d, r14d
ucomisd xmm1, QWORD PTR .LC3[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm3, QWORD PTR .LC5[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 304[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm5, QWORD PTR .LC1[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC7[rip]
movsd xmm6, QWORD PTR 144[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm7, QWORD PTR .LC6[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC5[rip]
movsd xmm6, QWORD PTR 192[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC8[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm8, QWORD PTR .LC1[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC4[rip]
movsd xmm6, QWORD PTR 136[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC9[rip]
movsd xmm6, QWORD PTR 208[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC9[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm4, QWORD PTR .LC1[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC10[rip]
setnp r10b
cmovne r10d, r14d
or r10b, r11b
jne .L582
ucomisd xmm0, xmm9
setnp r11b
cmove r10d, r11d
test r10b, r10b
je .L5
.L582:
movsd xmm2, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm4, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 380[rsp]
movsd QWORD PTR 184[rsp], xmm0
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm1, xmm12
movsd xmm5, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 168[rsp], xmm1
comisd xmm5, xmm1
jb .L5
movq xmm3, rsi
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm3, xmm0
movsd QWORD PTR 192[rsp], xmm3
comisd xmm6, xmm3
jb .L5
pxor xmm4, xmm4
movsd xmm5, QWORD PTR .LC2[rip]
cvtss2sd xmm4, DWORD PTR 352[rsp]
movsd QWORD PTR 144[rsp], xmm4
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
pxor xmm5, xmm5
movsd xmm6, QWORD PTR .LC2[rip]
cvtss2sd xmm5, DWORD PTR 232[rsp]
movq rdi, xmm5
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 176[rsp]
movsd xmm7, QWORD PTR .LC8[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
pxor xmm7, xmm7
movsd xmm1, QWORD PTR .LC9[rip]
cvtss2sd xmm7, DWORD PTR 344[rsp]
movsd QWORD PTR 136[rsp], xmm7
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR .LC1[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC12[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
pxor xmm1, xmm1
movsd xmm3, QWORD PTR .LC13[rip]
cvtss2sd xmm1, DWORD PTR 224[rsp]
movsd QWORD PTR 304[rsp], xmm1
subsd xmm1, xmm0
movsd QWORD PTR 208[rsp], xmm1
comisd xmm3, xmm1
jb .L5
pxor xmm1, xmm1
movsd xmm3, QWORD PTR .LC14[rip]
cvtss2sd xmm1, DWORD PTR 248[rsp]
movsd QWORD PTR 224[rsp], xmm1
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
pxor xmm1, xmm1
movsd xmm3, QWORD PTR .LC11[rip]
cvtss2sd xmm1, DWORD PTR 320[rsp]
movsd QWORD PTR 248[rsp], xmm1
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
pxor xmm1, xmm1
movsd xmm3, QWORD PTR .LC15[rip]
cvtss2sd xmm1, DWORD PTR 288[rsp]
movsd QWORD PTR 232[rsp], xmm1
subsd xmm1, xmm0
movsd QWORD PTR 288[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
movsd QWORD PTR 352[rsp], xmm1
comisd xmm3, xmm1
jb .L5
pxor xmm1, xmm1
movsd xmm3, QWORD PTR .LC6[rip]
cvtss2sd xmm1, DWORD PTR 264[rsp]
movsd QWORD PTR 160[rsp], xmm1
subsd xmm1, xmm0
comisd xmm3, xmm1
movapd xmm0, xmm1
jb .L5
movsd xmm3, QWORD PTR 168[rsp]
mov r14d, 0
ucomisd xmm3, QWORD PTR .LC13[rip]
movsd xmm1, QWORD PTR 208[rsp]
setnp r11b
cmovne r11d, r14d
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 192[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC6[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm4, QWORD PTR .LC2[rip]
movsd xmm4, QWORD PTR 336[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm5, QWORD PTR .LC2[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC8[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm8, QWORD PTR .LC1[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm1, QWORD PTR .LC13[rip]
movsd xmm1, QWORD PTR 320[rsp]
setnp r10b
cmovne r10d, r14d
or r10d, r11d
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp r11b
cmovne r11d, r14d
or r11d, r10d
ucomisd xmm1, QWORD PTR .LC11[rip]
movsd xmm1, QWORD PTR 288[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC8[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm1, QWORD PTR .LC15[rip]
movsd xmm1, QWORD PTR 352[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm1, QWORD PTR .LC9[rip]
setnp r10b
cmovne r10d, r14d
or r10b, r11b
jne .L599
ucomisd xmm0, QWORD PTR .LC6[rip]
setnp r11b
cmove r10d, r11d
test r10b, r10b
je .L5
.L599:
pxor xmm1, xmm1
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC15[rip]
cvtss2sd xmm1, DWORD PTR 60[rsp]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
pxor xmm4, xmm4
movsd xmm5, QWORD PTR .LC14[rip]
cvtss2sd xmm4, DWORD PTR 364[rsp]
movsd QWORD PTR 288[rsp], xmm4
subsd xmm4, xmm1
movsd QWORD PTR 208[rsp], xmm4
comisd xmm5, xmm4
jb .L5
movapd xmm3, xmm10
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm3, xmm1
movsd QWORD PTR 320[rsp], xmm3
comisd xmm6, xmm3
jb .L5
movq xmm5, rsi
subsd xmm5, xmm1
movapd xmm4, xmm5
movsd xmm5, QWORD PTR .LC6[rip]
comisd xmm5, xmm4
jb .L5
pxor xmm6, xmm6
cvtss2sd xmm6, DWORD PTR 296[rsp]
movsd QWORD PTR 168[rsp], xmm6
subsd xmm6, xmm1
movapd xmm5, xmm6
movsd xmm6, QWORD PTR .LC17[rip]
comisd xmm6, xmm5
jb .L5
movq xmm6, r9
movsd xmm7, QWORD PTR .LC14[rip]
subsd xmm6, xmm1
movsd QWORD PTR 296[rsp], xmm6
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 136[rsp]
subsd xmm7, xmm1
movapd xmm6, xmm7
movsd xmm7, QWORD PTR .LC5[rip]
comisd xmm7, xmm6
jb .L5
pxor xmm7, xmm7
movsd xmm0, QWORD PTR .LC3[rip]
cvtss2sd xmm7, DWORD PTR 272[rsp]
movsd QWORD PTR 264[rsp], xmm7
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movq xmm8, rdx
movsd xmm0, QWORD PTR .LC10[rip]
subsd xmm8, xmm1
comisd xmm0, xmm8
jb .L5
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 216[rsp]
movq rcx, xmm0
subsd xmm0, xmm1
movapd xmm9, xmm0
movsd xmm0, QWORD PTR .LC15[rip]
comisd xmm0, xmm9
jb .L5
movsd xmm0, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 216[rsp], xmm0
comisd xmm3, xmm0
jb .L5
pxor xmm0, xmm0
movsd xmm3, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 240[rsp]
movsd QWORD PTR 192[rsp], xmm0
subsd xmm0, xmm1
movsd QWORD PTR 240[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm0, xmm1
movsd QWORD PTR 272[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm0, xmm1
movsd QWORD PTR 336[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 344[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
comisd xmm3, xmm0
jb .L5
movsd xmm1, QWORD PTR 208[rsp]
mov r14d, 0
ucomisd xmm1, QWORD PTR .LC14[rip]
setnp r11b
cmovne r11d, r14d
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 216[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 344[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm5, QWORD PTR .LC17[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r10b
cmovne r10d, r14d
or r10d, r11d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r11b
cmovne r11d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC5[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm7, QWORD PTR .LC3[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm8, QWORD PTR .LC10[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm9, QWORD PTR .LC15[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC12[rip]
movsd xmm6, QWORD PTR 272[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC16[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm6, QWORD PTR .LC17[rip]
setnp r10b
cmovne r10d, r14d
or r11d, r10d
ucomisd xmm4, QWORD PTR .LC4[rip]
setnp r10b
cmovne r10d, r14d
or r10b, r11b
jne .L616
ucomisd xmm0, xmm3
setnp r11b
cmove r10d, r11d
test r10b, r10b
je .L5
.L616:
movsd xmm3, QWORD PTR 288[rsp]
pxor xmm1, xmm1
movsd xmm2, QWORD PTR .LC15[rip]
cvtss2sd xmm1, DWORD PTR 68[rsp]
subsd xmm3, xmm1
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm12
movsd xmm4, QWORD PTR .LC9[rip]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
movq xmm4, rdi
movsd xmm5, QWORD PTR .LC18[rip]
subsd xmm4, xmm1
comisd xmm5, xmm4
jb .L5
pxor xmm5, xmm5
movsd xmm6, QWORD PTR .LC13[rip]
cvtss2sd xmm5, DWORD PTR 312[rsp]
movsd QWORD PTR 208[rsp], xmm5
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
pxor xmm6, xmm6
movsd xmm7, QWORD PTR .LC10[rip]
cvtss2sd xmm6, DWORD PTR 152[rsp]
movq r10, xmm6
subsd xmm6, xmm1
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm0, QWORD PTR .LC12[rip]
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movq xmm8, r9
movsd xmm0, QWORD PTR .LC6[rip]
subsd xmm8, xmm1
comisd xmm0, xmm8
jb .L5
movsd xmm9, QWORD PTR 8[rsp]
movsd xmm0, QWORD PTR .LC1[rip]
subsd xmm9, xmm1
comisd xmm0, xmm9
jb .L5
movsd xmm0, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
movsd QWORD PTR 152[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, rdx
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm0, xmm1
movsd QWORD PTR 240[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm0, xmm1
movsd QWORD PTR 272[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 296[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, r8
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm0, xmm1
movsd QWORD PTR 312[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm0, xmm1
movsd QWORD PTR 320[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm0, xmm1
movsd QWORD PTR 336[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm0, xmm1
comisd xmm3, xmm0
jb .L5
ucomisd xmm2, QWORD PTR .LC9[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 152[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC10[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC12[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L633
ucomisd xmm0, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L633:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC16[rip]
cvtss2sd xmm0, DWORD PTR 72[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 152[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC6[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movq xmm5, rsi
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 144[rsp]
movsd xmm7, QWORD PTR .LC18[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 264[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 216[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC12[rip]
mov eax, 0
movsd xmm2, QWORD PTR 152[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
movsd xmm6, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC10[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC5[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC2[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L650
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L650:
pxor xmm0, xmm0
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 80[rsp]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm13
movsd xmm5, QWORD PTR .LC14[rip]
subsd xmm4, xmm0
movsd QWORD PTR 152[rsp], xmm4
comisd xmm5, xmm4
jb .L5
movapd xmm6, xmm12
subsd xmm6, xmm0
movsd QWORD PTR 216[rsp], xmm6
comisd xmm5, xmm6
jb .L5
movapd xmm3, xmm10
movsd xmm7, QWORD PTR .LC3[rip]
subsd xmm3, xmm0
movsd QWORD PTR 240[rsp], xmm3
comisd xmm7, xmm3
jb .L5
movq xmm5, rsi
subsd xmm5, xmm0
movapd xmm4, xmm5
movsd xmm5, QWORD PTR .LC2[rip]
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 144[rsp]
movsd xmm7, QWORD PTR .LC18[rip]
subsd xmm5, xmm0
comisd xmm7, xmm5
jb .L5
movsd xmm7, QWORD PTR 176[rsp]
subsd xmm7, xmm0
movapd xmm6, xmm7
movsd xmm7, QWORD PTR .LC13[rip]
comisd xmm7, xmm6
jb .L5
movq xmm7, r9
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, rdx
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movq xmm9, rcx
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
movsd xmm0, QWORD PTR 152[rsp]
mov eax, 0
ucomisd xmm0, QWORD PTR .LC14[rip]
movsd xmm0, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 240[rsp]
mov r14d, r11d
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm0, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC3[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC2[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC13[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, xmm3
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L667
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L667:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC19[rip]
cvtss2sd xmm0, DWORD PTR 40[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 152[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 288[rsp]
movsd xmm6, QWORD PTR .LC13[rip]
subsd xmm4, xmm0
comisd xmm6, xmm4
jb .L5
movapd xmm5, xmm12
movsd xmm6, QWORD PTR .LC1[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm7, rsi
movsd xmm6, QWORD PTR .LC14[rip]
subsd xmm7, xmm0
movsd QWORD PTR 216[rsp], xmm7
comisd xmm6, xmm7
jb .L5
movsd xmm6, QWORD PTR 144[rsp]
movsd xmm1, QWORD PTR .LC11[rip]
subsd xmm6, xmm0
comisd xmm1, xmm6
jb .L5
movq xmm1, rdi
subsd xmm1, xmm0
movapd xmm7, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
comisd xmm1, xmm7
jb .L5
movq xmm8, r10
movsd xmm1, QWORD PTR .LC8[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC2[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 136[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC19[rip]
mov eax, 0
movsd xmm2, QWORD PTR 152[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC19[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC13[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC1[rip]
movsd xmm5, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC11[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC11[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC13[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, xmm3
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L684
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L684:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC20[rip]
cvtss2sd xmm0, DWORD PTR 88[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 152[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 288[rsp]
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC15[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC2[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, rdi
movsd xmm7, QWORD PTR .LC9[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 208[rsp]
movsd xmm1, QWORD PTR .LC8[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 168[rsp]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC14[rip]
movq xmm1, r9
subsd xmm1, xmm0
movsd QWORD PTR 216[rsp], xmm1
comisd xmm9, xmm1
jb .L5
movsd xmm9, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC13[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC4[rip]
mov eax, 0
movsd xmm2, QWORD PTR 152[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC20[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC15[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC2[rip]
movsd xmm5, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC9[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, xmm3
movsd xmm7, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, xmm3
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L701
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L701:
pxor xmm0, xmm0
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC7[rip]
cvtss2sd xmm0, DWORD PTR 48[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 152[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm4, QWORD PTR .LC20[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm10
movsd xmm5, QWORD PTR .LC6[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movq xmm5, rsi
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, rdi
movsd xmm7, QWORD PTR .LC8[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movq xmm7, r9
movsd xmm1, QWORD PTR .LC8[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 304[rsp]
movsd xmm1, QWORD PTR .LC17[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 216[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC20[rip]
mov eax, 0
movsd xmm2, QWORD PTR 152[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, xmm3
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC8[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC8[rip]
movsd xmm7, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC18[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC3[rip]
movsd xmm6, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC2[rip]
movsd xmm4, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC10[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L718
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L718:
movsd xmm7, QWORD PTR [rsp]
pxor xmm4, xmm4
movsd xmm2, QWORD PTR .LC15[rip]
cvtss2sd xmm4, DWORD PTR 20[rsp]
movapd xmm0, xmm4
subsd xmm7, xmm4
movsd QWORD PTR 216[rsp], xmm7
comisd xmm2, xmm7
jb .L5
movapd xmm2, xmm13
movsd xmm5, QWORD PTR .LC11[rip]
subsd xmm2, xmm4
movsd QWORD PTR 240[rsp], xmm2
comisd xmm5, xmm2
jb .L5
movapd xmm6, xmm10
movsd xmm5, QWORD PTR .LC4[rip]
subsd xmm6, xmm4
movsd QWORD PTR 272[rsp], xmm6
comisd xmm5, xmm6
jb .L5
movq xmm5, rsi
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm5, xmm4
movsd QWORD PTR 296[rsp], xmm5
comisd xmm3, xmm5
jb .L5
movq xmm1, rdi
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm4
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm9, QWORD PTR 176[rsp]
subsd xmm9, xmm4
movsd xmm4, QWORD PTR .LC12[rip]
comisd xmm4, xmm9
jb .L5
movsd xmm8, QWORD PTR 208[rsp]
movsd xmm4, QWORD PTR .LC8[rip]
subsd xmm8, xmm0
comisd xmm4, xmm8
jb .L5
movsd xmm4, QWORD PTR 168[rsp]
subsd xmm4, xmm0
movapd xmm7, xmm4
movsd xmm4, QWORD PTR .LC18[rip]
comisd xmm4, xmm7
jb .L5
movq xmm4, r9
subsd xmm4, xmm0
movapd xmm6, xmm4
movsd xmm4, QWORD PTR .LC11[rip]
comisd xmm4, xmm6
jb .L5
movsd xmm4, QWORD PTR 120[rsp]
subsd xmm4, xmm0
movapd xmm5, xmm4
movsd xmm4, QWORD PTR .LC13[rip]
comisd xmm4, xmm5
jb .L5
movsd xmm4, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm4, xmm0
comisd xmm3, xmm4
jb .L5
movsd xmm3, QWORD PTR 328[rsp]
subsd xmm3, xmm0
movapd xmm2, xmm3
movsd xmm3, QWORD PTR .LC20[rip]
movsd QWORD PTR 320[rsp], xmm2
comisd xmm3, xmm2
jb .L5
movsd xmm2, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm2, xmm0
comisd xmm3, xmm2
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
movsd xmm3, QWORD PTR 280[rsp]
movsd QWORD PTR 152[rsp], xmm0
subsd xmm3, xmm0
movapd xmm0, xmm3
movsd xmm3, QWORD PTR .LC8[rip]
movsd QWORD PTR 336[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm0, QWORD PTR 152[rsp]
movsd QWORD PTR 344[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 240[rsp]
mov eax, 0
ucomisd xmm0, QWORD PTR .LC11[rip]
movsd xmm3, QWORD PTR 216[rsp]
movsd xmm0, QWORD PTR 272[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm3, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm0, QWORD PTR .LC4[rip]
movsd xmm0, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm0, QWORD PTR .LC11[rip]
movsd xmm0, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm0, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC11[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC5[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm1, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L735
movsd xmm0, QWORD PTR 344[rsp]
ucomisd xmm0, QWORD PTR .LC14[rip]
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L735:
pxor xmm0, xmm0
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC16[rip]
cvtss2sd xmm0, DWORD PTR 16[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 144[rsp]
movsd xmm6, QWORD PTR .LC13[rip]
subsd xmm2, xmm0
comisd xmm6, xmm2
jb .L5
movsd xmm4, QWORD PTR 176[rsp]
movsd xmm7, QWORD PTR .LC12[rip]
subsd xmm4, xmm0
comisd xmm7, xmm4
jb .L5
movsd xmm5, QWORD PTR 208[rsp]
movsd xmm6, QWORD PTR .LC5[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, r10
movsd xmm7, QWORD PTR .LC18[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC13[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR .LC18[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR .LC14[rip]
movsd xmm1, QWORD PTR 120[rsp]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm9, xmm1
jb .L5
movsd xmm9, QWORD PTR 328[rsp]
movsd xmm1, QWORD PTR .LC9[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC13[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC12[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC5[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
movsd xmm6, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC13[rip]
movsd xmm7, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, xmm3
movsd xmm4, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC15[rip]
movsd xmm7, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC10[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L752
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L752:
pxor xmm0, xmm0
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC15[rip]
cvtss2sd xmm0, DWORD PTR 52[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 288[rsp]
movsd xmm5, QWORD PTR .LC7[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm12
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC17[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 144[rsp]
movsd xmm1, QWORD PTR .LC11[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, rdi
movsd xmm1, QWORD PTR .LC3[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movq xmm9, r10
movsd xmm1, QWORD PTR .LC2[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC19[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, xmm3
movsd xmm2, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC11[rip]
movsd xmm7, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
movsd xmm6, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC7[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L769
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L769:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC16[rip]
cvtss2sd xmm0, DWORD PTR 96[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 288[rsp]
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC16[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC4[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 144[rsp]
movsd xmm7, QWORD PTR .LC18[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movq xmm7, rdi
movsd xmm1, QWORD PTR .LC14[rip]
subsd xmm7, xmm0
movsd QWORD PTR 240[rsp], xmm7
comisd xmm1, xmm7
jb .L5
movsd xmm1, QWORD PTR 208[rsp]
subsd xmm1, xmm0
movapd xmm7, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
comisd xmm1, xmm7
jb .L5
movq xmm8, r10
movsd xmm1, QWORD PTR .LC7[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC17[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC16[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
movsd xmm6, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC1[rip]
movsd xmm7, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC17[rip]
movsd xmm4, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC1[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L786
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L786:
pxor xmm0, xmm0
movapd xmm3, xmm12
movsd xmm2, QWORD PTR .LC11[rip]
cvtss2sd xmm0, DWORD PTR 64[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movq xmm2, rdi
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 208[rsp]
movsd xmm5, QWORD PTR .LC17[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 168[rsp]
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 136[rsp]
movsd xmm7, QWORD PTR .LC13[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm7, xmm0
comisd xmm3, xmm7
jb .L5
movsd xmm8, QWORD PTR 304[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm8, xmm0
comisd xmm3, xmm8
jb .L5
movsd xmm9, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm9, xmm0
comisd xmm3, xmm9
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm3, QWORD PTR 280[rsp]
subsd xmm3, xmm0
movapd xmm1, xmm3
movsd xmm3, QWORD PTR .LC16[rip]
comisd xmm3, xmm1
jb .L5
movsd xmm3, QWORD PTR 200[rsp]
subsd xmm3, xmm0
movapd xmm0, xmm3
movsd xmm3, QWORD PTR .LC14[rip]
comisd xmm3, xmm0
jb .L5
ucomisd xmm2, QWORD PTR .LC3[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC11[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC17[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC16[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC13[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC17[rip]
movsd xmm7, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, xmm3
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC19[rip]
movsd xmm7, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm1, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L803
ucomisd xmm0, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L803:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC15[rip]
cvtss2sd xmm0, DWORD PTR 24[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm4, QWORD PTR .LC4[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC9[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC10[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, r10
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC16[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, r9
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC6[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 304[rsp]
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC4[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC9[rip]
movsd xmm4, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC10[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC1[rip]
movsd xmm6, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC16[rip]
movsd xmm7, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC16[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
movsd xmm4, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC7[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L820
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L820:
pxor xmm0, xmm0
movapd xmm3, xmm13
movsd xmm2, QWORD PTR .LC9[rip]
cvtss2sd xmm0, DWORD PTR 104[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm12
movsd xmm4, QWORD PTR .LC20[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm10
movsd xmm5, QWORD PTR .LC16[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 144[rsp]
movsd xmm6, QWORD PTR .LC11[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 176[rsp]
movsd xmm7, QWORD PTR .LC5[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, r9
movsd xmm1, QWORD PTR .LC15[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC18[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 304[rsp]
movsd xmm3, QWORD PTR .LC6[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC20[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC5[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC19[rip]
movsd xmm7, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC6[rip]
movsd xmm7, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC5[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
movsd xmm6, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm3
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L837
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L837:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC2[rip]
cvtss2sd xmm0, DWORD PTR 108[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC13[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 288[rsp]
movsd xmm5, QWORD PTR .LC4[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm12
movsd xmm6, QWORD PTR .LC15[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, rdi
movsd xmm7, QWORD PTR .LC2[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 176[rsp]
movsd xmm1, QWORD PTR .LC9[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC13[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC2[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC4[rip]
movsd xmm4, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC2[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC9[rip]
movsd xmm7, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, xmm3
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC12[rip]
movsd xmm7, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC9[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L854
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L854:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 112[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm11
movsd xmm4, QWORD PTR .LC5[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm13
movsd xmm5, QWORD PTR .LC18[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 288[rsp]
movsd xmm6, QWORD PTR .LC15[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movapd xmm6, xmm10
movsd xmm7, QWORD PTR .LC14[rip]
subsd xmm6, xmm0
movsd QWORD PTR 240[rsp], xmm6
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 208[rsp]
subsd xmm7, xmm0
movapd xmm6, xmm7
movsd xmm7, QWORD PTR .LC16[rip]
comisd xmm7, xmm6
jb .L5
movq xmm7, r10
movsd xmm1, QWORD PTR .LC9[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC17[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 264[rsp]
movsd xmm1, QWORD PTR .LC8[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC5[rip]
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, xmm3
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
movsd xmm4, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC15[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC16[rip]
movsd xmm6, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC9[rip]
movsd xmm7, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm3
movsd xmm6, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC10[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC7[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L871
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L871:
pxor xmm1, xmm1
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC17[rip]
cvtss2sd xmm1, DWORD PTR 116[rsp]
subsd xmm3, xmm1
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC13[rip]
subsd xmm4, xmm1
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC6[rip]
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 176[rsp]
movsd xmm7, QWORD PTR .LC1[rip]
subsd xmm6, xmm1
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 208[rsp]
movsd xmm0, QWORD PTR .LC7[rip]
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movq xmm8, r10
movsd xmm0, QWORD PTR .LC12[rip]
subsd xmm8, xmm1
comisd xmm0, xmm8
jb .L5
movsd xmm9, QWORD PTR 264[rsp]
movsd xmm0, QWORD PTR .LC15[rip]
subsd xmm9, xmm1
comisd xmm0, xmm9
jb .L5
movsd xmm0, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
movsd QWORD PTR 176[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, rdx
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm0, xmm1
movsd QWORD PTR 240[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, rcx
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 272[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm0, xmm1
movsd QWORD PTR 296[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, r8
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm0, xmm1
movsd QWORD PTR 312[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm0, xmm1
movsd QWORD PTR 320[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm0, xmm1
movsd QWORD PTR 336[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm0, xmm1
comisd xmm3, xmm0
jb .L5
ucomisd xmm2, xmm3
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC13[rip]
movsd xmm4, QWORD PTR 176[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC1[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC7[rip]
movsd xmm7, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, xmm3
movsd xmm7, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
movsd xmm2, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L888
ucomisd xmm0, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L888:
pxor xmm0, xmm0
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 76[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 176[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 288[rsp]
movsd xmm4, QWORD PTR .LC16[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm10
movsd xmm5, QWORD PTR .LC6[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 144[rsp]
movsd xmm6, QWORD PTR .LC20[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 208[rsp]
movsd xmm7, QWORD PTR .LC6[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movq xmm7, r10
movsd xmm1, QWORD PTR .LC18[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, r9
movsd xmm1, QWORD PTR .LC15[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC2[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 216[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC16[rip]
mov eax, 0
movsd xmm2, QWORD PTR 176[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, xmm3
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC6[rip]
movsd xmm6, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC18[rip]
movsd xmm7, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC16[rip]
movsd xmm4, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC5[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L905
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L905:
movsd xmm3, QWORD PTR [rsp]
pxor xmm1, xmm1
movsd xmm2, QWORD PTR .LC10[rip]
cvtss2sd xmm1, DWORD PTR 36[rsp]
subsd xmm3, xmm1
movsd QWORD PTR 176[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm12
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 144[rsp]
movsd xmm5, QWORD PTR .LC7[rip]
subsd xmm4, xmm1
comisd xmm5, xmm4
jb .L5
movq xmm5, rdi
movsd xmm6, QWORD PTR .LC4[rip]
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 168[rsp]
movsd xmm7, QWORD PTR .LC19[rip]
subsd xmm6, xmm1
comisd xmm7, xmm6
jb .L5
movq xmm7, r9
movsd xmm0, QWORD PTR .LC9[rip]
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movsd xmm8, QWORD PTR 136[rsp]
subsd xmm8, xmm1
comisd xmm0, xmm8
jb .L5
movsd xmm9, QWORD PTR 8[rsp]
movsd xmm0, QWORD PTR .LC5[rip]
subsd xmm9, xmm1
comisd xmm0, xmm9
jb .L5
movq xmm0, rdx
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm0, xmm1
movsd QWORD PTR 216[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 256[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm0, xmm1
movsd QWORD PTR 240[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 224[rsp]
subsd xmm0, xmm1
movsd QWORD PTR 256[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm0, xmm1
movsd QWORD PTR 272[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movq xmm0, r8
movsd xmm3, QWORD PTR .LC7[rip]
subsd xmm0, xmm1
movsd QWORD PTR 296[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC8[rip]
subsd xmm0, xmm1
movsd QWORD PTR 312[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC16[rip]
subsd xmm0, xmm1
movsd QWORD PTR 320[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
comisd xmm3, xmm0
jb .L5
ucomisd xmm2, QWORD PTR .LC12[rip]
mov eax, 0
movsd xmm2, QWORD PTR 176[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
movsd xmm4, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC19[rip]
movsd xmm6, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC9[rip]
movsd xmm7, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC9[rip]
movsd xmm7, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC11[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L922
ucomisd xmm0, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L922:
movsd xmm2, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm4, QWORD PTR .LC14[rip]
cvtss2sd xmm0, DWORD PTR 84[rsp]
subsd xmm2, xmm0
movsd QWORD PTR 176[rsp], xmm2
comisd xmm4, xmm2
jb .L5
movapd xmm5, xmm12
subsd xmm5, xmm0
movapd xmm2, xmm5
movsd xmm5, QWORD PTR .LC3[rip]
comisd xmm5, xmm2
jb .L5
movq xmm3, rsi
movsd xmm4, QWORD PTR .LC18[rip]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm4, xmm3
jb .L5
movsd xmm4, QWORD PTR 144[rsp]
movsd xmm5, QWORD PTR .LC15[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 208[rsp]
movsd xmm6, QWORD PTR .LC1[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 168[rsp]
movsd xmm7, QWORD PTR .LC7[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movq xmm7, r9
movsd xmm1, QWORD PTR .LC3[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC16[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR .LC8[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 256[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC3[rip]
mov eax, 0
movsd xmm2, QWORD PTR 176[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC18[rip]
movsd xmm2, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC15[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC1[rip]
movsd xmm5, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC7[rip]
movsd xmm6, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC3[rip]
movsd xmm7, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm2, QWORD PTR .LC14[rip]
movsd xmm2, QWORD PTR 296[rsp]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC12[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L939
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L939:
movsd xmm2, QWORD PTR [rsp]
pxor xmm6, xmm6
movsd xmm4, QWORD PTR .LC4[rip]
cvtss2sd xmm6, DWORD PTR 376[rsp]
movapd xmm0, xmm6
movsd QWORD PTR 176[rsp], xmm6
subsd xmm2, xmm6
movsd QWORD PTR 216[rsp], xmm2
comisd xmm4, xmm2
jb .L5
movapd xmm5, xmm13
movsd xmm4, QWORD PTR .LC17[rip]
subsd xmm5, xmm6
movsd QWORD PTR 240[rsp], xmm5
comisd xmm4, xmm5
jb .L5
movq xmm4, rsi
movsd xmm7, QWORD PTR .LC16[rip]
subsd xmm4, xmm6
movsd QWORD PTR 256[rsp], xmm4
comisd xmm7, xmm4
jb .L5
movsd xmm7, QWORD PTR 144[rsp]
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm7, xmm6
movsd QWORD PTR 272[rsp], xmm7
comisd xmm3, xmm7
jb .L5
movq xmm9, rdi
movsd xmm3, QWORD PTR .LC9[rip]
subsd xmm9, xmm6
comisd xmm3, xmm9
jb .L5
movsd xmm8, QWORD PTR 368[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm8, xmm6
comisd xmm3, xmm8
jb .L5
movsd xmm3, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC14[rip]
subsd xmm3, xmm6
movsd QWORD PTR 296[rsp], xmm3
comisd xmm1, xmm3
jb .L5
movsd xmm1, QWORD PTR 136[rsp]
subsd xmm1, xmm6
movapd xmm7, xmm1
movsd xmm1, QWORD PTR .LC5[rip]
comisd xmm1, xmm7
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
subsd xmm1, xmm6
movapd xmm6, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
movsd QWORD PTR 312[rsp], xmm6
comisd xmm1, xmm6
jb .L5
movq xmm1, rdx
subsd xmm1, xmm0
movapd xmm5, xmm1
movsd xmm1, QWORD PTR .LC13[rip]
comisd xmm1, xmm5
jb .L5
movq xmm1, rcx
subsd xmm1, xmm0
movapd xmm4, xmm1
movsd xmm1, QWORD PTR .LC4[rip]
comisd xmm1, xmm4
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
subsd xmm1, xmm0
movapd xmm3, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
comisd xmm1, xmm3
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
subsd xmm1, xmm0
movapd xmm2, xmm1
movsd xmm1, QWORD PTR .LC1[rip]
comisd xmm1, xmm2
jb .L5
movq xmm1, r8
movsd xmm6, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm6, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm6, QWORD PTR .LC16[rip]
subsd xmm1, xmm0
comisd xmm6, xmm1
jb .L5
movsd xmm6, QWORD PTR 128[rsp]
subsd xmm6, xmm0
movapd xmm0, xmm6
movsd xmm6, QWORD PTR .LC15[rip]
comisd xmm6, xmm0
jb .L5
movsd xmm6, QWORD PTR 240[rsp]
mov eax, 0
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm6, QWORD PTR .LC4[rip]
movsd xmm6, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC16[rip]
movsd xmm6, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC12[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm6, QWORD PTR .LC14[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC4[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm3, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm1, QWORD PTR .LC16[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L956
ucomisd xmm0, QWORD PTR .LC15[rip]
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L956:
pxor xmm0, xmm0
movapd xmm3, xmm11
movsd xmm2, QWORD PTR .LC7[rip]
cvtss2sd xmm0, DWORD PTR 28[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 216[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm5, QWORD PTR .LC2[rip]
subsd xmm2, xmm0
comisd xmm5, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC20[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movq xmm5, rsi
movsd xmm7, QWORD PTR .LC19[rip]
subsd xmm5, xmm0
comisd xmm7, xmm5
jb .L5
movq xmm6, rdi
movsd xmm7, QWORD PTR .LC11[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 208[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movq xmm8, r10
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR .LC17[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movq xmm1, r9
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 240[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
movsd QWORD PTR 256[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 328[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rdx
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC10[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, xmm3
mov eax, 0
movsd xmm2, QWORD PTR 216[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC7[rip]
movsd xmm2, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC20[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC19[rip]
movsd xmm5, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC19[rip]
movsd xmm7, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, xmm3
movsd xmm5, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC19[rip]
movsd xmm4, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC13[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC10[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L973
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L973:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC17[rip]
cvtss2sd xmm0, DWORD PTR 360[rsp]
subsd xmm3, xmm0
comisd xmm2, xmm3
jb .L5
movq xmm2, rsi
movsd xmm4, QWORD PTR .LC1[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 144[rsp]
movsd xmm5, QWORD PTR .LC7[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movsd xmm6, QWORD PTR 208[rsp]
movsd xmm5, QWORD PTR .LC14[rip]
subsd xmm6, xmm0
movsd QWORD PTR 216[rsp], xmm6
comisd xmm5, xmm6
jb .L5
movq xmm5, r10
movsd xmm7, QWORD PTR .LC15[rip]
subsd xmm5, xmm0
comisd xmm7, xmm5
jb .L5
movsd xmm7, QWORD PTR 136[rsp]
subsd xmm7, xmm0
movapd xmm6, xmm7
movsd xmm7, QWORD PTR .LC2[rip]
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 304[rsp]
movsd xmm1, QWORD PTR .LC13[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 264[rsp]
movsd xmm1, QWORD PTR .LC16[rip]
subsd xmm8, xmm0
movsd QWORD PTR 240[rsp], xmm8
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 328[rsp]
movsd xmm1, QWORD PTR .LC9[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm8, QWORD PTR .LC20[rip]
movq xmm1, rdx
subsd xmm1, xmm0
movsd QWORD PTR 256[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm1, QWORD PTR 224[rsp]
movsd xmm8, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm8, QWORD PTR .LC3[rip]
movq xmm1, r8
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm8, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm1, QWORD PTR 128[rsp]
movsd xmm8, QWORD PTR .LC9[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm8, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm8, xmm1
jb .L5
movsd xmm1, QWORD PTR 200[rsp]
subsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
comisd xmm0, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC1[rip]
mov eax, 0
movsd xmm2, QWORD PTR 272[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm3, QWORD PTR .LC17[rip]
movsd xmm3, QWORD PTR 216[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC7[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm3, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC15[rip]
movsd xmm5, QWORD PTR 240[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC2[rip]
movsd xmm6, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC13[rip]
movsd xmm7, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC16[rip]
movsd xmm5, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC20[rip]
movsd xmm7, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, xmm8
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, xmm0
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, xmm8
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L990
ucomisd xmm1, xmm0
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L990:
movd xmm6, ebx
pxor xmm4, xmm4
movapd xmm2, xmm10
cvtss2sd xmm4, xmm6
subsd xmm2, xmm4
movsd xmm6, QWORD PTR .LC9[rip]
movsd QWORD PTR 216[rsp], xmm4
movsd QWORD PTR 240[rsp], xmm2
comisd xmm6, xmm2
jb .L5
movq xmm6, rsi
movsd xmm5, QWORD PTR .LC8[rip]
subsd xmm6, xmm4
movsd QWORD PTR 256[rsp], xmm6
comisd xmm5, xmm6
jb .L5
movsd xmm5, QWORD PTR 144[rsp]
movsd xmm7, QWORD PTR .LC20[rip]
subsd xmm5, xmm4
movsd QWORD PTR 272[rsp], xmm5
comisd xmm7, xmm5
jb .L5
movq xmm7, rdi
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm7, xmm4
movsd QWORD PTR 296[rsp], xmm7
comisd xmm3, xmm7
jb .L5
movsd xmm3, QWORD PTR 368[rsp]
movsd xmm1, QWORD PTR .LC2[rip]
subsd xmm3, xmm4
movsd QWORD PTR 312[rsp], xmm3
comisd xmm1, xmm3
jb .L5
movsd xmm9, QWORD PTR 208[rsp]
movsd xmm1, QWORD PTR .LC19[rip]
subsd xmm9, xmm4
comisd xmm1, xmm9
jb .L5
movq xmm8, r10
movsd xmm1, QWORD PTR .LC7[rip]
subsd xmm8, xmm4
comisd xmm1, xmm8
jb .L5
movq xmm1, r9
subsd xmm1, xmm4
movapd xmm7, xmm1
movsd xmm1, QWORD PTR .LC6[rip]
comisd xmm1, xmm7
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
subsd xmm1, xmm4
movapd xmm6, xmm1
movsd xmm1, QWORD PTR .LC17[rip]
comisd xmm1, xmm6
jb .L5
movsd xmm1, QWORD PTR 304[rsp]
movsd xmm0, QWORD PTR .LC14[rip]
subsd xmm1, xmm4
movsd QWORD PTR 320[rsp], xmm1
comisd xmm0, xmm1
jb .L5
movq xmm5, rcx
movsd xmm2, QWORD PTR .LC17[rip]
movapd xmm0, xmm4
subsd xmm5, xmm4
comisd xmm2, xmm5
jb .L5
movsd xmm2, QWORD PTR 224[rsp]
subsd xmm2, xmm4
movapd xmm4, xmm2
movsd xmm2, QWORD PTR .LC9[rip]
movsd QWORD PTR 336[rsp], xmm4
comisd xmm2, xmm4
jb .L5
movsd xmm3, QWORD PTR 248[rsp]
movsd xmm2, QWORD PTR .LC15[rip]
subsd xmm3, xmm0
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 192[rsp]
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm2, xmm0
comisd xmm1, xmm2
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
comisd xmm4, xmm1
jb .L5
movsd xmm4, QWORD PTR 160[rsp]
subsd xmm4, xmm0
movapd xmm0, xmm4
movsd xmm4, QWORD PTR .LC16[rip]
comisd xmm4, xmm0
jb .L5
movsd xmm4, QWORD PTR 256[rsp]
mov eax, 0
ucomisd xmm4, QWORD PTR .LC8[rip]
movsd xmm4, QWORD PTR 240[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm4, QWORD PTR .LC9[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC20[rip]
movsd xmm4, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC20[rip]
movsd xmm4, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC2[rip]
movsd xmm4, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC19[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC7[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm3, QWORD PTR .LC15[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm1, QWORD PTR .LC12[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L1007
ucomisd xmm0, QWORD PTR .LC16[rip]
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L1007:
movsd xmm3, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC10[rip]
cvtss2sd xmm0, DWORD PTR 92[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 240[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm11
movsd xmm6, QWORD PTR .LC2[rip]
subsd xmm2, xmm0
comisd xmm6, xmm2
jb .L5
movsd xmm4, QWORD PTR 288[rsp]
movsd xmm5, QWORD PTR .LC8[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC8[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 144[rsp]
movsd xmm7, QWORD PTR .LC17[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movq xmm7, rdi
movsd xmm1, QWORD PTR .LC5[rip]
subsd xmm7, xmm0
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 368[rsp]
movsd xmm1, QWORD PTR .LC2[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movsd xmm9, QWORD PTR 208[rsp]
movsd xmm1, QWORD PTR .LC18[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movsd xmm1, QWORD PTR 136[rsp]
movsd xmm3, QWORD PTR .LC18[rip]
subsd xmm1, xmm0
movsd QWORD PTR 256[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 304[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC15[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC14[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC2[rip]
mov eax, 0
movsd xmm2, QWORD PTR 240[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC10[rip]
movsd xmm2, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC8[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC8[rip]
movsd xmm5, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC5[rip]
movsd xmm7, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC2[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC18[rip]
movsd xmm2, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC2[rip]
movsd xmm6, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, xmm3
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC5[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC15[rip]
movsd xmm2, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC14[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L1024
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L1024:
movsd xmm3, QWORD PTR 288[rsp]
pxor xmm0, xmm0
movsd xmm2, QWORD PTR .LC12[rip]
cvtss2sd xmm0, DWORD PTR 44[rsp]
subsd xmm3, xmm0
movsd QWORD PTR 240[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movsd xmm2, QWORD PTR 368[rsp]
movsd xmm4, QWORD PTR .LC12[rip]
subsd xmm2, xmm0
comisd xmm4, xmm2
jb .L5
movsd xmm4, QWORD PTR 208[rsp]
movsd xmm5, QWORD PTR .LC10[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movq xmm5, r10
movsd xmm6, QWORD PTR .LC9[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm7, r9
movsd xmm6, QWORD PTR .LC14[rip]
subsd xmm7, xmm0
movsd QWORD PTR 256[rsp], xmm7
comisd xmm6, xmm7
jb .L5
movsd xmm6, QWORD PTR 136[rsp]
movsd xmm1, QWORD PTR .LC17[rip]
subsd xmm6, xmm0
comisd xmm1, xmm6
jb .L5
movsd xmm1, QWORD PTR 8[rsp]
subsd xmm1, xmm0
movapd xmm7, xmm1
movsd xmm1, QWORD PTR .LC18[rip]
comisd xmm1, xmm7
jb .L5
movsd xmm8, QWORD PTR 120[rsp]
movsd xmm1, QWORD PTR .LC20[rip]
subsd xmm8, xmm0
comisd xmm1, xmm8
jb .L5
movq xmm9, rdx
movsd xmm1, QWORD PTR .LC3[rip]
subsd xmm9, xmm0
comisd xmm1, xmm9
jb .L5
movq xmm1, rcx
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 272[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 248[rsp]
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm1, xmm0
movsd QWORD PTR 296[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm1, xmm0
movsd QWORD PTR 312[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movq xmm1, r8
movsd xmm3, QWORD PTR .LC12[rip]
subsd xmm1, xmm0
movsd QWORD PTR 320[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC11[rip]
subsd xmm1, xmm0
movsd QWORD PTR 336[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 280[rsp]
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm1, xmm0
movsd QWORD PTR 344[rsp], xmm1
comisd xmm3, xmm1
jb .L5
movsd xmm1, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm1, xmm0
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC12[rip]
mov eax, 0
movsd xmm2, QWORD PTR 240[rsp]
setnp r14b
cmovne r14d, eax
ucomisd xmm2, QWORD PTR .LC12[rip]
movsd xmm2, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC10[rip]
movsd xmm4, QWORD PTR 256[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC9[rip]
movsd xmm5, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC18[rip]
movsd xmm7, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm8, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC3[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC12[rip]
movsd xmm5, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC20[rip]
movsd xmm7, QWORD PTR 344[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC17[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC12[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC11[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC1[rip]
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L1041
ucomisd xmm1, xmm3
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L1041:
pxor xmm1, xmm1
movapd xmm3, xmm13
movsd xmm2, QWORD PTR .LC10[rip]
cvtss2sd xmm1, xmm14
subsd xmm3, xmm1
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm10
movsd xmm4, QWORD PTR .LC3[rip]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
movq xmm4, rdi
movsd xmm5, QWORD PTR .LC14[rip]
subsd xmm4, xmm1
movsd QWORD PTR 240[rsp], xmm4
comisd xmm5, xmm4
jb .L5
movsd xmm6, QWORD PTR 368[rsp]
movsd xmm5, QWORD PTR .LC13[rip]
subsd xmm6, xmm1
comisd xmm5, xmm6
movapd xmm4, xmm6
jb .L5
movq xmm5, r9
movsd xmm6, QWORD PTR .LC20[rip]
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 136[rsp]
movsd xmm7, QWORD PTR .LC14[rip]
subsd xmm6, xmm1
movsd QWORD PTR 256[rsp], xmm6
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 8[rsp]
subsd xmm7, xmm1
movapd xmm6, xmm7
movsd xmm7, QWORD PTR .LC17[rip]
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 120[rsp]
movsd xmm0, QWORD PTR .LC15[rip]
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movsd xmm8, QWORD PTR 264[rsp]
movsd xmm0, QWORD PTR .LC19[rip]
subsd xmm8, xmm1
movsd QWORD PTR 272[rsp], xmm8
comisd xmm0, xmm8
jb .L5
movq xmm9, rdx
movsd xmm0, QWORD PTR .LC6[rip]
subsd xmm9, xmm1
comisd xmm0, xmm9
jb .L5
movsd xmm0, QWORD PTR 192[rsp]
movsd xmm8, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 296[rsp], xmm0
comisd xmm8, xmm0
jb .L5
movsd xmm8, QWORD PTR .LC18[rip]
movq xmm0, r8
subsd xmm0, xmm1
movsd QWORD PTR 312[rsp], xmm0
comisd xmm8, xmm0
jb .L5
movsd xmm0, QWORD PTR 128[rsp]
movsd xmm8, QWORD PTR .LC9[rip]
subsd xmm0, xmm1
movsd QWORD PTR 320[rsp], xmm0
comisd xmm8, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm8, QWORD PTR .LC20[rip]
subsd xmm0, xmm1
movsd QWORD PTR 336[rsp], xmm0
comisd xmm8, xmm0
jb .L5
movsd xmm0, QWORD PTR 280[rsp]
movsd xmm8, QWORD PTR .LC2[rip]
subsd xmm0, xmm1
movsd QWORD PTR 280[rsp], xmm0
comisd xmm8, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
subsd xmm0, xmm1
movsd xmm1, QWORD PTR .LC19[rip]
comisd xmm1, xmm0
jb .L5
ucomisd xmm2, QWORD PTR .LC3[rip]
mov eax, 0
movsd xmm2, QWORD PTR 296[rsp]
setnp r11b
cmovne r11d, eax
ucomisd xmm3, QWORD PTR .LC10[rip]
movsd xmm3, QWORD PTR 240[rsp]
mov r14d, r11d
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm3, QWORD PTR .LC14[rip]
movsd xmm3, QWORD PTR 256[rsp]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC13[rip]
movsd xmm4, QWORD PTR 272[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC20[rip]
movsd xmm5, QWORD PTR 320[rsp]
setnp r11b
cmovne r11d, eax
or r11d, r14d
ucomisd xmm3, QWORD PTR .LC14[rip]
setnp r14b
cmovne r14d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC17[rip]
movsd xmm6, QWORD PTR 312[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, QWORD PTR .LC15[rip]
movsd xmm7, QWORD PTR 280[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, xmm1
movsd xmm4, QWORD PTR 336[rsp]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm9, QWORD PTR .LC6[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm6, QWORD PTR .LC18[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm5, QWORD PTR .LC9[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm4, QWORD PTR .LC20[rip]
setnp r11b
cmovne r11d, eax
or r14d, r11d
ucomisd xmm7, xmm8
setnp r11b
cmovne r11d, eax
or r11b, r14b
jne .L1058
ucomisd xmm0, xmm1
setnp r14b
cmove r11d, r14d
test r11b, r11b
je .L5
.L1058:
movsd xmm3, QWORD PTR [rsp]
pxor xmm1, xmm1
movsd xmm2, QWORD PTR .LC17[rip]
cvtss2sd xmm1, DWORD PTR 56[rsp]
subsd xmm3, xmm1
movsd QWORD PTR 240[rsp], xmm3
comisd xmm2, xmm3
jb .L5
movapd xmm2, xmm13
movsd xmm4, QWORD PTR .LC19[rip]
subsd xmm2, xmm1
comisd xmm4, xmm2
jb .L5
movapd xmm4, xmm12
movsd xmm5, QWORD PTR .LC6[rip]
subsd xmm4, xmm1
comisd xmm5, xmm4
jb .L5
movapd xmm5, xmm10
movsd xmm6, QWORD PTR .LC4[rip]
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
movq xmm6, rsi
movsd xmm7, QWORD PTR .LC5[rip]
subsd xmm6, xmm1
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 144[rsp]
movsd xmm0, QWORD PTR .LC7[rip]
subsd xmm7, xmm1
comisd xmm0, xmm7
jb .L5
movq xmm8, rdi
movsd xmm0, QWORD PTR .LC5[rip]
subsd xmm8, xmm1
comisd xmm0, xmm8
jb .L5
movsd xmm9, QWORD PTR 304[rsp]
movsd xmm0, QWORD PTR .LC1[rip]
subsd xmm9, xmm1
comisd xmm0, xmm9
jb .L5
movsd xmm0, QWORD PTR 328[rsp]
movsd xmm12, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 256[rsp], xmm0
comisd xmm12, xmm0
jb .L5
movsd xmm13, QWORD PTR .LC5[rip]
movq xmm12, rdx
subsd xmm12, xmm1
movsd QWORD PTR 272[rsp], xmm12
comisd xmm13, xmm12
jb .L5
movq xmm13, rcx
subsd xmm13, xmm1
movapd xmm12, xmm13
movsd xmm13, QWORD PTR .LC19[rip]
comisd xmm13, xmm12
jb .L5
movsd xmm13, QWORD PTR 248[rsp]
movsd xmm0, QWORD PTR .LC2[rip]
subsd xmm13, xmm1
comisd xmm0, xmm13
jb .L5
movq xmm0, r8
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm0, xmm1
movsd QWORD PTR 280[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 232[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm0, xmm1
movsd QWORD PTR 296[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 200[rsp]
movsd xmm3, QWORD PTR .LC13[rip]
subsd xmm0, xmm1
movsd QWORD PTR 304[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm0, QWORD PTR 160[rsp]
movsd xmm3, QWORD PTR .LC5[rip]
subsd xmm0, xmm1
comisd xmm3, xmm0
jb .L5
ucomisd xmm2, QWORD PTR .LC19[rip]
mov edi, 0
movsd xmm2, QWORD PTR 240[rsp]
setnp sil
cmovne esi, edi
ucomisd xmm2, QWORD PTR .LC17[rip]
movsd xmm2, QWORD PTR 256[rsp]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm4, QWORD PTR .LC6[rip]
movsd xmm4, QWORD PTR 296[rsp]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm5, QWORD PTR .LC4[rip]
movsd xmm5, QWORD PTR 280[rsp]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm6, xmm3
movsd xmm6, QWORD PTR 272[rsp]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm7, QWORD PTR .LC7[rip]
movsd xmm7, QWORD PTR 304[rsp]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm8, xmm3
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm9, QWORD PTR .LC1[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm2, QWORD PTR .LC4[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm6, xmm3
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm12, QWORD PTR .LC19[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm13, QWORD PTR .LC2[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm5, QWORD PTR .LC3[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm4, QWORD PTR .LC4[rip]
setnp cl
cmovne ecx, edi
or esi, ecx
ucomisd xmm7, QWORD PTR .LC13[rip]
setnp cl
cmovne ecx, edi
or cl, sil
jne .L1075
ucomisd xmm0, xmm3
setnp sil
cmove ecx, esi
test cl, cl
je .L5
.L1075:
movsd xmm2, QWORD PTR [rsp]
pxor xmm1, xmm1
movsd xmm4, QWORD PTR .LC14[rip]
cvtss2sd xmm1, DWORD PTR 100[rsp]
subsd xmm2, xmm1
movsd QWORD PTR 240[rsp], xmm2
comisd xmm4, xmm2
jb .L5
subsd xmm11, xmm1
movsd xmm4, QWORD PTR .LC17[rip]
comisd xmm4, xmm11
movapd xmm2, xmm11
jb .L5
movsd xmm3, QWORD PTR 288[rsp]
movsd xmm4, QWORD PTR .LC5[rip]
subsd xmm3, xmm1
movsd QWORD PTR 256[rsp], xmm3
comisd xmm4, xmm3
jb .L5
movapd xmm4, xmm10
movsd xmm5, QWORD PTR .LC19[rip]
subsd xmm4, xmm1
comisd xmm5, xmm4
jb .L5
movsd xmm5, QWORD PTR 368[rsp]
movsd xmm6, QWORD PTR .LC17[rip]
subsd xmm5, xmm1
comisd xmm6, xmm5
jb .L5
movsd xmm6, QWORD PTR 208[rsp]
movsd xmm7, QWORD PTR .LC19[rip]
subsd xmm6, xmm1
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 168[rsp]
movsd xmm3, QWORD PTR .LC19[rip]
subsd xmm7, xmm1
comisd xmm3, xmm7
jb .L5
movq xmm8, r9
movsd xmm3, QWORD PTR .LC1[rip]
subsd xmm8, xmm1
comisd xmm3, xmm8
jb .L5
movsd xmm9, QWORD PTR 136[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm9, xmm1
comisd xmm3, xmm9
jb .L5
movsd xmm10, QWORD PTR 120[rsp]
movsd xmm3, QWORD PTR .LC4[rip]
subsd xmm10, xmm1
comisd xmm3, xmm10
jb .L5
movsd xmm11, QWORD PTR 264[rsp]
movsd xmm3, QWORD PTR .LC3[rip]
subsd xmm11, xmm1
comisd xmm3, xmm11
jb .L5
movq xmm12, rdx
movsd xmm3, QWORD PTR .LC20[rip]
subsd xmm12, xmm1
comisd xmm3, xmm12
jb .L5
movsd xmm13, QWORD PTR 224[rsp]
movsd xmm3, QWORD PTR .LC17[rip]
subsd xmm13, xmm1
comisd xmm3, xmm13
jb .L5
movsd xmm0, QWORD PTR 192[rsp]
movsd xmm3, QWORD PTR .LC2[rip]
subsd xmm0, xmm1
movsd QWORD PTR 168[rsp], xmm0
comisd xmm3, xmm0
jb .L5
movsd xmm3, QWORD PTR 128[rsp]
subsd xmm3, xmm1
movapd xmm0, xmm3
movsd xmm3, QWORD PTR .LC15[rip]
comisd xmm3, xmm0
jb .L5
movq xmm3, r8
subsd xmm3, xmm1
movapd xmm1, xmm3
movsd xmm3, QWORD PTR .LC14[rip]
comisd xmm3, xmm1
jb .L5
ucomisd xmm2, QWORD PTR .LC17[rip]
mov esi, 0
movsd xmm2, QWORD PTR 240[rsp]
setnp cl
cmovne ecx, esi
ucomisd xmm2, xmm3
movsd xmm2, QWORD PTR 256[rsp]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm2, QWORD PTR .LC5[rip]
movsd xmm2, QWORD PTR 168[rsp]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm4, QWORD PTR .LC19[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm5, QWORD PTR .LC17[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm6, QWORD PTR .LC19[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm7, QWORD PTR .LC19[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm8, QWORD PTR .LC1[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm9, QWORD PTR .LC2[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm10, QWORD PTR .LC4[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm11, QWORD PTR .LC3[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm12, QWORD PTR .LC20[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm13, QWORD PTR .LC17[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm2, QWORD PTR .LC2[rip]
setnp dl
cmovne edx, esi
or ecx, edx
ucomisd xmm0, QWORD PTR .LC15[rip]
setnp dl
cmovne edx, esi
or dl, cl
jne .L1092
ucomisd xmm1, xmm3
setnp cl
cmove edx, ecx
test dl, dl
je .L5
.L1092:
movsd xmm2, QWORD PTR [rsp]
pxor xmm0, xmm0
movsd xmm4, QWORD PTR .LC14[rip]
cvtss2sd xmm0, DWORD PTR 32[rsp]
subsd xmm2, xmm0
comisd xmm4, xmm2
movsd QWORD PTR [rsp], xmm2
jb .L5
movsd xmm6, QWORD PTR 288[rsp]
movsd xmm5, QWORD PTR .LC19[rip]
subsd xmm6, xmm0
comisd xmm5, xmm6
movapd xmm1, xmm6
jb .L5
movsd xmm3, QWORD PTR 144[rsp]
movsd xmm6, QWORD PTR .LC12[rip]
subsd xmm3, xmm0
comisd xmm6, xmm3
jb .L5
movsd xmm4, QWORD PTR 368[rsp]
movsd xmm5, QWORD PTR .LC8[rip]
subsd xmm4, xmm0
comisd xmm5, xmm4
jb .L5
movq xmm5, r10
movsd xmm6, QWORD PTR .LC18[rip]
subsd xmm5, xmm0
comisd xmm6, xmm5
jb .L5
movq xmm6, r9
movsd xmm7, QWORD PTR .LC20[rip]
subsd xmm6, xmm0
comisd xmm7, xmm6
jb .L5
movsd xmm7, QWORD PTR 136[rsp]
movsd xmm10, QWORD PTR .LC14[rip]
subsd xmm7, xmm0
movsd QWORD PTR 136[rsp], xmm7
comisd xmm10, xmm7
jb .L5
movsd xmm12, QWORD PTR .LC14[rip]
movsd xmm10, QWORD PTR 8[rsp]
subsd xmm10, xmm0
comisd xmm12, xmm10
movsd QWORD PTR 8[rsp], xmm10
jb .L5
movsd xmm12, QWORD PTR 120[rsp]
subsd xmm12, xmm0
movapd xmm7, xmm12
movsd xmm12, QWORD PTR .LC9[rip]
comisd xmm12, xmm7
jb .L5
movsd xmm8, QWORD PTR 328[rsp]
movsd xmm12, QWORD PTR .LC18[rip]
subsd xmm8, xmm0
comisd xmm12, xmm8
jb .L5
movsd xmm9, QWORD PTR 248[rsp]
movsd xmm12, QWORD PTR .LC12[rip]
subsd xmm9, xmm0
comisd xmm12, xmm9
jb .L5
movq xmm12, r8
subsd xmm12, xmm0
movapd xmm10, xmm12
movsd xmm12, QWORD PTR .LC19[rip]
comisd xmm12, xmm10
jb .L5
movsd xmm11, QWORD PTR 232[rsp]
movsd xmm12, QWORD PTR .LC7[rip]
subsd xmm11, xmm0
comisd xmm12, xmm11
jb .L5
movsd xmm12, QWORD PTR 128[rsp]
movsd xmm13, QWORD PTR .LC17[rip]
subsd xmm12, xmm0
comisd xmm13, xmm12
jb .L5
movsd xmm13, QWORD PTR 200[rsp]
movsd xmm2, QWORD PTR .LC2[rip]
subsd xmm13, xmm0
comisd xmm2, xmm13
jb .L5
movsd xmm2, QWORD PTR 160[rsp]
subsd xmm2, xmm0
movsd xmm0, QWORD PTR .LC3[rip]
comisd xmm0, xmm2
jb .L5
ucomisd xmm1, QWORD PTR .LC19[rip]
mov ecx, 0
movsd xmm1, QWORD PTR [rsp]
setnp dl
cmovne edx, ecx
ucomisd xmm1, QWORD PTR .LC14[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm3, QWORD PTR .LC12[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm4, QWORD PTR .LC8[rip]
movsd xmm4, QWORD PTR 136[rsp]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm5, QWORD PTR .LC18[rip]
movsd xmm5, QWORD PTR 8[rsp]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm6, QWORD PTR .LC20[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm4, QWORD PTR .LC14[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm5, QWORD PTR .LC14[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm7, QWORD PTR .LC9[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm8, QWORD PTR .LC18[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm9, QWORD PTR .LC12[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm10, QWORD PTR .LC19[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm11, QWORD PTR .LC7[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm12, QWORD PTR .LC17[rip]
setnp sil
cmovne esi, ecx
or edx, esi
ucomisd xmm13, QWORD PTR .LC2[rip]
setnp sil
cmove ecx, esi
or dl, cl
jne .L1109
ucomisd xmm2, xmm0
setnp cl
cmove edx, ecx
test dl, dl
je .L5
.L1109:
test ebp, ebp
je .L558
movsd xmm0, QWORD PTR 152[rsp]
mov edx, 1
subsd xmm0, QWORD PTR 216[rsp]
comisd xmm0, QWORD PTR .LC2[rip]
jnb .L559
.L558:
movsd xmm0, QWORD PTR 184[rsp]
xor edx, edx
subsd xmm0, QWORD PTR 176[rsp]
comisd xmm0, QWORD PTR .LC1[rip]
setb dl
.L559:
cmp r13d, edx
jne .L5
test r15d, r15d
js .L5
movss xmm3, DWORD PTR 116[rsp]
movss xmm2, DWORD PTR 112[rsp]
mov r13d, r12d
movss DWORD PTR 364[rsp], xmm14
movss xmm4, DWORD PTR 360[rsp]
movss xmm5, DWORD PTR 100[rsp]
movss DWORD PTR 336[rsp], xmm15
movss DWORD PTR 192[rsp], xmm3
movss xmm3, DWORD PTR 96[rsp]
mov r14d, DWORD PTR 108[rsp]
movss DWORD PTR 352[rsp], xmm4
movss xmm4, DWORD PTR 104[rsp]
movss DWORD PTR 344[rsp], xmm2
movss xmm2, DWORD PTR 92[rsp]
movss DWORD PTR 208[rsp], xmm4
movss xmm4, DWORD PTR 88[rsp]
movss DWORD PTR 120[rsp], xmm5
movss xmm5, DWORD PTR 84[rsp]
movss DWORD PTR 328[rsp], xmm3
movss xmm3, DWORD PTR 80[rsp]
movss DWORD PTR 168[rsp], xmm2
movss xmm2, DWORD PTR 76[rsp]
movss DWORD PTR 320[rsp], xmm4
movss xmm4, DWORD PTR 72[rsp]
movss DWORD PTR 312[rsp], xmm5
movss xmm5, DWORD PTR 68[rsp]
movss DWORD PTR 304[rsp], xmm3
movss xmm3, DWORD PTR 64[rsp]
movss DWORD PTR 296[rsp], xmm2
movss xmm2, DWORD PTR 60[rsp]
movss DWORD PTR 288[rsp], xmm4
movss DWORD PTR 280[rsp], xmm5
movss DWORD PTR 272[rsp], xmm3
movss DWORD PTR 264[rsp], xmm2
movss xmm1, DWORD PTR 56[rsp]
movss xmm6, DWORD PTR 52[rsp]
movss xmm4, DWORD PTR 48[rsp]
movss xmm3, DWORD PTR 40[rsp]
mov DWORD PTR 128[rsp], ebx
movss xmm5, DWORD PTR 44[rsp]
movss xmm7, DWORD PTR 36[rsp]
movss DWORD PTR 144[rsp], xmm1
movss xmm2, DWORD PTR 28[rsp]
movss xmm1, DWORD PTR 24[rsp]
movss DWORD PTR 256[rsp], xmm6
movss DWORD PTR 248[rsp], xmm4
movss xmm6, DWORD PTR 20[rsp]
movss xmm4, DWORD PTR 16[rsp]
movss DWORD PTR 240[rsp], xmm3
pxor xmm3, xmm3
movss DWORD PTR 160[rsp], xmm5
cvtss2sd xmm3, DWORD PTR 32[rsp]
movss DWORD PTR 152[rsp], xmm7
movss DWORD PTR 232[rsp], xmm2
movss DWORD PTR 224[rsp], xmm1
movss DWORD PTR 136[rsp], xmm6
movss DWORD PTR 216[rsp], xmm4
movsd QWORD PTR [rsp], xmm3
jmp .L560
.L1217:
pxor xmm0, xmm0
pxor xmm1, xmm1
cvtss2sd xmm0, DWORD PTR 136[rsp]
cvtss2sd xmm1, DWORD PTR 128[rsp]
subsd xmm0, xmm1
comisd xmm0, QWORD PTR .LC2[rip]
jb .L5
test r12b, r12b
jne .L7
.L5:
add rsp, 392
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1077018624
.align 8
.LC1:
.long 0
.long -1072168960
.align 8
.LC2:
.long 0
.long -1071120384
.align 8
.LC3:
.long 0
.long -1070465024
.align 8
.LC4:
.long 0
.long -1071906816
.align 8
.LC5:
.long 0
.long -1070333952
.align 8
.LC6:
.long 0
.long -1070858240
.align 8
.LC7:
.long 0
.long -1071251456
.align 8
.LC8:
.long 0
.long -1070989312
.align 8
.LC9:
.long 0
.long -1071382528
.align 8
.LC10:
.long 0
.long -1073741824
.align 8
.LC11:
.long 0
.long -1072693248
.align 8
.LC12:
.long 0
.long -1071513600
.align 8
.LC13:
.long 0
.long -1072431104
.align 8
.LC14:
.long 0
.long -1074790400
.align 8
.LC15:
.long 0
.long -1070530560
.align 8
.LC16:
.long 0
.long -1071644672
.align 8
.LC17:
.long 0
.long -1070399488
.align 8
.LC18:
.long 0
.long -1070596096
.align 8
.LC19:
.long 0
.long -1070727168
.align 8
.LC20:
.long 0
.long -1073217536
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001115.c"
.text
.align 2
.global __VERIFIER_nondet_bool
.syntax unified
.arm
.fpu softvfp
.type __VERIFIER_nondet_bool, %function
__VERIFIER_nondet_bool:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl __VERIFIER_nondet_int
subs r0, r0, #0
movne r0, #1
pop {r4, pc}
.size __VERIFIER_nondet_bool, .-__VERIFIER_nondet_bool
.global __aeabi_f2d
.global __aeabi_dsub
.global __aeabi_dcmple
.global __aeabi_dcmpge
.global __aeabi_dcmpeq
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 528
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #532
bl __VERIFIER_nondet_int
str r0, [sp]
bl __VERIFIER_nondet_int
subs r9, r0, #0
movne r9, #1
str r9, [sp, #384]
bl __VERIFIER_nondet_float
mov fp, r0
str r0, [sp, #128] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #216] @ float
bl __VERIFIER_nondet_float
mov r10, r0
str r0, [sp, #136] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #224] @ float
bl __VERIFIER_nondet_float
mov r7, r0
bl __VERIFIER_nondet_float
mov r6, r0
str r0, [sp, #4] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #232] @ float
bl __VERIFIER_nondet_float
mov r8, r0
bl __VERIFIER_nondet_float
mov r4, r0
str r0, [sp, #240] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #248] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #152] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #256] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #264] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #144] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #272] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #280] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #288] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #296] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #304] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #312] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #320] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #328] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #160] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #336] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #120] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #200] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #344] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #176] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #352] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #168] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #360] @ float
bl __VERIFIER_nondet_float
mov r3, r0
mov r0, r4
str r3, [sp, #368] @ float
bl __aeabi_f2d
mov r4, r0
mov r0, r8
mov r5, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1664
bl __aeabi_dcmple
cmp r0, #0
beq .L5
mov r0, r6
bl __aeabi_f2d
mov r4, r0
mov r0, r7
mov r5, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1664+16
bl __aeabi_dcmpge
cmp r0, #0
bne .L1663
.L7:
ldr r3, [sp]
cmp r3, #0
blt .L5
mov r6, r8
mov fp, r7
mov r8, r3
ldr r10, [sp, #4] @ float
.L1042:
mov r0, r10
bl __aeabi_f2d
mov r2, r0
mov r10, r1
mov r9, r2
mov r0, fp
str r9, [sp, #184]
str r10, [sp, #188]
bl __aeabi_f2d
mov r3, r0
mov r4, r1
mov r2, r3
str r3, [sp, #208]
str r4, [sp, #212]
mov r0, r9
mov r3, r4
mov r1, r10
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1664+16
bl __aeabi_dcmpge
cmp r0, #0
beq .L10
ldr r0, [sp, #136] @ float
bl __aeabi_f2d
mov r4, r0
ldr r0, [sp, #128] @ float
mov r5, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
ldr r3, .L1664+36
mov r2, #0
bl __aeabi_dcmpge
cmp r0, #0
moveq r0, #1
ldr r3, [sp, #384]
eor r3, r3, #1
andne r0, r3, #1
cmp r0, #0
subeq r8, r8, #1
beq .L14
.L10:
bl __VERIFIER_nondet_int
mov r8, r0
.L14:
bl __VERIFIER_nondet_int
subs r2, r0, #0
movne r2, #1
str r0, [sp, #388]
str r2, [sp, #116]
bl __VERIFIER_nondet_float
str r0, [sp] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #4] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #8] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #12] @ float
bl __VERIFIER_nondet_float
mov fp, r0
bl __VERIFIER_nondet_float
mov r10, r0
bl __VERIFIER_nondet_float
str r0, [sp, #16] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #20] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #24] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #28] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #32] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #36] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #40] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #44] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #48] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #52] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #56] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #60] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #64] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #68] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #72] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #76] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #80] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #84] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #88] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #92] @ float
bl __VERIFIER_nondet_float
mov r9, r0
bl __VERIFIER_nondet_float
str r0, [sp, #96] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #100] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #104] @ float
bl __VERIFIER_nondet_float
str r0, [sp, #108] @ float
bl __VERIFIER_nondet_float
mov r3, r0
mov r0, r6
str r3, [sp, #112] @ float
bl __aeabi_f2d
mov r2, r0
mov r0, r9
mov r6, r2
mov r7, r1
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
mov r2, r4
mov r3, r5
str r6, [sp, #192]
str r7, [sp, #196]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+24
str r6, [sp, #376]
str r7, [sp, #380]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #120] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #120]
str r7, [sp, #124]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+32
str r6, [sp, #392]
str r7, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #144] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #144]
str r7, [sp, #148]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+28
str r6, [sp, #400]
str r7, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #152] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #152]
str r7, [sp, #156]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+60
str r6, [sp, #408]
str r7, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #160] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #160]
str r7, [sp, #164]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+16
str r6, [sp, #416]
str r7, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #128] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #128]
str r7, [sp, #132]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+20
str r6, [sp, #424]
str r7, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #168] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #168]
str r7, [sp, #172]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+60
str r6, [sp, #440]
str r7, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #176] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #176]
str r7, [sp, #180]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+28
str r6, [sp, #456]
str r7, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #200] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #432]
str r7, [sp, #436]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+64
str r6, [sp, #464]
str r7, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #336] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #336]
str r7, [sp, #340]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+16
str r6, [sp, #472]
str r7, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #264] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #200]
str r7, [sp, #204]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+32
str r6, [sp, #480]
str r7, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #136] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #448]
str r7, [sp, #452]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+12
str r6, [sp, #488]
str r7, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #312] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #136]
str r7, [sp, #140]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+12
str r6, [sp, #312]
str r7, [sp, #316]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #288] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #264]
str r7, [sp, #268]
bl __aeabi_dsub
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L1664+16
str r6, [sp, #288]
str r7, [sp, #292]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #344] @ float
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, r4
mov r3, r5
str r6, [sp, #344]
str r7, [sp, #348]
bl __aeabi_dsub
mov r2, #0
mov r3, #-1073741824
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #184
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+4
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1664+24
add r1, sp, #376
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #312
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #288
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r3, #-1073741824
mov r1, r7
mov r0, r6
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
mov r0, r10
bl __aeabi_f2d
mov r6, r0
mov r7, r1
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
str r6, [sp, #376]
str r7, [sp, #380]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+52
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+40
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #128
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #360] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #288]
str r5, [sp, #292]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+36
str r4, [sp, #360]
str r5, [sp, #364]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #232] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, r6
mov r3, r7
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+36
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
str r6, [sp, #376]
str r7, [sp, #380]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+64
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #352] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+12
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #376
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+16
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #376
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+52
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #224] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+40
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #256] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #312]
str r5, [sp, #316]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+8
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #328] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #352]
str r5, [sp, #356]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+4
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #376
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+64
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #296] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #328]
str r5, [sp, #332]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+48
str r4, [sp, #296]
str r5, [sp, #300]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #376
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+12
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #272] @ float
bl __aeabi_f2d
add r3, sp, #376
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #224]
str r5, [sp, #228]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #272]
str r5, [sp, #276]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+40
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1664+52
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #360
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #272
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #48] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #256]
str r3, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+48
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #368] @ float
bl __aeabi_f2d
add r3, sp, #256
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #368]
str r5, [sp, #372]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+8
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
b .L1665
.L1666:
.align 2
.L1664:
.word 1077018624
.word -1072693248
.word -1074790400
.word -1071382528
.word -1072168960
.word -1071251456
.word -1070465024
.word -1070333952
.word -1071906816
.word -1071120384
.word -1072431104
.word -1070399488
.word -1070530560
.word -1071513600
.word -1071644672
.word -1070858240
.word -1070989312
.word -1070596096
.word -1070727168
.word -1073217536
.L1665:
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #304] @ float
bl __aeabi_f2d
add r3, sp, #256
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #272]
str r5, [sp, #276]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+44
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+8
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+28
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #280] @ float
bl __aeabi_f2d
add r3, sp, #256
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #360]
str r5, [sp, #364]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+24
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #216] @ float
bl __aeabi_f2d
add r3, sp, #256
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #280]
str r5, [sp, #284]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+48
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+32
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #248] @ float
bl __aeabi_f2d
add r3, sp, #256
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #296]
str r5, [sp, #300]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+52
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+56
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+44
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+32
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #256
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+20
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+8
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1664+48
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #56] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #368
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+48
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+12
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+68
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #320] @ float
bl __aeabi_f2d
add r3, sp, #216
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+40
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
ldr r0, [sp, #240] @ float
bl __aeabi_f2d
add r3, sp, #216
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
str r4, [sp, #320]
str r5, [sp, #324]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+52
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+16
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+20
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+72
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+32
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+56
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+68
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+24
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+40
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+12
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1664+48
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #60] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+56
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+52
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+60
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+64
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+68
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+72
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+72
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+32
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+36
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+72
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+40
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+44
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1664+48
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1664+56
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1664+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #68] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+68
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+60
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+60
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+40
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+24
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+4
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+4
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+12
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+20
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+40
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+28
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+12
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+60
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1667+68
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #28] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+8
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+60
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+24
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+8
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1667
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #76] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+36
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+32
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+24
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+12
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+60
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+36
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
b .L1668
.L1669:
.align 2
.L1667:
.word -1070727168
.word -1070333952
.word -1072168960
.word -1071382528
.word -1070727168
.word -1071251456
.word -1071120384
.word -1070858240
.word -1070530560
.word -1071906816
.word -1070465024
.word -1072693248
.word -1070399488
.word -1073217536
.word -1070989312
.word -1074790400
.word -1071644672
.word -1071513600
.word -1070333952
.word -1072431104
.word -1070596096
.L1668:
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+16
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+36
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1667+52
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #36] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+20
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+28
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+28
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+72
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+48
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+40
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+24
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+72
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+28
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1667+20
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #8] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+32
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+36
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+40
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+68
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+44
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+72
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+48
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+52
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+56
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #216
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+60
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1667+32
add r1, sp, #240
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1667+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #4] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+64
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+68
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+72
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1667+80
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+4
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+24
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+48
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+36
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+32
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+60
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #40] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+36
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+16
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+64
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+44
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+12
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+12
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+40
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+52
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+80
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+76
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #84] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+16
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+40
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+80
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+24
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+52
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+16
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+80
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+24
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+40
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+64
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+16
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+60
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #52] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #152
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+64
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
b .L1671
.L1672:
.align 2
.L1670:
.word -1074790400
.word -1071382528
.word -1071513600
.word -1071120384
.word -1070399488
.word -1074790400
.word -1072168960
.word -1071251456
.word -1072431104
.word -1070858240
.word -1071906816
.word -1070465024
.word -1070989312
.word -1073217536
.word -1071382528
.word -1071644672
.word -1072693248
.word -1070333952
.word -1070727168
.word -1070530560
.word -1070596096
.L1671:
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+44
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+16
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+32
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+16
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+56
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+20
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+44
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+24
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+68
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+20
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+44
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+64
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #12] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+40
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+56
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+24
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+36
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+28
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+64
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+68
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+32
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+68
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+40
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+76
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #92] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #144
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+56
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+52
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+64
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+68
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+72
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+80
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+36
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+68
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+80
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+40
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+76
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+44
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+48
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1670+48
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1670+56
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1670+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #96] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+24
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+8
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+32
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+24
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+16
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+4
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+16
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+8
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1673+24
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #100] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+4
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+64
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+60
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+12
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+48
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+60
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+8
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+4
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1673+28
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #104] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+12
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+8
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+72
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+32
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+12
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+72
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
b .L1674
.L1675:
.align 2
.L1673:
.word -1070858240
.word -1070333952
.word -1072431104
.word -1070399488
.word -1073217536
.word -1070858240
.word -1071120384
.word -1071513600
.word -1071906816
.word -1070727168
.word -1071382528
.word -1072693248
.word -1070989312
.word -1071644672
.word -1070333952
.word -1074790400
.word -1070596096
.word -1070530560
.word -1072168960
.word -1071251456
.word -1070465024
.L1674:
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+12
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1673+12
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #64] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+20
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+16
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+20
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+64
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+24
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+64
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+56
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+60
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1673+28
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #24] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+28
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+32
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+36
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+56
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+40
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #448
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+44
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+44
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+48
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+52
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+56
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+28
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
mov r3, #-1073741824
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1673+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #72] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+60
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+80
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+64
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+68
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+72
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1673+80
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+4
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+40
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+16
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+52
str r4, [sp, #240]
str r5, [sp, #244]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+16
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1676+56
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
mov r0, fp
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #240]
str r3, [sp, #244]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+52
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+40
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+36
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+72
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+72
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+12
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+52
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+60
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+60
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+48
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1676+52
add r1, sp, #248
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #16] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #120
ldmia r1, {r0-r1}
str r2, [sp, #248]
str r3, [sp, #252]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+28
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+24
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+8
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+24
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+52
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+24
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+8
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+12
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+80
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1676+28
add r1, sp, #304
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #108] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #192
ldmia r1, {r0-r1}
str r2, [sp, #248]
str r3, [sp, #252]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
b .L1677
.L1678:
.align 2
.L1676:
.word -1071644672
.word -1070989312
.word -1072693248
.word -1072431104
.word -1070465024
.word -1073217536
.word -1070727168
.word -1071251456
.word -1070858240
.word -1071382528
.word -1071513600
.word -1071644672
.word -1070530560
.word -1071906816
.word -1074790400
.word -1072168960
.word -1070989312
.word -1070399488
.word -1070333952
.word -1071120384
.word -1070596096
.L1677:
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+60
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+28
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+48
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+12
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+44
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+36
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+80
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+16
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+36
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+80
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+16
str r4, [sp, #248]
str r5, [sp, #252]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+60
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1676+68
add r1, sp, #304
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
add r1, sp, #160
ldmia r1, {r0-r1}
str r2, [sp, #248]
str r3, [sp, #252]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+36
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+64
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+20
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+24
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+28
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+32
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+48
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+72
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+40
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+44
str r4, [sp, #520]
str r5, [sp, #524]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+64
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1676+36
add r1, sp, #304
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #520
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #80] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+64
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+64
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+68
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+72
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+80
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+80
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+76
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+60
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+72
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+48
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+52
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+56
str r4, [sp, #520]
str r5, [sp, #524]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1676+60
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
mov r3, #-1073741824
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1676+80
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #520
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #32] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
add r1, sp, #368
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+44
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+68
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+8
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+76
str r4, [sp, #520]
str r5, [sp, #524]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+4
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+52
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1679+52
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #-1073741824
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+8
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #520
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #112] @ float
bl __aeabi_f2d
mov r3, r0
mov r4, r1
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, r3
str r3, [sp, #304]
str r4, [sp, #308]
mov r3, r4
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
mov r3, #-1073741824
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+68
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+16
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+28
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #472]
str r5, [sp, #476]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+12
str r4, [sp, #480]
str r5, [sp, #484]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+24
str r4, [sp, #488]
str r5, [sp, #492]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679
str r4, [sp, #496]
str r5, [sp, #500]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+44
str r4, [sp, #504]
str r5, [sp, #508]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #512]
str r5, [sp, #516]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #344
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+4
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+68
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
mov r3, #-1073741824
add r1, sp, #400
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #472
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #480
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #488
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #496
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #504
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #512
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+4
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #44] @ float
bl __aeabi_f2d
mov r3, r0
mov r4, r1
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r3
str r3, [sp, #304]
str r4, [sp, #308]
mov r3, r4
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #144]
str r5, [sp, #148]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+12
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+24
str r4, [sp, #400]
str r5, [sp, #404]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #128
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+20
str r4, [sp, #128]
str r5, [sp, #132]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+60
str r4, [sp, #408]
str r5, [sp, #412]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #232
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+20
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #392
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+76
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+24
str r4, [sp, #416]
str r5, [sp, #420]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+20
str r4, [sp, #424]
str r5, [sp, #428]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #280
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #280]
str r5, [sp, #284]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+4
str r4, [sp, #440]
str r5, [sp, #444]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+68
str r4, [sp, #448]
str r5, [sp, #452]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+24
str r4, [sp, #456]
str r5, [sp, #460]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
b .L1680
.L1681:
.align 2
.L1679:
.word -1070596096
.word -1071120384
.word -1072693248
.word -1070858240
.word -1072431104
.word -1070333952
.word -1071906816
.word -1070530560
.word -1070989312
.word -1073217536
.word -1074790400
.word -1071382528
.word -1070596096
.word -1071513600
.word -1070727168
.word -1071251456
.word -1070399488
.word -1070465024
.word -1071120384
.word -1072168960
.L1680:
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+16
str r4, [sp, #464]
str r5, [sp, #468]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #304
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+20
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1679+64
add r1, sp, #344
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+12
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #400
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #128
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #408
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #416
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #424
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #440
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #448
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #456
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #464
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+16
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #88] @ float
bl __aeabi_f2d
mov r3, r0
mov r4, r1
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r3
str r3, [sp, #128]
str r4, [sp, #132]
mov r3, r4
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #144]
str r5, [sp, #148]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #120]
str r5, [sp, #124]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+20
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #160
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #256
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #272
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #272]
str r5, [sp, #276]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+76
str r4, [sp, #280]
str r5, [sp, #284]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+72
str r4, [sp, #304]
str r5, [sp, #308]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+24
str r4, [sp, #344]
str r5, [sp, #348]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #360
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+68
str r4, [sp, #360]
str r5, [sp, #364]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #200
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #200]
str r5, [sp, #204]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #312
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #312]
str r5, [sp, #316]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #296
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+72
str r4, [sp, #296]
str r5, [sp, #300]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+28
str r4, [sp, #392]
str r5, [sp, #396]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #128
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #128]
str r5, [sp, #132]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #120
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1679+40
add r1, sp, #144
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+20
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #272
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+76
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #304
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #344
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+24
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #360
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #312
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #392
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+28
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #128
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r0, [sp, #20] @ float
bl __aeabi_f2d
mov r3, r0
mov r4, r1
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, r3
str r3, [sp, #120]
str r4, [sp, #124]
mov r3, r4
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #128]
str r5, [sp, #132]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #368
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #144]
str r5, [sp, #148]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #288
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #208
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+32
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #320
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+48
str r4, [sp, #192]
str r5, [sp, #196]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #168
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+36
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r5, sp, #120
ldmia r5, {r4-r5}
mov r0, r6
mov r1, r7
mov r2, r4
mov r3, r5
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1679+40
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #176
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #120]
str r5, [sp, #124]
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+40
str r4, [sp, #176]
str r5, [sp, #180]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #432
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+44
str r4, [sp, #200]
str r5, [sp, #204]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #336
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+48
str r4, [sp, #208]
str r5, [sp, #212]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #352
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+52
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #136
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+56
str r4, [sp, #136]
str r5, [sp, #140]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #328
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+60
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #264
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+64
str r4, [sp, #264]
str r5, [sp, #268]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+72
str r4, [sp, #184]
str r5, [sp, #188]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r3, sp, #120
ldmia r3, {r2-r3}
add r1, sp, #224
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L1679+68
str r4, [sp, #120]
str r5, [sp, #124]
bl __aeabi_dcmple
cmp r0, #0
beq .L5
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
bl __aeabi_dcmpeq
mov r2, #0
subs r4, r0, #0
ldr r3, .L1679+40
add r1, sp, #128
ldmia r1, {r0-r1}
movne r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+32
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #192
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #168
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+36
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
mov r2, #0
mov r1, r7
ldr r3, .L1679+40
mov r0, r6
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #176
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+40
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+44
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+48
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+52
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+56
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+60
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #264
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+64
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #184
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+72
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
mov ip, r0
add r1, sp, #120
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L1679+68
cmp ip, #0
orrne r4, r4, #1
bl __aeabi_dcmpeq
cmp r0, #0
orrne r4, r4, #1
tst r4, #1
beq .L5
ldr r3, [sp, #388]
cmp r3, #0
beq .L1039
add r3, sp, #248
ldmia r3, {r2-r3}
add r1, sp, #216
ldmia r1, {r0-r1}
bl __aeabi_dsub
ldr r3, .L1679+72
mov r2, #0
bl __aeabi_dcmpge
cmp r0, #0
movne r3, #1
bne .L1040
.L1039:
add r3, sp, #240
ldmia r3, {r2-r3}
add r1, sp, #376
ldmia r1, {r0-r1}
bl __aeabi_dsub
ldr r3, .L1679+76
mov r2, #0
bl __aeabi_dcmpge
clz r3, r0
lsr r3, r3, #5
.L1040:
ldr r2, [sp, #384]
cmp r2, r3
bne .L5
cmp r8, #0
blt .L5
ldr r3, [sp, #112] @ float
str r9, [sp, #344] @ float
str r3, [sp, #368] @ float
ldr r3, [sp, #108] @ float
str r3, [sp, #360] @ float
ldr r3, [sp, #104] @ float
str r3, [sp, #168] @ float
ldr r3, [sp, #100] @ float
str r3, [sp, #352] @ float
ldr r3, [sp, #96] @ float
str r3, [sp, #176] @ float
ldr r3, [sp, #92] @ float
str r3, [sp, #200] @ float
ldr r3, [sp, #88] @ float
str r3, [sp, #120] @ float
ldr r3, [sp, #84] @ float
str r3, [sp, #336] @ float
ldr r3, [sp, #80] @ float
str r3, [sp, #160] @ float
ldr r3, [sp, #76] @ float
str r3, [sp, #328] @ float
ldr r3, [sp, #72] @ float
str r3, [sp, #320] @ float
ldr r3, [sp, #68] @ float
str r3, [sp, #312] @ float
ldr r3, [sp, #64] @ float
str r3, [sp, #304] @ float
ldr r3, [sp, #60] @ float
str r3, [sp, #296] @ float
ldr r3, [sp, #56] @ float
str r3, [sp, #288] @ float
ldr r3, [sp, #52] @ float
str r3, [sp, #280] @ float
ldr r3, [sp, #48] @ float
ldr r6, [sp, #20] @ float
str r3, [sp, #272] @ float
ldr r3, [sp, #44] @ float
str r3, [sp, #144] @ float
ldr r3, [sp, #40] @ float
str r3, [sp, #264] @ float
ldr r3, [sp, #36] @ float
str r3, [sp, #256] @ float
ldr r3, [sp, #32] @ float
str r3, [sp, #152] @ float
ldr r3, [sp, #28] @ float
str r3, [sp, #248] @ float
ldr r3, [sp, #24] @ float
str r3, [sp, #240] @ float
ldr r3, [sp, #16] @ float
str r3, [sp, #232] @ float
ldr r3, [sp, #12] @ float
str r3, [sp, #224] @ float
ldr r3, [sp, #8] @ float
str r3, [sp, #136] @ float
ldr r3, [sp, #4] @ float
str r3, [sp, #216] @ float
ldr r3, [sp] @ float
str r3, [sp, #128] @ float
ldr r3, [sp, #116]
str r3, [sp, #384]
b .L1042
.L1663:
mov r0, r10
bl __aeabi_f2d
mov r4, r0
mov r0, fp
mov r5, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r2, #0
ldr r3, .L1682
bl __aeabi_dcmpge
cmp r0, #0
moveq r9, #0
cmp r9, #0
bne .L7
.L5:
mov r0, #0
add sp, sp, #532
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1683:
.align 2
.L1682:
.word -1071120384
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001116.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "TAP version 13"
.text
.p2align 4
.globl print_version
.type print_version, @function
print_version:
.LFB39:
.cfi_startproc
endbr64
lea rdi, .LC0[rip]
jmp puts@PLT
.cfi_endproc
.LFE39:
.size print_version, .-print_version
.section .rodata.str1.1
.LC1:
.string "#"
.LC2:
.string "1..%d\n"
.LC3:
.string "# total %d\n"
.LC4:
.string "# pass %d\n"
.LC5:
.string "# ok"
.text
.p2align 4
.globl print_summary
.type print_summary, @function
print_summary:
.LFB40:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r13d, esi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12d, edi
lea rdi, .LC1[rip]
sub rsp, 8
.cfi_def_cfa_offset 32
call puts@PLT
mov edx, r12d
mov edi, 1
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
mov edx, r12d
mov edi, 1
xor eax, eax
lea rsi, .LC3[rip]
call __printf_chk@PLT
mov edx, r13d
mov edi, 1
xor eax, eax
lea rsi, .LC4[rip]
call __printf_chk@PLT
lea rdi, .LC1[rip]
call puts@PLT
add rsp, 8
.cfi_def_cfa_offset 24
lea rdi, .LC5[rip]
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE40:
.size print_summary, .-print_summary
.section .rodata.str1.1
.LC6:
.string " ---"
.LC7:
.string " iterations: %d\n"
.LC8:
.string " elapsed: %0.9f\n"
.LC10:
.string " rate: %0.9f\n"
.LC11:
.string " ..."
.text
.p2align 4
.globl print_results
.type print_results, @function
print_results:
.LFB41:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC6[rip]
movsd QWORD PTR 8[rsp], xmm0
call puts@PLT
mov edx, 1000000
lea rsi, .LC7[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
movsd xmm0, QWORD PTR 8[rsp]
mov edi, 1
lea rsi, .LC8[rip]
mov eax, 1
call __printf_chk@PLT
mov edi, 1
lea rsi, .LC10[rip]
mov eax, 1
movsd xmm0, QWORD PTR .LC9[rip]
divsd xmm0, QWORD PTR 8[rsp]
call __printf_chk@PLT
lea rdi, .LC11[rip]
add rsp, 24
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE41:
.size print_results, .-print_results
.p2align 4
.globl tic
.type tic, @function
tic:
.LFB42:
.cfi_startproc
endbr64
sub rsp, 40
.cfi_def_cfa_offset 48
xor esi, esi
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov rdi, rsp
call gettimeofday@PLT
pxor xmm1, xmm1
pxor xmm0, xmm0
cvtsi2sd xmm1, QWORD PTR [rsp]
cvtsi2sd xmm0, QWORD PTR 8[rsp]
divsd xmm0, QWORD PTR .LC9[rip]
addsd xmm0, xmm1
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L10
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE42:
.size tic, .-tic
.p2align 4
.globl rand_double
.type rand_double, @function
rand_double:
.LFB43:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call rand@PLT
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR .LC12[rip]
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE43:
.size rand_double, .-rand_double
.section .rodata.str1.1
.LC15:
.string "should not return NaN"
.text
.p2align 4
.globl benchmark
.type benchmark, @function
benchmark:
.LFB44:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
xor esi, esi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov ebx, 1000000
sub rsp, 72
.cfi_def_cfa_offset 112
mov rax, QWORD PTR fs:40
mov QWORD PTR 56[rsp], rax
xor eax, eax
lea r13, 32[rsp]
lea r12, 24[rsp]
mov rdi, r13
lea rbp, 16[rsp]
call gettimeofday@PLT
pxor xmm1, xmm1
pxor xmm0, xmm0
cvtsi2sd xmm1, QWORD PTR 32[rsp]
cvtsi2sd xmm0, QWORD PTR 40[rsp]
divsd xmm0, QWORD PTR .LC9[rip]
addsd xmm0, xmm1
movsd QWORD PTR 8[rsp], xmm0
.p2align 4,,10
.p2align 3
.L18:
call rand@PLT
pxor xmm0, xmm0
mov rsi, r12
mov rdi, rbp
cvtsi2sd xmm0, eax
mulsd xmm0, QWORD PTR .LC12[rip]
mulsd xmm0, QWORD PTR .LC13[rip]
subsd xmm0, QWORD PTR .LC14[rip]
call sici@PLT
movsd xmm0, QWORD PTR 16[rsp]
ucomisd xmm0, xmm0
jp .L14
movsd xmm0, QWORD PTR 24[rsp]
ucomisd xmm0, xmm0
jp .L14
sub ebx, 1
jne .L18
.p2align 4,,10
.p2align 3
.L17:
xor esi, esi
mov rdi, r13
call gettimeofday@PLT
pxor xmm1, xmm1
pxor xmm0, xmm0
cvtsi2sd xmm1, QWORD PTR 32[rsp]
cvtsi2sd xmm0, QWORD PTR 40[rsp]
divsd xmm0, QWORD PTR .LC9[rip]
addsd xmm0, xmm1
movsd xmm1, QWORD PTR 16[rsp]
subsd xmm0, QWORD PTR 8[rsp]
ucomisd xmm1, xmm1
jp .L19
movsd xmm1, QWORD PTR 24[rsp]
ucomisd xmm1, xmm1
jp .L19
.L13:
mov rax, QWORD PTR 56[rsp]
sub rax, QWORD PTR fs:40
jne .L26
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
lea rdi, .LC15[rip]
call puts@PLT
jmp .L17
.L19:
lea rdi, .LC15[rip]
movsd QWORD PTR 8[rsp], xmm0
call puts@PLT
movsd xmm0, QWORD PTR 8[rsp]
jmp .L13
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE44:
.size benchmark, .-benchmark
.section .rodata.str1.1
.LC16:
.string "sici"
.LC17:
.string "# c::cephes::%s\n"
.LC18:
.string "ok %d benchmark finished\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB45:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
xor edi, edi
lea rbp, .LC16[rip]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 32
call time@PLT
mov rdi, rax
call srand@PLT
lea rdi, .LC0[rip]
call puts@PLT
.L28:
mov rdx, rbp
lea rsi, .LC17[rip]
xor eax, eax
add ebx, 1
mov edi, 1
call __printf_chk@PLT
xor eax, eax
call benchmark
call print_results
xor eax, eax
mov edx, ebx
lea rsi, .LC18[rip]
mov edi, 1
call __printf_chk@PLT
cmp ebx, 3
jne .L28
mov esi, 3
mov edi, 3
call print_summary
add rsp, 8
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE45:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC9:
.long 0
.long 1093567616
.align 8
.LC12:
.long 0
.long 1040187392
.align 8
.LC13:
.long 0
.long 1079574528
.align 8
.LC14:
.long 0
.long 1078525952
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001116.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "TAP version 13\000"
.text
.align 2
.global print_version
.syntax unified
.arm
.fpu softvfp
.type print_version, %function
print_version:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r0, .L3
b puts
.L4:
.align 2
.L3:
.word .LC0
.size print_version, .-print_version
.section .rodata.str1.4
.align 2
.LC1:
.ascii "#\000"
.align 2
.LC2:
.ascii "1..%d\012\000"
.align 2
.LC3:
.ascii "# total %d\012\000"
.align 2
.LC4:
.ascii "# pass %d\012\000"
.align 2
.LC5:
.ascii "# ok\000"
.text
.align 2
.global print_summary
.syntax unified
.arm
.fpu softvfp
.type print_summary, %function
print_summary:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, r0
mov r5, r1
ldr r6, .L7
mov r0, r6
bl puts
mov r2, r4
ldr r1, .L7+4
mov r0, #1
bl __printf_chk
mov r2, r4
ldr r1, .L7+8
mov r0, #1
bl __printf_chk
mov r2, r5
ldr r1, .L7+12
mov r0, #1
bl __printf_chk
mov r0, r6
bl puts
pop {r4, r5, r6, lr}
ldr r0, .L7+16
b puts
.L8:
.align 2
.L7:
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.size print_summary, .-print_summary
.section .rodata.str1.4
.align 2
.LC6:
.ascii " ---\000"
.align 2
.LC7:
.ascii " iterations: %d\012\000"
.align 2
.LC8:
.ascii " elapsed: %0.9f\012\000"
.global __aeabi_ddiv
.align 2
.LC9:
.ascii " rate: %0.9f\012\000"
.align 2
.LC10:
.ascii " ...\000"
.text
.align 2
.global print_results
.syntax unified
.arm
.fpu softvfp
.type print_results, %function
print_results:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, r1
mov r4, r0
ldr r0, .L11
bl puts
ldr r2, .L11+4
ldr r1, .L11+8
mov r0, #1
bl __printf_chk
mov r2, r4
mov r3, r5
ldr r1, .L11+12
mov r0, #1
bl __printf_chk
mov r2, r4
mov r3, r5
mov r0, #0
ldr r1, .L11+16
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L11+20
bl __printf_chk
pop {r4, r5, r6, lr}
ldr r0, .L11+24
b puts
.L12:
.align 2
.L11:
.word .LC6
.word 1000000
.word .LC7
.word .LC8
.word 1093567616
.word .LC9
.word .LC10
.size print_results, .-print_results
.global __aeabi_i2d
.global __aeabi_dadd
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC11:
.word __stack_chk_guard
.text
.align 2
.global tic
.syntax unified
.arm
.fpu softvfp
.type tic, %function
tic:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L17
sub sp, sp, #20
mov r1, #0
add r0, sp, #4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl gettimeofday
ldr r0, [sp, #8]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L17+4
bl __aeabi_ddiv
mov r4, r0
ldr r0, [sp, #4]
mov r5, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
ldr r3, .L17
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L16
add sp, sp, #20
@ sp needed
pop {r4, r5, pc}
.L16:
bl __stack_chk_fail
.L18:
.align 2
.L17:
.word .LC11
.word 1093567616
.size tic, .-tic
.global __aeabi_dmul
.align 2
.global rand_double
.syntax unified
.arm
.fpu softvfp
.type rand_double, %function
rand_double:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl rand
bl __aeabi_i2d
mov r2, #0
mov r3, #1040187392
bl __aeabi_dmul
pop {r4, pc}
.size rand_double, .-rand_double
.global __aeabi_dsub
.global __aeabi_dcmpeq
.section .rodata.str1.4
.align 2
.LC12:
.ascii "should not return NaN\000"
.section .rodata.cst4
.align 2
.LC13:
.word __stack_chk_guard
.text
.align 2
.global benchmark
.syntax unified
.arm
.fpu softvfp
.type benchmark, %function
benchmark:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r3, .L48
sub sp, sp, #40
mov r1, #0
add r0, sp, #28
ldr r3, [r3]
str r3, [sp, #36]
mov r3,#0
bl gettimeofday
ldr r0, [sp, #32]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L48+4
bl __aeabi_ddiv
mov r4, r0
ldr r0, [sp, #28]
mov r5, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r6, #0
mov r7, #1040187392
mov r4, #0
mov r8, #0
stm sp, {r0-r1}
ldr r5, .L48+8
ldr r9, .L48+12
ldr r10, .L48+16
b .L26
.L46:
add r3, sp, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_dcmpeq
cmp r0, #0
beq .L22
subs r10, r10, #1
beq .L25
.L26:
bl rand
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r2, r8
mov r3, r9
bl __aeabi_dsub
add r3, sp, #16
add r2, sp, #8
bl sici
add r3, sp, #8
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_dcmpeq
cmp r0, #0
bne .L46
.L22:
ldr r0, .L48+20
bl puts
.L25:
mov r1, #0
add r0, sp, #28
bl gettimeofday
ldr r0, [sp, #32]
bl __aeabi_i2d
mov r2, #0
ldr r3, .L48+4
bl __aeabi_ddiv
mov r4, r0
ldr r0, [sp, #28]
mov r5, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
ldmia sp, {r2-r3}
bl __aeabi_dsub
add r3, sp, #8
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r2
mov r1, r3
bl __aeabi_dcmpeq
cmp r0, #0
beq .L27
add r3, sp, #16
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_dcmpeq
cmp r0, #0
beq .L27
.L21:
ldr r3, .L48
ldr r2, [r3]
ldr r3, [sp, #36]
eors r2, r3, r2
mov r3, #0
bne .L47
mov r0, r4
mov r1, r5
add sp, sp, #40
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L27:
ldr r0, .L48+20
bl puts
b .L21
.L47:
bl __stack_chk_fail
.L49:
.align 2
.L48:
.word .LC13
.word 1093567616
.word 1079574528
.word 1078525952
.word 1000000
.word .LC12
.size benchmark, .-benchmark
.section .rodata.str1.4
.align 2
.LC14:
.ascii "sici\000"
.align 2
.LC15:
.ascii "# c::cephes::%s\012\000"
.align 2
.LC16:
.ascii "ok %d benchmark finished\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r0, #0
bl time
bl srand
ldr r0, .L54
bl puts
mov r4, #0
ldr r7, .L54+4
ldr r6, .L54+8
ldr r5, .L54+12
.L51:
mov r0, #1
mov r2, r7
mov r1, r6
add r4, r4, r0
bl __printf_chk
bl benchmark
bl print_results
mov r2, r4
mov r1, r5
mov r0, #1
bl __printf_chk
cmp r4, #3
bne .L51
mov r0, r4
mov r1, r4
bl print_summary
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L55:
.align 2
.L54:
.word .LC0
.word .LC14
.word .LC15
.word .LC16
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100112.c"
.intel_syntax noprefix
.text
.p2align 4
.globl bfs
.type bfs, @function
bfs:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
movsx r8, DWORD PTR f[rip]
movsx rax, edi
xor r10d, r10d
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov esi, DWORD PTR r[rip]
lea r13, a[rip]
lea rdi, visited[rip]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
lea r9, q[rip]
xor ebp, ebp
mov r12d, r8d
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov ebx, DWORD PTR n[rip]
lea r11d, 1[rbx]
test ebx, ebx
jle .L9
.p2align 4,,10
.p2align 3
.L19:
lea rdx, [rax+rax*4]
mov ecx, r11d
mov eax, 1
sal rdx, 4
add rdx, r13
.p2align 4,,10
.p2align 3
.L4:
cmp DWORD PTR [rdx+rax*4], 0
je .L3
cmp DWORD PTR [rdi+rax*4], 0
jne .L3
add esi, 1
movsx r10, esi
mov DWORD PTR [r9+r10*4], eax
mov r10d, 1
.L3:
add rax, 1
cmp rcx, rax
jne .L4
mov eax, r11d
cmp esi, r8d
jl .L5
.L20:
movsx rax, DWORD PTR [r9+r8*4]
add r8, 1
mov ebp, 1
mov r12d, r8d
movsx rdx, eax
mov DWORD PTR [rdi+rdx*4], 1
test ebx, ebx
jg .L19
.L9:
mov eax, 1
cmp esi, r8d
jge .L20
.p2align 4,,10
.p2align 3
.L5:
mov DWORD PTR i[rip], eax
test r10b, r10b
je .L7
mov DWORD PTR r[rip], esi
.L7:
test bpl, bpl
je .L1
mov DWORD PTR f[rip], r12d
.L1:
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size bfs, .-bfs
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "\n Enter the number of vertices:"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d"
.section .rodata.str1.8
.align 8
.LC2:
.string "\n Enter graph data in matrix form:"
.section .rodata.str1.1
.LC3:
.string "\n Enter the starting vertex:"
.section .rodata.str1.8
.align 8
.LC4:
.string "\n The node which are reachable are:"
.section .rodata.str1.1
.LC5:
.string "%d\t"
.section .rodata.str1.8
.align 8
.LC6:
.string "\n Bfs is not possible. Not all nodes are reachable"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea rsi, .LC0[rip]
mov edi, 1
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 16
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, n[rip]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov ebx, DWORD PTR n[rip]
mov DWORD PTR i[rip], 1
test ebx, ebx
jle .L22
movsx r12, ebx
xor esi, esi
lea rdi, q[rip+4]
add ebx, 1
sal r12, 2
mov rdx, r12
call memset@PLT
mov rdx, r12
xor esi, esi
lea rdi, visited[rip+4]
call memset@PLT
mov DWORD PTR i[rip], ebx
.L22:
lea rdi, .LC2[rip]
lea rbp, a[rip]
call puts@PLT
mov ecx, DWORD PTR n[rip]
mov edx, 1
mov DWORD PTR i[rip], 1
lea rbx, .LC1[rip]
test ecx, ecx
jle .L29
.p2align 4,,10
.p2align 3
.L23:
mov DWORD PTR j[rip], 1
test ecx, ecx
jle .L26
mov eax, 1
.p2align 4,,10
.p2align 3
.L28:
movsx rdx, edx
cdqe
mov rdi, rbx
lea rdx, [rdx+rdx*4]
lea rax, [rax+rdx*4]
lea rsi, 0[rbp+rax*4]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR j[rip]
mov ecx, DWORD PTR n[rip]
mov edx, DWORD PTR i[rip]
add eax, 1
mov DWORD PTR j[rip], eax
cmp eax, ecx
jle .L28
.L26:
add edx, 1
mov DWORD PTR i[rip], edx
cmp edx, ecx
jle .L23
.L29:
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 4[rsp]
xor eax, eax
lea rdi, .LC1[rip]
call __isoc99_scanf@PLT
mov edi, DWORD PTR 4[rsp]
lea rbx, visited[rip]
lea rbp, .LC5[rip]
call bfs
lea rdi, .LC4[rip]
call puts@PLT
mov ecx, DWORD PTR n[rip]
mov edx, 1
mov DWORD PTR i[rip], 1
test ecx, ecx
jg .L24
jmp .L21
.p2align 4,,10
.p2align 3
.L40:
xor eax, eax
mov rsi, rbp
mov edi, 1
call __printf_chk@PLT
mov eax, DWORD PTR i[rip]
lea edx, 1[rax]
cmp edx, DWORD PTR n[rip]
mov DWORD PTR i[rip], edx
jg .L21
.L24:
movsx rax, edx
mov eax, DWORD PTR [rbx+rax*4]
test eax, eax
jne .L40
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L21:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L41
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE24:
.size main, .-main
.globl r
.data
.align 4
.type r, @object
.size r, 4
r:
.long -1
.globl f
.bss
.align 4
.type f, @object
.size f, 4
f:
.zero 4
.globl j
.align 4
.type j, @object
.size j, 4
j:
.zero 4
.globl i
.align 4
.type i, @object
.size i, 4
i:
.zero 4
.globl n
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.globl visited
.align 32
.type visited, @object
.size visited, 80
visited:
.zero 80
.globl q
.align 32
.type q, @object
.size q, 80
q:
.zero 80
.globl a
.align 32
.type a, @object
.size a, 1600
a:
.zero 1600
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100112.c"
.text
.align 2
.global bfs
.syntax unified
.arm
.fpu softvfp
.type bfs, %function
bfs:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r10, #0
mov r2, r0
mov r0, #1
mov r6, r10
ldr r3, .L22
ldr r7, .L22+4
ldr r9, [r3]
ldr r3, .L22+8
ldr fp, .L22+12
ldr r5, [r3]
ldr r3, .L22+16
ldr r4, .L22+20
ldr lr, [r3]
add ip, r9, r0
add r8, r7, r5, lsl #2
.L6:
cmp r9, #0
mov r3, #1
ble .L2
add r2, r2, r2, lsl #2
add r2, fp, r2, lsl #4
add r2, r2, #4
.L4:
ldr r1, [r2], #4
cmp r1, #0
beq .L3
ldr r1, [r4, r3, lsl #2]
cmp r1, #0
moveq r6, #1
addeq lr, lr, r6
streq r3, [r7, lr, lsl #2]
.L3:
add r3, r3, #1
cmp r3, ip
bne .L4
.L2:
cmp lr, r5
blt .L5
ldr r2, [r8], #4
mov r10, #1
add r5, r5, #1
str r0, [r4, r2, lsl #2]
b .L6
.L5:
ldr r2, .L22+24
cmp r6, #0
str r3, [r2]
ldrne r3, .L22+16
strne lr, [r3]
cmp r10, #0
ldrne r3, .L22+8
strne r5, [r3]
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L23:
.align 2
.L22:
.word n
.word q
.word .LANCHOR1
.word a
.word .LANCHOR0
.word visited
.word i
.size bfs, .-bfs
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012 Enter the number of vertices:\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "\012 Enter graph data in matrix form:\000"
.align 2
.LC3:
.ascii "\012 Enter the starting vertex:\000"
.align 2
.LC4:
.ascii "\012 The node which are reachable are:\000"
.align 2
.LC5:
.ascii "%d\011\000"
.align 2
.LC6:
.ascii "\012 Bfs is not possible. Not all nodes are reachab"
.ascii "le\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r3, .L45
ldr r5, .L45+4
sub sp, sp, #12
ldr r1, .L45+8
mov r0, #1
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __printf_chk
mov r1, r5
ldr r0, .L45+12
bl __isoc99_scanf
mov r3, #1
ldr ip, [r5]
ldr r4, .L45+16
cmp ip, #0
str r3, [r4]
ble .L25
mov r1, #0
ldr r3, .L45+20
ldr r2, .L45+24
add r0, r3, ip, lsl #2
.L26:
str r1, [r3], #4
cmp r0, r3
str r1, [r2], #4
bne .L26
add ip, ip, #1
str ip, [r4]
.L25:
ldr r0, .L45+28
bl puts
mov r3, #1
ldr r2, [r5]
str r3, [r4]
cmp r2, #0
ble .L33
mov r8, r3
ldr r9, .L45+32
ldr r7, .L45+36
ldr r6, .L45+12
.L27:
cmp r2, #0
str r8, [r9]
ble .L30
mov r1, #1
.L32:
add r3, r3, r3, lsl #2
add r1, r1, r3, lsl #2
add r1, r7, r1, lsl #2
mov r0, r6
bl __isoc99_scanf
ldr r1, [r9]
ldr r2, [r5]
add r1, r1, #1
cmp r1, r2
ldr r3, [r4]
str r1, [r9]
ble .L32
.L30:
add r3, r3, #1
cmp r3, r2
str r3, [r4]
ble .L27
.L33:
ldr r1, .L45+40
mov r0, #1
bl __printf_chk
mov r1, sp
ldr r0, .L45+12
bl __isoc99_scanf
ldr r0, [sp]
bl bfs
ldr r0, .L45+44
bl puts
mov r2, #1
ldr r3, [r5]
str r2, [r4]
cmp r3, #0
ble .L24
ldr r6, .L45+48
ldr r7, .L45+52
b .L28
.L43:
mov r1, r7
mov r0, #1
bl __printf_chk
ldr r2, [r4]
ldr r3, [r5]
add r2, r2, #1
cmp r2, r3
str r2, [r4]
bgt .L24
.L28:
ldr r3, [r6, r2, lsl #2]
cmp r3, #0
bne .L43
mov r0, #1
ldr r1, .L45+56
bl __printf_chk
.L24:
ldr r3, .L45
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L44
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L44:
bl __stack_chk_fail
.L46:
.align 2
.L45:
.word .LC7
.word n
.word .LC0
.word .LC1
.word i
.word q+4
.word visited+4
.word .LC2
.word j
.word a
.word .LC3
.word .LC4
.word visited
.word .LC5
.word .LC6
.size main, .-main
.global r
.global f
.comm j,4,4
.comm i,4,4
.comm n,4,4
.comm visited,80,4
.comm q,80,4
.comm a,1600,4
.data
.align 2
.set .LANCHOR0,. + 0
.type r, %object
.size r, 4
r:
.word -1
.bss
.align 2
.set .LANCHOR1,. + 0
.type f, %object
.size f, 4
f:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100113.c"
.intel_syntax noprefix
.text
.p2align 4
.type sqrt3, @function
sqrt3:
.LFB129:
.cfi_startproc
pxor xmm4, xmm4
movaps xmm3, xmm0
ucomiss xmm0, xmm4
jp .L8
jne .L8
movaps xmm1, xmm4
.L1:
movaps xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L8:
movaps xmm1, xmm3
divss xmm1, DWORD PTR .LC1[rip]
movaps xmm2, xmm1
movsd xmm5, QWORD PTR .LC3[rip]
mulss xmm2, xmm1
mov eax, 1
movss xmm6, DWORD PTR .LC2[rip]
.p2align 4,,10
.p2align 3
.L6:
movaps xmm0, xmm3
subss xmm0, xmm2
pxor xmm2, xmm2
cvtss2sd xmm2, xmm1
addsd xmm2, xmm2
cvtss2sd xmm0, xmm0
divsd xmm0, xmm2
cvtsd2ss xmm0, xmm0
addss xmm1, xmm0
movaps xmm0, xmm3
movaps xmm2, xmm1
mulss xmm2, xmm1
subss xmm0, xmm2
comiss xmm4, xmm0
jbe .L4
xorps xmm0, xmm6
.L4:
add eax, 1
cvtss2sd xmm0, xmm0
comisd xmm5, xmm0
jnb .L1
cmp eax, 20
jne .L6
movaps xmm0, xmm1
ret
.cfi_endproc
.LFE129:
.size sqrt3, .-sqrt3
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC4:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/compatibility.h"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "expression"
.text
.p2align 4
.type __DSVERIFIER_assert.part.0, @function
__DSVERIFIER_assert.part.0:
.LFB157:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
call __assert_fail@PLT
.cfi_endproc
.LFE157:
.size __DSVERIFIER_assert.part.0, .-__DSVERIFIER_assert.part.0
.p2align 4
.type double_matrix_multiplication.part.0, @function
double_matrix_multiplication.part.0:
.LFB160:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov QWORD PTR 8[rsp], r8
test edi, edi
je .L14
lea eax, -1[rdi]
mov rbx, rcx
mov ebp, esi
mov r14d, edx
sal rax, 5
mov r15, r9
mov rcx, r9
mov QWORD PTR 24[rsp], rax
lea r12, [r9+rax]
lea eax, -1[rdx]
mov QWORD PTR 16[rsp], rax
lea r13, 8[0+rax*8]
jmp .L17
.p2align 4,,10
.p2align 3
.L26:
mov rcx, rax
.L17:
test r14d, r14d
je .L20
mov rdi, rcx
mov rdx, r13
xor esi, esi
call memset@PLT
mov rcx, rax
.L20:
lea rax, 32[rcx]
cmp rcx, r12
jne .L26
lea eax, -1[rbp]
mov rcx, QWORD PTR 16[rsp]
lea rdi, 8[rbx+rax*8]
mov rax, QWORD PTR 24[rsp]
lea r12, 32[rbx+rax]
mov rax, QWORD PTR 8[rsp]
lea rcx, 8[rax+rcx*8]
.p2align 4,,10
.p2align 3
.L18:
mov r9, QWORD PTR 8[rsp]
mov rsi, r15
test r14d, r14d
je .L22
.L25:
test ebp, ebp
je .L24
movsd xmm1, QWORD PTR [rsi]
mov rdx, r9
mov rax, rbx
.L21:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR [rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
movsd QWORD PTR [rsi], xmm1
cmp rax, rdi
jne .L21
.L24:
add r9, 8
add rsi, 8
cmp r9, rcx
jne .L25
.L22:
add rbx, 32
add rdi, 32
add r15, 32
cmp rbx, r12
jne .L18
.L14:
add rsp, 40
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE160:
.size double_matrix_multiplication.part.0, .-double_matrix_multiplication.part.0
.p2align 4
.type nchoosek.part.0, @function
nchoosek.part.0:
.LFB163:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, esi
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, esi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, edi
sub rsp, 24
.cfi_def_cfa_offset 80
sub r13d, 1
jne .L49
.L32:
mov eax, ebx
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
cdq
pop rbx
.cfi_def_cfa_offset 48
idiv ebp
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L49:
.cfi_restore_state
mov r15d, esi
lea r12d, -1[rdi]
sub r15d, 2
je .L33
mov ecx, esi
lea r14d, -2[rdi]
sub ecx, 3
jne .L50
.L34:
mov eax, r14d
cdq
idiv r15d
imul r12d, eax
.L33:
mov eax, r12d
cdq
idiv r13d
imul ebx, eax
jmp .L32
.p2align 4,,10
.p2align 3
.L50:
lea edx, -3[rdi]
sub esi, 4
je .L35
lea edi, -4[rdi]
mov DWORD PTR 12[rsp], edx
mov DWORD PTR 8[rsp], ecx
call nchoosek.part.0
mov edx, DWORD PTR 12[rsp]
mov ecx, DWORD PTR 8[rsp]
imul edx, eax
.L35:
mov eax, edx
cdq
idiv ecx
imul r14d, eax
jmp .L34
.cfi_endproc
.LFE163:
.size nchoosek.part.0, .-nchoosek.part.0
.p2align 4
.type determinant.part.0, @function
determinant.part.0:
.LFB162:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pxor xmm5, xmm5
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 168
.cfi_def_cfa_offset 224
mov rax, QWORD PTR fs:40
mov QWORD PTR 152[rsp], rax
xor eax, eax
test esi, esi
jle .L51
cmp esi, 1
lea r12d, 1[rsi]
mov eax, 2
mov r13, rdi
pxor xmm6, xmm6
cmovle r12d, eax
mov ebx, esi
mov r14d, esi
movsd xmm4, QWORD PTR .LC6[rip]
movq xmm3, QWORD PTR .LC8[rip]
lea r15d, -1[rsi]
xor ebp, ebp
movapd xmm5, xmm6
.L53:
mov r9d, ebp
.p2align 4,,10
.p2align 3
.L64:
cmp ebx, 1
je .L56
lea rdi, 32[r13]
xor r8d, r8d
.L58:
movsx rsi, r8d
xor eax, eax
xor ecx, ecx
sal rsi, 2
.L55:
cmp ebp, eax
je .L54
movsx rdx, ecx
movsd xmm0, QWORD PTR [rdi+rax*8]
add ecx, 1
add rdx, rsi
movsd QWORD PTR 16[rsp+rdx*8], xmm0
.L54:
add rax, 1
cmp ebx, eax
jg .L55
add r8d, 1
add rdi, 32
cmp r15d, r8d
jne .L58
.L56:
cmp r15d, r12d
jg .L64
pxor xmm2, xmm2
xor eax, eax
movapd xmm0, xmm4
cvtsi2sd xmm2, r9d
addsd xmm2, xmm4
addsd xmm2, xmm4
comisd xmm2, xmm6
jbe .L59
.p2align 4,,10
.p2align 3
.L61:
add eax, 1
pxor xmm1, xmm1
xorpd xmm0, xmm3
cvtsi2sd xmm1, eax
comisd xmm2, xmm1
ja .L61
.L59:
movsd xmm1, QWORD PTR 0[r13+rbp*8]
mulsd xmm1, xmm0
cmp r15d, 2
je .L76
lea rdi, 16[rsp]
mov esi, r15d
movsd QWORD PTR 8[rsp], xmm5
movsd QWORD PTR [rsp], xmm1
call determinant.part.0
mov rax, QWORD PTR .LC6[rip]
movsd xmm5, QWORD PTR 8[rsp]
pxor xmm6, xmm6
movq xmm3, QWORD PTR .LC8[rip]
movsd xmm1, QWORD PTR [rsp]
movq xmm4, rax
.L63:
mulsd xmm0, xmm1
add rbp, 1
addsd xmm5, xmm0
cmp r14, rbp
jne .L53
.L51:
mov rax, QWORD PTR 152[rsp]
sub rax, QWORD PTR fs:40
jne .L77
add rsp, 168
.cfi_remember_state
.cfi_def_cfa_offset 56
movapd xmm0, xmm5
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L76:
.cfi_restore_state
movsd xmm0, QWORD PTR 16[rsp]
movsd xmm2, QWORD PTR 48[rsp]
mulsd xmm0, QWORD PTR 56[rsp]
mulsd xmm2, QWORD PTR 24[rsp]
subsd xmm0, xmm2
jmp .L63
.L77:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE162:
.size determinant.part.0, .-determinant.part.0
.p2align 4
.globl __DSVERIFIER_assume
.type __DSVERIFIER_assume, @function
__DSVERIFIER_assume:
.LFB6:
.cfi_startproc
endbr64
movzx edi, dil
xor eax, eax
jmp __ESBMC_assume@PLT
.cfi_endproc
.LFE6:
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.p2align 4
.globl __DSVERIFIER_assert
.type __DSVERIFIER_assert, @function
__DSVERIFIER_assert:
.LFB7:
.cfi_startproc
endbr64
test dil, dil
je .L84
ret
.L84:
push rax
.cfi_def_cfa_offset 16
call __DSVERIFIER_assert.part.0
.cfi_endproc
.LFE7:
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata.str1.1
.LC9:
.string "%s"
.text
.p2align 4
.globl __DSVERIFIER_assert_msg
.type __DSVERIFIER_assert_msg, @function
__DSVERIFIER_assert_msg:
.LFB8:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
xor eax, eax
mov ebx, edi
lea rdi, .LC9[rip]
call printf@PLT
test bl, bl
je .L88
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L88:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.20[rip]
mov edx, 41
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE8:
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.p2align 4
.globl wrap
.type wrap, @function
wrap:
.LFB9:
.cfi_startproc
endbr64
mov ecx, edx
sub ecx, esi
add ecx, 1
movsx rcx, ecx
cmp rsi, rdi
jle .L90
mov rax, rsi
sub rax, rdi
cqo
idiv rcx
add rax, 1
imul rax, rcx
add rdi, rax
.L90:
mov rax, rdi
sub rax, rsi
cqo
idiv rcx
lea rax, [rdx+rsi]
ret
.cfi_endproc
.LFE9:
.size wrap, .-wrap
.p2align 4
.globl fxp_get_int_part
.type fxp_get_int_part, @function
fxp_get_int_part:
.LFB10:
.cfi_startproc
endbr64
mov rdx, QWORD PTR _fxp_imask[rip]
mov rax, rdi
and rax, rdx
test rdi, rdi
js .L94
ret
.p2align 4,,10
.p2align 3
.L94:
neg rdi
and rdi, rdx
mov rax, rdi
neg rax
ret
.cfi_endproc
.LFE10:
.size fxp_get_int_part, .-fxp_get_int_part
.p2align 4
.globl fxp_get_frac_part
.type fxp_get_frac_part, @function
fxp_get_frac_part:
.LFB11:
.cfi_startproc
endbr64
mov rdx, QWORD PTR _fxp_fmask[rip]
mov rax, rdi
and rax, rdx
test rdi, rdi
js .L98
ret
.p2align 4,,10
.p2align 3
.L98:
neg rdi
and rdi, rdx
mov rax, rdi
neg rax
ret
.cfi_endproc
.LFE11:
.size fxp_get_frac_part, .-fxp_get_frac_part
.p2align 4
.globl fxp_quantize
.type fxp_quantize, @function
fxp_quantize:
.LFB12:
.cfi_startproc
endbr64
mov eax, DWORD PTR overflow_mode[rip]
mov r8, rdi
cmp eax, 2
je .L107
cmp eax, 3
je .L108
.L106:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L108:
mov rsi, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp rdi, rsi
jl .L102
cmp rdi, rax
jle .L106
add eax, 1
sub eax, esi
movsx rcx, eax
.L104:
mov rax, r8
sub rax, rsi
cqo
idiv rcx
lea r8, [rdx+rsi]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L107:
mov rax, QWORD PTR _fxp_min[rip]
cmp rax, rdi
jg .L105
mov rax, QWORD PTR _fxp_max[rip]
cmp rdi, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L102:
add eax, 1
sub eax, esi
movsx rcx, eax
mov rax, rsi
sub rax, rdi
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L104
.p2align 4,,10
.p2align 3
.L105:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE12:
.size fxp_quantize, .-fxp_quantize
.section .rodata.str1.8
.align 8
.LC10:
.string "An Overflow Occurred in system's output"
.text
.p2align 4
.globl fxp_verify_overflow
.type fxp_verify_overflow, @function
fxp_verify_overflow:
.LFB13:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
xor eax, eax
mov rbx, rdi
lea rdi, .LC10[rip]
call printf@PLT
cmp QWORD PTR _fxp_max[rip], rbx
jge .L113
.L110:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L113:
cmp QWORD PTR _fxp_min[rip], rbx
jg .L110
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE13:
.size fxp_verify_overflow, .-fxp_verify_overflow
.p2align 4
.globl fxp_verify_overflow_node
.type fxp_verify_overflow_node, @function
fxp_verify_overflow_node:
.LFB14:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
xor eax, eax
mov rbx, rdi
lea rdi, .LC9[rip]
call printf@PLT
cmp QWORD PTR _fxp_max[rip], rbx
jge .L118
.L115:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L118:
cmp QWORD PTR _fxp_min[rip], rbx
jg .L115
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE14:
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.p2align 4
.globl fxp_verify_overflow_array
.type fxp_verify_overflow_array, @function
fxp_verify_overflow_array:
.LFB15:
.cfi_startproc
endbr64
test esi, esi
jle .L126
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea eax, -1[rsi]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r13, 8[rdi+rax*8]
lea r12, .LC10[rip]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rdi
sub rsp, 8
.cfi_def_cfa_offset 48
.p2align 4,,10
.p2align 3
.L123:
xor eax, eax
mov rdi, r12
mov rbp, QWORD PTR [rbx]
call printf@PLT
cmp rbp, QWORD PTR _fxp_max[rip]
jle .L129
.L121:
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L129:
cmp rbp, QWORD PTR _fxp_min[rip]
jl .L121
add rbx, 8
cmp rbx, r13
jne .L123
add rsp, 8
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L126:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE15:
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.p2align 4
.globl fxp_int_to_fxp
.type fxp_int_to_fxp, @function
fxp_int_to_fxp:
.LFB16:
.cfi_startproc
endbr64
movsx rax, edi
imul rax, QWORD PTR _fxp_one[rip]
ret
.cfi_endproc
.LFE16:
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.p2align 4
.globl fxp_to_int
.type fxp_to_int, @function
fxp_to_int:
.LFB17:
.cfi_startproc
endbr64
mov rdx, QWORD PTR _fxp_half[rip]
mov rax, rdi
mov ecx, DWORD PTR impl[rip+4]
sub rax, QWORD PTR _fxp_half[rip]
add rdx, rdi
test rdi, rdi
cmovns rax, rdx
sar rax, cl
ret
.cfi_endproc
.LFE17:
.size fxp_to_int, .-fxp_to_int
.p2align 4
.globl fxp_float_to_fxp
.type fxp_float_to_fxp, @function
fxp_float_to_fxp:
.LFB18:
.cfi_startproc
endbr64
movaps xmm1, xmm0
comiss xmm1, DWORD PTR .LC0[rip]
cvtss2sd xmm0, xmm0
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor[rip]
mulsd xmm0, QWORD PTR [rax+rdx*8]
jb .L139
addsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si rax, xmm0
ret
.p2align 4,,10
.p2align 3
.L139:
subsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si rax, xmm0
ret
.cfi_endproc
.LFE18:
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.p2align 4
.globl fxp_double_to_fxp
.type fxp_double_to_fxp, @function
fxp_double_to_fxp:
.LFB19:
.cfi_startproc
endbr64
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor[rip]
movsd xmm1, QWORD PTR [rax+rdx*8]
mov eax, DWORD PTR rounding_mode[rip]
mulsd xmm1, xmm0
test eax, eax
jne .L141
comisd xmm0, QWORD PTR .LC7[rip]
jb .L152
addsd xmm1, QWORD PTR .LC11[rip]
cvttsd2si r8, xmm1
.L140:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L152:
subsd xmm1, QWORD PTR .LC11[rip]
cvttsd2si r8, xmm1
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L141:
cmp eax, 1
jne .L140
cvttsd2si r8, xmm1
pxor xmm2, xmm2
movapd xmm3, xmm1
mov edx, 1
cvtsi2sd xmm2, r8
subsd xmm3, xmm2
pxor xmm2, xmm2
ucomisd xmm3, xmm2
setp al
cmovne eax, edx
test al, al
je .L140
comisd xmm2, xmm0
jbe .L140
subsd xmm1, QWORD PTR .LC6[rip]
cvttsd2si r8, xmm1
jmp .L140
.cfi_endproc
.LFE19:
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.p2align 4
.globl fxp_float_to_fxp_array
.type fxp_float_to_fxp_array, @function
fxp_float_to_fxp_array:
.LFB20:
.cfi_startproc
endbr64
test edx, edx
jle .L153
movsx rcx, DWORD PTR impl[rip+4]
lea rax, scale_factor[rip]
movsd xmm4, QWORD PTR .LC11[rip]
pxor xmm2, xmm2
movsd xmm3, QWORD PTR [rax+rcx*8]
movsx rcx, edx
xor eax, eax
jmp .L158
.p2align 4,,10
.p2align 3
.L162:
addsd xmm0, xmm4
cvttsd2si rdx, xmm0
mov QWORD PTR [rsi+rax*8], rdx
add rax, 1
cmp rcx, rax
je .L153
.L158:
movss xmm1, DWORD PTR [rdi+rax*4]
pxor xmm0, xmm0
comiss xmm1, xmm2
cvtss2sd xmm0, xmm1
mulsd xmm0, xmm3
jnb .L162
subsd xmm0, xmm4
cvttsd2si rdx, xmm0
mov QWORD PTR [rsi+rax*8], rdx
add rax, 1
cmp rcx, rax
jne .L158
.L153:
ret
.cfi_endproc
.LFE20:
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.p2align 4
.globl fxp_double_to_fxp_array
.type fxp_double_to_fxp_array, @function
fxp_double_to_fxp_array:
.LFB21:
.cfi_startproc
endbr64
mov r8, rsi
test edx, edx
jle .L163
movsx rsi, DWORD PTR impl[rip+4]
movsx rdx, edx
pxor xmm3, xmm3
mov r10d, 1
lea rax, scale_factor[rip]
movsd xmm4, QWORD PTR .LC11[rip]
movsd xmm2, QWORD PTR [rax+rsi*8]
mov esi, DWORD PTR rounding_mode[rip]
xor eax, eax
jmp .L169
.p2align 4,,10
.p2align 3
.L179:
comisd xmm1, xmm3
jb .L178
addsd xmm0, xmm4
cvttsd2si rcx, xmm0
.L168:
mov QWORD PTR [r8+rax*8], rcx
add rax, 1
cmp rdx, rax
je .L163
.L169:
movsd xmm1, QWORD PTR [rdi+rax*8]
movapd xmm0, xmm1
mulsd xmm0, xmm2
test esi, esi
je .L179
cmp esi, 1
jne .L168
cvttsd2si rcx, xmm0
pxor xmm6, xmm6
movapd xmm5, xmm0
cvtsi2sd xmm6, rcx
subsd xmm5, xmm6
ucomisd xmm5, xmm3
setp r9b
cmovne r9d, r10d
test r9b, r9b
je .L168
comisd xmm3, xmm1
jbe .L168
subsd xmm0, QWORD PTR .LC6[rip]
cvttsd2si rcx, xmm0
mov QWORD PTR [r8+rax*8], rcx
add rax, 1
cmp rdx, rax
jne .L169
.L163:
ret
.p2align 4,,10
.p2align 3
.L178:
subsd xmm0, xmm4
cvttsd2si rcx, xmm0
jmp .L168
.cfi_endproc
.LFE21:
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.p2align 4
.globl fxp_to_float
.type fxp_to_float, @function
fxp_to_float:
.LFB22:
.cfi_startproc
endbr64
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, edi
mulsd xmm0, QWORD PTR [rax+rdx*8]
cvtsd2ss xmm0, xmm0
ret
.cfi_endproc
.LFE22:
.size fxp_to_float, .-fxp_to_float
.p2align 4
.globl fxp_to_double
.type fxp_to_double, @function
fxp_to_double:
.LFB23:
.cfi_startproc
endbr64
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, edi
mulsd xmm0, QWORD PTR [rax+rdx*8]
ret
.cfi_endproc
.LFE23:
.size fxp_to_double, .-fxp_to_double
.p2align 4
.globl fxp_to_float_array
.type fxp_to_float_array, @function
fxp_to_float_array:
.LFB24:
.cfi_startproc
endbr64
test edx, edx
jle .L182
movsx rcx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rcx*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L184:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rsi+rax*8]
mulsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
movss DWORD PTR [rdi+rax*4], xmm0
add rax, 1
cmp rdx, rax
jne .L184
.L182:
ret
.cfi_endproc
.LFE24:
.size fxp_to_float_array, .-fxp_to_float_array
.p2align 4
.globl fxp_to_double_array
.type fxp_to_double_array, @function
fxp_to_double_array:
.LFB25:
.cfi_startproc
endbr64
test edx, edx
jle .L186
movsx rcx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsx rdx, edx
movsd xmm1, QWORD PTR [rax+rcx*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L188:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rsi+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rax*8], xmm0
add rax, 1
cmp rdx, rax
jne .L188
.L186:
ret
.cfi_endproc
.LFE25:
.size fxp_to_double_array, .-fxp_to_double_array
.p2align 4
.globl fxp_abs
.type fxp_abs, @function
fxp_abs:
.LFB26:
.cfi_startproc
endbr64
mov rax, rdi
mov r8, rdi
sar rax, 63
xor r8, rax
sub r8, rax
mov eax, DWORD PTR overflow_mode[rip]
cmp eax, 2
je .L197
cmp eax, 3
je .L198
.L190:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L198:
mov rsi, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rsi
jl .L193
cmp r8, rax
jle .L190
add eax, 1
sub eax, esi
movsx rcx, eax
.L195:
mov rax, r8
sub rax, rsi
cqo
idiv rcx
lea r8, [rdx+rsi]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L197:
mov rax, QWORD PTR _fxp_min[rip]
cmp r8, rax
jl .L196
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L193:
add eax, 1
sub eax, esi
movsx rcx, eax
mov rax, rsi
sub rax, r8
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L195
.p2align 4,,10
.p2align 3
.L196:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE26:
.size fxp_abs, .-fxp_abs
.p2align 4
.globl fxp_add
.type fxp_add, @function
fxp_add:
.LFB27:
.cfi_startproc
endbr64
mov eax, DWORD PTR overflow_mode[rip]
lea r8, [rdi+rsi]
cmp eax, 2
je .L206
cmp eax, 3
je .L207
.L199:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L207:
mov r9, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, r9
jl .L202
cmp r8, rax
jle .L199
add eax, 1
sub eax, r9d
movsx rcx, eax
.L204:
mov rax, r8
sub rax, r9
cqo
idiv rcx
lea r8, [rdx+r9]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L206:
mov rax, QWORD PTR _fxp_min[rip]
cmp r8, rax
jl .L205
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L202:
add eax, 1
sub eax, r9d
movsx rcx, eax
mov rax, r9
sub rax, r8
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L204
.p2align 4,,10
.p2align 3
.L205:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE27:
.size fxp_add, .-fxp_add
.p2align 4
.globl fxp_sub
.type fxp_sub, @function
fxp_sub:
.LFB28:
.cfi_startproc
endbr64
mov eax, DWORD PTR overflow_mode[rip]
sub rdi, rsi
mov r8, rdi
cmp eax, 2
je .L215
cmp eax, 3
je .L216
.L208:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L216:
mov rsi, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp rdi, rsi
jl .L211
cmp rdi, rax
jle .L208
add eax, 1
sub eax, esi
movsx rcx, eax
.L213:
mov rax, r8
sub rax, rsi
cqo
idiv rcx
lea r8, [rdx+rsi]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L215:
mov rax, QWORD PTR _fxp_min[rip]
cmp rdi, rax
jl .L214
mov rax, QWORD PTR _fxp_max[rip]
cmp rdi, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L211:
add eax, 1
sub eax, esi
movsx rcx, eax
mov rax, rsi
sub rax, rdi
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L213
.p2align 4,,10
.p2align 3
.L214:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE28:
.size fxp_sub, .-fxp_sub
.p2align 4
.globl fxp_mult
.type fxp_mult, @function
fxp_mult:
.LFB29:
.cfi_startproc
endbr64
imul rsi, rdi
mov edi, DWORD PTR impl[rip+4]
mov eax, 1
lea ecx, -1[rdi]
sal eax, cl
cdqe
test rsi, rsi
js .L218
and rax, rsi
mov ecx, edi
lea r8, [rsi+rax*2]
mov eax, DWORD PTR overflow_mode[rip]
sar r8, cl
cmp eax, 2
je .L226
.L220:
cmp eax, 3
je .L227
.L217:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L227:
mov rsi, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rsi
jl .L222
cmp r8, rax
jle .L217
add eax, 1
sub eax, esi
movsx rcx, eax
.L224:
mov rax, r8
sub rax, rsi
cqo
idiv rcx
lea r8, [rdx+rsi]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L218:
mov r8, rsi
mov ecx, edi
neg r8
and rax, r8
lea r8, [rax+rax]
mov eax, DWORD PTR overflow_mode[rip]
sub r8, rsi
sar r8, cl
neg r8
cmp eax, 2
jne .L220
.L226:
mov rax, QWORD PTR _fxp_min[rip]
cmp r8, rax
jl .L225
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L222:
add eax, 1
sub eax, esi
movsx rcx, eax
mov rax, rsi
sub rax, r8
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L224
.p2align 4,,10
.p2align 3
.L225:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE29:
.size fxp_mult, .-fxp_mult
.p2align 4
.type fxp_matrix_multiplication.part.0, @function
fxp_matrix_multiplication.part.0:
.LFB161:
.cfi_startproc
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov QWORD PTR [rsp], rcx
mov QWORD PTR 8[rsp], r8
test edi, edi
je .L228
lea eax, -1[rdi]
lea r15d, -1[rdx]
mov ebp, esi
mov r12d, edx
sal rax, 5
mov r14, r9
mov rcx, r9
mov QWORD PTR 16[rsp], rax
lea rbx, [r9+rax]
lea rax, 1[r15]
mov QWORD PTR 24[rsp], rax
lea r13, 0[0+rax*8]
.p2align 4,,10
.p2align 3
.L231:
test r12d, r12d
je .L234
mov rdi, rcx
mov rdx, r13
xor esi, esi
call memset@PLT
mov rcx, rax
.L234:
lea rax, 32[rcx]
cmp rcx, rbx
je .L247
mov rcx, rax
jmp .L231
.L247:
mov rbx, QWORD PTR [rsp]
lea eax, -1[rbp]
lea r13, 8[r14+r15*8]
mov r14, QWORD PTR 24[rsp]
lea r10, 8[rbx+rax*8]
mov rax, QWORD PTR 16[rsp]
neg r14
lea rax, 32[rbx+rax]
mov QWORD PTR [rsp], rax
lea rax, 0[0+r14*8]
mov QWORD PTR 16[rsp], rax
.p2align 4,,10
.p2align 3
.L232:
test r12d, r12d
je .L236
mov rax, QWORD PTR 16[rsp]
mov r11, QWORD PTR 8[rsp]
lea r9, [rax+r13]
.L238:
mov r15, rbx
mov r14, r11
test ebp, ebp
je .L237
.L235:
mov rsi, QWORD PTR [r14]
mov rdi, QWORD PTR [r15]
add r15, 8
add r14, 32
call fxp_mult
add rax, QWORD PTR [r9]
mov rdi, rax
call fxp_quantize
mov QWORD PTR [r9], rax
cmp r15, r10
jne .L235
.L237:
add r9, 8
add r11, 8
cmp r9, r13
jne .L238
.L236:
add r13, 32
add rbx, 32
add r10, 32
cmp rbx, QWORD PTR [rsp]
jne .L232
.L228:
add rsp, 40
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE161:
.size fxp_matrix_multiplication.part.0, .-fxp_matrix_multiplication.part.0
.p2align 4
.globl fxp_div
.type fxp_div, @function
fxp_div:
.LFB30:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov rbx, rdi
xor edi, edi
sub rsp, 8
.cfi_def_cfa_offset 32
test rsi, rsi
setne dil
xor eax, eax
call __ESBMC_assume@PLT
mov ecx, DWORD PTR impl[rip+4]
mov rax, rbx
add rsp, 8
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
sal rax, cl
cqo
idiv rbp
pop rbp
.cfi_def_cfa_offset 8
mov rdi, rax
jmp fxp_quantize
.cfi_endproc
.LFE30:
.size fxp_div, .-fxp_div
.p2align 4
.globl fxp_neg
.type fxp_neg, @function
fxp_neg:
.LFB31:
.cfi_startproc
endbr64
mov edx, DWORD PTR overflow_mode[rip]
mov rax, rdi
neg rax
cmp edx, 2
je .L257
cmp edx, 3
je .L258
.L250:
ret
.p2align 4,,10
.p2align 3
.L258:
mov rsi, QWORD PTR _fxp_min[rip]
mov rdx, QWORD PTR _fxp_max[rip]
cmp rax, rsi
jl .L253
cmp rax, rdx
jle .L250
add edx, 1
sub edx, esi
movsx rcx, edx
.L255:
sub rax, rsi
cqo
idiv rcx
lea rax, [rdx+rsi]
ret
.p2align 4,,10
.p2align 3
.L257:
mov rdx, QWORD PTR _fxp_min[rip]
cmp rax, rdx
jl .L256
mov rdx, QWORD PTR _fxp_max[rip]
cmp rax, rdx
cmovg rax, rdx
ret
.p2align 4,,10
.p2align 3
.L253:
add edx, 1
lea rax, [rdi+rsi]
sub edx, esi
movsx rcx, edx
cqo
idiv rcx
add rax, 1
imul rax, rcx
sub rax, rdi
jmp .L255
.p2align 4,,10
.p2align 3
.L256:
mov rax, rdx
ret
.cfi_endproc
.LFE31:
.size fxp_neg, .-fxp_neg
.p2align 4
.globl fxp_sign
.type fxp_sign, @function
fxp_sign:
.LFB32:
.cfi_startproc
endbr64
mov rax, rdi
test rdi, rdi
je .L260
mov rax, QWORD PTR _fxp_minus_one[rip]
cmovns rax, QWORD PTR _fxp_one[rip]
.L260:
ret
.cfi_endproc
.LFE32:
.size fxp_sign, .-fxp_sign
.p2align 4
.globl fxp_shrl
.type fxp_shrl, @function
fxp_shrl:
.LFB33:
.cfi_startproc
endbr64
mov eax, edi
mov ecx, esi
shr eax, cl
ret
.cfi_endproc
.LFE33:
.size fxp_shrl, .-fxp_shrl
.p2align 4
.globl fxp_square
.type fxp_square, @function
fxp_square:
.LFB34:
.cfi_startproc
endbr64
mov esi, DWORD PTR impl[rip+4]
imul rdi, rdi
mov eax, 1
lea ecx, -1[rsi]
sal eax, cl
mov ecx, esi
cdqe
and rax, rdi
lea r8, [rdi+rax*2]
mov eax, DWORD PTR overflow_mode[rip]
sar r8, cl
cmp eax, 2
je .L273
cmp eax, 3
je .L274
.L266:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L274:
mov rsi, QWORD PTR _fxp_min[rip]
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rsi
jl .L269
cmp r8, rax
jle .L266
add eax, 1
sub eax, esi
movsx rcx, eax
.L271:
mov rax, r8
sub rax, rsi
cqo
idiv rcx
lea r8, [rdx+rsi]
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L273:
mov rax, QWORD PTR _fxp_min[rip]
cmp r8, rax
jl .L272
mov rax, QWORD PTR _fxp_max[rip]
cmp r8, rax
cmovg r8, rax
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L269:
add eax, 1
sub eax, esi
movsx rcx, eax
mov rax, rsi
sub rax, r8
cqo
idiv rcx
add rax, 1
imul rax, rcx
add r8, rax
jmp .L271
.p2align 4,,10
.p2align 3
.L272:
mov r8, rax
mov rax, r8
ret
.cfi_endproc
.LFE34:
.size fxp_square, .-fxp_square
.section .rodata.str1.1
.LC12:
.string "\n%i"
.text
.p2align 4
.globl fxp_print_int
.type fxp_print_int, @function
fxp_print_int:
.LFB35:
.cfi_startproc
endbr64
mov rsi, rdi
xor eax, eax
lea rdi, .LC12[rip]
jmp printf@PLT
.cfi_endproc
.LFE35:
.size fxp_print_int, .-fxp_print_int
.section .rodata.str1.1
.LC13:
.string "\n%f"
.text
.p2align 4
.globl fxp_print_float
.type fxp_print_float, @function
fxp_print_float:
.LFB36:
.cfi_startproc
endbr64
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
pxor xmm0, xmm0
cvtsi2sd xmm0, edi
lea rdi, .LC13[rip]
mulsd xmm0, QWORD PTR [rax+rdx*8]
mov eax, 1
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
jmp printf@PLT
.cfi_endproc
.LFE36:
.size fxp_print_float, .-fxp_print_float
.p2align 4
.globl fxp_print_float_array
.type fxp_print_float_array, @function
fxp_print_float_array:
.LFB37:
.cfi_startproc
endbr64
test esi, esi
jle .L282
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea eax, -1[rsi]
mov r13, rdi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r12, 8[rdi+rax*8]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
lea rbp, scale_factor_inv[rip]
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
lea rbx, .LC13[rip]
sub rsp, 8
.cfi_def_cfa_offset 48
.p2align 4,,10
.p2align 3
.L279:
movsx rax, DWORD PTR impl[rip+4]
pxor xmm0, xmm0
mov rdi, rbx
add r13, 8
cvtsi2sd xmm0, DWORD PTR -8[r13]
mulsd xmm0, QWORD PTR 0[rbp+rax*8]
mov eax, 1
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
call printf@PLT
cmp r12, r13
jne .L279
add rsp, 8
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L282:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE37:
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata.str1.1
.LC14:
.string "%s = {"
.LC15:
.string " %jd "
.LC16:
.string "}"
.text
.p2align 4
.globl print_fxp_array_elements
.type print_fxp_array_elements, @function
print_fxp_array_elements:
.LFB38:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor eax, eax
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, edx
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rsi
mov rsi, rdi
lea rdi, .LC14[rip]
call printf@PLT
test ebp, ebp
jle .L286
lea eax, -1[rbp]
lea rbp, .LC15[rip]
lea r12, 8[rbx+rax*8]
.p2align 4,,10
.p2align 3
.L287:
mov rsi, QWORD PTR [rbx]
mov rdi, rbp
xor eax, eax
add rbx, 8
call printf@PLT
cmp rbx, r12
jne .L287
.L286:
pop rbx
.cfi_def_cfa_offset 24
lea rdi, .LC16[rip]
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE38:
.size print_fxp_array_elements, .-print_fxp_array_elements
.p2align 4
.globl initialize_array
.type initialize_array, @function
initialize_array:
.LFB39:
.cfi_startproc
endbr64
test esi, esi
jle .L290
movsx rsi, esi
lea rdx, 0[0+rsi*8]
xor esi, esi
jmp memset@PLT
.p2align 4,,10
.p2align 3
.L290:
ret
.cfi_endproc
.LFE39:
.size initialize_array, .-initialize_array
.p2align 4
.globl revert_array
.type revert_array, @function
revert_array:
.LFB40:
.cfi_startproc
endbr64
test edx, edx
jle .L297
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rcx, rsi
mov rbp, rdi
xor esi, esi
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov ebx, edx
mov edx, edx
mov rdi, rcx
sal rdx, 3
sub rsp, 8
.cfi_def_cfa_offset 32
call memset@PLT
lea edx, -1[rbx]
mov rcx, rax
movsx rax, ebx
lea rax, -8[rbp+rax*8]
mov rsi, rcx
lea rdx, 8[rcx+rdx*8]
.p2align 4,,10
.p2align 3
.L294:
movsd xmm0, QWORD PTR [rax]
add rsi, 8
sub rax, 8
movsd QWORD PTR -8[rsi], xmm0
cmp rsi, rdx
jne .L294
add rsp, 8
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L297:
.cfi_restore 3
.cfi_restore 6
ret
.cfi_endproc
.LFE40:
.size revert_array, .-revert_array
.p2align 4
.globl internal_pow
.type internal_pow, @function
internal_pow:
.LFB41:
.cfi_startproc
endbr64
xor eax, eax
comisd xmm1, QWORD PTR .LC7[rip]
movapd xmm3, xmm0
movsd xmm0, QWORD PTR .LC6[rip]
jbe .L300
.p2align 4,,10
.p2align 3
.L303:
mulsd xmm0, xmm3
add eax, 1
pxor xmm2, xmm2
cvtsi2sd xmm2, eax
comisd xmm1, xmm2
ja .L303
.L300:
ret
.cfi_endproc
.LFE41:
.size internal_pow, .-internal_pow
.p2align 4
.globl internal_abs
.type internal_abs, @function
internal_abs:
.LFB42:
.cfi_startproc
endbr64
pxor xmm1, xmm1
comisd xmm1, xmm0
ja .L312
ret
.p2align 4,,10
.p2align 3
.L312:
xorpd xmm0, XMMWORD PTR .LC8[rip]
ret
.cfi_endproc
.LFE42:
.size internal_abs, .-internal_abs
.p2align 4
.globl fatorial
.type fatorial, @function
fatorial:
.LFB43:
.cfi_startproc
endbr64
mov eax, 1
test edi, edi
je .L316
.p2align 4,,10
.p2align 3
.L315:
imul eax, edi
sub edi, 1
jne .L315
ret
.p2align 4,,10
.p2align 3
.L316:
ret
.cfi_endproc
.LFE43:
.size fatorial, .-fatorial
.section .rodata.str1.8
.align 8
.LC17:
.string "[DEBUG] the first constraint of Jury criteria failed: (F(1) > 0)"
.align 8
.LC18:
.string "[DEBUG] the second constraint of Jury criteria failed: (F(-1)*(-1)^n > 0)"
.align 8
.LC19:
.string "[DEBUG] the third constraint of Jury criteria failed: (abs(a0) < a_{n}*z^{n})"
.text
.p2align 4
.globl check_stability
.type check_stability, @function
check_stability:
.LFB44:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
.cfi_offset 15, -24
.cfi_offset 14, -32
mov r14, rdi
push r13
.cfi_offset 13, -40
movsx r13, esi
push r12
.cfi_offset 12, -48
mov r12, r13
push rbx
sub rsp, 88
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
lea eax, -1[r13+r13]
sal r13, 3
mov rcx, rsp
mov DWORD PTR -92[rbp], eax
cdqe
imul rax, r13
add rax, 15
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L320
.L386:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L386
.L320:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L387
.L321:
lea rbx, 7[rsp]
mov rcx, rsp
mov rax, rbx
and rbx, -8
shr rax, 3
mov QWORD PTR -128[rbp], rax
lea rax, 15[r13]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L323
.L388:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L388
.L323:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L389
.L324:
mov rdi, rsp
test r12d, r12d
jle .L325
mov eax, r12d
lea ecx, -1[r12]
mov rsi, r14
sal rax, 3
mov DWORD PTR -72[rbp], ecx
mov r15d, ecx
mov rdx, rax
mov QWORD PTR -80[rbp], rax
call memcpy@PLT
mov eax, DWORD PTR -72[rbp]
mov rdx, r14
pxor xmm0, xmm0
mov rcx, rax
lea rsi, 8[r14+rax*8]
mov rax, r14
.p2align 4,,10
.p2align 3
.L326:
addsd xmm0, QWORD PTR [rax]
add rax, 8
cmp rax, rsi
jne .L326
pxor xmm5, xmm5
comisd xmm5, xmm0
jnb .L325
movsd xmm4, QWORD PTR .LC6[rip]
movq xmm2, QWORD PTR .LC8[rip]
pxor xmm3, xmm3
movsd xmm1, QWORD PTR [rdx]
test r15d, r15d
je .L329
.p2align 4,,10
.p2align 3
.L390:
xor eax, eax
movapd xmm0, xmm4
.p2align 4,,10
.p2align 3
.L330:
add eax, 1
xorpd xmm0, xmm2
cmp eax, r15d
jne .L330
mulsd xmm0, xmm1
sub r15d, 1
add rdx, 8
movsd xmm1, QWORD PTR [rdx]
addsd xmm3, xmm0
test r15d, r15d
jne .L390
.L329:
addsd xmm1, xmm3
test ecx, ecx
je .L332
movsd xmm0, QWORD PTR .LC6[rip]
movq xmm2, QWORD PTR .LC8[rip]
xor eax, eax
.p2align 4,,10
.p2align 3
.L333:
add eax, 1
xorpd xmm0, xmm2
cmp eax, ecx
jne .L333
mulsd xmm1, xmm0
.L332:
pxor xmm6, xmm6
comisd xmm6, xmm1
jnb .L391
movsd xmm0, QWORD PTR -8[r14+r13]
pxor xmm7, xmm7
comisd xmm7, xmm0
jbe .L336
xorpd xmm0, XMMWORD PTR .LC8[rip]
.L336:
comisd xmm0, QWORD PTR [r14]
ja .L338
mov rax, r13
mov rcx, rbx
xor r15d, r15d
shr rax, 3
mov QWORD PTR -112[rbp], rax
mov eax, DWORD PTR -92[rbp]
test eax, eax
jle .L355
mov DWORD PTR -72[rbp], r12d
mov r12d, r15d
mov r15, QWORD PTR -80[rbp]
mov QWORD PTR -80[rbp], rbx
mov ebx, DWORD PTR -92[rbp]
.p2align 4,,10
.p2align 3
.L341:
mov rdi, rcx
mov rdx, r15
xor esi, esi
add r12d, 1
call memset@PLT
mov rcx, rax
add rcx, r13
cmp ebx, r12d
jne .L341
mov rbx, QWORD PTR -80[rbp]
mov r15, QWORD PTR -112[rbp]
xor edi, edi
mov DWORD PTR -84[rbp], -1
mov DWORD PTR -88[rbp], -2
mov r12d, DWORD PTR -72[rbp]
lea rax, [rbx+r13]
neg r15
mov QWORD PTR -120[rbp], rax
lea rax, 8[rbx]
mov QWORD PTR -104[rbp], rax
.p2align 4,,10
.p2align 3
.L340:
test r12d, r12d
jle .L392
mov rsi, QWORD PTR -112[rbp]
mov rax, QWORD PTR -120[rbp]
movsx r11, edi
mov r13d, edi
movsx r10, DWORD PTR -84[rbp]
and r13d, 1
lea rcx, [rsi+r15]
lea rax, [rax+r15*8]
mov QWORD PTR -72[rbp], rcx
imul r11, rsi
mov rcx, rsi
movsx rsi, DWORD PTR -88[rbp]
mov QWORD PTR -80[rbp], rax
imul r10, rcx
xor eax, eax
imul rsi, rcx
jmp .L349
.p2align 4,,10
.p2align 3
.L343:
test r13d, r13d
jne .L393
movsx rdx, eax
movsx rcx, r12d
add eax, 1
lea r8, [rdx+r11]
lea r9, [rdx+rsi]
add rcx, rsi
add rdx, r10
movsd xmm0, QWORD PTR [rbx+rcx*8]
divsd xmm0, QWORD PTR [rbx+rsi*8]
mulsd xmm0, QWORD PTR [rbx+rdx*8]
movsd xmm1, QWORD PTR [rbx+r9*8]
subsd xmm1, xmm0
movsd QWORD PTR [rbx+r8*8], xmm1
.L344:
cmp r12d, eax
jle .L352
.L349:
test edi, edi
jne .L343
movsx rdx, eax
add eax, 1
movsd xmm0, QWORD PTR [r14+rdx*8]
movsd QWORD PTR [rbx+rdx*8], xmm0
cmp r12d, eax
jg .L349
.L352:
add DWORD PTR -88[rbp], 1
mov r15, QWORD PTR -72[rbp]
add edi, 1
add DWORD PTR -84[rbp], 1
cmp DWORD PTR -92[rbp], edi
jne .L340
mov rax, QWORD PTR -128[rbp]
pxor xmm6, xmm6
mov rdi, QWORD PTR -112[rbp]
mov esi, DWORD PTR -92[rbp]
movsd xmm0, QWORD PTR 0[0+rax*8]
comisd xmm0, xmm6
setnb cl
xor eax, eax
.L354:
test al, 1
jne .L353
movsx rdx, eax
pxor xmm7, xmm7
imul rdx, rdi
movsd xmm0, QWORD PTR [rbx+rdx*8]
comisd xmm0, xmm7
setnb dl
cmp cl, dl
je .L353
xor eax, eax
.L318:
mov rdi, QWORD PTR -56[rbp]
sub rdi, QWORD PTR fs:40
jne .L394
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L387:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L321
.p2align 4,,10
.p2align 3
.L393:
movsx rax, r12d
mov r9, QWORD PTR -104[rbp]
add rax, r15
lea rdx, [rbx+rax*8]
lea eax, -1[r12]
mov rcx, rax
add rax, QWORD PTR -72[rbp]
lea r8, [r9+rax*8]
mov rax, QWORD PTR -80[rbp]
.p2align 4,,10
.p2align 3
.L347:
movsd xmm0, QWORD PTR -8[rdx]
add rax, 8
sub rdx, 8
movsd QWORD PTR -8[rax], xmm0
cmp r8, rax
jne .L347
mov eax, r12d
mov r12d, ecx
jmp .L344
.p2align 4,,10
.p2align 3
.L353:
add eax, 1
cmp esi, eax
jne .L354
.L355:
mov eax, 1
jmp .L318
.L392:
mov rax, QWORD PTR -112[rbp]
add rax, r15
mov QWORD PTR -72[rbp], rax
jmp .L352
.L325:
lea rdi, .LC17[rip]
xor eax, eax
call printf@PLT
xor eax, eax
jmp .L318
.L338:
lea rdi, .LC19[rip]
xor eax, eax
call printf@PLT
xor eax, eax
jmp .L318
.L391:
lea rdi, .LC18[rip]
xor eax, eax
call printf@PLT
xor eax, eax
jmp .L318
.L389:
or QWORD PTR -8[rsp+rdx], 0
jmp .L324
.L394:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE44:
.size check_stability, .-check_stability
.p2align 4
.globl poly_sum
.type poly_sum, @function
poly_sum:
.LFB45:
.cfi_startproc
endbr64
cmp ecx, esi
mov r10d, esi
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov r11d, esi
cmovge r10d, ecx
mov ebx, ecx
sub r11d, ecx
sub ebx, esi
test r10d, r10d
jle .L395
mov r9, rdi
xor eax, eax
mov rdi, rdx
movsx rdx, r10d
jmp .L401
.p2align 4,,10
.p2align 3
.L406:
movsd xmm0, QWORD PTR [r9+rax*8]
movsd QWORD PTR [r8+rax*8], xmm0
cmp r11d, eax
jg .L399
lea r10d, [rbx+rax]
movsx r10, r10d
addsd xmm0, QWORD PTR [rdi+r10*8]
movsd QWORD PTR [r8+rax*8], xmm0
.L399:
add rax, 1
cmp rax, rdx
je .L395
.L401:
cmp ecx, esi
jl .L406
movsd xmm0, QWORD PTR [rdi+rax*8]
movsd QWORD PTR [r8+rax*8], xmm0
cmp ebx, eax
jg .L399
lea r10d, [r11+rax]
movsx r10, r10d
addsd xmm0, QWORD PTR [r9+r10*8]
movsd QWORD PTR [r8+rax*8], xmm0
add rax, 1
cmp rax, rdx
jne .L401
.L395:
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE45:
.size poly_sum, .-poly_sum
.p2align 4
.globl poly_mult
.type poly_mult, @function
poly_mult:
.LFB46:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea r9d, [rsi+rcx]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov QWORD PTR 8[rsp], rdi
mov QWORD PTR 16[rsp], rdx
test esi, esi
jle .L407
lea r13d, -1[rcx]
mov ebp, esi
mov r15d, ecx
mov r12, r8
lea rax, 1[r13]
neg r13
mov ebx, r9d
mov QWORD PTR 24[rsp], rax
lea r14, 0[0+rax*8]
sal r13, 3
.p2align 4,,10
.p2align 3
.L410:
test r15d, r15d
jle .L413
movsx rax, ebx
mov rdx, r14
xor esi, esi
lea rdi, -16[r13+rax*8]
add rdi, r12
call memset@PLT
.L413:
sub ebx, 1
cmp r15d, ebx
jne .L410
mov rbx, QWORD PTR 24[rsp]
mov rcx, QWORD PTR 16[rsp]
movsx rax, r15d
neg rbx
lea r9, [rcx+rax*8]
lea rdi, 0[0+rbx*8]
.p2align 4,,10
.p2align 3
.L411:
test r15d, r15d
jle .L416
mov rcx, QWORD PTR 8[rsp]
mov eax, ebp
lea rsi, -8[rcx+rax*8]
lea eax, [r15+rbp]
cdqe
lea rdx, [r12+rax*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L414:
movsd xmm0, QWORD PTR [rsi]
mulsd xmm0, QWORD PTR -8[r9+rax]
addsd xmm0, QWORD PTR -16[rdx+rax]
movsd QWORD PTR -16[rdx+rax], xmm0
sub rax, 8
cmp rax, rdi
jne .L414
.L416:
sub ebp, 1
jne .L411
.L407:
add rsp, 40
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE46:
.size poly_mult, .-poly_mult
.section .rodata.str1.8
.align 8
.LC20:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/util.h"
.align 8
.LC21:
.string "!(window_count == window_size)"
.text
.p2align 4
.globl double_check_oscillations
.type double_check_oscillations, @function
double_check_oscillations:
.LFB47:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movsx r12, esi
mov eax, 1
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movsd xmm0, QWORD PTR -8[rdi+r12*8]
ucomisd xmm0, QWORD PTR [rdi]
setp dil
movzx edi, dil
cmovne edi, eax
xor eax, eax
call __ESBMC_assume@PLT
cmp r12d, 2
jle .L423
mov rbx, r12
lea r8, 16[rbp]
mov ecx, 2
xor edi, edi
xor edx, edx
.p2align 4,,10
.p2align 3
.L425:
xor eax, eax
jmp .L430
.p2align 4,,10
.p2align 3
.L435:
movsd xmm0, QWORD PTR 0[rbp+rax*8]
ucomisd xmm0, QWORD PTR [r8+rax*8]
jp .L428
jne .L428
add edi, 1
cmp edi, ecx
je .L434
.L428:
add rax, 1
add edx, 1
cmp rax, r12
je .L427
.L430:
cmp edx, ecx
jle .L426
xor edi, edi
xor edx, edx
.L426:
lea esi, [rcx+rax]
cmp ebx, esi
jg .L435
.L427:
add ecx, 1
add r8, 8
cmp ebx, ecx
jne .L425
.L423:
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L434:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.19[rip]
mov edx, 209
lea rsi, .LC20[rip]
lea rdi, .LC21[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE47:
.size double_check_oscillations, .-double_check_oscillations
.section .rodata.str1.1
.LC22:
.string "window_size %d\n"
.LC23:
.string "%.0f == %.0f\n"
.LC24:
.string "desired_elements %d\n"
.LC25:
.string "found_elements %d\n"
.text
.p2align 4
.globl double_check_limit_cycle
.type double_check_limit_cycle, @function
double_check_limit_cycle:
.LFB48:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx rax, esi
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rdi
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rax
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
movsd xmm0, QWORD PTR -8[rdi+rax*8]
sub eax, 2
js .L447
cdqe
mov r14d, 1
lea rax, [rdi+rax*8]
jmp .L439
.p2align 4,,10
.p2align 3
.L438:
add r14d, 1
sub rax, 8
cmp r12d, r14d
je .L452
.L439:
ucomisd xmm0, QWORD PTR [rax]
jp .L438
comisd xmm0, QWORD PTR [rax]
jne .L438
cmp r14d, 1
setne al
xor edi, edi
cmp r12d, r14d
setne dil
and edi, eax
lea eax, [r14+r14]
mov DWORD PTR 12[rsp], eax
.L437:
xor eax, eax
mov ebp, r12d
call __ESBMC_assume@PLT
mov esi, r14d
lea rdi, .LC22[rip]
xor eax, eax
call printf@PLT
sub ebp, 1
js .L441
.L440:
sub r12d, r14d
movsx rbx, ebp
sub ebp, r14d
xor r14d, r14d
jmp .L445
.p2align 4,,10
.p2align 3
.L442:
sub rbx, 1
sub ebp, 1
test ebx, ebx
js .L443
.L445:
cmp r12d, ebx
jg .L442
movsx rax, ebp
movsd xmm0, QWORD PTR 0[r13+rbx*8]
lea rdi, .LC23[rip]
lea r15, 0[r13+rax*8]
mov eax, 2
movsd xmm1, QWORD PTR [r15]
call printf@PLT
test ebp, ebp
jle .L443
movsd xmm0, QWORD PTR 0[r13+rbx*8]
ucomisd xmm0, QWORD PTR [r15]
jp .L443
jne .L443
sub rbx, 1
add r14d, 2
sub ebp, 1
test ebx, ebx
jns .L445
.p2align 4,,10
.p2align 3
.L443:
mov ebx, DWORD PTR 12[rsp]
lea rdi, .LC24[rip]
xor eax, eax
mov esi, ebx
call printf@PLT
xor eax, eax
mov esi, r14d
lea rdi, .LC25[rip]
call printf@PLT
cmp r14d, ebx
je .L453
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L452:
.cfi_restore_state
lea eax, [r12+r12]
xor edi, edi
lea ebp, -1[r12]
mov DWORD PTR 12[rsp], eax
xor eax, eax
call __ESBMC_assume@PLT
mov esi, r12d
lea rdi, .LC22[rip]
xor eax, eax
call printf@PLT
jmp .L440
.L447:
mov DWORD PTR 12[rsp], 2
xor edi, edi
mov r14d, 1
jmp .L437
.L441:
mov esi, DWORD PTR 12[rsp]
lea rdi, .LC24[rip]
xor eax, eax
call printf@PLT
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
xor esi, esi
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
lea rdi, .LC25[rip]
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp printf@PLT
.L453:
.cfi_restore_state
call __DSVERIFIER_assert.part.0
.cfi_endproc
.LFE48:
.size double_check_limit_cycle, .-double_check_limit_cycle
.p2align 4
.globl double_check_persistent_limit_cycle
.type double_check_persistent_limit_cycle, @function
double_check_persistent_limit_cycle:
.LFB49:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r14
push r13
push r12
push rbx
sub rsp, 16
.cfi_offset 14, -24
.cfi_offset 13, -32
.cfi_offset 12, -40
.cfi_offset 3, -48
movsd xmm1, QWORD PTR [rdi]
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
test esi, esi
jle .L455
lea edx, -1[rsi]
lea rax, 8[rdi]
mov r13, rdi
mov r12d, esi
lea rcx, [rax+rdx*8]
movapd xmm0, xmm1
xor edx, edx
xor ebx, ebx
jmp .L461
.p2align 4,,10
.p2align 3
.L481:
add edx, 1
cmp rax, rcx
je .L460
.L495:
movsd xmm0, QWORD PTR [rax]
add rax, 8
.L461:
ucomisd xmm1, xmm0
jp .L481
comisd xmm1, xmm0
jne .L481
test edx, edx
jne .L459
add ebx, 1
cmp rax, rcx
jne .L495
.L460:
add ebx, edx
cmp ebx, 1
jle .L496
.L473:
mov eax, r12d
xor edi, edi
sar eax
cmp eax, ebx
movsx rax, ebx
setge dil
lea r14, 0[0+rax*8]
.L462:
xor eax, eax
call __ESBMC_assume@PLT
lea rax, 15[r14]
mov rcx, rsp
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L476
.L497:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L497
.L476:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L498
.L477:
mov rsi, rsp
xor eax, eax
.p2align 4,,10
.p2align 3
.L464:
cmp ebx, eax
jle .L463
movsd xmm0, QWORD PTR 0[r13+rax*8]
movsd QWORD PTR [rsi+rax*8], xmm0
.L463:
add rax, 1
cmp r12d, eax
jg .L464
xor edx, edx
xor eax, eax
xor edi, edi
jmp .L468
.p2align 4,,10
.p2align 3
.L500:
jne .L454
cmp ecx, ebx
movsx rax, ecx
cmove rax, rdi
add rdx, 1
cmp r12d, edx
jle .L499
.L468:
movsd xmm0, QWORD PTR 0[r13+rdx*8]
ucomisd xmm0, QWORD PTR [rsi+rax*8]
lea ecx, 1[rax]
jnp .L500
.L454:
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L501
lea rsp, -32[rbp]
pop rbx
pop r12
pop r13
pop r14
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L496:
.cfi_restore_state
xor edi, edi
xor eax, eax
call __ESBMC_assume@PLT
movsx rax, ebx
mov rcx, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
and rdx, -16
sub rcx, rax
.L469:
cmp rsp, rcx
je .L476
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L469
.p2align 4,,10
.p2align 3
.L499:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L459:
add ebx, edx
cmp ebx, 1
jne .L473
mov r14d, 8
xor edi, edi
jmp .L462
.p2align 4,,10
.p2align 3
.L498:
or QWORD PTR -8[rsp+rdx], 0
jmp .L477
.L455:
xor edi, edi
xor eax, eax
call __ESBMC_assume@PLT
jmp .L454
.L501:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE49:
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata.str1.1
.LC26:
.string " %.32f "
.text
.p2align 4
.globl print_array_elements
.type print_array_elements, @function
print_array_elements:
.LFB50:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor eax, eax
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, edx
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rsi
mov rsi, rdi
lea rdi, .LC14[rip]
call printf@PLT
test ebp, ebp
jle .L503
lea eax, -1[rbp]
lea rbp, .LC26[rip]
lea r12, 8[rbx+rax*8]
.p2align 4,,10
.p2align 3
.L504:
movsd xmm0, QWORD PTR [rbx]
mov rdi, rbp
mov eax, 1
add rbx, 8
call printf@PLT
cmp rbx, r12
jne .L504
.L503:
pop rbx
.cfi_def_cfa_offset 24
lea rdi, .LC16[rip]
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
jmp puts@PLT
.cfi_endproc
.LFE50:
.size print_array_elements, .-print_array_elements
.p2align 4
.globl double_add_matrix
.type double_add_matrix, @function
double_add_matrix:
.LFB51:
.cfi_startproc
endbr64
test edi, edi
je .L507
lea eax, -1[rdi]
sal rax, 5
lea rdi, 32[rdx+rax]
.p2align 4,,10
.p2align 3
.L509:
xor eax, eax
test esi, esi
je .L512
.L510:
movsd xmm0, QWORD PTR [rdx+rax*8]
addsd xmm0, QWORD PTR [rcx+rax*8]
movsd QWORD PTR [r8+rax*8], xmm0
add rax, 1
cmp esi, eax
ja .L510
.L512:
add rdx, 32
add rcx, 32
add r8, 32
cmp rdx, rdi
jne .L509
.L507:
ret
.cfi_endproc
.LFE51:
.size double_add_matrix, .-double_add_matrix
.p2align 4
.globl double_sub_matrix
.type double_sub_matrix, @function
double_sub_matrix:
.LFB52:
.cfi_startproc
endbr64
test edi, edi
je .L518
lea eax, -1[rdi]
sal rax, 5
lea rdi, 32[rdx+rax]
.p2align 4,,10
.p2align 3
.L520:
xor eax, eax
test esi, esi
je .L523
.L521:
movsd xmm0, QWORD PTR [rdx+rax*8]
subsd xmm0, QWORD PTR [rcx+rax*8]
movsd QWORD PTR [r8+rax*8], xmm0
add rax, 1
cmp esi, eax
ja .L521
.L523:
add rdx, 32
add rcx, 32
add r8, 32
cmp rdx, rdi
jne .L520
.L518:
ret
.cfi_endproc
.LFE52:
.size double_sub_matrix, .-double_sub_matrix
.section .rodata.str1.8
.align 8
.LC27:
.string "\nError! Operation invalid, please enter with valid matrices."
.text
.p2align 4
.globl double_matrix_multiplication
.type double_matrix_multiplication, @function
double_matrix_multiplication:
.LFB53:
.cfi_startproc
endbr64
mov r10d, edx
mov edx, ecx
mov rcx, r8
mov r8, r9
mov r9, QWORD PTR 8[rsp]
cmp esi, r10d
jne .L530
jmp double_matrix_multiplication.part.0
.L530:
lea rdi, .LC27[rip]
jmp puts@PLT
.cfi_endproc
.LFE53:
.size double_matrix_multiplication, .-double_matrix_multiplication
.p2align 4
.globl fxp_matrix_multiplication
.type fxp_matrix_multiplication, @function
fxp_matrix_multiplication:
.LFB54:
.cfi_startproc
endbr64
mov r10d, edx
mov edx, ecx
mov rcx, r8
mov r8, r9
mov r9, QWORD PTR 8[rsp]
cmp esi, r10d
jne .L532
jmp fxp_matrix_multiplication.part.0
.L532:
lea rdi, .LC27[rip]
jmp puts@PLT
.cfi_endproc
.LFE54:
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.p2align 4
.globl fxp_exp_matrix
.type fxp_exp_matrix, @function
fxp_exp_matrix:
.LFB55:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, esi
sub rsp, 232
.cfi_def_cfa_offset 288
mov DWORD PTR 68[rsp], edi
mov QWORD PTR 16[rsp], rdx
mov DWORD PTR 64[rsp], ecx
mov QWORD PTR 32[rsp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR 216[rsp], rax
xor eax, eax
test ecx, ecx
je .L534
test edi, edi
je .L535
lea eax, -1[rdi]
mov rcx, rdx
mov rsi, r8
sal rax, 5
lea rdi, 32[rdx+rax]
.p2align 4,,10
.p2align 3
.L536:
xor eax, eax
test ebx, ebx
je .L548
.L546:
mov rdx, QWORD PTR [rcx+rax*8]
mov QWORD PTR [rsi+rax*8], rdx
add rax, 1
cmp ebx, eax
ja .L546
.L548:
add rcx, 32
add rsi, 32
cmp rcx, rdi
jne .L536
.L535:
cmp DWORD PTR 64[rsp], 1
je .L533
lea rax, 80[rsp]
mov rcx, QWORD PTR 32[rsp]
mov DWORD PTR 44[rsp], 1
mov QWORD PTR 48[rsp], rax
mov eax, DWORD PTR 68[rsp]
sub eax, 1
sal rax, 5
lea rdx, 112[rsp+rax]
lea rax, 32[rcx+rax]
mov rcx, QWORD PTR 16[rsp]
mov QWORD PTR 8[rsp], rdx
lea edx, -1[rbx]
mov QWORD PTR 72[rsp], rax
mov rax, rdx
lea rbp, 8[rcx+rdx*8]
lea r12, 8[0+rdx*8]
sal rax, 5
lea rax, 32[rcx+rax]
mov QWORD PTR 24[rsp], rax
.p2align 4,,10
.p2align 3
.L549:
mov eax, DWORD PTR 68[rsp]
mov r14, QWORD PTR 32[rsp]
mov rcx, QWORD PTR 48[rsp]
mov r13, QWORD PTR 8[rsp]
test eax, eax
je .L558
.p2align 4,,10
.p2align 3
.L561:
test ebx, ebx
je .L552
mov rdi, rcx
mov rdx, r12
mov rsi, r14
call memcpy@PLT
mov rcx, rax
.L552:
add rcx, 32
add r14, 32
cmp rcx, r13
jne .L561
mov rcx, QWORD PTR 32[rsp]
mov r13, QWORD PTR 72[rsp]
.p2align 4,,10
.p2align 3
.L550:
test ebx, ebx
je .L555
mov rdi, rcx
mov rdx, r12
xor esi, esi
call memset@PLT
mov rcx, rax
.L555:
add rcx, 32
cmp rcx, r13
jne .L550
mov r13, QWORD PTR 32[rsp]
mov r14, QWORD PTR 48[rsp]
mov QWORD PTR 56[rsp], r12
.L553:
test ebx, ebx
je .L557
mov r10, QWORD PTR 24[rsp]
mov r11, QWORD PTR 16[rsp]
mov r9, r13
.L559:
mov r15, r14
mov r12, r11
.L556:
mov rsi, QWORD PTR [r12]
mov rdi, QWORD PTR [r15]
add r12, 32
add r15, 8
call fxp_mult
add rax, QWORD PTR [r9]
mov rdi, rax
call fxp_quantize
mov QWORD PTR [r9], rax
cmp r10, r12
jne .L556
add r11, 8
add r9, 8
add r10, 8
cmp r11, rbp
jne .L559
.L557:
add r14, 32
add r13, 32
cmp r14, QWORD PTR 8[rsp]
jne .L553
mov r12, QWORD PTR 56[rsp]
.L558:
add DWORD PTR 44[rsp], 1
mov eax, DWORD PTR 44[rsp]
cmp DWORD PTR 64[rsp], eax
ja .L549
.L533:
mov rax, QWORD PTR 216[rsp]
sub rax, QWORD PTR fs:40
jne .L585
add rsp, 232
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L534:
.cfi_restore_state
mov r10d, DWORD PTR 68[rsp]
test r10d, r10d
je .L533
mov ecx, DWORD PTR rounding_mode[rip]
mov rdx, QWORD PTR 32[rsp]
lea rdi, scale_factor[rip]
movsx rsi, DWORD PTR impl[rip+4]
movsd xmm1, QWORD PTR .LC11[rip]
mov r8d, DWORD PTR 64[rsp]
.L538:
xor eax, eax
test ebx, ebx
je .L545
.L543:
cmp r8d, eax
je .L586
mov QWORD PTR [rdx+rax*8], 0
.L542:
add rax, 1
cmp ebx, eax
ja .L543
.L545:
add r8d, 1
add rdx, 32
cmp r10d, r8d
jne .L538
jmp .L533
.L586:
movsd xmm0, QWORD PTR [rdi+rsi*8]
test ecx, ecx
jne .L540
addsd xmm0, xmm1
cvttsd2si r9, xmm0
.L541:
mov QWORD PTR [rdx+rax*8], r9
jmp .L542
.L540:
cmp ecx, 1
jne .L541
cvttsd2si r9, xmm0
jmp .L541
.L585:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE55:
.size fxp_exp_matrix, .-fxp_exp_matrix
.p2align 4
.globl double_exp_matrix
.type double_exp_matrix, @function
double_exp_matrix:
.LFB56:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15d, esi
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 200
.cfi_def_cfa_offset 256
mov DWORD PTR 36[rsp], edi
mov QWORD PTR 40[rsp], rdx
mov DWORD PTR 32[rsp], ecx
mov QWORD PTR 8[rsp], r8
mov rax, QWORD PTR fs:40
mov QWORD PTR 184[rsp], rax
xor eax, eax
test ecx, ecx
je .L588
test edi, edi
je .L589
lea eax, -1[rdi]
mov rcx, r8
sal rax, 5
lea rsi, 32[rdx+rax]
.p2align 4,,10
.p2align 3
.L590:
xor eax, eax
test r15d, r15d
je .L600
.L598:
movsd xmm0, QWORD PTR [rdx+rax*8]
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp r15d, eax
ja .L598
.L600:
add rdx, 32
add rcx, 32
cmp rdx, rsi
jne .L590
.L589:
cmp DWORD PTR 32[rsp], 1
je .L587
lea rax, 48[rsp]
mov rbx, QWORD PTR 8[rsp]
mov DWORD PTR 20[rsp], 1
lea edx, -1[r15]
mov QWORD PTR 24[rsp], rax
mov eax, DWORD PTR 36[rsp]
lea rbp, 8[0+rdx*8]
sub eax, 1
sal rax, 5
lea r12, 32[rbx+rax]
lea r13, 80[rsp+rax]
mov rax, QWORD PTR 40[rsp]
lea rbx, 8[rax+rdx*8]
.p2align 4,,10
.p2align 3
.L601:
mov eax, DWORD PTR 36[rsp]
mov r14, QWORD PTR 8[rsp]
mov rcx, QWORD PTR 24[rsp]
test eax, eax
je .L610
.p2align 4,,10
.p2align 3
.L613:
test r15d, r15d
je .L604
mov rdi, rcx
mov rdx, rbp
mov rsi, r14
call memcpy@PLT
mov rcx, rax
.L604:
add rcx, 32
add r14, 32
cmp rcx, r13
jne .L613
mov rcx, QWORD PTR 8[rsp]
.p2align 4,,10
.p2align 3
.L602:
test r15d, r15d
je .L607
mov rdi, rcx
mov rdx, rbp
xor esi, esi
call memset@PLT
mov rcx, rax
.L607:
add rcx, 32
cmp rcx, r12
jne .L602
mov r9, QWORD PTR 8[rsp]
mov rsi, QWORD PTR 24[rsp]
mov r8, QWORD PTR 40[rsp]
.L605:
mov rdi, r8
mov rcx, r9
test r15d, r15d
je .L609
.L611:
movsd xmm1, QWORD PTR [rcx]
mov rdx, rdi
xor eax, eax
.L608:
movsd xmm0, QWORD PTR [rsi+rax*8]
mulsd xmm0, QWORD PTR [rdx]
add rax, 1
add rdx, 32
addsd xmm1, xmm0
movsd QWORD PTR [rcx], xmm1
cmp r15d, eax
ja .L608
add rdi, 8
add rcx, 8
cmp rbx, rdi
jne .L611
.L609:
add rsi, 32
add r9, 32
cmp rsi, r13
jne .L605
.L610:
add DWORD PTR 20[rsp], 1
mov eax, DWORD PTR 20[rsp]
cmp DWORD PTR 32[rsp], eax
ja .L601
.L587:
mov rax, QWORD PTR 184[rsp]
sub rax, QWORD PTR fs:40
jne .L640
add rsp, 200
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L588:
.cfi_restore_state
mov esi, DWORD PTR 36[rsp]
test esi, esi
je .L587
mov rdx, QWORD PTR 8[rsp]
movsd xmm0, QWORD PTR .LC6[rip]
mov ecx, DWORD PTR 32[rsp]
.L592:
xor eax, eax
test r15d, r15d
je .L597
.L595:
cmp ecx, eax
je .L641
mov QWORD PTR [rdx+rax*8], 0x000000000
.L594:
add rax, 1
cmp r15d, eax
ja .L595
.L597:
add ecx, 1
add rdx, 32
cmp esi, ecx
jne .L592
jmp .L587
.L641:
movsd QWORD PTR [rdx+rax*8], xmm0
jmp .L594
.L640:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE56:
.size double_exp_matrix, .-double_exp_matrix
.p2align 4
.globl fxp_add_matrix
.type fxp_add_matrix, @function
fxp_add_matrix:
.LFB57:
.cfi_startproc
endbr64
test edi, edi
je .L659
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov eax, edi
mov edi, DWORD PTR overflow_mode[rip]
mov r11d, esi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
sub eax, 1
mov r9, rdx
mov r10, rcx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, QWORD PTR _fxp_max[rip]
sal rax, 5
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, QWORD PTR _fxp_min[rip]
lea r13, 32[r8+rax]
lea r12d, 1[rbp]
sub r12d, ebx
movsx r12, r12d
.p2align 4,,10
.p2align 3
.L644:
xor esi, esi
test r11d, r11d
je .L650
.L648:
mov rcx, QWORD PTR [r9+rsi*8]
add rcx, QWORD PTR [r10+rsi*8]
cmp edi, 2
je .L662
cmp edi, 3
je .L663
.L646:
mov QWORD PTR [r8+rsi*8], rcx
add rsi, 1
cmp r11d, esi
ja .L648
.L650:
add r8, 32
add r10, 32
add r9, 32
cmp r8, r13
jne .L644
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L662:
.cfi_restore_state
cmp rcx, rbx
jl .L652
cmp rcx, rbp
cmovg rcx, rbp
jmp .L646
.p2align 4,,10
.p2align 3
.L663:
cmp rcx, rbx
jl .L647
cmp rcx, rbp
jle .L646
mov rax, rcx
sub rax, rbx
cqo
idiv r12
lea rcx, [rdx+rbx]
jmp .L646
.p2align 4,,10
.p2align 3
.L652:
mov rcx, rbx
jmp .L646
.p2align 4,,10
.p2align 3
.L647:
mov rax, rbx
sub rax, rcx
cqo
idiv r12
add rax, 1
imul rax, r12
add rcx, rax
mov rax, rcx
sub rax, rbx
cqo
idiv r12
lea rcx, [rdx+rbx]
jmp .L646
.L659:
.cfi_def_cfa_offset 8
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE57:
.size fxp_add_matrix, .-fxp_add_matrix
.p2align 4
.globl fxp_sub_matrix
.type fxp_sub_matrix, @function
fxp_sub_matrix:
.LFB58:
.cfi_startproc
endbr64
test edi, edi
je .L681
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov eax, edi
mov edi, DWORD PTR overflow_mode[rip]
mov r11d, esi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
sub eax, 1
mov r9, rdx
mov r10, rcx
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, QWORD PTR _fxp_max[rip]
sal rax, 5
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, QWORD PTR _fxp_min[rip]
lea r13, 32[r8+rax]
lea r12d, 1[rbp]
sub r12d, ebx
movsx r12, r12d
.p2align 4,,10
.p2align 3
.L666:
xor esi, esi
test r11d, r11d
je .L672
.L670:
mov rcx, QWORD PTR [r9+rsi*8]
sub rcx, QWORD PTR [r10+rsi*8]
cmp edi, 2
je .L684
cmp edi, 3
je .L685
.L668:
mov QWORD PTR [r8+rsi*8], rcx
add rsi, 1
cmp r11d, esi
ja .L670
.L672:
add r8, 32
add r10, 32
add r9, 32
cmp r8, r13
jne .L666
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L684:
.cfi_restore_state
cmp rcx, rbx
jl .L674
cmp rcx, rbp
cmovg rcx, rbp
jmp .L668
.p2align 4,,10
.p2align 3
.L685:
cmp rcx, rbx
jl .L669
cmp rcx, rbp
jle .L668
mov rax, rcx
sub rax, rbx
cqo
idiv r12
lea rcx, [rdx+rbx]
jmp .L668
.p2align 4,,10
.p2align 3
.L674:
mov rcx, rbx
jmp .L668
.p2align 4,,10
.p2align 3
.L669:
mov rax, rbx
sub rax, rcx
cqo
idiv r12
add rax, 1
imul rax, r12
add rcx, rax
mov rax, rcx
sub rax, rbx
cqo
idiv r12
lea rcx, [rdx+rbx]
jmp .L668
.L681:
.cfi_def_cfa_offset 8
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
ret
.cfi_endproc
.LFE58:
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata.str1.8
.align 8
.LC28:
.string "\nMatrix\n=====================\n"
.section .rodata.str1.1
.LC29:
.string "#matrix[%d][%d]: %2.2f "
.text
.p2align 4
.globl print_matrix
.type print_matrix, @function
print_matrix:
.LFB59:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14d, edx
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rdi
lea rdi, .LC28[rip]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, esi
sub rsp, 24
.cfi_def_cfa_offset 80
mov DWORD PTR 12[rsp], esi
call puts@PLT
test ebx, ebx
je .L687
xor ebx, ebx
lea r13, .LC29[rip]
.p2align 4,,10
.p2align 3
.L688:
mov r12d, r14d
xor r15d, r15d
test r14d, r14d
je .L691
.L689:
movsd xmm0, QWORD PTR 0[rbp+r15*8]
mov edx, r15d
mov esi, ebx
mov rdi, r13
mov eax, 1
add r15, 1
call printf@PLT
cmp r12, r15
jne .L689
.L691:
mov edi, 10
add ebx, 1
add rbp, 32
call putchar@PLT
cmp DWORD PTR 12[rsp], ebx
jne .L688
.L687:
add rsp, 24
.cfi_def_cfa_offset 56
mov edi, 10
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp putchar@PLT
.cfi_endproc
.LFE59:
.size print_matrix, .-print_matrix
.p2align 4
.globl determinant
.type determinant, @function
determinant:
.LFB60:
.cfi_startproc
endbr64
test esi, esi
jle .L702
cmp esi, 1
je .L703
cmp esi, 2
je .L704
jmp determinant.part.0
.L703:
movsd xmm0, QWORD PTR [rdi]
ret
.L702:
pxor xmm0, xmm0
ret
.L704:
movsd xmm0, QWORD PTR [rdi]
movsd xmm1, QWORD PTR 32[rdi]
mulsd xmm0, QWORD PTR 40[rdi]
mulsd xmm1, QWORD PTR 8[rdi]
subsd xmm0, xmm1
ret
.cfi_endproc
.LFE60:
.size determinant, .-determinant
.p2align 4
.globl fxp_determinant
.type fxp_determinant, @function
fxp_determinant:
.LFB61:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 288
.cfi_def_cfa_offset 336
mov rax, QWORD PTR fs:40
mov QWORD PTR 280[rsp], rax
xor eax, eax
test esi, esi
jle .L723
mov ebx, esi
movsx rdx, DWORD PTR impl[rip+4]
lea esi, -1[rsi]
mov rcx, rdi
lea rax, scale_factor_inv[rip]
lea r12, 16[rsp]
sal rsi, 5
lea r13, 48[rsp]
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rdx, r12
add rsi, r13
.L707:
xor eax, eax
.L708:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rcx+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rdx+rax*8], xmm0
add rax, 1
cmp ebx, eax
jg .L708
add rdx, 32
add rcx, 32
cmp rdx, rsi
jne .L707
movsd xmm6, QWORD PTR 16[rsp]
cmp ebx, 1
je .L705
cmp ebx, 2
je .L710
pxor xmm4, xmm4
movsd xmm2, QWORD PTR .LC6[rip]
mov r14d, ebx
xor ebp, ebp
movq xmm5, QWORD PTR .LC8[rip]
movapd xmm6, xmm4
.L711:
mov r9d, ebp
mov rdi, r13
xor r8d, r8d
.p2align 4,,10
.p2align 3
.L720:
movsx rsi, r8d
xor eax, eax
xor ecx, ecx
sal rsi, 2
.L713:
cmp ebp, eax
je .L712
movsx rdx, ecx
movsd xmm0, QWORD PTR [rdi+rax*8]
add ecx, 1
add rdx, rsi
movsd QWORD PTR 144[rsp+rdx*8], xmm0
.L712:
add rax, 1
cmp ebx, eax
jg .L713
add r8, 1
add rdi, 32
lea eax, 1[r8]
cmp eax, ebx
jl .L720
pxor xmm0, xmm0
xor eax, eax
movapd xmm1, xmm2
cvtsi2sd xmm0, r9d
addsd xmm0, xmm2
addsd xmm0, xmm2
comisd xmm0, xmm4
jbe .L715
.L717:
add eax, 1
pxor xmm3, xmm3
xorpd xmm1, xmm5
cvtsi2sd xmm3, eax
comisd xmm0, xmm3
ja .L717
.L715:
mulsd xmm1, QWORD PTR [r12+rbp*8]
cmp ebx, 3
je .L735
lea rdi, 144[rsp]
mov esi, 3
movsd QWORD PTR 8[rsp], xmm6
movsd QWORD PTR [rsp], xmm1
call determinant.part.0
mov rax, QWORD PTR .LC6[rip]
movsd xmm6, QWORD PTR 8[rsp]
pxor xmm4, xmm4
movq xmm5, QWORD PTR .LC8[rip]
movsd xmm1, QWORD PTR [rsp]
movq xmm2, rax
.L719:
mulsd xmm1, xmm0
add rbp, 1
addsd xmm6, xmm1
cmp r14, rbp
jne .L711
.L705:
mov rax, QWORD PTR 280[rsp]
sub rax, QWORD PTR fs:40
jne .L736
add rsp, 288
.cfi_remember_state
.cfi_def_cfa_offset 48
movapd xmm0, xmm6
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L723:
.cfi_restore_state
pxor xmm6, xmm6
jmp .L705
.L710:
mulsd xmm6, QWORD PTR 56[rsp]
movsd xmm0, QWORD PTR 48[rsp]
mulsd xmm0, QWORD PTR 24[rsp]
subsd xmm6, xmm0
jmp .L705
.L735:
movsd xmm0, QWORD PTR 144[rsp]
movsd xmm3, QWORD PTR 176[rsp]
mulsd xmm0, QWORD PTR 184[rsp]
mulsd xmm3, QWORD PTR 152[rsp]
subsd xmm0, xmm3
jmp .L719
.L736:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE61:
.size fxp_determinant, .-fxp_determinant
.p2align 4
.globl transpose
.type transpose, @function
transpose:
.LFB62:
.cfi_startproc
endbr64
mov r8d, ecx
test edx, edx
jle .L737
lea eax, -1[rcx]
lea rcx, 8[rdi+rax*8]
lea eax, -1[rdx]
lea r9, 8[rsi+rax*8]
.L739:
mov rdx, rsi
mov rax, rdi
test r8d, r8d
jle .L741
.L740:
movsd xmm0, QWORD PTR [rax]
add rax, 8
add rdx, 32
movsd QWORD PTR -32[rdx], xmm0
cmp rax, rcx
jne .L740
.L741:
add rsi, 8
add rdi, 32
add rcx, 32
cmp rsi, r9
jne .L739
.L737:
ret
.cfi_endproc
.LFE62:
.size transpose, .-transpose
.p2align 4
.globl fxp_transpose
.type fxp_transpose, @function
fxp_transpose:
.LFB63:
.cfi_startproc
endbr64
mov r9d, ecx
test edx, edx
jle .L745
mov r8, rdi
lea eax, -1[rcx]
mov rdi, rsi
lea rsi, 8[r8+rax*8]
lea eax, -1[rdx]
lea r10, 8[rdi+rax*8]
.L747:
mov rdx, rdi
mov rax, r8
test r9d, r9d
jle .L749
.L748:
mov rcx, QWORD PTR [rax]
add rax, 8
add rdx, 32
mov QWORD PTR -32[rdx], rcx
cmp rax, rsi
jne .L748
.L749:
add rdi, 8
add r8, 32
add rsi, 32
cmp rdi, r10
jne .L747
.L745:
ret
.cfi_endproc
.LFE63:
.size fxp_transpose, .-fxp_transpose
.p2align 4
.globl generic_timing_shift_l_double
.type generic_timing_shift_l_double, @function
generic_timing_shift_l_double:
.LFB64:
.cfi_startproc
endbr64
mov r11d, DWORD PTR hw[rip+28]
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r10, rdi
movsx rdi, esi
mov edx, DWORD PTR hw[rip+24]
mov eax, DWORD PTR hw[rip+40]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
movapd xmm1, xmm0
mov esi, DWORD PTR hw[rip+36]
mov r8d, DWORD PTR hw[rip+44]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
add edx, r11d
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r9d, DWORD PTR hw[rip+48]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea edx, [r11+rdx*2]
lea ecx, 0[0+r8*4]
mov r15d, DWORD PTR hw[rip+92]
mov r12d, DWORD PTR hw[rip+68]
mov r13d, DWORD PTR hw[rip+72]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea ebx, [rax+rax*2]
add edx, ebx
add edx, DWORD PTR hw[rip+32]
mov eax, DWORD PTR hw[rip+84]
add edx, esi
movsd xmm0, QWORD PTR [r10]
mov r14d, DWORD PTR hw[rip+60]
lea edx, [rdx+r8*8]
add edx, DWORD PTR generic_timer[rip]
mov DWORD PTR -8[rsp], esi
lea esi, [rax+rax]
mov ebp, edx
lea edx, [r9+r9*4]
mov DWORD PTR -12[rsp], ecx
add edx, esi
add esi, eax
mov eax, DWORD PTR hw[rip+76]
mov DWORD PTR -4[rsp], r12d
add edx, ecx
mov DWORD PTR -20[rsp], r13d
mov ecx, r12d
add esi, esi
add edx, r15d
mov DWORD PTR -16[rsp], eax
mov r12d, DWORD PTR hw[rip+124]
add edx, ebp
mov ebp, DWORD PTR hw[rip+80]
mov r13d, DWORD PTR hw[rip+52]
lea ebp, 0[rbp+r8*2]
add edx, ebp
mov ebp, DWORD PTR hw[rip+64]
mov DWORD PTR generic_timer[rip], edx
cmp edi, 1
jle .L754
mov eax, r9d
sal eax, 4
add eax, r9d
lea eax, [rax+r14*4]
lea eax, [rax+rbp*4]
lea eax, [rax+rcx*2]
mov ecx, DWORD PTR -20[rsp]
lea eax, [rax+rcx*2]
mov ecx, DWORD PTR -16[rsp]
add eax, esi
lea eax, [rax+rcx*2]
mov ecx, DWORD PTR -12[rsp]
add ecx, r8d
add ecx, eax
mov rax, r10
add ecx, r15d
lea r15d, -2[rdi]
add ecx, r12d
lea r15, 8[r10+r15*8]
add ecx, r13d
add ecx, DWORD PTR hw[rip+88]
add ecx, DWORD PTR hw[rip+100]
add ecx, DWORD PTR hw[rip+104]
add ecx, DWORD PTR hw[rip+128]
.p2align 4,,10
.p2align 3
.L755:
movsd xmm2, QWORD PTR 8[rax]
add rax, 8
add edx, ecx
movsd QWORD PTR -8[rax], xmm2
cmp rax, r15
jne .L755
.L754:
lea eax, [r9+r9*2]
lea ecx, [r8+r8*2]
movsd QWORD PTR -8[r10+rdi*8], xmm1
lea eax, [rsi+rax*4]
add eax, ecx
lea eax, [rax+r14*2]
lea eax, [rax+rbp*2]
add eax, DWORD PTR -20[rsp]
add eax, DWORD PTR -4[rsp]
mov ebp, DWORD PTR -16[rsp]
add r13d, eax
add r13d, DWORD PTR hw[rip+56]
add r12d, r13d
mov eax, DWORD PTR hw[rip+116]
add ebp, r12d
add r11d, ebp
add r11d, DWORD PTR -8[rsp]
add r11d, edx
lea edx, [rbx+rax*2]
add edx, DWORD PTR hw[rip+120]
pop rbx
.cfi_def_cfa_offset 48
add edx, r11d
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
mov DWORD PTR generic_timer[rip], edx
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE64:
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.p2align 4
.globl generic_timing_shift_r_double
.type generic_timing_shift_r_double, @function
generic_timing_shift_r_double:
.LFB65:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov eax, DWORD PTR hw[rip+40]
movapd xmm1, xmm0
mov ecx, DWORD PTR hw[rip+48]
mov r15d, DWORD PTR hw[rip+60]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea eax, [rax+rax*2]
mov r14d, DWORD PTR hw[rip+64]
mov r8d, DWORD PTR hw[rip+44]
mov r9d, DWORD PTR hw[rip+84]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r13d, DWORD PTR hw[rip+68]
mov r12d, DWORD PTR hw[rip+72]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov edx, DWORD PTR hw[rip+92]
mov r10d, DWORD PTR hw[rip+28]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, DWORD PTR hw[rip+52]
mov r11d, DWORD PTR hw[rip+32]
mov ebp, DWORD PTR hw[rip+36]
mov DWORD PTR -20[rsp], eax
movsx rax, esi
sub esi, 1
movsd xmm0, QWORD PTR -8[rdi+rax*8]
mov eax, DWORD PTR hw[rip+56]
mov DWORD PTR -12[rsp], ebx
mov DWORD PTR -16[rsp], edx
mov DWORD PTR -8[rsp], eax
lea eax, 0[0+rcx*8]
sub eax, ecx
lea eax, [rax+r14*2]
lea eax, [rax+r15*2]
lea ebx, [rax+r9*2]
lea eax, 0[0+r8*4]
add ebx, eax
add ebx, r13d
add ebx, r12d
add ebx, edx
mov edx, DWORD PTR hw[rip+24]
add ebx, DWORD PTR -12[rsp]
add ebx, DWORD PTR -8[rsp]
add edx, r10d
lea edx, [r10+rdx*2]
add edx, DWORD PTR -20[rsp]
add edx, r11d
add edx, ebp
lea edx, [rdx+r8*8]
add edx, DWORD PTR generic_timer[rip]
add ebx, edx
lea edx, [r8+rcx]
lea edx, [r11+rdx*2]
add edx, DWORD PTR hw[rip+80]
add edx, ebx
mov DWORD PTR generic_timer[rip], edx
mov ebx, DWORD PTR hw[rip+124]
mov DWORD PTR -4[rsp], ebx
test esi, esi
jle .L759
mov ebx, ecx
add eax, r8d
movsx rsi, esi
sal ebx, 4
sub ebx, ecx
lea ebx, [rbx+r15*4]
lea ebx, [rbx+r14*4]
lea ebx, [rbx+r13*2]
lea ebx, [rbx+r12*2]
lea ebx, [rbx+r9*4]
add eax, ebx
add eax, DWORD PTR -12[rsp]
add eax, DWORD PTR -8[rsp]
add eax, DWORD PTR -16[rsp]
add eax, DWORD PTR -4[rsp]
add r11d, eax
add r11d, DWORD PTR hw[rip+100]
add r11d, DWORD PTR hw[rip+104]
add r11d, DWORD PTR hw[rip+128]
.p2align 4,,10
.p2align 3
.L760:
movsd xmm2, QWORD PTR -8[rdi+rsi*8]
add edx, r11d
movsd QWORD PTR [rdi+rsi*8], xmm2
sub rsi, 1
test esi, esi
jg .L760
.L759:
lea ecx, [rcx+rcx*4]
lea eax, [r9+r9*4]
movsd QWORD PTR [rdi], xmm1
lea eax, [rax+rcx*2]
lea ecx, [r8+r8*2]
add eax, ecx
mov ecx, DWORD PTR hw[rip+120]
add eax, DWORD PTR -20[rsp]
add ecx, DWORD PTR hw[rip+116]
lea eax, [rax+rcx*2]
add eax, ebp
mov ebp, DWORD PTR -4[rsp]
pop rbx
.cfi_def_cfa_offset 48
add r10d, eax
add ebp, r10d
add ebp, DWORD PTR hw[rip+76]
add edx, ebp
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
mov DWORD PTR generic_timer[rip], edx
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE65:
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.p2align 4
.globl shiftL
.type shiftL, @function
shiftL:
.LFB66:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov rcx, rsi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
movsx rbx, edx
mov r12, QWORD PTR [rsi]
cmp ebx, 1
jle .L764
lea eax, -2[rbx]
mov rdi, rcx
lea rsi, 8[rsi]
lea rdx, 8[0+rax*8]
call memmove@PLT
mov rcx, rax
.L764:
mov QWORD PTR -8[rcx+rbx*8], rbp
mov rax, r12
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE66:
.size shiftL, .-shiftL
.p2align 4
.globl shiftR
.type shiftR, @function
shiftR:
.LFB67:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movsx rax, edx
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov rbp, rdi
lea edi, -1[rdx]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rsi
mov r12, QWORD PTR -8[rsi+rax*8]
test edi, edi
jle .L767
sub edx, 2
movsx rdi, edi
lea rax, 0[0+rdi*8]
mov rdi, rdx
lea rdx, 8[0+rdx*8]
neg rdi
sal rdi, 3
lea rsi, -8[rax+rdi]
add rdi, rax
add rsi, rbx
add rdi, rbx
call memmove@PLT
.L767:
mov QWORD PTR [rbx], rbp
mov rax, r12
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE67:
.size shiftR, .-shiftR
.p2align 4
.globl shiftLfloat
.type shiftLfloat, @function
shiftLfloat:
.LFB68:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movsx rbx, esi
sub rsp, 16
.cfi_def_cfa_offset 32
movss xmm1, DWORD PTR [rdi]
cmp ebx, 1
jle .L770
lea eax, -2[rbx]
lea rsi, 4[rdi]
movss DWORD PTR 12[rsp], xmm0
lea rdx, 4[0+rax*4]
movss DWORD PTR 8[rsp], xmm1
call memmove@PLT
movss xmm0, DWORD PTR 12[rsp]
movss xmm1, DWORD PTR 8[rsp]
mov rdi, rax
.L770:
movss DWORD PTR -4[rdi+rbx*4], xmm0
add rsp, 16
.cfi_def_cfa_offset 16
movaps xmm0, xmm1
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE68:
.size shiftLfloat, .-shiftLfloat
.p2align 4
.globl shiftRfloat
.type shiftRfloat, @function
shiftRfloat:
.LFB69:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movsx rax, esi
mov rbx, rdi
sub rsp, 16
.cfi_def_cfa_offset 32
movss xmm1, DWORD PTR -4[rdi+rax*4]
lea edi, -1[rsi]
test edi, edi
jle .L773
lea edx, -2[rsi]
movsx rdi, edi
movss DWORD PTR 12[rsp], xmm0
lea rax, 0[0+rdi*4]
mov rdi, rdx
lea rdx, 4[0+rdx*4]
movss DWORD PTR 8[rsp], xmm1
neg rdi
sal rdi, 2
lea rsi, -4[rax+rdi]
add rdi, rax
add rsi, rbx
add rdi, rbx
call memmove@PLT
movss xmm0, DWORD PTR 12[rsp]
movss xmm1, DWORD PTR 8[rsp]
.L773:
movss DWORD PTR [rbx], xmm0
add rsp, 16
.cfi_def_cfa_offset 16
movaps xmm0, xmm1
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE69:
.size shiftRfloat, .-shiftRfloat
.p2align 4
.globl shiftRDdouble
.type shiftRDdouble, @function
shiftRDdouble:
.LFB70:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movsx rbx, esi
sub rsp, 16
.cfi_def_cfa_offset 32
movsd xmm1, QWORD PTR [rdi]
cmp ebx, 1
jle .L776
lea eax, -2[rbx]
lea rsi, 8[rdi]
movsd QWORD PTR 8[rsp], xmm0
lea rdx, 8[0+rax*8]
movsd QWORD PTR [rsp], xmm1
call memmove@PLT
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR [rsp]
mov rdi, rax
.L776:
movsd QWORD PTR -8[rdi+rbx*8], xmm0
add rsp, 16
.cfi_def_cfa_offset 16
movapd xmm0, xmm1
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE70:
.size shiftRDdouble, .-shiftRDdouble
.p2align 4
.globl shiftRdouble
.type shiftRdouble, @function
shiftRdouble:
.LFB71:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movsx rax, esi
mov rbx, rdi
sub rsp, 16
.cfi_def_cfa_offset 32
movsd xmm1, QWORD PTR -8[rdi+rax*8]
lea edi, -1[rsi]
test edi, edi
jle .L779
lea edx, -2[rsi]
movsx rdi, edi
movsd QWORD PTR 8[rsp], xmm0
lea rax, 0[0+rdi*8]
mov rdi, rdx
movsd QWORD PTR [rsp], xmm1
lea rdx, 8[0+rdx*8]
neg rdi
sal rdi, 3
lea rsi, -8[rax+rdi]
add rdi, rax
add rsi, rbx
add rdi, rbx
call memmove@PLT
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR [rsp]
.L779:
movsd QWORD PTR [rbx], xmm0
add rsp, 16
.cfi_def_cfa_offset 16
movapd xmm0, xmm1
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE71:
.size shiftRdouble, .-shiftRdouble
.p2align 4
.globl shiftLDouble
.type shiftLDouble, @function
shiftLDouble:
.LFB166:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
movsx rbx, esi
sub rsp, 16
.cfi_def_cfa_offset 32
movsd xmm1, QWORD PTR [rdi]
cmp ebx, 1
jle .L782
lea eax, -2[rbx]
lea rsi, 8[rdi]
movsd QWORD PTR 8[rsp], xmm0
lea rdx, 8[0+rax*8]
movsd QWORD PTR [rsp], xmm1
call memmove@PLT
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm1, QWORD PTR [rsp]
mov rdi, rax
.L782:
movsd QWORD PTR -8[rdi+rbx*8], xmm0
add rsp, 16
.cfi_def_cfa_offset 16
movapd xmm0, xmm1
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE166:
.size shiftLDouble, .-shiftLDouble
.p2align 4
.globl shiftLboth
.type shiftLboth, @function
shiftLboth:
.LFB73:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13, rsi
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
mov r12, rdx
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
movsx rbx, ecx
sub rsp, 16
.cfi_def_cfa_offset 64
cmp ebx, 1
jle .L785
lea ecx, -2[rbx]
lea rdx, 1[rcx]
lea rax, 16[r12+rcx*8]
lea r14, 0[0+rdx*4]
cmp rdi, rax
jnb .L789
lea rax, [rdi+r14]
cmp r12, rax
jb .L788
.L789:
sal rdx, 3
lea rsi, 8[r12]
mov rdi, r12
movss DWORD PTR 12[rsp], xmm0
call memmove@PLT
lea rsi, 4[rbp]
mov rdx, r14
mov rdi, rbp
call memmove@PLT
movss xmm0, DWORD PTR 12[rsp]
.L785:
mov QWORD PTR -8[r12+rbx*8], r13
movss DWORD PTR -4[rbp+rbx*4], xmm0
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L788:
.cfi_restore_state
xor eax, eax
.p2align 4,,10
.p2align 3
.L786:
mov rdx, QWORD PTR 8[r12+rax*8]
movss xmm1, DWORD PTR 4[rbp+rax*4]
mov QWORD PTR [r12+rax*8], rdx
mov rdx, rax
movss DWORD PTR 0[rbp+rax*4], xmm1
add rax, 1
cmp rdx, rcx
jne .L786
jmp .L785
.cfi_endproc
.LFE73:
.size shiftLboth, .-shiftLboth
.p2align 4
.globl shiftRboth
.type shiftRboth, @function
shiftRboth:
.LFB74:
.cfi_startproc
endbr64
sub ecx, 1
movaps xmm1, xmm0
test ecx, ecx
jle .L793
movsx rcx, ecx
.p2align 4,,10
.p2align 3
.L794:
mov rax, QWORD PTR -8[rdx+rcx*8]
movss xmm0, DWORD PTR -4[rdi+rcx*4]
mov QWORD PTR [rdx+rcx*8], rax
movss DWORD PTR [rdi+rcx*4], xmm0
sub rcx, 1
test ecx, ecx
jg .L794
.L793:
mov QWORD PTR [rdx], rsi
movss DWORD PTR [rdi], xmm1
ret
.cfi_endproc
.LFE74:
.size shiftRboth, .-shiftRboth
.p2align 4
.globl order
.type order, @function
order:
.LFB75:
.cfi_startproc
endbr64
lea edx, -1[rdi]
lea eax, -1[rsi]
cmp edi, esi
cmovg eax, edx
ret
.cfi_endproc
.LFE75:
.size order, .-order
.p2align 4
.globl fxp_check_limit_cycle
.type fxp_check_limit_cycle, @function
fxp_check_limit_cycle:
.LFB76:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx rax, esi
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, rdi
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rax
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 24
.cfi_def_cfa_offset 80
mov rdx, QWORD PTR -8[rdi+rax*8]
sub eax, 2
js .L805
cdqe
mov r13d, 1
lea rax, [rdi+rax*8]
jmp .L801
.p2align 4,,10
.p2align 3
.L810:
add r13d, 1
sub rax, 8
cmp r12d, r13d
je .L800
.L801:
cmp QWORD PTR [rax], rdx
jne .L810
.L800:
cmp r12d, r13d
mov ebp, r12d
setne al
xor edi, edi
cmp r13d, 1
setne dil
and edi, eax
xor eax, eax
call __ESBMC_assume@PLT
mov esi, r13d
lea rdi, .LC22[rip]
xor eax, eax
call printf@PLT
lea eax, [r13+r13]
mov DWORD PTR 12[rsp], eax
sub ebp, 1
js .L806
sub r12d, r13d
movsx rbx, ebp
sub ebp, r13d
xor r13d, r13d
jmp .L804
.p2align 4,,10
.p2align 3
.L803:
sub rbx, 1
sub ebp, 1
test ebx, ebx
js .L802
.L804:
cmp r12d, ebx
jg .L803
movsx rax, ebp
mov rsi, QWORD PTR [r14+rbx*8]
lea rdi, .LC23[rip]
lea r15, [r14+rax*8]
xor eax, eax
mov rdx, QWORD PTR [r15]
call printf@PLT
test ebp, ebp
jle .L802
mov rax, QWORD PTR [r15]
cmp QWORD PTR [r14+rbx*8], rax
jne .L802
sub rbx, 1
add r13d, 2
sub ebp, 1
test ebx, ebx
jns .L804
.p2align 4,,10
.p2align 3
.L802:
xor edi, edi
test r13d, r13d
setg dil
xor eax, eax
call __ESBMC_assume@PLT
mov ebx, DWORD PTR 12[rsp]
lea rdi, .LC24[rip]
xor eax, eax
mov esi, ebx
call printf@PLT
mov esi, r13d
lea rdi, .LC25[rip]
xor eax, eax
call printf@PLT
xor edi, edi
cmp ebx, r13d
sete dil
xor eax, eax
call __ESBMC_assume@PLT
call __DSVERIFIER_assert.part.0
.L805:
mov r13d, 1
jmp .L800
.L806:
xor r13d, r13d
jmp .L802
.cfi_endproc
.LFE76:
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.p2align 4
.globl fxp_check_persistent_limit_cycle
.type fxp_check_persistent_limit_cycle, @function
fxp_check_persistent_limit_cycle:
.LFB77:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r14
push r13
push r12
.cfi_offset 14, -24
.cfi_offset 13, -32
.cfi_offset 12, -40
mov r12d, esi
push rbx
sub rsp, 16
.cfi_offset 3, -48
mov rsi, QWORD PTR [rdi]
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
test r12d, r12d
jle .L812
lea edx, -1[r12]
lea rax, 8[rdi]
mov r13, rdi
xor ecx, ecx
lea rdi, [rax+rdx*8]
xor ebx, ebx
mov rdx, rsi
jmp .L817
.p2align 4,,10
.p2align 3
.L847:
add ecx, 1
cmp rax, rdi
je .L816
.L848:
mov rdx, QWORD PTR [rax]
add rax, 8
.L817:
cmp rsi, rdx
jne .L847
test ecx, ecx
jne .L815
add ebx, 1
cmp rax, rdi
jne .L848
.L816:
add ebx, ecx
cmp ebx, 1
jle .L849
.L828:
mov eax, r12d
xor edi, edi
sar eax
cmp eax, ebx
movsx rax, ebx
setge dil
lea r14, 0[0+rax*8]
.L818:
xor eax, eax
call __ESBMC_assume@PLT
lea rax, 15[r14]
mov rcx, rsp
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L831
.L850:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L850
.L831:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L851
.L832:
mov rsi, rsp
xor eax, eax
.p2align 4,,10
.p2align 3
.L820:
cmp ebx, eax
jle .L819
mov rdx, QWORD PTR 0[r13+rax*8]
mov QWORD PTR [rsi+rax*8], rdx
.L819:
add rax, 1
cmp r12d, eax
jg .L820
xor edx, edx
xor eax, eax
xor edi, edi
jmp .L823
.p2align 4,,10
.p2align 3
.L853:
cmp ecx, ebx
movsx rax, ecx
cmove rax, rdi
add rdx, 1
cmp r12d, edx
jle .L852
.L823:
lea ecx, 1[rax]
mov rax, QWORD PTR [rsi+rax*8]
cmp QWORD PTR 0[r13+rdx*8], rax
je .L853
.L811:
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L854
lea rsp, -32[rbp]
pop rbx
pop r12
pop r13
pop r14
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L849:
.cfi_restore_state
xor edi, edi
xor eax, eax
call __ESBMC_assume@PLT
movsx rax, ebx
mov rcx, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
and rdx, -16
sub rcx, rax
.L824:
cmp rsp, rcx
je .L831
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L824
.p2align 4,,10
.p2align 3
.L852:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L815:
add ebx, ecx
cmp ebx, 1
jne .L828
mov r14d, 8
xor edi, edi
jmp .L818
.L851:
or QWORD PTR -8[rsp+rdx], 0
jmp .L832
.L812:
xor edi, edi
xor eax, eax
call __ESBMC_assume@PLT
jmp .L811
.L854:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE77:
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.p2align 4
.globl fxp_check_oscillations
.type fxp_check_oscillations, @function
fxp_check_oscillations:
.LFB78:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movsx r12, esi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea rdx, 0[0+r12*8]
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, r12
mov rax, QWORD PTR -8[rdi+rdx]
xor edi, edi
cmp QWORD PTR 0[rbp], rax
je .L856
xor edi, edi
cmp QWORD PTR -16[rbp+rdx], rax
setne dil
.L856:
xor eax, eax
call __ESBMC_assume@PLT
cmp ebx, 2
jle .L855
lea r8, 16[rbp]
mov ecx, 2
xor edi, edi
xor edx, edx
.p2align 4,,10
.p2align 3
.L858:
xor eax, eax
jmp .L862
.p2align 4,,10
.p2align 3
.L861:
add rax, 1
add edx, 1
cmp r12, rax
je .L860
.L862:
cmp edx, ecx
jle .L859
xor edi, edi
xor edx, edx
.L859:
lea esi, [rcx+rax]
cmp esi, ebx
jge .L860
mov rsi, QWORD PTR [r8+rax*8]
cmp QWORD PTR 0[rbp+rax*8], rsi
jne .L861
add edi, 1
cmp edi, ecx
jne .L861
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L860:
add ecx, 1
add r8, 8
cmp ebx, ecx
jne .L858
.L855:
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE78:
.size fxp_check_oscillations, .-fxp_check_oscillations
.p2align 4
.globl fxp_ln
.type fxp_ln, @function
fxp_ln:
.LFB79:
.cfi_startproc
endbr64
mov eax, 681391
cmp edi, 32767
jg .L868
sal edi, 16
mov eax, -45426
.L868:
cmp edi, 8388607
jg .L869
sal edi, 8
sub eax, 363409
.L869:
cmp edi, 134217727
jg .L870
sal edi, 4
sub eax, 181704
.L870:
cmp edi, 536870911
jg .L871
sal edi, 2
sub eax, 90852
.L871:
cmp edi, 1073741823
jg .L872
add edi, edi
sub eax, 45426
.L872:
mov edx, edi
sar edx
add edx, edi
js .L873
mov ecx, edx
sub eax, 26573
sar ecx, 2
add edx, ecx
.L874:
mov ecx, edx
sub eax, 14624
sar ecx, 3
add edx, ecx
.L876:
mov ecx, edx
sub eax, 7719
sar ecx, 4
add ecx, edx
.L878:
mov edx, ecx
sub eax, 3973
sar edx, 5
add ecx, edx
.L880:
mov edx, ecx
sub eax, 2017
sar edx, 6
add edx, ecx
.L882:
mov edi, edx
sub eax, 1016
sar edi, 7
add edi, edx
.L884:
sub eax, 510
.L885:
mov edx, -2147483648
sub edx, edi
sar edx, 15
sub eax, edx
ret
.p2align 4,,10
.p2align 3
.L873:
mov edx, edi
sar edx, 2
add edx, edi
jns .L874
mov edx, edi
sar edx, 3
add edx, edi
jns .L876
mov ecx, edi
sar ecx, 4
add ecx, edi
jns .L878
mov edx, edi
sar edx, 5
mov ecx, edx
add ecx, edi
jns .L880
mov edx, edi
sar edx, 6
add edx, edi
jns .L882
mov edx, edi
sar edx, 7
add edx, edi
js .L885
mov edi, edx
jmp .L884
.cfi_endproc
.LFE79:
.size fxp_ln, .-fxp_ln
.p2align 4
.globl fxp_log10_low
.type fxp_log10_low, @function
fxp_log10_low:
.LFB80:
.cfi_startproc
endbr64
mulsd xmm0, QWORD PTR .LC30[rip]
pxor xmm1, xmm1
addsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si edi, xmm0
pxor xmm0, xmm0
call fxp_ln
mov edi, 655360
mov esi, eax
call fxp_ln
cvtsi2sd xmm0, esi
cvtsi2sd xmm1, eax
divsd xmm0, xmm1
ret
.cfi_endproc
.LFE80:
.size fxp_log10_low, .-fxp_log10_low
.p2align 4
.globl fxp_log10
.type fxp_log10, @function
fxp_log10:
.LFB81:
.cfi_startproc
endbr64
mov edi, 655360
pxor xmm1, xmm1
call fxp_ln
movsd xmm2, QWORD PTR .LC31[rip]
cvtsi2sd xmm1, eax
comisd xmm0, xmm2
jbe .L896
movsd xmm3, QWORD PTR .LC32[rip]
comisd xmm0, xmm3
jbe .L897
divsd xmm0, xmm3
mulsd xmm0, QWORD PTR .LC30[rip]
addsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si edi, xmm0
pxor xmm0, xmm0
call fxp_ln
cvtsi2sd xmm0, eax
divsd xmm0, xmm1
addsd xmm0, QWORD PTR .LC33[rip]
ret
.p2align 4,,10
.p2align 3
.L896:
mulsd xmm0, QWORD PTR .LC30[rip]
addsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si edi, xmm0
pxor xmm0, xmm0
call fxp_ln
cvtsi2sd xmm0, eax
divsd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L897:
divsd xmm0, xmm2
mulsd xmm0, QWORD PTR .LC30[rip]
addsd xmm0, QWORD PTR .LC11[rip]
cvttsd2si edi, xmm0
pxor xmm0, xmm0
call fxp_ln
cvtsi2sd xmm0, eax
divsd xmm0, xmm1
addsd xmm0, QWORD PTR .LC34[rip]
ret
.cfi_endproc
.LFE81:
.size fxp_log10, .-fxp_log10
.section .rodata.str1.8
.align 8
.LC36:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/functions.h"
.section .rodata.str1.1
.LC37:
.string "sv >= nv"
.text
.p2align 4
.globl snrVariance
.type snrVariance, @function
snrVariance:
.LFB82:
.cfi_startproc
endbr64
test edx, edx
jle .L911
pxor xmm5, xmm5
mov ecx, edx
xor eax, eax
movsx rdx, edx
movapd xmm0, xmm5
movapd xmm1, xmm5
.p2align 4,,10
.p2align 3
.L900:
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR [rdi+rax*4]
addsd xmm1, xmm2
pxor xmm2, xmm2
cvtss2sd xmm2, DWORD PTR [rsi+rax*4]
add rax, 1
addsd xmm0, xmm2
cmp rdx, rax
jne .L900
pxor xmm3, xmm3
xor eax, eax
movapd xmm4, xmm5
cvtsi2sd xmm3, ecx
divsd xmm1, xmm3
movapd xmm2, xmm1
movapd xmm1, xmm0
divsd xmm1, xmm3
movapd xmm3, xmm5
.p2align 4,,10
.p2align 3
.L902:
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR [rdi+rax*4]
subsd xmm0, xmm2
mulsd xmm0, xmm0
addsd xmm3, xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR [rsi+rax*4]
subsd xmm0, xmm1
add rax, 1
mulsd xmm0, xmm0
addsd xmm4, xmm0
cmp rdx, rax
jne .L902
ucomisd xmm4, xmm5
jp .L907
comisd xmm4, xmm5
je .L911
.L907:
comisd xmm3, xmm4
jb .L915
divsd xmm3, xmm4
pxor xmm0, xmm0
cvtsd2ss xmm0, xmm3
ret
.p2align 4,,10
.p2align 3
.L911:
movss xmm0, DWORD PTR .LC35[rip]
ret
.L915:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.18[rip]
mov edx, 373
lea rsi, .LC36[rip]
lea rdi, .LC37[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE82:
.size snrVariance, .-snrVariance
.p2align 4
.globl snrPower
.type snrPower, @function
snrPower:
.LFB83:
.cfi_startproc
endbr64
test edx, edx
jle .L925
pxor xmm3, xmm3
movsx rdx, edx
xor eax, eax
movapd xmm2, xmm3
movapd xmm1, xmm3
.p2align 4,,10
.p2align 3
.L918:
movss xmm0, DWORD PTR [rdi+rax*4]
mulss xmm0, xmm0
cvtss2sd xmm0, xmm0
addsd xmm1, xmm0
movss xmm0, DWORD PTR [rsi+rax*4]
add rax, 1
mulss xmm0, xmm0
cvtss2sd xmm0, xmm0
addsd xmm2, xmm0
cmp rdx, rax
jne .L918
ucomisd xmm2, xmm3
jp .L923
comisd xmm2, xmm3
je .L925
.L923:
comisd xmm1, xmm2
jb .L929
divsd xmm1, xmm2
pxor xmm0, xmm0
cvtsd2ss xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L925:
movss xmm0, DWORD PTR .LC35[rip]
ret
.L929:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.17[rip]
mov edx, 394
lea rsi, .LC36[rip]
lea rdi, .LC37[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE83:
.size snrPower, .-snrPower
.section .rodata.str1.1
.LC40:
.string "power >= 1.0f"
.text
.p2align 4
.globl snrPoint
.type snrPoint, @function
snrPoint:
.LFB84:
.cfi_startproc
endbr64
test edx, edx
jle .L931
movss xmm3, DWORD PTR .LC39[rip]
movsd xmm4, QWORD PTR .LC6[rip]
movsx rdx, edx
xor eax, eax
pxor xmm2, xmm2
jmp .L934
.p2align 4,,10
.p2align 3
.L935:
movss xmm0, DWORD PTR [rdi+rax*4]
divss xmm0, xmm1
comiss xmm0, DWORD PTR .LC38[rip]
ja .L932
comiss xmm3, xmm0
ja .L932
cvtss2sd xmm0, xmm0
mulsd xmm0, xmm0
comisd xmm0, xmm4
jb .L941
.L932:
add rax, 1
cmp rax, rdx
je .L931
.L934:
movss xmm1, DWORD PTR [rsi+rax*4]
ucomiss xmm1, xmm2
jp .L935
jne .L935
add rax, 1
cmp rax, rdx
jne .L934
.L931:
movss xmm0, DWORD PTR .LC35[rip]
ret
.L941:
sub rsp, 8
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.16[rip]
mov edx, 412
lea rsi, .LC36[rip]
lea rdi, .LC40[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE84:
.size snrPoint, .-snrPoint
.p2align 4
.globl rand
.type rand, @function
rand:
.LFB85:
.cfi_startproc
endbr64
imul rax, QWORD PTR next[rip], 1103515245
add rax, 12345
mov QWORD PTR next[rip], rax
shr rax, 16
and eax, 32767
ret
.cfi_endproc
.LFE85:
.size rand, .-rand
.p2align 4
.globl srand
.type srand, @function
srand:
.LFB86:
.cfi_startproc
endbr64
mov eax, edi
mov QWORD PTR next[rip], rax
ret
.cfi_endproc
.LFE86:
.size srand, .-srand
.section .rodata.str1.8
.align 8
.LC43:
.string "(double)timer1*CYCLE <= (double)DEADLINE"
.text
.p2align 4
.globl iirIIOutTime
.type iirIIOutTime, @function
iirIIOutTime:
.LFB87:
.cfi_startproc
endbr64
movss xmm2, DWORD PTR [rdi]
cmp ecx, 1
jle .L945
lea r9d, -1[rcx]
xor eax, eax
.p2align 4,,10
.p2align 3
.L946:
movss xmm1, DWORD PTR 4[rsi+rax*4]
mulss xmm1, DWORD PTR 4[rdi+rax*4]
add rax, 1
subss xmm2, xmm1
movss DWORD PTR [rdi], xmm2
cmp r9, rax
jne .L946
imul ecx, ecx, 54
addss xmm0, xmm2
add ecx, 17
movss DWORD PTR [rdi], xmm0
test r8d, r8d
jle .L952
.L951:
lea esi, -1[r8]
xor eax, eax
pxor xmm1, xmm1
sal rsi, 2
jmp .L949
.p2align 4,,10
.p2align 3
.L948:
movss xmm0, DWORD PTR 4[rdi+rax]
add rax, 4
.L949:
mulss xmm0, DWORD PTR [rdx+rax]
addss xmm1, xmm0
cmp rsi, rax
jne .L948
imul r8d, r8d, 46
add ecx, r8d
.L947:
movsd xmm2, QWORD PTR .LC42[rip]
add ecx, 38
pxor xmm0, xmm0
cvtsi2sd xmm0, ecx
divsd xmm0, QWORD PTR .LC41[rip]
comisd xmm2, xmm0
jb .L958
.L944:
movaps xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L945:
addss xmm0, xmm2
mov ecx, 71
movss DWORD PTR [rdi], xmm0
test r8d, r8d
jg .L951
pxor xmm1, xmm1
jmp .L944
.p2align 4,,10
.p2align 3
.L952:
pxor xmm1, xmm1
jmp .L947
.L958:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.15[rip]
mov edx, 450
lea rsi, .LC36[rip]
lea rdi, .LC43[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE87:
.size iirIIOutTime, .-iirIIOutTime
.p2align 4
.globl iirIItOutTime
.type iirIItOutTime, @function
iirIItOutTime:
.LFB88:
.cfi_startproc
endbr64
movss xmm2, DWORD PTR [rdx]
cmp r8d, ecx
mov eax, ecx
cmovge eax, r8d
mulss xmm2, xmm0
addss xmm2, DWORD PTR [rdi]
cmp eax, 1
jle .L967
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
lea r10d, -1[rcx]
lea ebx, -2[rax]
movaps xmm3, xmm0
lea r9, 4[rsi]
lea r11, 4[rdx]
sub r8d, 1
xor eax, eax
mov ecx, 105
jmp .L963
.p2align 4,,10
.p2align 3
.L965:
mov rax, rsi
.L963:
movss xmm0, DWORD PTR 4[rdi+rax*4]
mov esi, eax
movss DWORD PTR [rdi+rax*4], xmm0
cmp eax, r10d
jge .L961
movss xmm1, DWORD PTR [r9]
add ecx, 41
add r9, 4
mulss xmm1, xmm2
subss xmm0, xmm1
movss DWORD PTR [rdi+rax*4], xmm0
.L961:
mov edx, ecx
cmp esi, r8d
jge .L962
movss xmm0, DWORD PTR [r11]
add edx, 38
add r11, 4
mulss xmm0, xmm3
addss xmm0, DWORD PTR [rdi+rax*4]
movss DWORD PTR [rdi+rax*4], xmm0
.L962:
lea ecx, 54[rdx]
lea rsi, 1[rax]
cmp rbx, rax
jne .L965
movsd xmm1, QWORD PTR .LC42[rip]
add edx, 61
pxor xmm0, xmm0
cvtsi2sd xmm0, edx
divsd xmm0, QWORD PTR .LC41[rip]
comisd xmm1, xmm0
jb .L970
movaps xmm0, xmm2
pop rbx
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L967:
.cfi_restore 3
movaps xmm0, xmm2
ret
.L970:
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
lea rcx, __PRETTY_FUNCTION__.14[rip]
mov edx, 477
lea rsi, .LC36[rip]
lea rdi, .LC43[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE88:
.size iirIItOutTime, .-iirIItOutTime
.p2align 4
.globl iirIItOutTime_double
.type iirIItOutTime_double, @function
iirIItOutTime_double:
.LFB89:
.cfi_startproc
endbr64
movsd xmm2, QWORD PTR [rdx]
cmp r8d, ecx
mov eax, ecx
cmovge eax, r8d
mulsd xmm2, xmm0
addsd xmm2, QWORD PTR [rdi]
cmp eax, 1
jle .L979
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
lea r10d, -1[rcx]
lea ebx, -2[rax]
movapd xmm3, xmm0
lea r9, 8[rsi]
lea r11, 8[rdx]
sub r8d, 1
xor eax, eax
mov ecx, 105
jmp .L975
.p2align 4,,10
.p2align 3
.L977:
mov rax, rsi
.L975:
movsd xmm0, QWORD PTR 8[rdi+rax*8]
mov esi, eax
movsd QWORD PTR [rdi+rax*8], xmm0
cmp eax, r10d
jge .L973
movsd xmm1, QWORD PTR [r9]
add ecx, 41
add r9, 8
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR [rdi+rax*8], xmm0
.L973:
mov edx, ecx
cmp esi, r8d
jge .L974
movsd xmm0, QWORD PTR [r11]
add edx, 38
add r11, 8
mulsd xmm0, xmm3
addsd xmm0, QWORD PTR [rdi+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm0
.L974:
lea ecx, 54[rdx]
lea rsi, 1[rax]
cmp rbx, rax
jne .L977
movsd xmm1, QWORD PTR .LC42[rip]
add edx, 61
pxor xmm0, xmm0
cvtsi2sd xmm0, edx
divsd xmm0, QWORD PTR .LC41[rip]
comisd xmm1, xmm0
jb .L982
movapd xmm0, xmm2
pop rbx
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L979:
.cfi_restore 3
movapd xmm0, xmm2
ret
.L982:
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
lea rcx, __PRETTY_FUNCTION__.13[rip]
mov edx, 504
lea rsi, .LC36[rip]
lea rdi, .LC43[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE89:
.size iirIItOutTime_double, .-iirIItOutTime_double
.p2align 4
.globl iirOutBoth
.type iirOutBoth, @function
iirOutBoth:
.LFB90:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rcx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea rbx, 4[rdx]
sub rsp, 24
.cfi_def_cfa_offset 80
movsx r15, DWORD PTR 112[rsp]
mov eax, DWORD PTR 120[rsp]
mov QWORD PTR [rsp], r8
mov rcx, QWORD PTR 88[rsp]
mov r10, QWORD PTR 96[rsp]
lea rbp, -8[r9+r15*8]
movsx r9, eax
mov QWORD PTR 8[rsp], r15
lea r12, -4[rdi+r15*4]
lea r11, 8[rcx]
lea rcx, 0[0+r9*8]
lea r8, -8[rcx]
lea r15, -4[rsi+r9*4]
add r8, QWORD PTR 80[rsp]
test eax, eax
jle .L988
lea rax, [r10+rcx]
mov QWORD PTR 16[rsp], r11
mov r14, r8
mov r11, r13
pxor xmm0, xmm0
xor r9d, r9d
mov r13, rax
.p2align 4,,10
.p2align 3
.L985:
mov rsi, QWORD PTR [r14]
mov rdi, QWORD PTR [r10]
add r11, 4
sub r15, 4
add r10, 8
sub r14, 8
call fxp_mult
lea rdi, [rax+r9]
call fxp_quantize
movss xmm1, DWORD PTR -4[r11]
mulss xmm1, DWORD PTR 4[r15]
mov r9, rax
addss xmm0, xmm1
cmp r13, r10
jne .L985
mov r11, QWORD PTR 16[rsp]
.L984:
cmp DWORD PTR 112[rsp], 1
jle .L986
mov rax, QWORD PTR 88[rsp]
mov rdx, QWORD PTR 8[rsp]
lea r10, [rax+rdx*8]
.p2align 4,,10
.p2align 3
.L987:
mov rsi, QWORD PTR 0[rbp]
mov rdi, QWORD PTR [r11]
add rbx, 4
sub r12, 4
add r11, 8
sub rbp, 8
call fxp_mult
mov rdi, r9
sub rdi, rax
call fxp_quantize
movss xmm1, DWORD PTR -4[rbx]
mulss xmm1, DWORD PTR 4[r12]
mov r9, rax
subss xmm0, xmm1
cmp r10, r11
jne .L987
.L986:
mov rax, QWORD PTR 104[rsp]
mov QWORD PTR [rax], r9
mov rax, QWORD PTR [rsp]
movss DWORD PTR [rax], xmm0
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L988:
.cfi_restore_state
pxor xmm0, xmm0
xor r9d, r9d
jmp .L984
.cfi_endproc
.LFE90:
.size iirOutBoth, .-iirOutBoth
.p2align 4
.globl iirOutFixedL
.type iirOutFixedL, @function
iirOutFixedL:
.LFB91:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
movsx r12, r9d
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rdi
sub rsp, 40
.cfi_def_cfa_offset 96
movsx r13, DWORD PTR 96[rsp]
mov QWORD PTR 8[rsp], rdx
lea rdx, 0[0+r12*8]
lea r12, 8[rdi]
lea r15, -8[rdx+rcx]
mov QWORD PTR [rsp], rsi
lea rcx, 0[0+r13*8]
mov QWORD PTR 16[rsp], rdx
mov QWORD PTR 24[rsp], rcx
lea r14, -8[rcx+r8]
cmp r13d, 1
jle .L998
mov rax, r13
mov rbp, rsi
mov r13, r14
xor r10d, r10d
sub eax, 2
add rax, 1
mov QWORD PTR 32[rsp], rax
lea r11, [rsi+rax*8]
.p2align 4,,10
.p2align 3
.L994:
mov rax, QWORD PTR 8[rbp]
sub r13, 8
add rbp, 8
mov QWORD PTR -8[rbp], rax
mov rsi, QWORD PTR -8[rbp]
mov rdi, QWORD PTR 8[r13]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
mov r10, rax
cmp rbp, r11
jne .L994
mov rax, QWORD PTR 32[rsp]
neg rax
lea r14, [r14+rax*8]
.L993:
mov rdx, QWORD PTR 24[rsp]
mov rcx, QWORD PTR 8[rsp]
mov rax, QWORD PTR [rsp]
mov QWORD PTR -8[rax+rdx], rcx
mov rsi, QWORD PTR [r11]
mov rdi, QWORD PTR [r14]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
mov r10, rax
cmp r9d, 2
jle .L999
lea ebp, -3[r9]
mov r13, r15
lea r11, 16[rbx+rbp*8]
.p2align 4,,10
.p2align 3
.L996:
mov rsi, QWORD PTR [r12]
mov rdi, QWORD PTR 0[r13]
add r12, 8
sub r13, 8
call fxp_mult
mov rdi, r10
sub rdi, rax
call fxp_quantize
mov r10, rax
mov rax, QWORD PTR [r12]
mov QWORD PTR -8[r12], rax
cmp r12, r11
jne .L996
not rbp
lea r15, [r15+rbp*8]
.L995:
cmp r9d, 1
jle .L997
mov rsi, QWORD PTR [r11]
mov rdi, QWORD PTR [r15]
call fxp_mult
mov rdi, r10
sub rdi, rax
call fxp_quantize
mov r10, rax
.L997:
mov rax, QWORD PTR 16[rsp]
mov QWORD PTR -8[rbx+rax], r10
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
mov rax, r10
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L998:
.cfi_restore_state
mov r11, QWORD PTR [rsp]
xor r10d, r10d
jmp .L993
.p2align 4,,10
.p2align 3
.L999:
mov r11, r12
jmp .L995
.cfi_endproc
.LFE91:
.size iirOutFixedL, .-iirOutFixedL
.p2align 4
.globl iirOutFloatL
.type iirOutFloatL, @function
iirOutFloatL:
.LFB92:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
movsx r11, r8d
mov r10, rsi
movaps xmm1, xmm0
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
movsx rbp, r9d
sal r11, 2
lea rax, 4[rdi]
sal rbp, 2
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
lea rbx, -4[r11+rdx]
lea r12, -4[rbp+rcx]
cmp r9d, 1
jle .L1009
sub r9d, 2
mov rdx, r10
pxor xmm2, xmm2
mov rcx, r12
add r9, 1
lea rsi, [rsi+r9*4]
.p2align 4,,10
.p2align 3
.L1005:
movss xmm0, DWORD PTR 4[rdx]
sub rcx, 4
add rdx, 4
movss DWORD PTR -4[rdx], xmm0
movss xmm0, DWORD PTR 4[rcx]
mulss xmm0, DWORD PTR -4[rdx]
addss xmm2, xmm0
cmp rdx, rsi
jne .L1005
neg r9
lea r12, [r12+r9*4]
.L1004:
movss DWORD PTR -4[r10+rbp], xmm1
movss xmm1, DWORD PTR [r12]
mulss xmm1, DWORD PTR [rsi]
addss xmm1, xmm2
cmp r8d, 2
jle .L1010
lea esi, -3[r8]
mov rdx, rbx
lea rcx, 8[rdi+rsi*4]
.p2align 4,,10
.p2align 3
.L1007:
add rax, 4
movss xmm0, DWORD PTR [rdx]
sub rdx, 4
mulss xmm0, DWORD PTR -4[rax]
subss xmm1, xmm0
movss xmm0, DWORD PTR [rax]
movss DWORD PTR -4[rax], xmm0
cmp rax, rcx
jne .L1007
not rsi
lea rbx, [rbx+rsi*4]
.L1006:
cmp r8d, 1
jle .L1008
movss xmm0, DWORD PTR [rbx]
mulss xmm0, DWORD PTR [rcx]
subss xmm1, xmm0
.L1008:
movss DWORD PTR -4[rdi+r11], xmm1
movaps xmm0, xmm1
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1009:
.cfi_restore_state
pxor xmm2, xmm2
jmp .L1004
.p2align 4,,10
.p2align 3
.L1010:
mov rcx, rax
jmp .L1006
.cfi_endproc
.LFE92:
.size iirOutFloatL, .-iirOutFloatL
.p2align 4
.globl iirOutBothL
.type iirOutBothL, @function
iirOutBothL:
.LFB93:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15, rsi
mov r10, rdx
movaps xmm1, xmm0
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
lea r11, 8[r8]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 96
.cfi_def_cfa_offset 152
mov QWORD PTR 24[rsp], rsi
movsx rsi, DWORD PTR 176[rsp]
mov eax, DWORD PTR 184[rsp]
mov QWORD PTR 56[rsp], rdi
lea rdx, -8[0+rsi*8]
mov QWORD PTR 32[rsp], r8
mov QWORD PTR 48[rsp], rdx
add rdx, QWORD PTR 152[rsp]
mov QWORD PTR [rsp], rdx
movsx rdx, eax
lea rbx, 0[0+rdx*8]
sal rdx, 2
mov QWORD PTR 40[rsp], r9
lea r12, -8[rbx]
mov QWORD PTR 64[rsp], rbx
lea rbx, 0[0+rsi*4]
add r12, QWORD PTR 160[rsp]
lea rsi, -4[rbx+r10]
mov QWORD PTR 72[rsp], rbx
lea r14, -4[rdx+rcx]
mov QWORD PTR 16[rsp], rsi
lea rsi, 4[rdi]
mov QWORD PTR 8[rsp], rsi
mov QWORD PTR 80[rsp], rdx
cmp eax, 1
jle .L1021
lea r13d, -2[rax]
mov rbx, r9
pxor xmm2, xmm2
xor r10d, r10d
lea rax, 1[r13]
mov r13, r12
mov QWORD PTR 88[rsp], rax
lea rbp, [r9+rax*8]
mov r9, r14
.p2align 4,,10
.p2align 3
.L1016:
mov rax, QWORD PTR 8[rbx]
sub r13, 8
add rbx, 8
sub r9, 4
add r15, 4
mov QWORD PTR -8[rbx], rax
mov rsi, QWORD PTR -8[rbx]
mov rdi, QWORD PTR 8[r13]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
movss xmm0, DWORD PTR [r15]
mov r10, rax
movss DWORD PTR -4[r15], xmm0
movss xmm0, DWORD PTR 4[r9]
mulss xmm0, DWORD PTR -4[r15]
addss xmm2, xmm0
cmp rbx, rbp
jne .L1016
mov rcx, QWORD PTR 88[rsp]
mov rax, rcx
neg rax
lea r12, [r12+rax*8]
lea r14, [r14+rax*4]
mov rax, QWORD PTR 24[rsp]
lea rbx, [rax+rcx*4]
.L1015:
mov rcx, QWORD PTR 40[rsp]
mov rdx, QWORD PTR 64[rsp]
mov rax, QWORD PTR 168[rsp]
mov QWORD PTR -8[rcx+rdx], rax
mov rsi, QWORD PTR 0[rbp]
mov rdi, QWORD PTR [r12]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
mov rcx, QWORD PTR 80[rsp]
cmp DWORD PTR 176[rsp], 2
mov r9, rax
mov rax, QWORD PTR 24[rsp]
movss DWORD PTR -4[rax+rcx], xmm1
movss xmm1, DWORD PTR [r14]
mulss xmm1, DWORD PTR [rbx]
addss xmm1, xmm2
jle .L1022
mov eax, DWORD PTR 176[rsp]
mov rbp, QWORD PTR 8[rsp]
mov r13, QWORD PTR 16[rsp]
mov r12, QWORD PTR [rsp]
lea ebx, -3[rax]
mov rax, QWORD PTR 32[rsp]
lea r10, 16[rax+rbx*8]
.p2align 4,,10
.p2align 3
.L1018:
mov rsi, QWORD PTR [r11]
mov rdi, QWORD PTR [r12]
add rbp, 4
sub r13, 4
add r11, 8
sub r12, 8
call fxp_mult
mov rdi, r9
sub rdi, rax
call fxp_quantize
movss xmm0, DWORD PTR 4[r13]
mulss xmm0, DWORD PTR -4[rbp]
mov r9, rax
mov rax, QWORD PTR [r11]
mov QWORD PTR -8[r11], rax
subss xmm1, xmm0
movss xmm0, DWORD PTR 0[rbp]
movss DWORD PTR -4[rbp], xmm0
cmp r11, r10
jne .L1018
mov rcx, QWORD PTR [rsp]
mov rax, rbx
not rax
lea rcx, [rcx+rax*8]
mov QWORD PTR [rsp], rcx
mov rcx, QWORD PTR 16[rsp]
lea rax, [rcx+rax*4]
mov QWORD PTR 16[rsp], rax
mov rax, QWORD PTR 8[rsp]
lea rax, 4[rax+rbx*4]
mov QWORD PTR 8[rsp], rax
.L1017:
mov r11, QWORD PTR 32[rsp]
add r11, QWORD PTR 48[rsp]
cmp DWORD PTR 176[rsp], 1
jle .L1019
mov rax, QWORD PTR [rsp]
mov rsi, QWORD PTR [r10]
mov rdi, QWORD PTR [rax]
call fxp_mult
mov rdi, r9
sub rdi, rax
call fxp_quantize
mov QWORD PTR [r11], rax
mov r9, rax
mov rax, QWORD PTR 16[rsp]
movss xmm0, DWORD PTR [rax]
mov rax, QWORD PTR 8[rsp]
mulss xmm0, DWORD PTR [rax]
subss xmm1, xmm0
.L1020:
mov rax, QWORD PTR 56[rsp]
mov rcx, QWORD PTR 72[rsp]
pxor xmm0, xmm0
movsx rdx, DWORD PTR impl[rip+4]
cvtsi2sd xmm0, r9d
movss DWORD PTR -4[rax+rcx], xmm1
lea rax, scale_factor_inv[rip]
mulsd xmm0, QWORD PTR [rax+rdx*8]
add rsp, 96
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
cvtsd2ss xmm0, xmm0
subss xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1019:
.cfi_restore_state
mov QWORD PTR [r11], r9
jmp .L1020
.p2align 4,,10
.p2align 3
.L1022:
mov r10, r11
jmp .L1017
.p2align 4,,10
.p2align 3
.L1021:
mov rbx, QWORD PTR 24[rsp]
mov rbp, QWORD PTR 40[rsp]
pxor xmm2, xmm2
xor r10d, r10d
jmp .L1015
.cfi_endproc
.LFE93:
.size iirOutBothL, .-iirOutBothL
.p2align 4
.globl iirOutBothL2
.type iirOutBothL2, @function
iirOutBothL2:
.LFB94:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movaps xmm1, xmm0
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rsi
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, r8
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 72
.cfi_def_cfa_offset 128
mov QWORD PTR 16[rsp], rdx
movsx rdx, DWORD PTR 152[rsp]
mov esi, DWORD PTR 160[rsp]
mov QWORD PTR [rsp], rdi
lea rax, 0[0+rdx*8]
sal rdx, 2
mov QWORD PTR 32[rsp], rcx
mov QWORD PTR 56[rsp], rax
sub rax, 8
mov QWORD PTR 24[rsp], rax
movsx rax, esi
lea rbx, 0[0+rax*8]
sal rax, 2
mov QWORD PTR 8[rsp], rdx
mov QWORD PTR 48[rsp], rax
lea eax, -1[rsi]
mov QWORD PTR 40[rsp], rbx
test eax, eax
jle .L1034
cdqe
lea r11, 8[r9]
lea r15, 4[r13]
xor r10d, r10d
mov rdx, QWORD PTR 136[rsp]
lea rbp, [rcx+rax*4]
pxor xmm2, xmm2
lea r14, [rdx+rax*8]
lea eax, -2[rsi]
mov QWORD PTR 64[rsp], rax
lea rbx, 16[r9+rax*8]
.p2align 4,,10
.p2align 3
.L1029:
mov rsi, QWORD PTR [r11]
add r11, 8
sub r14, 8
sub rbp, 4
add r15, 4
mov QWORD PTR -16[r11], rsi
mov rdi, QWORD PTR 8[r14]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
movss xmm0, DWORD PTR -4[r15]
mov r10, rax
movss DWORD PTR -8[r15], xmm0
mulss xmm0, DWORD PTR 4[rbp]
addss xmm2, xmm0
cmp r11, rbx
jne .L1029
mov r15, QWORD PTR 64[rsp]
xor eax, eax
add r15, 1
lea rdx, [r9+r15*8]
lea r11, 0[r13+r15*4]
.L1028:
mov rcx, QWORD PTR 144[rsp]
mov rbx, QWORD PTR 40[rsp]
mov QWORD PTR -8[r9+rbx], rcx
movsx rbx, eax
mov rax, QWORD PTR 136[rsp]
mov rsi, QWORD PTR [rdx]
mov rdi, QWORD PTR [rax+rbx*8]
call fxp_mult
lea rdi, [rax+r10]
call fxp_quantize
mov r9, rax
mov rax, QWORD PTR 48[rsp]
movss DWORD PTR -4[r13+rax], xmm1
mov rax, QWORD PTR 32[rsp]
movss xmm1, DWORD PTR [rax+rbx*4]
mulss xmm1, DWORD PTR [r11]
mov eax, DWORD PTR 152[rsp]
lea r14d, -1[rax]
addss xmm1, xmm2
cmp r14d, 1
jle .L1035
mov rax, QWORD PTR [rsp]
mov r15, QWORD PTR 56[rsp]
lea r10, 8[r12]
mov r11, QWORD PTR 16[rsp]
add r15, QWORD PTR 128[rsp]
lea r13, 4[rax]
mov eax, DWORD PTR 152[rsp]
add r11, QWORD PTR 8[rsp]
sub eax, 3
lea rbx, 16[r12+rax*8]
.p2align 4,,10
.p2align 3
.L1031:
mov rdi, QWORD PTR -8[r15]
mov rsi, QWORD PTR [r10]
add r10, 8
sub r15, 8
sub r11, 4
add r13, 4
call fxp_mult
mov rdi, r9
sub rdi, rax
call fxp_quantize
movss xmm0, DWORD PTR [r11]
mulss xmm0, DWORD PTR -4[r13]
mov r9, rax
mov rax, QWORD PTR [r10]
mov QWORD PTR -8[r10], rax
subss xmm1, xmm0
movss xmm0, DWORD PTR 0[r13]
movss DWORD PTR -4[r13], xmm0
cmp r10, rbx
jne .L1031
.L1030:
mov r10, QWORD PTR 24[rsp]
add r10, r12
cmp DWORD PTR 152[rsp], 1
jle .L1032
mov ebp, DWORD PTR 152[rsp]
mov rax, QWORD PTR 128[rsp]
movsx rbx, r14d
mov rsi, QWORD PTR [r12+rbx*8]
sub ebp, r14d
movsx rbp, ebp
mov rdi, QWORD PTR [rax+rbp*8]
call fxp_mult
mov rdi, r9
sub rdi, rax
call fxp_quantize
mov QWORD PTR [r10], rax
mov r9, rax
mov rax, QWORD PTR 16[rsp]
movss xmm0, DWORD PTR [rax+rbp*4]
mov rax, QWORD PTR [rsp]
mulss xmm0, DWORD PTR [rax+rbx*4]
subss xmm1, xmm0
.L1033:
mov rax, QWORD PTR [rsp]
mov rcx, QWORD PTR 8[rsp]
pxor xmm0, xmm0
movsx rdx, DWORD PTR impl[rip+4]
cvtsi2sd xmm0, r9d
movss DWORD PTR -4[rax+rcx], xmm1
lea rax, scale_factor_inv[rip]
mulsd xmm0, QWORD PTR [rax+rdx*8]
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
cvtsd2ss xmm0, xmm0
subss xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1032:
.cfi_restore_state
mov QWORD PTR [r10], r9
jmp .L1033
.p2align 4,,10
.p2align 3
.L1035:
mov r14d, 1
jmp .L1030
.p2align 4,,10
.p2align 3
.L1034:
mov r11, r13
mov rdx, r9
pxor xmm2, xmm2
xor r10d, r10d
jmp .L1028
.cfi_endproc
.LFE94:
.size iirOutBothL2, .-iirOutBothL2
.section .rodata.str1.8
.align 8
.LC44:
.string "An Overflow Occurred in the node a0"
.text
.p2align 4
.globl fxp_direct_form_1
.type fxp_direct_form_1, @function
fxp_direct_form_1:
.LFB95:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx rax, r9d
lea r11, 8[rdx]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
sal rax, 3
movsx r14, r8d
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea r15, -8[rax+rsi]
mov r13, r14
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rdx
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, -8[rdi+r14*8]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 8
.cfi_def_cfa_offset 64
test r9d, r9d
jle .L1047
mov r10, rcx
lea r9, [rcx+rax]
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L1042:
mov rsi, QWORD PTR [r15]
mov rdi, QWORD PTR [r10]
add r10, 8
sub r15, 8
call fxp_mult
lea rdi, [rax+rbx]
call fxp_quantize
mov rbx, rax
cmp r9, r10
jne .L1042
.L1041:
cmp r13d, 1
jle .L1043
lea r9, [r12+r14*8]
.p2align 4,,10
.p2align 3
.L1044:
mov rsi, QWORD PTR 0[rbp]
mov rdi, QWORD PTR [r11]
add r11, 8
sub rbp, 8
call fxp_mult
sub rbx, rax
mov rdi, rbx
call fxp_quantize
mov rbx, rax
cmp r9, r11
jne .L1044
.L1043:
xor eax, eax
lea rsi, .LC44[rip]
lea rdi, .LC9[rip]
call printf@PLT
cmp QWORD PTR _fxp_max[rip], rbx
jge .L1051
.L1045:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L1051:
cmp QWORD PTR _fxp_min[rip], rbx
jg .L1045
mov rbp, QWORD PTR [r12]
xor edi, edi
test rbp, rbp
setne dil
xor eax, eax
call __ESBMC_assume@PLT
mov ecx, DWORD PTR impl[rip+4]
mov rax, rbx
sal rax, cl
cqo
idiv rbp
mov rdi, rax
call fxp_quantize
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
mov rdi, rax
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp fxp_quantize
.p2align 4,,10
.p2align 3
.L1047:
.cfi_restore_state
xor ebx, ebx
jmp .L1041
.cfi_endproc
.LFE95:
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata.str1.8
.align 8
.LC45:
.string "An Overflow Occurred in the node b0"
.text
.p2align 4
.globl fxp_direct_form_2
.type fxp_direct_form_2, @function
fxp_direct_form_2:
.LFB96:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
mov r11, rdx
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
mov r13, rsi
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
movsx r12, r9d
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov rbp, rcx
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
mov rbx, rdi
cmp r8d, 1
jle .L1053
lea r9d, -1[r8]
xor r10d, r10d
.p2align 4,,10
.p2align 3
.L1054:
mov rsi, QWORD PTR 8[rbx+r10*8]
mov rdi, QWORD PTR 8[r11+r10*8]
add r10, 1
call fxp_mult
mov rdi, QWORD PTR [rbx]
sub rdi, rax
call fxp_quantize
mov QWORD PTR [rbx], rax
cmp r9, r10
jne .L1054
.L1055:
lea rdi, 0[r13+rax]
call fxp_quantize
xor edi, edi
mov QWORD PTR [rbx], rax
mov r14, QWORD PTR [r11]
mov r13, rax
test r14, r14
setne dil
xor eax, eax
call __ESBMC_assume@PLT
mov ecx, DWORD PTR impl[rip+4]
mov rax, r13
sal rax, cl
cqo
idiv r14
mov rdi, rax
call fxp_quantize
lea rsi, .LC45[rip]
lea rdi, .LC9[rip]
mov QWORD PTR [rbx], rax
mov r13, rax
xor eax, eax
call printf@PLT
cmp QWORD PTR _fxp_max[rip], r13
jge .L1063
.L1056:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L1063:
cmp QWORD PTR _fxp_min[rip], r13
jg .L1056
test r12d, r12d
jle .L1059
lea r10, 0[rbp+r12*8]
xor r9d, r9d
.p2align 4,,10
.p2align 3
.L1058:
mov rsi, QWORD PTR [rbx]
mov rdi, QWORD PTR 0[rbp]
add rbp, 8
add rbx, 8
call fxp_mult
lea rdi, [rax+r9]
call fxp_quantize
mov r9, rax
cmp rbp, r10
jne .L1058
.L1057:
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 40
mov rdi, r9
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
jmp fxp_quantize
.p2align 4,,10
.p2align 3
.L1053:
.cfi_restore_state
mov rax, QWORD PTR [rdi]
jmp .L1055
.L1059:
xor r9d, r9d
jmp .L1057
.cfi_endproc
.LFE96:
.size fxp_direct_form_2, .-fxp_direct_form_2
.p2align 4
.globl fxp_transposed_direct_form_2
.type fxp_transposed_direct_form_2, @function
fxp_transposed_direct_form_2:
.LFB97:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r11d, r8d
mov r10, rdx
mov r15d, r9d
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
lea r14, 8[rcx]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rsi
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
lea rbp, 8[rdx]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, rdi
sub rsp, 40
.cfi_def_cfa_offset 96
cmp r9d, r8d
mov rdi, QWORD PTR [rcx]
cmovge r11d, r9d
mov DWORD PTR 16[rsp], r8d
mov DWORD PTR 12[rsp], r11d
call fxp_mult
add rax, QWORD PTR [rbx]
mov rdi, rax
call fxp_quantize
mov r12, QWORD PTR [r10]
xor edi, edi
mov QWORD PTR [rsp], rax
test r12, r12
setne dil
xor eax, eax
call __ESBMC_assume@PLT
mov ecx, DWORD PTR impl[rip+4]
mov rax, QWORD PTR [rsp]
sal rax, cl
cqo
idiv r12
mov rdi, rax
call fxp_quantize
mov r11d, DWORD PTR 12[rsp]
mov r12, rax
cmp r11d, 1
jle .L1065
mov r8d, DWORD PTR 16[rsp]
sub r11d, 2
xor r9d, r9d
lea eax, -1[r8]
mov DWORD PTR 12[rsp], eax
lea eax, -1[r15]
mov DWORD PTR [rsp], eax
lea rax, 1[r11]
mov QWORD PTR 24[rsp], rax
jmp .L1068
.p2align 4,,10
.p2align 3
.L1070:
mov r9, rax
.L1068:
mov r10, QWORD PTR 8[rbx+r9*8]
mov r15d, r9d
mov QWORD PTR [rbx+r9*8], r10
cmp r9d, DWORD PTR 12[rsp]
jge .L1066
mov rdi, QWORD PTR 0[rbp]
lea rax, 8[rbp]
mov rsi, r12
mov QWORD PTR 16[rsp], rax
call fxp_mult
mov rdi, r10
sub rdi, rax
call fxp_quantize
mov rbp, QWORD PTR 16[rsp]
mov QWORD PTR [rbx+r9*8], rax
.L1066:
cmp r15d, DWORD PTR [rsp]
jge .L1067
mov rdi, QWORD PTR [r14]
mov rsi, r13
lea r15, 8[r14]
mov r14, r15
call fxp_mult
add rax, QWORD PTR [rbx+r9*8]
mov rdi, rax
call fxp_quantize
mov QWORD PTR [rbx+r9*8], rax
.L1067:
lea rax, 1[r9]
cmp r11, r9
jne .L1070
mov rax, QWORD PTR 24[rsp]
lea rbx, [rbx+rax*8]
.L1065:
xor eax, eax
lea rsi, .LC44[rip]
lea rdi, .LC9[rip]
mov rbx, QWORD PTR [rbx]
call printf@PLT
cmp rbx, QWORD PTR _fxp_max[rip]
jle .L1072
.L1069:
call __DSVERIFIER_assert.part.0
.p2align 4,,10
.p2align 3
.L1072:
cmp rbx, QWORD PTR _fxp_min[rip]
jl .L1069
add rsp, 40
.cfi_def_cfa_offset 56
mov rdi, r12
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
jmp fxp_quantize
.cfi_endproc
.LFE97:
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.p2align 4
.globl verify_overflow
.type verify_overflow, @function
verify_overflow:
.LFB130:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 72
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR ds[rip+800]
mov rcx, rsp
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1075
.L1141:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1141
.L1075:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L1142
.L1076:
movsx rax, DWORD PTR ds[rip+1608]
mov rcx, rsp
mov r13, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1078
.L1143:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1143
.L1078:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L1144
.L1079:
mov edx, r8d
mov rbx, rsp
lea rdi, ds[rip]
mov rsi, r13
mov QWORD PTR -96[rbp], rbx
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rsi, rbx
add rdi, 808
call fxp_double_to_fxp_array
movsd xmm0, QWORD PTR impl[rip+16]
mov rsi, rsp
call fxp_double_to_fxp
movsd xmm0, QWORD PTR impl[rip+8]
mov r11, rax
call fxp_double_to_fxp
mov r14, rax
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rax
lea rax, 15[0+rax*8]
mov rdi, rax
mov rdx, rax
and rdi, -4096
and rdx, -16
sub rsi, rdi
cmp rsp, rsi
je .L1081
.L1145:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L1145
.L1081:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1082
or QWORD PTR -8[rsp+rdx], 0
.L1082:
mov rdx, rax
mov rsi, rsp
and rax, -4096
mov rbx, rsp
sub rsi, rax
and rdx, -16
cmp rsp, rsi
je .L1084
.L1146:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L1146
.L1084:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L1085
or QWORD PTR -8[rsp+rax], 0
.L1085:
mov r12, rsp
test ecx, ecx
jle .L1086
xor r15d, r15d
mov QWORD PTR -72[rbp], r13
mov r13, r15
mov r15, r14
mov r14, r11
.p2align 4,,10
.p2align 3
.L1087:
mov QWORD PTR [rbx+r13*8], 0
xor eax, eax
call nondet_int@PLT
cdqe
cmp rax, r15
mov QWORD PTR [r12+r13*8], rax
setle cl
xor edi, edi
cmp r14, rax
setle dil
xor eax, eax
add r13, 1
and edi, ecx
call __ESBMC_assume@PLT
mov ecx, DWORD PTR X_SIZE_VALUE[rip]
cmp ecx, r13d
jg .L1087
mov r13, QWORD PTR -72[rbp]
.L1086:
movsx rdx, DWORD PTR ds[rip+800]
mov r9d, DWORD PTR ds[rip+1608]
mov rdi, rsp
cmp r9d, edx
lea rax, 15[0+rdx*8]
mov r15d, edx
mov r8, rdx
cmovge r15d, r9d
mov rsi, rax
and rax, -4096
sub rdi, rax
and rsi, -16
cmp rsp, rdi
je .L1089
.L1147:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L1147
.L1089:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L1090
or QWORD PTR -8[rsp+rsi], 0
.L1090:
movsx rax, r9d
mov r10, rsp
mov rdi, rsp
mov QWORD PTR -88[rbp], rax
lea rax, 15[0+rax*8]
mov rsi, rax
and rax, -4096
sub r10, rax
and rsi, -16
cmp rsp, r10
je .L1092
.L1148:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r10
jne .L1148
.L1092:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L1093
or QWORD PTR -8[rsp+rsi], 0
.L1093:
movsx rax, r15d
mov r10, rsp
mov QWORD PTR -104[rbp], rsp
mov QWORD PTR -112[rbp], rax
lea rax, 15[0+rax*8]
mov rsi, rax
and rax, -4096
sub r10, rax
and rsi, -16
cmp rsp, r10
je .L1095
.L1149:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r10
jne .L1149
.L1095:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L1096
or QWORD PTR -8[rsp+rsi], 0
.L1096:
mov r14, rsp
test r8d, r8d
jle .L1100
sal rdx, 3
xor esi, esi
mov DWORD PTR -80[rbp], r8d
mov DWORD PTR -76[rbp], r9d
mov DWORD PTR -72[rbp], ecx
call memset@PLT
mov ecx, DWORD PTR -72[rbp]
mov r9d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
.L1100:
test r9d, r9d
jle .L1099
mov rdx, QWORD PTR -88[rbp]
mov rdi, QWORD PTR -104[rbp]
xor esi, esi
mov DWORD PTR -80[rbp], r8d
mov DWORD PTR -76[rbp], r9d
sal rdx, 3
mov DWORD PTR -72[rbp], ecx
call memset@PLT
mov ecx, DWORD PTR -72[rbp]
mov r9d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
.L1099:
test r15d, r15d
jle .L1102
mov rdx, QWORD PTR -112[rbp]
xor esi, esi
mov rdi, r14
mov DWORD PTR -80[rbp], r8d
mov DWORD PTR -76[rbp], r9d
sal rdx, 3
mov DWORD PTR -72[rbp], ecx
call memset@PLT
mov ecx, DWORD PTR -72[rbp]
mov r9d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
.L1102:
xor r15d, r15d
test ecx, ecx
jle .L1150
mov QWORD PTR -72[rbp], rbx
mov rbx, r12
mov r12, QWORD PTR -96[rbp]
jmp .L1103
.p2align 4,,10
.p2align 3
.L1151:
mov r9d, DWORD PTR ds[rip+1608]
mov r8d, DWORD PTR ds[rip+800]
.L1103:
mov rsi, QWORD PTR [rbx+r15*8]
mov rdx, r13
mov rcx, r12
mov rdi, r14
call fxp_transposed_direct_form_2
mov rdx, QWORD PTR -72[rbp]
mov QWORD PTR [rdx+r15*8], rax
mov eax, DWORD PTR X_SIZE_VALUE[rip]
add r15, 1
cmp eax, r15d
jg .L1151
mov DWORD PTR overflow_mode[rip], 1
mov rbx, QWORD PTR -72[rbp]
test eax, eax
jle .L1110
sub eax, 1
lea r13, .LC10[rip]
lea r14, 8[rbx+rax*8]
.p2align 4,,10
.p2align 3
.L1109:
xor eax, eax
mov rdi, r13
mov r12, QWORD PTR [rbx]
call printf@PLT
cmp r12, QWORD PTR _fxp_max[rip]
jle .L1152
.L1107:
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L1142:
or QWORD PTR -8[rsp+rdx], 0
jmp .L1076
.L1144:
or QWORD PTR -8[rsp+rdx], 0
jmp .L1079
.p2align 4,,10
.p2align 3
.L1152:
cmp r12, QWORD PTR _fxp_min[rip]
jl .L1107
add rbx, 8
cmp r14, rbx
jne .L1109
.L1110:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1153
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1150:
.cfi_restore_state
mov DWORD PTR overflow_mode[rip], 1
jmp .L1110
.L1153:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE130:
.size verify_overflow, .-verify_overflow
.p2align 4
.globl double_direct_form_1
.type double_direct_form_1, @function
double_direct_form_1:
.LFB98:
.cfi_startproc
endbr64
movsx r11, r8d
mov r10, rdx
lea rax, 8[rdx]
lea rdx, -8[rdi+r11*8]
movsx rdi, r9d
sal rdi, 3
lea rsi, -8[rdi+rsi]
test r9d, r9d
jle .L1159
add rdi, rcx
pxor xmm0, xmm0
.p2align 4,,10
.p2align 3
.L1156:
sub rsi, 8
movsd xmm1, QWORD PTR [rcx]
add rcx, 8
mulsd xmm1, QWORD PTR 8[rsi]
addsd xmm0, xmm1
cmp rdi, rcx
jne .L1156
.L1155:
cmp r8d, 1
jle .L1157
lea rcx, [r10+r11*8]
.p2align 4,,10
.p2align 3
.L1158:
sub rdx, 8
movsd xmm1, QWORD PTR [rax]
add rax, 8
mulsd xmm1, QWORD PTR 8[rdx]
subsd xmm0, xmm1
cmp rcx, rax
jne .L1158
.L1157:
divsd xmm0, QWORD PTR [r10]
ret
.p2align 4,,10
.p2align 3
.L1159:
pxor xmm0, xmm0
jmp .L1155
.cfi_endproc
.LFE98:
.size double_direct_form_1, .-double_direct_form_1
.p2align 4
.globl double_direct_form_2
.type double_direct_form_2, @function
double_direct_form_2:
.LFB99:
.cfi_startproc
endbr64
movsd xmm2, QWORD PTR [rdi]
cmp ecx, 1
jle .L1163
sub ecx, 1
xor eax, eax
.p2align 4,,10
.p2align 3
.L1164:
movsd xmm1, QWORD PTR 8[rsi+rax*8]
mulsd xmm1, QWORD PTR 8[rdi+rax*8]
add rax, 1
subsd xmm2, xmm1
movsd QWORD PTR [rdi], xmm2
cmp rcx, rax
jne .L1164
.L1163:
addsd xmm0, xmm2
movsd QWORD PTR [rdi], xmm0
divsd xmm0, QWORD PTR [rsi]
movsd QWORD PTR [rdi], xmm0
test r8d, r8d
jle .L1167
lea ecx, -1[r8]
xor eax, eax
pxor xmm1, xmm1
sal rcx, 3
jmp .L1166
.p2align 4,,10
.p2align 3
.L1169:
movsd xmm0, QWORD PTR 8[rdi+rax]
add rax, 8
.L1166:
mulsd xmm0, QWORD PTR [rdx+rax]
addsd xmm1, xmm0
cmp rcx, rax
jne .L1169
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1167:
pxor xmm1, xmm1
movapd xmm0, xmm1
ret
.cfi_endproc
.LFE99:
.size double_direct_form_2, .-double_direct_form_2
.p2align 4
.globl double_transposed_direct_form_2
.type double_transposed_direct_form_2, @function
double_transposed_direct_form_2:
.LFB100:
.cfi_startproc
endbr64
movsd xmm1, QWORD PTR [rdx]
cmp r8d, ecx
mov r10d, ecx
mov rax, rsi
movapd xmm3, xmm0
lea rsi, 8[rsi]
lea r9, 8[rdx]
cmovge r10d, r8d
mulsd xmm1, xmm0
addsd xmm1, QWORD PTR [rdi]
divsd xmm1, QWORD PTR [rax]
cmp r10d, 1
jle .L1170
sub ecx, 1
sub r8d, 1
sub r10d, 2
xor eax, eax
jmp .L1174
.p2align 4,,10
.p2align 3
.L1176:
mov rax, rdx
.L1174:
movsd xmm0, QWORD PTR 8[rdi+rax*8]
mov edx, eax
movsd QWORD PTR [rdi+rax*8], xmm0
cmp eax, ecx
jge .L1172
movsd xmm2, QWORD PTR [rsi]
add rsi, 8
mulsd xmm2, xmm1
subsd xmm0, xmm2
movsd QWORD PTR [rdi+rax*8], xmm0
.L1172:
cmp edx, r8d
jge .L1173
movsd xmm0, QWORD PTR [r9]
add r9, 8
mulsd xmm0, xmm3
addsd xmm0, QWORD PTR [rdi+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm0
.L1173:
lea rdx, 1[rax]
cmp r10, rax
jne .L1176
.L1170:
movapd xmm0, xmm1
ret
.cfi_endproc
.LFE100:
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.p2align 4
.globl float_direct_form_1
.type float_direct_form_1, @function
float_direct_form_1:
.LFB101:
.cfi_startproc
endbr64
movsx r11, r8d
mov r10, rdx
lea rax, 4[rdx]
lea rdx, -4[rdi+r11*4]
movsx rdi, r9d
sal rdi, 2
lea rsi, -4[rdi+rsi]
test r9d, r9d
jle .L1182
add rdi, rcx
pxor xmm0, xmm0
.p2align 4,,10
.p2align 3
.L1179:
sub rsi, 4
movss xmm1, DWORD PTR [rcx]
add rcx, 4
mulss xmm1, DWORD PTR 4[rsi]
addss xmm0, xmm1
cmp rdi, rcx
jne .L1179
.L1178:
cmp r8d, 1
jle .L1180
lea rcx, [r10+r11*4]
.p2align 4,,10
.p2align 3
.L1181:
sub rdx, 4
movss xmm1, DWORD PTR [rax]
add rax, 4
mulss xmm1, DWORD PTR 4[rdx]
subss xmm0, xmm1
cmp rcx, rax
jne .L1181
.L1180:
divss xmm0, DWORD PTR [r10]
ret
.p2align 4,,10
.p2align 3
.L1182:
pxor xmm0, xmm0
jmp .L1178
.cfi_endproc
.LFE101:
.size float_direct_form_1, .-float_direct_form_1
.p2align 4
.globl float_direct_form_2
.type float_direct_form_2, @function
float_direct_form_2:
.LFB102:
.cfi_startproc
endbr64
movss xmm2, DWORD PTR [rdi]
cmp ecx, 1
jle .L1186
sub ecx, 1
xor eax, eax
.p2align 4,,10
.p2align 3
.L1187:
movss xmm1, DWORD PTR 4[rsi+rax*4]
mulss xmm1, DWORD PTR 4[rdi+rax*4]
add rax, 1
subss xmm2, xmm1
movss DWORD PTR [rdi], xmm2
cmp rcx, rax
jne .L1187
.L1186:
addss xmm0, xmm2
movss DWORD PTR [rdi], xmm0
divss xmm0, DWORD PTR [rsi]
movss DWORD PTR [rdi], xmm0
test r8d, r8d
jle .L1190
lea ecx, -1[r8]
xor eax, eax
pxor xmm1, xmm1
sal rcx, 2
jmp .L1189
.p2align 4,,10
.p2align 3
.L1192:
movss xmm0, DWORD PTR 4[rdi+rax]
add rax, 4
.L1189:
mulss xmm0, DWORD PTR [rdx+rax]
addss xmm1, xmm0
cmp rcx, rax
jne .L1192
movaps xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1190:
pxor xmm1, xmm1
movaps xmm0, xmm1
ret
.cfi_endproc
.LFE102:
.size float_direct_form_2, .-float_direct_form_2
.p2align 4
.globl float_transposed_direct_form_2
.type float_transposed_direct_form_2, @function
float_transposed_direct_form_2:
.LFB103:
.cfi_startproc
endbr64
movss xmm1, DWORD PTR [rdx]
cmp r8d, ecx
mov r10d, ecx
mov rax, rsi
movaps xmm3, xmm0
lea rsi, 4[rsi]
lea r9, 4[rdx]
cmovge r10d, r8d
mulss xmm1, xmm0
addss xmm1, DWORD PTR [rdi]
divss xmm1, DWORD PTR [rax]
cmp r10d, 1
jle .L1193
sub ecx, 1
sub r8d, 1
sub r10d, 2
xor eax, eax
jmp .L1197
.p2align 4,,10
.p2align 3
.L1199:
mov rax, rdx
.L1197:
movss xmm0, DWORD PTR 4[rdi+rax*4]
mov edx, eax
movss DWORD PTR [rdi+rax*4], xmm0
cmp eax, ecx
jge .L1195
movss xmm2, DWORD PTR [rsi]
add rsi, 4
mulss xmm2, xmm1
subss xmm0, xmm2
movss DWORD PTR [rdi+rax*4], xmm0
.L1195:
cmp edx, r8d
jge .L1196
movss xmm0, DWORD PTR [r9]
add r9, 4
mulss xmm0, xmm3
addss xmm0, DWORD PTR [rdi+rax*4]
movss DWORD PTR [rdi+rax*4], xmm0
.L1196:
lea rdx, 1[rax]
cmp r10, rax
jne .L1199
.L1193:
movaps xmm0, xmm1
ret
.cfi_endproc
.LFE103:
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata.str1.8
.align 8
.LC46:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/realizations.h"
.align 8
.LC47:
.string "(double) timer1 * hw.cycle <= ds.sample_time"
.text
.p2align 4
.globl double_direct_form_1_MSP430
.type double_direct_form_1_MSP430, @function
double_direct_form_1_MSP430:
.LFB104:
.cfi_startproc
endbr64
movsx r11, r8d
mov r10, rdx
lea rax, 8[rdx]
lea rdx, -8[rdi+r11*8]
movsx rdi, r9d
sal rdi, 3
lea rsi, -8[rdi+rsi]
test r9d, r9d
jle .L1206
add rdi, rcx
pxor xmm0, xmm0
.p2align 4,,10
.p2align 3
.L1202:
sub rsi, 8
movsd xmm1, QWORD PTR [rcx]
add rcx, 8
mulsd xmm1, QWORD PTR 8[rsi]
addsd xmm0, xmm1
cmp rdi, rcx
jne .L1202
imul r9d, r9d, 47
add r9d, 91
.L1201:
cmp r8d, 1
jle .L1203
lea rcx, [r10+r11*8]
.p2align 4,,10
.p2align 3
.L1204:
sub rdx, 8
movsd xmm1, QWORD PTR [rax]
add rax, 8
mulsd xmm1, QWORD PTR 8[rdx]
subsd xmm0, xmm1
cmp rcx, rax
jne .L1204
imul r8d, r8d, 57
lea r9d, -57[r9+r8]
.L1203:
add r9d, 3
pxor xmm1, xmm1
movsd xmm2, QWORD PTR ds[rip+1616]
cvtsi2sd xmm1, r9d
mulsd xmm1, QWORD PTR hw[rip+16]
comisd xmm2, xmm1
jb .L1212
ret
.p2align 4,,10
.p2align 3
.L1206:
pxor xmm0, xmm0
mov r9d, 91
jmp .L1201
.L1212:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.12[rip]
mov edx, 235
lea rsi, .LC46[rip]
lea rdi, .LC47[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE104:
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.p2align 4
.globl double_direct_form_2_MSP430
.type double_direct_form_2_MSP430, @function
double_direct_form_2_MSP430:
.LFB105:
.cfi_startproc
endbr64
movsd xmm2, QWORD PTR [rdi]
cmp ecx, 1
jle .L1220
lea r9d, -1[rcx]
xor eax, eax
.p2align 4,,10
.p2align 3
.L1215:
movsd xmm1, QWORD PTR 8[rsi+rax*8]
mulsd xmm1, QWORD PTR 8[rdi+rax*8]
add rax, 1
subsd xmm2, xmm1
movsd QWORD PTR [rdi], xmm2
cmp r9, rax
jne .L1215
imul ecx, ecx, 54
add ecx, 17
.L1214:
addsd xmm0, xmm2
movsd QWORD PTR [rdi], xmm0
divsd xmm0, QWORD PTR [rsi]
movsd QWORD PTR [rdi], xmm0
test r8d, r8d
jle .L1221
lea esi, -1[r8]
xor eax, eax
pxor xmm1, xmm1
sal rsi, 3
jmp .L1218
.p2align 4,,10
.p2align 3
.L1217:
movsd xmm0, QWORD PTR 8[rdi+rax]
add rax, 8
.L1218:
mulsd xmm0, QWORD PTR [rdx+rax]
addsd xmm1, xmm0
cmp rsi, rax
jne .L1217
imul r8d, r8d, 46
add ecx, r8d
.L1216:
add ecx, 38
pxor xmm0, xmm0
movsd xmm2, QWORD PTR ds[rip+1616]
cvtsi2sd xmm0, ecx
mulsd xmm0, QWORD PTR hw[rip+16]
comisd xmm2, xmm0
jb .L1226
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1220:
mov ecx, 71
jmp .L1214
.p2align 4,,10
.p2align 3
.L1221:
pxor xmm1, xmm1
jmp .L1216
.L1226:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.11[rip]
mov edx, 262
lea rsi, .LC46[rip]
lea rdi, .LC47[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE105:
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.p2align 4
.globl double_transposed_direct_form_2_MSP430
.type double_transposed_direct_form_2_MSP430, @function
double_transposed_direct_form_2_MSP430:
.LFB106:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
cmp r8d, ecx
movsd xmm2, QWORD PTR [rdx]
mov eax, ecx
cmovge eax, r8d
mulsd xmm2, xmm0
addsd xmm2, QWORD PTR [rdi]
cmp eax, 1
jle .L1233
lea r10d, -1[rcx]
lea ebx, -2[rax]
movapd xmm3, xmm0
sub r8d, 1
lea r9, 8[rsi]
lea r11, 8[rdx]
xor eax, eax
mov ecx, 105
jmp .L1231
.p2align 4,,10
.p2align 3
.L1235:
mov rax, rsi
.L1231:
movsd xmm0, QWORD PTR 8[rdi+rax*8]
mov esi, eax
movsd QWORD PTR [rdi+rax*8], xmm0
cmp eax, r10d
jge .L1229
movsd xmm1, QWORD PTR [r9]
add ecx, 41
add r9, 8
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR [rdi+rax*8], xmm0
.L1229:
mov edx, ecx
cmp esi, r8d
jge .L1230
movsd xmm0, QWORD PTR [r11]
add edx, 38
add r11, 8
mulsd xmm0, xmm3
addsd xmm0, QWORD PTR [rdi+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm0
.L1230:
lea ecx, 54[rdx]
lea rsi, 1[rax]
cmp rbx, rax
jne .L1235
add edx, 61
pxor xmm0, xmm0
cvtsi2sd xmm0, edx
.L1228:
mulsd xmm0, QWORD PTR hw[rip+16]
movsd xmm1, QWORD PTR ds[rip+1616]
comisd xmm1, xmm0
jb .L1237
movapd xmm0, xmm2
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1233:
.cfi_restore_state
movsd xmm0, QWORD PTR .LC48[rip]
jmp .L1228
.L1237:
lea rcx, __PRETTY_FUNCTION__.10[rip]
mov edx, 291
lea rsi, .LC46[rip]
lea rdi, .LC47[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE106:
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.p2align 4
.globl generic_timing_double_direct_form_1
.type generic_timing_double_direct_form_1, @function
generic_timing_double_direct_form_1:
.LFB107:
.cfi_startproc
endbr64
mov eax, DWORD PTR hw[rip+36]
mov r10d, DWORD PTR hw[rip+44]
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15d, DWORD PTR hw[rip+56]
mov r11d, DWORD PTR hw[rip+76]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, DWORD PTR hw[rip+52]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12d, DWORD PTR hw[rip+28]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, DWORD PTR hw[rip+80]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov DWORD PTR -44[rsp], eax
mov eax, DWORD PTR hw[rip+40]
mov QWORD PTR -32[rsp], rdx
lea ebx, [rax+rax*2]
mov DWORD PTR -40[rsp], r8d
lea rax, 8[rdx]
movsx rdx, r8d
mov r8d, DWORD PTR hw[rip+48]
mov QWORD PTR -8[rsp], rdx
lea rdx, -8[rdi+rdx*8]
movsx rdi, r9d
mov QWORD PTR -24[rsp], rcx
mov ecx, ebx
mov DWORD PTR -36[rsp], ebx
lea rbx, 0[0+rdi*8]
lea edi, [r10+r8]
lea edi, [rdi+rdi*2]
mov QWORD PTR -16[rsp], rbx
lea rsi, -8[rbx+rsi]
mov ebx, DWORD PTR hw[rip+60]
lea edi, 0[r13+rdi*2]
add edi, r15d
lea edi, [rdi+rbx*2]
mov ebx, DWORD PTR hw[rip+64]
lea edi, [rdi+rbx*2]
add edi, DWORD PTR hw[rip+68]
add edi, DWORD PTR hw[rip+72]
lea r14d, [r11+rdi*2]
mov edi, DWORD PTR hw[rip+24]
lea ebx, [rdi+rdi*2]
lea edi, [r12+r12*2]
lea edi, [rdi+rbx*2]
add edi, DWORD PTR hw[rip+32]
add edi, DWORD PTR -44[rsp]
add edi, ecx
lea ebx, [r10+r10]
mov ecx, edi
lea edi, [rbx+r10]
add ebx, ebp
lea edi, [rcx+rdi*4]
add edi, DWORD PTR generic_timer[rip]
add r14d, edi
mov edi, DWORD PTR hw[rip+84]
add ebx, r14d
test r9d, r9d
jle .L1243
lea r9d, [rdi+rdi*2]
lea r14d, [r8+r8*4]
mov rcx, QWORD PTR -24[rsp]
pxor xmm0, xmm0
sal r9d, 3
lea r9d, [r9+r14*4]
lea r14d, [r10+r10*4]
lea r9d, [r9+r13*2]
add r9d, r15d
add r9d, DWORD PTR hw[rip+88]
lea r9d, [r9+r14*2]
mov r14d, DWORD PTR hw[rip+92]
lea r9d, [r9+r14*2]
mov r14d, DWORD PTR hw[rip+96]
lea r9d, [r9+r14*2]
mov r14, QWORD PTR -16[rsp]
add r9d, r11d
add r9d, DWORD PTR hw[rip+100]
add r9d, DWORD PTR hw[rip+104]
add r9d, r11d
add r9d, DWORD PTR hw[rip+112]
add r14, rcx
add r9d, ebp
.p2align 4,,10
.p2align 3
.L1240:
sub rsi, 8
movsd xmm1, QWORD PTR [rcx]
add rcx, 8
add ebx, r9d
mulsd xmm1, QWORD PTR 8[rsi]
addsd xmm0, xmm1
cmp r14, rcx
jne .L1240
.L1239:
mov ecx, DWORD PTR hw[rip+108]
add ecx, r10d
lea r14d, 0[rbp+rcx*2]
add ebx, r14d
cmp DWORD PTR -40[rsp], 1
jle .L1241
imul ecx, r8d, 22
lea esi, [rdi+rdi*2]
lea ecx, [rcx+rsi*8]
mov esi, DWORD PTR hw[rip+92]
lea ecx, [rcx+r13*2]
lea ecx, [rcx+r10*8]
add ecx, r15d
lea ecx, [rcx+rsi*2]
mov esi, DWORD PTR hw[rip+96]
lea ecx, [rcx+rsi*2]
add ecx, DWORD PTR hw[rip+88]
mov rsi, QWORD PTR -32[rsp]
add ecx, r11d
add ecx, DWORD PTR hw[rip+100]
add ecx, DWORD PTR hw[rip+104]
add ecx, r11d
add ecx, DWORD PTR hw[rip+112]
add ebp, ecx
mov rcx, QWORD PTR -8[rsp]
lea rcx, [rsi+rcx*8]
.p2align 4,,10
.p2align 3
.L1242:
sub rdx, 8
movsd xmm1, QWORD PTR [rax]
add rax, 8
add ebx, ebp
mulsd xmm1, QWORD PTR 8[rdx]
subsd xmm0, xmm1
cmp rax, rcx
jne .L1242
.L1241:
add edi, r8d
lea eax, [r11+rdi*4]
add r12d, eax
mov eax, DWORD PTR hw[rip+116]
add r12d, DWORD PTR -44[rsp]
add r12d, DWORD PTR -36[rsp]
lea eax, [rax+rax*2]
lea eax, [r12+rax*2]
add eax, DWORD PTR hw[rip+120]
add ebx, eax
mov DWORD PTR generic_timer[rip], ebx
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1243:
.cfi_restore_state
pxor xmm0, xmm0
jmp .L1239
.cfi_endproc
.LFE107:
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.p2align 4
.globl generic_timing_double_direct_form_2
.type generic_timing_double_direct_form_2, @function
generic_timing_double_direct_form_2:
.LFB108:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r9, rdx
mov edx, DWORD PTR hw[rip+40]
mov eax, ecx
mov ecx, DWORD PTR hw[rip+24]
mov r10, rsi
movsd xmm2, QWORD PTR [rdi]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov esi, DWORD PTR hw[rip+48]
mov r15d, DWORD PTR hw[rip+36]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13d, DWORD PTR hw[rip+28]
mov r14d, DWORD PTR hw[rip+80]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov ebp, DWORD PTR hw[rip+76]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea ebx, [rdx+rdx*2]
mov r12d, DWORD PTR hw[rip+92]
mov DWORD PTR -12[rsp], r8d
mov r8d, DWORD PTR hw[rip+44]
mov DWORD PTR -8[rsp], ebx
lea edx, [r8+r8*4]
mov DWORD PTR -16[rsp], r15d
lea r11d, [rdx+rdx]
imul edx, r8d, 14
mov DWORD PTR -4[rsp], r11d
lea edx, [rdx+rcx*8]
lea ecx, 0[r13+r13*2]
add edx, ebx
mov ebx, DWORD PTR hw[rip+84]
add edx, ecx
lea ecx, [rsi+rsi*2]
add edx, DWORD PTR hw[rip+32]
lea ecx, [r11+rcx*2]
add edx, r15d
add edx, DWORD PTR generic_timer[rip]
mov r15d, DWORD PTR hw[rip+96]
lea ecx, [rcx+rbp*2]
add edx, ecx
mov ecx, DWORD PTR hw[rip+108]
add ecx, r8d
lea ecx, [r14+rcx*2]
add edx, ecx
mov ecx, DWORD PTR hw[rip+124]
mov DWORD PTR generic_timer[rip], edx
mov DWORD PTR -20[rsp], ecx
cmp eax, 1
jle .L1248
imul r11d, esi, 23
mov ecx, ebx
sal ecx, 5
add r11d, ecx
lea ecx, [r8+r8*8]
add ecx, r11d
mov r11d, DWORD PTR hw[rip+52]
lea ecx, [rcx+r11*2]
lea r11d, [r12+r12*2]
add ecx, r11d
mov r11d, DWORD PTR hw[rip+56]
lea ecx, [rcx+r15*2]
lea ecx, [rcx+r11*2]
add ecx, DWORD PTR -20[rsp]
lea r11d, -1[rax]
xor eax, eax
add ecx, ebp
add ecx, DWORD PTR hw[rip+100]
add ecx, DWORD PTR hw[rip+104]
add ecx, DWORD PTR hw[rip+112]
.p2align 4,,10
.p2align 3
.L1249:
movsd xmm1, QWORD PTR 8[r10+rax*8]
mulsd xmm1, QWORD PTR 8[rdi+rax*8]
add edx, ecx
add rax, 1
subsd xmm2, xmm1
movsd QWORD PTR [rdi], xmm2
cmp r11, rax
jne .L1249
.L1248:
lea eax, [rsi+rsi*2]
lea ecx, [rbx+rbx*2]
lea eax, [rsi+rax*4]
lea r10d, [r8+r8*4]
lea eax, [rax+rcx*4]
addsd xmm0, xmm2
add eax, r10d
add eax, DWORD PTR -20[rsp]
mov r10d, DWORD PTR -12[rsp]
add eax, r12d
add eax, r15d
movsd QWORD PTR [rdi], xmm0
add eax, edx
lea edx, [r14+r8*2]
add eax, edx
test r10d, r10d
jle .L1252
sal ecx, 3
lea edx, [rsi+rsi*4]
pxor xmm1, xmm1
lea edx, [rcx+rdx*4]
add edx, DWORD PTR -4[rsp]
mov ecx, DWORD PTR hw[rip+52]
lea edx, [rdx+r15*2]
lea edx, [rdx+r12*2]
lea edx, [rdx+rcx*2]
mov ecx, DWORD PTR hw[rip+56]
lea edx, [rdx+rcx*2]
lea ecx, -1[r10]
add edx, ebp
add edx, DWORD PTR hw[rip+100]
add edx, DWORD PTR hw[rip+104]
sal rcx, 3
add edx, DWORD PTR hw[rip+112]
add r14d, edx
xor edx, edx
jmp .L1251
.p2align 4,,10
.p2align 3
.L1256:
movsd xmm0, QWORD PTR 8[rdi+rdx]
add rdx, 8
.L1251:
mulsd xmm0, QWORD PTR [r9+rdx]
add eax, r14d
addsd xmm1, xmm0
cmp rcx, rdx
jne .L1256
.L1250:
add esi, ebx
movapd xmm0, xmm1
lea edx, 0[rbp+rsi*4]
add r13d, edx
mov edx, DWORD PTR hw[rip+116]
add r13d, DWORD PTR -16[rsp]
add r13d, DWORD PTR -8[rsp]
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 48
lea edx, 0[r13+rdx*8]
add edx, DWORD PTR hw[rip+120]
pop rbp
.cfi_def_cfa_offset 40
add eax, edx
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
mov DWORD PTR generic_timer[rip], eax
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1252:
.cfi_restore_state
pxor xmm1, xmm1
jmp .L1250
.cfi_endproc
.LFE108:
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.p2align 4
.globl generic_timing_double_transposed_direct_form_2
.type generic_timing_double_transposed_direct_form_2, @function
generic_timing_double_transposed_direct_form_2:
.LFB109:
.cfi_startproc
endbr64
mov eax, DWORD PTR hw[rip+40]
mov r9d, DWORD PTR hw[rip+84]
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15d, DWORD PTR hw[rip+36]
mov r11d, DWORD PTR hw[rip+56]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea eax, [rax+rax*2]
mov r14d, DWORD PTR hw[rip+28]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r13d, DWORD PTR hw[rip+104]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov r12d, DWORD PTR hw[rip+100]
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, r8d
movsd xmm2, QWORD PTR [rdx]
cmp ebx, ecx
mov r8d, DWORD PTR hw[rip+44]
mov ebp, DWORD PTR hw[rip+92]
mulsd xmm2, xmm0
mov DWORD PTR -36[rsp], eax
lea rax, 8[rsi]
mov r10d, r8d
addsd xmm2, QWORD PTR [rdi]
mov QWORD PTR -16[rsp], rax
mov eax, ecx
mov DWORD PTR -8[rsp], ecx
lea rcx, 8[rdx]
mov edx, DWORD PTR hw[rip+96]
cmovge eax, ebx
mov DWORD PTR -40[rsp], r15d
mov r15d, DWORD PTR hw[rip+48]
sal r10d, 4
mov DWORD PTR -32[rsp], edx
mov edx, DWORD PTR hw[rip+112]
sub r10d, r8d
mov DWORD PTR -20[rsp], eax
imul eax, r15d, 22
mov DWORD PTR -24[rsp], edx
mov edx, DWORD PTR hw[rip+76]
mov DWORD PTR -4[rsp], ebx
mov ebx, DWORD PTR hw[rip+52]
mov esi, edx
add eax, r10d
lea edx, [r9+r9*2]
mov DWORD PTR -28[rsp], r11d
lea eax, [rax+rdx*8]
mov r11d, DWORD PTR hw[rip+80]
mov edx, DWORD PTR -32[rsp]
mov DWORD PTR -44[rsp], esi
lea eax, [rax+rdx*2]
lea edx, [rax+rbp*2]
add edx, r12d
imul eax, r8d, 14
add edx, r13d
add edx, ebx
add edx, DWORD PTR -28[rsp]
add edx, DWORD PTR -24[rsp]
add edx, esi
mov esi, DWORD PTR hw[rip+24]
lea eax, [rax+rsi*8]
add eax, DWORD PTR -36[rsp]
mov esi, eax
lea eax, [r14+r14*2]
add eax, esi
add eax, DWORD PTR hw[rip+32]
add eax, DWORD PTR -40[rsp]
add eax, DWORD PTR generic_timer[rip]
mov esi, DWORD PTR -20[rsp]
add edx, eax
lea eax, [r11+r8*2]
add edx, eax
mov DWORD PTR generic_timer[rip], edx
cmp esi, 1
jle .L1258
imul r8d, r9d, 70
mov eax, r15d
movapd xmm3, xmm0
sal eax, 6
add eax, r15d
add eax, r8d
mov r8d, DWORD PTR hw[rip+60]
lea r8d, [r8+r8*2]
lea r8d, [rax+r8*4]
mov eax, DWORD PTR hw[rip+64]
lea eax, [rax+rax*2]
lea eax, [r8+rax*4]
add r10d, eax
mov eax, DWORD PTR hw[rip+68]
lea eax, [rax+rax*2]
lea r8d, [r10+rax*2]
mov eax, DWORD PTR hw[rip+72]
mov r10d, DWORD PTR -44[rsp]
lea eax, [rax+rax*2]
lea eax, [r8+rax*2]
lea r8d, 0[r13+r13*2]
lea eax, [rax+r10*2]
mov r10d, DWORD PTR -4[rsp]
add eax, r8d
lea r8d, [r12+r12*2]
add eax, r8d
lea r8d, 0[rbp+rbp*4]
mov ebp, DWORD PTR -32[rsp]
sub r10d, 1
add r8d, eax
lea eax, [r8+rbp*4]
lea r8d, [rbx+rbx*4]
mov ebx, DWORD PTR -8[rsp]
add eax, r8d
lea r8d, [r11+r11*2]
mov r11d, DWORD PTR -28[rsp]
lea ebp, -2[rsi]
add eax, r8d
mov r8d, DWORD PTR hw[rip+128]
mov rsi, QWORD PTR -16[rsp]
sub ebx, 1
lea eax, [rax+r8*2]
mov r8d, DWORD PTR hw[rip+124]
lea r8d, [r8+r8*2]
add eax, r8d
mov r8d, DWORD PTR hw[rip+88]
lea eax, [rax+r11*2]
lea r11d, [r8+r8*2]
mov r8d, r10d
add r11d, eax
xor eax, eax
add r11d, DWORD PTR -24[rsp]
jmp .L1261
.p2align 4,,10
.p2align 3
.L1262:
mov rax, r10
.L1261:
movsd xmm0, QWORD PTR 8[rdi+rax*8]
mov r10d, eax
movsd QWORD PTR [rdi+rax*8], xmm0
cmp eax, ebx
jge .L1259
movsd xmm1, QWORD PTR [rsi]
add rsi, 8
mulsd xmm1, xmm2
subsd xmm0, xmm1
movsd QWORD PTR [rdi+rax*8], xmm0
.L1259:
cmp r10d, r8d
jge .L1260
movsd xmm0, QWORD PTR [rcx]
add rcx, 8
mulsd xmm0, xmm3
addsd xmm0, QWORD PTR [rdi+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm0
.L1260:
add edx, r11d
lea r10, 1[rax]
cmp rbp, rax
jne .L1262
.L1258:
mov eax, DWORD PTR hw[rip+116]
mov esi, DWORD PTR -36[rsp]
add r9d, r15d
movapd xmm0, xmm2
lea eax, [r9+rax*2]
lea eax, [rsi+rax*4]
add eax, r14d
add eax, DWORD PTR -40[rsp]
add eax, DWORD PTR -44[rsp]
add eax, DWORD PTR hw[rip+120]
pop rbx
.cfi_def_cfa_offset 48
add edx, eax
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
mov DWORD PTR generic_timer[rip], edx
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE109:
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.p2align 4
.globl double_direct_form_1_impl2
.type double_direct_form_1_impl2, @function
double_direct_form_1_impl2:
.LFB110:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movsx r11, esi
mov rax, rdi
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
mov r13d, ecx
push r12
.cfi_offset 12, -48
mov r12, rdx
lea rdx, 15[0+r11*8]
push rbx
mov rcx, rdx
and rdx, -4096
.cfi_offset 3, -56
mov rbx, r11
and rcx, -16
sub rsp, 24
mov rdi, QWORD PTR 16[rbp]
mov rsi, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rsi
xor esi, esi
mov rsi, rsp
sub rsi, rdx
cmp rsp, rsi
je .L1266
.L1293:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L1293
.L1266:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L1294
.L1267:
lea r10, 7[rsp]
mov r15, rax
pxor xmm2, xmm2
xor esi, esi
mov r14, r10
and r10, -8
shr r14, 3
test ebx, ebx
jle .L1295
.p2align 4,,10
.p2align 3
.L1275:
mov QWORD PTR [r10+rsi*8], 0x000000000
test r13d, r13d
jle .L1272
mov rdx, r15
mov eax, 1
movapd xmm1, xmm2
jmp .L1273
.p2align 4,,10
.p2align 3
.L1296:
cmp ecx, esi
jg .L1282
.L1273:
movsd xmm0, QWORD PTR [rdx]
mulsd xmm0, QWORD PTR -8[r12+rax*8]
mov ecx, eax
sub rdx, 8
add rax, 1
addsd xmm1, xmm0
cmp r13d, ecx
jg .L1296
.L1282:
movsd QWORD PTR [r10+rsi*8], xmm1
.L1272:
add rsi, 1
add r15, 8
cmp r11, rsi
jne .L1275
movsd xmm0, QWORD PTR 0[0+r14*8]
movsd QWORD PTR [rdi], xmm0
cmp ebx, 1
jle .L1264
add rdi, 8
mov esi, 1
.p2align 4,,10
.p2align 3
.L1278:
movsd xmm1, QWORD PTR [r10+rsi*8]
mov rdx, rdi
mov eax, 2
addsd xmm1, xmm2
movsd QWORD PTR [rdi], xmm1
cmp r9d, 1
jg .L1277
jmp .L1279
.p2align 4,,10
.p2align 3
.L1297:
cmp r9d, ecx
jle .L1279
.L1277:
movsd xmm0, QWORD PTR -8[r8+rax*8]
mulsd xmm0, QWORD PTR -8[rdx]
mov ecx, eax
sub rdx, 8
add rax, 1
subsd xmm1, xmm0
movsd QWORD PTR [rdi], xmm1
cmp ecx, esi
jle .L1297
.L1279:
add rsi, 1
add rdi, 8
cmp r11, rsi
jne .L1278
.L1264:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1298
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L1294:
.cfi_restore_state
or QWORD PTR -8[rsp+rcx], 0
jmp .L1267
.L1295:
movsd xmm0, QWORD PTR 0[0+r14*8]
movsd QWORD PTR [rdi], xmm0
jmp .L1264
.L1298:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE110:
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.p2align 4
.globl fxp_direct_form_1_impl2
.type fxp_direct_form_1_impl2, @function
fxp_direct_form_1_impl2:
.LFB111:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
.cfi_offset 15, -24
.cfi_offset 14, -32
mov r14, rdx
push r13
push r12
.cfi_offset 13, -40
.cfi_offset 12, -48
mov r12, r8
push rbx
.cfi_offset 3, -56
mov ebx, ecx
sub rsp, 72
mov rax, QWORD PTR 16[rbp]
mov DWORD PTR -76[rbp], esi
mov QWORD PTR -88[rbp], rax
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, esi
mov rsi, rsp
mov QWORD PTR -72[rbp], rax
lea rax, 15[0+rax*8]
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L1301
.L1325:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L1325
.L1301:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L1326
.L1302:
lea r15, 7[rsp]
mov rax, r15
and r15, -8
shr rax, 3
mov QWORD PTR -112[rbp], r15
mov r10, r15
mov QWORD PTR -104[rbp], rax
mov eax, DWORD PTR -76[rbp]
test eax, eax
jle .L1303
mov QWORD PTR -96[rbp], r12
mov r15, QWORD PTR -72[rbp]
xor r11d, r11d
mov DWORD PTR -80[rbp], r9d
mov r9, r14
mov r14, rdi
.p2align 4,,10
.p2align 3
.L1307:
mov QWORD PTR [r10], 0
test ebx, ebx
jle .L1304
lea r12, [r14+r11*8]
mov r13d, 1
jmp .L1305
.p2align 4,,10
.p2align 3
.L1327:
cmp eax, r11d
jg .L1304
.L1305:
mov rsi, QWORD PTR -8[r9+r13*8]
mov rdi, QWORD PTR [r12]
sub r12, 8
call fxp_mult
add rax, QWORD PTR [r10]
mov rdi, rax
call fxp_quantize
mov QWORD PTR [r10], rax
mov eax, r13d
add r13, 1
cmp ebx, eax
jg .L1327
.L1304:
add r11, 1
add r10, 8
cmp r15, r11
jne .L1307
mov rax, QWORD PTR -104[rbp]
mov rdx, QWORD PTR -88[rbp]
cmp DWORD PTR -76[rbp], 1
mov r12, QWORD PTR -96[rbp]
mov rax, QWORD PTR 0[0+rax*8]
mov r9d, DWORD PTR -80[rbp]
mov QWORD PTR [rdx], rax
jle .L1299
add rdx, 8
mov r13, QWORD PTR -112[rbp]
mov r14, QWORD PTR -72[rbp]
mov ebx, 1
mov r11, rdx
.p2align 4,,10
.p2align 3
.L1312:
mov QWORD PTR [r11], 0
mov rdi, QWORD PTR 0[r13+rbx*8]
call fxp_quantize
mov QWORD PTR [r11], rax
cmp r9d, 1
jle .L1309
mov r15, r11
mov r10d, 2
jmp .L1310
.p2align 4,,10
.p2align 3
.L1328:
cmp r9d, eax
jle .L1309
.L1310:
mov rsi, QWORD PTR -8[r12+r10*8]
mov rdi, QWORD PTR -8[r15]
sub r15, 8
neg rsi
call fxp_mult
add rax, QWORD PTR [r11]
mov rdi, rax
call fxp_quantize
mov QWORD PTR [r11], rax
mov eax, r10d
add r10, 1
cmp eax, ebx
jle .L1328
.L1309:
add rbx, 1
add r11, 8
cmp r14, rbx
jne .L1312
.L1299:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1329
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L1326:
.cfi_restore_state
or QWORD PTR -8[rsp+rcx], 0
jmp .L1302
.L1303:
mov rax, QWORD PTR -104[rbp]
mov rdx, QWORD PTR -88[rbp]
mov rax, QWORD PTR 0[0+rax*8]
mov QWORD PTR [rdx], rax
jmp .L1299
.L1329:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE111:
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.p2align 4
.globl nchoosek
.type nchoosek, @function
nchoosek:
.LFB112:
.cfi_startproc
endbr64
test esi, esi
jne .L1352
mov eax, 1
ret
.p2align 4,,10
.p2align 3
.L1352:
mov r11d, esi
mov r9d, edi
mov r8d, esi
sub r11d, 1
je .L1348
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov ebp, esi
lea r10d, -1[rdi]
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
sub ebp, 2
jne .L1353
.L1333:
mov eax, r10d
add rsp, 8
.cfi_def_cfa_offset 24
cdq
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
idiv r11d
imul r9d, eax
mov eax, r9d
cdq
idiv r8d
ret
.p2align 4,,10
.p2align 3
.L1348:
.cfi_restore 3
.cfi_restore 6
mov eax, edi
cdq
idiv esi
ret
.p2align 4,,10
.p2align 3
.L1353:
.cfi_def_cfa_offset 32
.cfi_offset 3, -24
.cfi_offset 6, -16
lea ebx, -2[rdi]
sub esi, 3
je .L1334
lea edi, -3[rdi]
call nchoosek.part.0
imul ebx, eax
.L1334:
mov eax, ebx
cdq
idiv ebp
imul r10d, eax
jmp .L1333
.cfi_endproc
.LFE112:
.size nchoosek, .-nchoosek
.p2align 4
.globl generate_delta_coefficients
.type generate_delta_coefficients, @function
generate_delta_coefficients:
.LFB113:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14d, edx
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 72
.cfi_def_cfa_offset 128
sub r14d, 1
mov QWORD PTR 8[rsp], rdi
mov QWORD PTR 16[rsp], rsi
mov DWORD PTR 32[rsp], r14d
js .L1354
mov eax, r14d
movapd xmm2, xmm0
pxor xmm4, xmm4
xor ecx, ecx
mov QWORD PTR 24[rsp], rax
mov r15, rcx
mov ecx, r14d
.p2align 4,,10
.p2align 3
.L1367:
mov r10, QWORD PTR 8[rsp]
mov r11d, DWORD PTR 32[rsp]
mov r13d, r15d
mov r8d, r15d
movapd xmm1, xmm4
jmp .L1364
.p2align 4,,10
.p2align 3
.L1398:
mov ebx, -1
lea ebp, -1[r11]
.L1356:
mov eax, r13d
addsd xmm1, xmm0
add r10, 8
mov r8d, ebx
sub eax, ebx
mov r11d, ebp
cmp eax, r15d
jg .L1397
.L1364:
movsd xmm0, QWORD PTR [r10]
test r8d, r8d
je .L1398
mov ebx, r8d
mov eax, r11d
lea ebp, -1[r11]
sub ebx, 1
je .L1357
mov r12d, r8d
mov eax, ebp
sub r12d, 2
je .L1358
mov r14d, r8d
lea r9d, -2[r11]
sub r14d, 3
je .L1359
lea eax, -3[r11]
mov DWORD PTR 4[rsp], eax
mov eax, r8d
sub eax, 4
mov DWORD PTR 36[rsp], eax
je .L1360
lea eax, -4[r11]
mov DWORD PTR 40[rsp], eax
mov eax, r8d
sub eax, 5
mov DWORD PTR 44[rsp], eax
je .L1361
mov edx, r8d
lea eax, -5[r11]
sub edx, 6
mov DWORD PTR 48[rsp], eax
mov edi, edx
jne .L1399
.L1362:
mov eax, DWORD PTR 48[rsp]
cdq
idiv DWORD PTR 44[rsp]
imul eax, DWORD PTR 40[rsp]
mov DWORD PTR 40[rsp], eax
.L1361:
mov eax, DWORD PTR 40[rsp]
cdq
idiv DWORD PTR 36[rsp]
imul eax, DWORD PTR 4[rsp]
mov DWORD PTR 4[rsp], eax
.L1360:
mov eax, DWORD PTR 4[rsp]
cdq
idiv r14d
imul r9d, eax
.L1359:
mov eax, r9d
cdq
idiv r12d
imul eax, ebp
.L1358:
cdq
idiv ebx
imul eax, r11d
.L1357:
cdq
pxor xmm3, xmm3
idiv r8d
cvtsi2sd xmm3, eax
mulsd xmm0, xmm3
jmp .L1356
.p2align 4,,10
.p2align 3
.L1397:
test ecx, ecx
jle .L1365
movsd xmm0, QWORD PTR .LC6[rip]
xor eax, eax
.p2align 4,,10
.p2align 3
.L1366:
mulsd xmm0, xmm2
add eax, 1
cmp eax, ecx
jne .L1366
mulsd xmm1, xmm0
.L1365:
mov rax, QWORD PTR 16[rsp]
sub ecx, 1
movsd QWORD PTR [rax+r15*8], xmm1
lea rax, 1[r15]
cmp QWORD PTR 24[rsp], r15
je .L1354
mov r15, rax
jmp .L1367
.p2align 4,,10
.p2align 3
.L1354:
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L1399:
.cfi_restore_state
lea eax, -6[r11]
mov esi, r8d
mov DWORD PTR 52[rsp], eax
sub esi, 7
je .L1363
lea edi, -7[r11]
mov DWORD PTR 60[rsp], ecx
mov DWORD PTR 56[rsp], edx
call nchoosek.part.0
mov edi, DWORD PTR 52[rsp]
mov ecx, DWORD PTR 60[rsp]
imul edi, eax
mov DWORD PTR 52[rsp], edi
mov edi, DWORD PTR 56[rsp]
.L1363:
mov eax, DWORD PTR 52[rsp]
cdq
idiv edi
imul eax, DWORD PTR 48[rsp]
mov DWORD PTR 48[rsp], eax
jmp .L1362
.cfi_endproc
.LFE113:
.size generate_delta_coefficients, .-generate_delta_coefficients
.p2align 4
.globl get_delta_transfer_function
.type get_delta_transfer_function, @function
get_delta_transfer_function:
.LFB114:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
movapd xmm5, xmm0
mov r13d, r9d
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, r8
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov rbp, rcx
call generate_delta_coefficients
mov edx, r13d
mov rsi, r12
mov rdi, rbp
movapd xmm0, xmm5
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
jmp generate_delta_coefficients
.cfi_endproc
.LFE114:
.size get_delta_transfer_function, .-get_delta_transfer_function
.p2align 4
.globl get_delta_transfer_function_with_base
.type get_delta_transfer_function_with_base, @function
get_delta_transfer_function_with_base:
.LFB115:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea eax, -1[rdx]
movapd xmm2, xmm0
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 104
.cfi_def_cfa_offset 160
sub r9d, 1
mov QWORD PTR 24[rsp], rdi
mov QWORD PTR 32[rsp], rsi
mov QWORD PTR 40[rsp], rcx
mov QWORD PTR 48[rsp], r8
mov DWORD PTR 12[rsp], eax
mov DWORD PTR 16[rsp], r9d
js .L1418
mov eax, DWORD PTR 16[rsp]
xor ecx, ecx
pxor xmm4, xmm4
mov r13, rcx
mov QWORD PTR 56[rsp], rax
mov r14, rax
.p2align 4,,10
.p2align 3
.L1417:
mov rbp, QWORD PTR 40[rsp]
mov r15d, DWORD PTR 16[rsp]
mov ecx, r13d
mov r8d, r13d
movapd xmm1, xmm4
jmp .L1414
.p2align 4,,10
.p2align 3
.L1487:
mov r10d, -1
lea r11d, -1[r15]
.L1406:
mov eax, ecx
addsd xmm1, xmm0
add rbp, 8
mov r8d, r10d
sub eax, r10d
mov r15d, r11d
cmp eax, r13d
jg .L1486
.L1414:
movsd xmm0, QWORD PTR 0[rbp]
test r8d, r8d
je .L1487
mov r10d, r8d
mov eax, r15d
lea r11d, -1[r15]
sub r10d, 1
je .L1407
mov ebx, r8d
mov eax, r11d
sub ebx, 2
je .L1408
mov r12d, r8d
lea r9d, -2[r15]
sub r12d, 3
je .L1409
lea eax, -3[r15]
mov DWORD PTR 8[rsp], eax
mov eax, r8d
sub eax, 4
mov DWORD PTR 64[rsp], eax
je .L1410
lea eax, -4[r15]
mov DWORD PTR 68[rsp], eax
mov eax, r8d
sub eax, 5
mov DWORD PTR 80[rsp], eax
je .L1411
mov edx, r8d
lea eax, -5[r15]
sub edx, 6
mov DWORD PTR 72[rsp], eax
mov edi, edx
jne .L1488
.L1412:
mov eax, DWORD PTR 72[rsp]
cdq
idiv DWORD PTR 80[rsp]
imul eax, DWORD PTR 68[rsp]
mov DWORD PTR 68[rsp], eax
.L1411:
mov eax, DWORD PTR 68[rsp]
cdq
idiv DWORD PTR 64[rsp]
imul eax, DWORD PTR 8[rsp]
mov DWORD PTR 8[rsp], eax
.L1410:
mov eax, DWORD PTR 8[rsp]
cdq
idiv r12d
imul r9d, eax
.L1409:
mov eax, r9d
cdq
idiv ebx
imul eax, r11d
.L1408:
cdq
idiv r10d
imul eax, r15d
.L1407:
cdq
pxor xmm3, xmm3
idiv r8d
cvtsi2sd xmm3, eax
mulsd xmm0, xmm3
jmp .L1406
.p2align 4,,10
.p2align 3
.L1486:
test r14d, r14d
jle .L1415
movsd xmm0, QWORD PTR .LC6[rip]
xor eax, eax
.p2align 4,,10
.p2align 3
.L1416:
mulsd xmm0, xmm2
add eax, 1
cmp eax, r14d
jne .L1416
mulsd xmm1, xmm0
.L1415:
mov rax, QWORD PTR 48[rsp]
sub r14d, 1
movsd QWORD PTR [rax+r13*8], xmm1
lea rax, 1[r13]
cmp QWORD PTR 56[rsp], r13
je .L1418
mov r13, rax
jmp .L1417
.p2align 4,,10
.p2align 3
.L1418:
mov eax, DWORD PTR 12[rsp]
test eax, eax
js .L1402
mov eax, DWORD PTR 12[rsp]
xor ecx, ecx
pxor xmm4, xmm4
mov QWORD PTR 16[rsp], rax
mov r15d, eax
.p2align 4,,10
.p2align 3
.L1430:
mov r10, QWORD PTR 24[rsp]
mov r11d, DWORD PTR 12[rsp]
mov r13d, ecx
mov r8d, ecx
movapd xmm1, xmm4
jmp .L1427
.p2align 4,,10
.p2align 3
.L1490:
mov ebx, -1
lea ebp, -1[r11]
.L1419:
mov eax, r13d
addsd xmm1, xmm0
add r10, 8
mov r8d, ebx
sub eax, ebx
mov r11d, ebp
cmp eax, ecx
jg .L1489
.L1427:
movsd xmm0, QWORD PTR [r10]
test r8d, r8d
je .L1490
mov ebx, r8d
mov eax, r11d
lea ebp, -1[r11]
sub ebx, 1
je .L1420
mov r12d, r8d
mov eax, ebp
sub r12d, 2
je .L1421
mov r14d, r8d
lea r9d, -2[r11]
sub r14d, 3
je .L1422
lea eax, -3[r11]
mov DWORD PTR 8[rsp], eax
mov eax, r8d
sub eax, 4
mov DWORD PTR 40[rsp], eax
je .L1423
lea eax, -4[r11]
mov DWORD PTR 48[rsp], eax
mov eax, r8d
sub eax, 5
mov DWORD PTR 56[rsp], eax
je .L1424
mov edx, r8d
lea eax, -5[r11]
sub edx, 6
mov DWORD PTR 64[rsp], eax
mov edi, edx
jne .L1491
.L1425:
mov eax, DWORD PTR 64[rsp]
cdq
idiv DWORD PTR 56[rsp]
imul eax, DWORD PTR 48[rsp]
mov DWORD PTR 48[rsp], eax
.L1424:
mov eax, DWORD PTR 48[rsp]
cdq
idiv DWORD PTR 40[rsp]
imul eax, DWORD PTR 8[rsp]
mov DWORD PTR 8[rsp], eax
.L1423:
mov eax, DWORD PTR 8[rsp]
cdq
idiv r14d
imul r9d, eax
.L1422:
mov eax, r9d
cdq
idiv r12d
imul eax, ebp
.L1421:
cdq
idiv ebx
imul eax, r11d
.L1420:
cdq
pxor xmm3, xmm3
idiv r8d
cvtsi2sd xmm3, eax
mulsd xmm0, xmm3
jmp .L1419
.p2align 4,,10
.p2align 3
.L1489:
test r15d, r15d
jle .L1428
movsd xmm0, QWORD PTR .LC6[rip]
xor eax, eax
.p2align 4,,10
.p2align 3
.L1429:
mulsd xmm0, xmm2
add eax, 1
cmp eax, r15d
jne .L1429
mulsd xmm1, xmm0
.L1428:
mov rax, QWORD PTR 32[rsp]
sub r15d, 1
movsd QWORD PTR [rax+rcx*8], xmm1
lea rax, 1[rcx]
cmp QWORD PTR 16[rsp], rcx
je .L1402
mov rcx, rax
jmp .L1430
.p2align 4,,10
.p2align 3
.L1402:
add rsp, 104
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L1491:
.cfi_restore_state
lea eax, -6[r11]
mov esi, r8d
mov DWORD PTR 68[rsp], eax
sub esi, 7
je .L1426
lea edi, -7[r11]
mov QWORD PTR 72[rsp], rcx
mov DWORD PTR 80[rsp], edx
call nchoosek.part.0
mov esi, DWORD PTR 68[rsp]
mov rcx, QWORD PTR 72[rsp]
mov edi, DWORD PTR 80[rsp]
imul esi, eax
mov DWORD PTR 68[rsp], esi
.L1426:
mov eax, DWORD PTR 68[rsp]
cdq
idiv edi
imul eax, DWORD PTR 64[rsp]
mov DWORD PTR 64[rsp], eax
jmp .L1425
.L1488:
lea eax, -6[r15]
mov esi, r8d
mov DWORD PTR 84[rsp], eax
sub esi, 7
je .L1413
lea edi, -7[r15]
mov DWORD PTR 92[rsp], ecx
mov DWORD PTR 88[rsp], edx
call nchoosek.part.0
mov esi, DWORD PTR 84[rsp]
mov ecx, DWORD PTR 92[rsp]
mov edi, DWORD PTR 88[rsp]
imul esi, eax
mov DWORD PTR 84[rsp], esi
.L1413:
mov eax, DWORD PTR 84[rsp]
cdq
idiv edi
imul eax, DWORD PTR 72[rsp]
mov DWORD PTR 72[rsp], eax
jmp .L1412
.cfi_endproc
.LFE115:
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.p2align 4
.globl ft_closedloop_series
.type ft_closedloop_series, @function
ft_closedloop_series:
.LFB116:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
mov r13, rdx
mov rdx, r8
push r12
.cfi_offset 12, -48
mov r12d, ecx
mov ecx, r9d
push rbx
sub rsp, 56
.cfi_offset 3, -56
mov r14d, DWORD PTR 24[rbp]
mov r10, QWORD PTR 16[rbp]
mov rbx, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rbx
xor ebx, ebx
mov r11, rsp
lea ebx, -1[rsi+r9]
mov r15, QWORD PTR 32[rbp]
lea r14d, -1[r12+r14]
mov rax, QWORD PTR 48[rbp]
movsx r8, r14d
lea r8, 15[0+r8*8]
mov r9, r8
and r8, -4096
sub r11, r8
and r9, -16
cmp rsp, r11
je .L1494
.L1501:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r11
jne .L1501
.L1494:
and r9d, 4095
sub rsp, r9
test r9, r9
jne .L1502
.L1495:
mov r11, rsp
mov r9d, ebx
mov r8, r15
mov QWORD PTR -88[rbp], rax
mov QWORD PTR -80[rbp], r10
mov QWORD PTR -72[rbp], r11
call poly_mult
mov r11, QWORD PTR -72[rbp]
mov r10, QWORD PTR -80[rbp]
mov r9d, r14d
mov ecx, DWORD PTR 24[rbp]
mov esi, r12d
mov rdi, r13
mov r8, r11
mov rdx, r10
call poly_mult
mov rax, QWORD PTR -88[rbp]
mov r11, QWORD PTR -72[rbp]
mov r9d, r14d
mov ecx, r14d
mov esi, ebx
mov rdi, r15
mov r8, rax
mov rdx, r11
call poly_sum
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1503
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1502:
.cfi_restore_state
or QWORD PTR -8[rsp+r9], 0
jmp .L1495
.L1503:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE116:
.size ft_closedloop_series, .-ft_closedloop_series
.p2align 4
.globl ft_closedloop_sensitivity
.type ft_closedloop_sensitivity, @function
ft_closedloop_sensitivity:
.LFB117:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
.cfi_offset 15, -24
mov r15, r8
push r14
.cfi_offset 14, -32
mov r14, rdi
mov rdi, rdx
push r13
.cfi_offset 13, -40
mov r13d, r9d
push r12
.cfi_offset 12, -48
mov r12d, esi
mov esi, ecx
push rbx
sub rsp, 56
.cfi_offset 3, -56
mov ecx, DWORD PTR 24[rbp]
mov rdx, QWORD PTR 16[rbp]
mov rbx, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rbx
xor ebx, ebx
lea ebx, -1[r12+r9]
mov r9, rsp
mov r11, QWORD PTR 32[rbp]
lea r10d, -1[rsi+rcx]
movsx rcx, ebx
mov rax, QWORD PTR 48[rbp]
lea rcx, 15[0+rcx*8]
mov r8, rcx
and rcx, -4096
sub r9, rcx
and r8, -16
cmp rsp, r9
je .L1506
.L1513:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r9
jne .L1513
.L1506:
and r8d, 4095
sub rsp, r8
test r8, r8
jne .L1514
.L1507:
mov ecx, DWORD PTR 24[rbp]
mov r9d, r10d
mov r8, r11
mov QWORD PTR -96[rbp], rax
mov DWORD PTR -84[rbp], r10d
mov QWORD PTR -80[rbp], r11
mov QWORD PTR -72[rbp], rsp
call poly_mult
mov r8, QWORD PTR -72[rbp]
mov r9d, ebx
mov ecx, r13d
mov rdx, r15
mov esi, r12d
mov rdi, r14
call poly_mult
mov r10d, DWORD PTR -84[rbp]
mov rax, QWORD PTR -96[rbp]
mov ecx, ebx
mov r11, QWORD PTR -80[rbp]
mov rdx, QWORD PTR -72[rbp]
mov r8, rax
mov r9d, r10d
mov esi, r10d
mov rdi, r11
call poly_sum
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1515
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1514:
.cfi_restore_state
or QWORD PTR -8[rsp+r8], 0
jmp .L1507
.L1515:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE117:
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.p2align 4
.globl ft_closedloop_feedback
.type ft_closedloop_feedback, @function
ft_closedloop_feedback:
.LFB118:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea r10d, -1[rsi+r9]
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
.cfi_offset 15, -24
mov r15, r8
push r14
.cfi_offset 14, -32
mov r14, rdx
push r13
.cfi_offset 13, -40
mov r13d, r9d
push r12
.cfi_offset 12, -48
mov r12d, ecx
push rbx
sub rsp, 72
.cfi_offset 3, -56
mov rax, QWORD PTR 32[rbp]
mov r11, QWORD PTR 16[rbp]
mov r8, rsp
mov QWORD PTR -72[rbp], rax
mov rax, QWORD PTR 48[rbp]
mov rbx, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rbx
mov ebx, DWORD PTR 24[rbp]
lea ebx, -1[rcx+rbx]
movsx rdx, ebx
lea rdx, 15[0+rdx*8]
mov rcx, rdx
and rdx, -4096
sub r8, rdx
and rcx, -16
cmp rsp, r8
je .L1518
.L1531:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r8
jne .L1531
.L1518:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L1532
.L1519:
movsx rdx, r10d
mov r8, rsp
mov QWORD PTR -80[rbp], rsp
lea rdx, 15[0+rdx*8]
mov rcx, rdx
and rdx, -4096
sub r8, rdx
and rcx, -16
cmp rsp, r8
je .L1521
.L1533:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r8
jne .L1533
.L1521:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L1534
.L1522:
mov QWORD PTR -112[rbp], rax
mov rax, rsp
mov r9d, r10d
mov ecx, r13d
mov r8, rax
mov rdx, r15
mov DWORD PTR -92[rbp], r10d
mov QWORD PTR -88[rbp], rax
mov QWORD PTR -104[rbp], r11
call poly_mult
mov r11, QWORD PTR -104[rbp]
mov r8, QWORD PTR -80[rbp]
mov r9d, ebx
mov ecx, DWORD PTR 24[rbp]
mov esi, r12d
mov rdi, r14
mov rdx, r11
call poly_mult
mov rax, QWORD PTR -112[rbp]
mov r10d, DWORD PTR -92[rbp]
mov r9d, ebx
mov rdx, QWORD PTR -80[rbp]
mov rdi, QWORD PTR -88[rbp]
mov ecx, ebx
mov r8, rax
mov esi, r10d
call poly_sum
mov r8, QWORD PTR -72[rbp]
mov ecx, r13d
mov rdx, r15
lea r9d, -1[r12+r13]
mov esi, r12d
mov rdi, r14
call poly_mult
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1535
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1532:
.cfi_restore_state
or QWORD PTR -8[rsp+rcx], 0
jmp .L1519
.p2align 4,,10
.p2align 3
.L1534:
or QWORD PTR -8[rsp+rcx], 0
jmp .L1522
.L1535:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE118:
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.p2align 4
.globl check_stability_closedloop
.type check_stability_closedloop, @function
check_stability_closedloop:
.LFB119:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
movsx r10, esi
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
.cfi_offset 15, -24
.cfi_offset 14, -32
mov r14, rdi
mov rdi, r10
push r13
push r12
push rbx
sub rsp, 72
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
lea eax, -1[r10+r10]
sal r10, 3
mov rcx, rsp
mov DWORD PTR -108[rbp], eax
cdqe
imul rax, r10
add rax, 15
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1538
.L1590:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1590
.L1538:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
jne .L1591
.L1539:
mov rax, rsp
test edi, edi
jle .L1540
lea edx, -1[rdi]
pxor xmm2, xmm2
mov rsi, r14
mov r8, rdx
lea r9, 8[r14+rdx*8]
movapd xmm0, xmm2
mov ecx, edx
mov rdx, r14
.L1541:
addsd xmm0, QWORD PTR [rdx]
add rdx, 8
cmp rdx, r9
jne .L1541
comisd xmm0, xmm2
jbe .L1540
movsd xmm5, QWORD PTR .LC6[rip]
movq xmm3, QWORD PTR .LC8[rip]
movapd xmm4, xmm2
movsd xmm1, QWORD PTR [rsi]
test ecx, ecx
je .L1543
.L1592:
movapd xmm0, xmm5
xor edx, edx
.p2align 4,,10
.p2align 3
.L1544:
add edx, 1
xorpd xmm0, xmm3
cmp edx, ecx
jne .L1544
mulsd xmm0, xmm1
sub ecx, 1
add rsi, 8
movsd xmm1, QWORD PTR [rsi]
addsd xmm4, xmm0
test ecx, ecx
jne .L1592
.L1543:
addsd xmm1, xmm4
test r8d, r8d
je .L1546
movsd xmm0, QWORD PTR .LC6[rip]
movq xmm3, QWORD PTR .LC8[rip]
xor edx, edx
.L1547:
add edx, 1
xorpd xmm0, xmm3
cmp r8d, edx
jne .L1547
mulsd xmm1, xmm0
.L1546:
comisd xmm1, xmm2
jbe .L1540
movsd xmm0, QWORD PTR -8[r14+r10]
comisd xmm2, xmm0
jbe .L1549
xorpd xmm0, XMMWORD PTR .LC8[rip]
.L1549:
movsd xmm1, QWORD PTR [r14]
comisd xmm1, xmm0
jbe .L1540
mov edx, DWORD PTR -108[rbp]
test edx, edx
jle .L1552
shr r10, 3
lea rbx, 8[rax]
xor r15d, r15d
xor r11d, r11d
mov QWORD PTR -104[rbp], r10
neg r10
mov QWORD PTR -72[rbp], r10
mov DWORD PTR -92[rbp], -1
mov DWORD PTR -96[rbp], -2
mov QWORD PTR -88[rbp], rbx
.p2align 4,,10
.p2align 3
.L1553:
test edi, edi
jle .L1566
lea rbx, [rax+r15*8]
movsx r9, DWORD PTR -96[rbp]
movsx r13, DWORD PTR -92[rbp]
movsx r10, r11d
mov QWORD PTR -80[rbp], rbx
mov rbx, QWORD PTR -104[rbp]
mov r12d, r11d
xor ecx, ecx
and r12d, 1
imul r10, rbx
imul r9, rbx
imul r13, rbx
jmp .L1564
.p2align 4,,10
.p2align 3
.L1554:
test r12d, r12d
jne .L1593
movsd xmm1, QWORD PTR [rax+r9*8]
comisd xmm1, xmm2
jbe .L1561
movsx r8, edi
lea rbx, [rdx+r9]
add rdx, r13
add r8, r9
movsd xmm0, QWORD PTR [rax+r8*8]
divsd xmm0, xmm1
movsd xmm1, QWORD PTR [rax+rbx*8]
mulsd xmm0, QWORD PTR [rax+rdx*8]
subsd xmm1, xmm0
movsd QWORD PTR [rax+rsi*8], xmm1
movsd xmm0, QWORD PTR [rax]
comisd xmm0, xmm2
jb .L1561
movsd xmm0, QWORD PTR [rax+r10*8]
comisd xmm0, xmm2
jb .L1561
add ecx, 1
.L1555:
cmp edi, ecx
jle .L1566
.L1564:
movsx rdx, ecx
lea rsi, [rdx+r10]
mov QWORD PTR [rax+rsi*8], 0x000000000
test r11d, r11d
jne .L1554
movsd xmm0, QWORD PTR [r14+rdx*8]
add ecx, 1
movsd QWORD PTR [rax+rdx*8], xmm0
cmp edi, ecx
jg .L1564
.L1566:
mov rsi, QWORD PTR -104[rbp]
add DWORD PTR -96[rbp], 1
add r11d, 1
add DWORD PTR -92[rbp], 1
add QWORD PTR -72[rbp], rsi
add r15, rsi
cmp DWORD PTR -108[rbp], r11d
jne .L1553
.L1552:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1594
lea rsp, -40[rbp]
mov eax, 1
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1593:
.cfi_restore_state
movsx rdx, edi
add rdx, QWORD PTR -72[rbp]
mov rbx, QWORD PTR -88[rbp]
lea rcx, [rax+rdx*8]
lea edx, -1[rdi]
mov rsi, rdx
add rdx, r15
lea r8, [rbx+rdx*8]
mov rdx, QWORD PTR -80[rbp]
.p2align 4,,10
.p2align 3
.L1558:
movsd xmm0, QWORD PTR -8[rcx]
add rdx, 8
sub rcx, 8
movsd QWORD PTR -8[rdx], xmm0
cmp r8, rdx
jne .L1558
mov ecx, edi
mov edi, esi
jmp .L1555
.p2align 4,,10
.p2align 3
.L1561:
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.L1591:
or QWORD PTR -8[rsp+rax], 0
jmp .L1539
.L1594:
call __stack_chk_fail@PLT
.L1540:
call __DSVERIFIER_assert.part.0
.cfi_endproc
.LFE119:
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata.str1.8
.align 8
.LC49:
.string "impl.frac_bits must be less than word width!"
.align 8
.LC50:
.string "impl.int_bits must be less than word width subtracted by precision!"
.align 8
.LC51:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/core/initialization.h"
.section .rodata.str1.1
.LC52:
.string "0"
.text
.p2align 4
.globl initialization
.type initialization, @function
initialization:
.LFB120:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edx, DWORD PTR impl[rip+4]
cmp edx, 31
jg .L1608
.L1596:
mov eax, 32
mov edi, DWORD PTR impl[rip]
sub eax, edx
cmp edi, eax
jge .L1609
mov eax, 1
pxor xmm1, xmm1
pxor xmm0, xmm0
mov ecx, edx
mov esi, eax
mov r8d, eax
sal esi, cl
cmp edx, 31
mov ecx, 2147483647
cmovl ecx, esi
cvtsi2sd xmm1, esi
movsx rcx, ecx
mov QWORD PTR _fxp_one[rip], rcx
lea ecx, -1[rdx]
sal r8d, cl
movsx rcx, r8d
mov QWORD PTR _fxp_half[rip], rcx
mov ecx, esi
neg ecx
movsx rcx, ecx
mov QWORD PTR _fxp_minus_one[rip], rcx
lea ecx, -1[rdx+rdi]
sal eax, cl
mov edi, eax
sub eax, 1
neg edi
cvtsi2sd xmm0, edi
movsx rcx, edi
mov QWORD PTR _fxp_min[rip], rcx
movsx rcx, eax
mov QWORD PTR _fxp_max[rip], rcx
lea ecx, -1[rsi]
movsx rcx, ecx
divsd xmm0, xmm1
mov QWORD PTR _fxp_fmask[rip], rcx
mov ecx, 31
sub ecx, edx
mov edx, -2147483648
shr edx, cl
mov QWORD PTR _fxp_imask[rip], rdx
movsd QWORD PTR _dbl_min[rip], xmm0
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
mov eax, DWORD PTR impl[rip+40]
divsd xmm0, xmm1
movsd QWORD PTR _dbl_max[rip], xmm0
cmp eax, 1
jbe .L1610
movsd xmm1, QWORD PTR impl[rip+16]
pxor xmm0, xmm0
ucomisd xmm1, xmm0
jp .L1605
comisd xmm1, xmm0
jne .L1605
.L1601:
movsd xmm1, QWORD PTR impl[rip+8]
ucomisd xmm1, xmm0
jp .L1606
comisd xmm1, xmm0
jne .L1606
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1606:
.cfi_restore_state
pxor xmm0, xmm0
cvtsi2sd xmm0, eax
divsd xmm1, xmm0
movsd QWORD PTR impl[rip+8], xmm1
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1605:
.cfi_restore_state
pxor xmm2, xmm2
cvtsi2sd xmm2, eax
divsd xmm1, xmm2
movsd QWORD PTR impl[rip+16], xmm1
jmp .L1601
.p2align 4,,10
.p2align 3
.L1608:
lea rdi, .LC49[rip]
call puts@PLT
mov edx, DWORD PTR impl[rip+4]
jmp .L1596
.p2align 4,,10
.p2align 3
.L1610:
mov DWORD PTR impl[rip+40], 1
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L1609:
.cfi_restore_state
lea rdi, .LC50[rip]
call puts@PLT
lea rcx, __PRETTY_FUNCTION__.9[rip]
mov edx, 33
lea rsi, .LC51[rip]
lea rdi, .LC52[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE120:
.size initialization, .-initialization
.p2align 4
.globl double_state_space_representation
.type double_state_space_representation, @function
double_state_space_representation:
.LFB121:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 280
.cfi_def_cfa_offset 336
mov rax, QWORD PTR fs:40
mov QWORD PTR 264[rsp], rax
xor eax, eax
mov rdi, rsp
lea rsi, 128[rsp]
mov r11, rdi
mov r9, rsi
mov rdx, rsi
mov rax, rdi
.L1612:
mov QWORD PTR [rax], 0x000000000
add rax, 32
add rdx, 32
mov QWORD PTR -32[rdx], 0x000000000
mov QWORD PTR -24[rax], 0x000000000
mov QWORD PTR -24[rdx], 0x000000000
mov QWORD PTR -16[rax], 0x000000000
mov QWORD PTR -16[rdx], 0x000000000
mov QWORD PTR -8[rax], 0x000000000
mov QWORD PTR -8[rdx], 0x000000000
cmp rax, rsi
jne .L1612
mov ebp, DWORD PTR nOutputs[rip]
mov ebx, DWORD PTR nStates[rip]
mov r8d, DWORD PTR nInputs[rip]
test ebp, ebp
je .L1614
lea r14d, -1[rbp]
mov rax, rdi
sal r14, 5
lea r13, 32[rdi+r14]
.p2align 4,,10
.p2align 3
.L1639:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rax, r13
jne .L1639
lea r12, _controller[rip]
lea r15d, -1[rbx]
mov r10, rdi
lea rax, 264[r12]
lea rcx, [rax+r15*8]
not r15
sal r15, 3
.p2align 4,,10
.p2align 3
.L1640:
test ebx, ebx
je .L1618
movsd xmm1, QWORD PTR [r10]
lea rax, [r15+rcx]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L1615:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L1615
movsd QWORD PTR [r10], xmm1
.L1618:
add r10, 32
add rcx, 32
cmp r10, r13
jne .L1640
lea r13, 32[rsi+r14]
mov rax, rsi
.p2align 4,,10
.p2align 3
.L1637:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rax, r13
jne .L1637
lea r14d, -1[r8]
lea rax, _controller[rip+392]
mov r10, rsi
lea rcx, [rax+r14*8]
not r14
sal r14, 3
.p2align 4,,10
.p2align 3
.L1638:
test r8d, r8d
je .L1622
movsd xmm1, QWORD PTR [r10]
lea rax, [r14+rcx]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L1619:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L1619
movsd QWORD PTR [r10], xmm1
.L1622:
add r10, 32
add rcx, 32
cmp r10, r13
jne .L1638
mov ebp, ebp
xor eax, eax
lea rdx, _controller[rip+640]
sal rbp, 5
.p2align 4,,10
.p2align 3
.L1636:
movsd xmm0, QWORD PTR [rdi+rax]
addsd xmm0, QWORD PTR [rsi+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 32
cmp rbp, rax
jne .L1636
.L1614:
test ebx, ebx
je .L1624
lea edx, -1[rbx]
lea r10, 32[rdi]
mov rax, rdi
mov r12, rdx
sal r12, 5
lea r13, [r10+r12]
.p2align 4,,10
.p2align 3
.L1634:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r13, rax
jne .L1634
mov ebx, ebx
lea rbp, _controller[rip]
mov r14, rbx
lea rax, 8[rbp]
neg r14
lea rcx, [rax+rdx*8]
sal r14, 3
.p2align 4,,10
.p2align 3
.L1635:
movsd xmm1, QWORD PTR [r11]
lea rax, [r14+rcx]
mov rdx, rbp
.p2align 4,,10
.p2align 3
.L1625:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L1625
movsd QWORD PTR [r11], xmm1
add rcx, 32
mov r11, r10
cmp r13, r10
je .L1626
add r10, 32
jmp .L1635
.L1628:
sal rbx, 5
xor eax, eax
lea rdx, _controller[rip+512]
.p2align 4,,10
.p2align 3
.L1631:
movsd xmm0, QWORD PTR [rdi+rax]
addsd xmm0, QWORD PTR [r9+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 32
cmp rbx, rax
jne .L1631
.L1624:
movsd xmm0, QWORD PTR _controller[rip+640]
mov rax, QWORD PTR 264[rsp]
sub rax, QWORD PTR fs:40
jne .L1655
add rsp, 280
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L1626:
.cfi_restore_state
lea r10, 32[rsi]
mov rax, rsi
add r12, r10
.p2align 4,,10
.p2align 3
.L1632:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r12, rax
jne .L1632
lea r11d, -1[r8]
lea rax, _controller[rip+136]
lea rcx, [rax+r11*8]
not r11
sal r11, 3
.p2align 4,,10
.p2align 3
.L1633:
test r8d, r8d
je .L1630
movsd xmm1, QWORD PTR [rsi]
lea rax, [r11+rcx]
mov rdx, rbp
.p2align 4,,10
.p2align 3
.L1627:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L1627
movsd QWORD PTR [rsi], xmm1
.L1630:
mov rsi, r10
add rcx, 32
cmp r12, r10
je .L1628
add r10, 32
jmp .L1633
.L1655:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE121:
.size double_state_space_representation, .-double_state_space_representation
.p2align 4
.globl fxp_state_space_representation
.type fxp_state_space_representation, @function
fxp_state_space_representation:
.LFB122:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 1240
.cfi_def_cfa_offset 1296
mov rax, QWORD PTR fs:40
mov QWORD PTR 1224[rsp], rax
xor eax, eax
lea rdx, 192[rsp]
lea rbx, 64[rsp]
mov rax, rbx
mov rbp, rdx
mov rcx, rdx
.L1657:
mov QWORD PTR [rax], 0
add rax, 32
add rdx, 32
mov QWORD PTR -32[rdx], 0
mov QWORD PTR -24[rax], 0
mov QWORD PTR -24[rdx], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -16[rdx], 0
mov QWORD PTR -8[rax], 0
mov QWORD PTR -8[rdx], 0
cmp rax, rcx
jne .L1657
lea r14, 320[rsp]
lea r13, 448[rsp]
mov rax, r14
.L1658:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, r13
jne .L1658
mov rax, r13
lea r10, 576[rsp]
.L1659:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, r10
jne .L1659
mov rax, r10
lea r12, 704[rsp]
.L1660:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, r12
jne .L1660
mov rax, r12
lea r15, 832[rsp]
.L1661:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, r15
jne .L1661
lea rdx, 960[rsp]
mov rax, r15
mov QWORD PTR [rsp], rdx
.L1662:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, rdx
jne .L1662
lea rdx, 1088[rsp]
mov rax, QWORD PTR [rsp]
mov QWORD PTR 8[rsp], rdx
.L1663:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, rdx
jne .L1663
mov rax, QWORD PTR 8[rsp]
lea rdx, 1216[rsp]
.L1664:
mov QWORD PTR [rax], 0
add rax, 32
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, rdx
jne .L1664
mov eax, DWORD PTR nStates[rip]
movsx rdi, DWORD PTR nInputs[rip]
mov DWORD PTR 40[rsp], eax
test eax, eax
jle .L1665
movsx r11, eax
mov DWORD PTR 24[rsp], edi
xor r9d, r9d
mov rsi, r11
lea rcx, 0[0+r11*8]
lea r11, _controller[rip]
sal rsi, 5
mov QWORD PTR 16[rsp], rsi
.L1667:
mov rdi, r9
.L1666:
movsd xmm0, QWORD PTR [r11+rdi]
call fxp_double_to_fxp
mov QWORD PTR [r14+rdi], rax
add rdi, 8
cmp rdi, rcx
jne .L1666
add r9, 32
lea rcx, 32[rdi]
cmp r9, rsi
jne .L1667
movsx rdi, DWORD PTR 24[rsp]
mov rsi, QWORD PTR 16[rsp]
mov QWORD PTR 16[rsp], r10
xor r9d, r9d
lea r11, _controller[rip+128]
lea eax, -1[rdi]
mov DWORD PTR 24[rsp], eax
lea rcx, 8[0+rax*8]
.L1668:
mov r10, r9
test edi, edi
jle .L1671
.L1669:
movsd xmm0, QWORD PTR [r11+r10]
call fxp_double_to_fxp
mov QWORD PTR 0[r13+r10], rax
add r10, 8
cmp r10, rcx
jne .L1669
.L1671:
add r9, 32
add rcx, 32
cmp r9, rsi
jne .L1668
mov eax, DWORD PTR nOutputs[rip]
mov r10, QWORD PTR 16[rsp]
mov DWORD PTR 16[rsp], eax
test eax, eax
jle .L1679
.L1702:
mov esi, DWORD PTR 40[rsp]
mov QWORD PTR 48[rsp], rbx
xor r11d, r11d
lea r9, _controller[rip+256]
mov DWORD PTR 44[rsp], edi
lea eax, -1[rsi]
lea rcx, 8[0+rax*8]
movsx rax, DWORD PTR 16[rsp]
mov QWORD PTR 56[rsp], rax
sal rax, 5
mov QWORD PTR 32[rsp], rax
mov rdi, rax
.L1673:
mov rbx, r11
test esi, esi
jle .L1675
.L1672:
movsd xmm0, QWORD PTR [r9+rbx]
call fxp_double_to_fxp
mov QWORD PTR [r10+rbx], rax
add rbx, 8
cmp rcx, rbx
jne .L1672
.L1675:
add r11, 32
add rcx, 32
cmp r11, rdi
jne .L1673
mov eax, DWORD PTR 24[rsp]
mov QWORD PTR 24[rsp], r10
xor r11d, r11d
lea r9, _controller[rip+384]
movsx rdi, DWORD PTR 44[rsp]
mov rbx, QWORD PTR 48[rsp]
mov rsi, QWORD PTR 32[rsp]
lea rcx, 8[0+rax*8]
.L1674:
mov r10, r11
test edi, edi
jle .L1678
.L1676:
movsd xmm0, QWORD PTR [r9+r10]
call fxp_double_to_fxp
mov QWORD PTR [r12+r10], rax
add r10, 8
cmp rcx, r10
jne .L1676
.L1678:
add r11, 32
add rcx, 32
cmp r11, rsi
jne .L1674
mov edx, DWORD PTR 40[rsp]
mov r10, QWORD PTR 24[rsp]
test edx, edx
jg .L1679
test edi, edi
jg .L1681
.L1685:
mov r9, QWORD PTR 56[rsp]
xor ecx, ecx
lea rdi, _controller[rip+640]
sal r9, 5
.L1689:
movsd xmm0, QWORD PTR [rdi+rcx]
call fxp_double_to_fxp
mov rdx, QWORD PTR 8[rsp]
mov QWORD PTR [rdx+rcx], rax
add rcx, 32
cmp r9, rcx
jne .L1689
.L1690:
mov esi, DWORD PTR 40[rsp]
mov edi, DWORD PTR 16[rsp]
mov rcx, r10
mov r9, rbx
mov r8, r15
mov edx, 1
call fxp_matrix_multiplication.part.0
mov r8, QWORD PTR [rsp]
mov r9, rbp
mov rcx, r12
mov esi, DWORD PTR nInputs[rip]
mov edi, DWORD PTR nOutputs[rip]
mov edx, 1
call fxp_matrix_multiplication.part.0
mov r10d, DWORD PTR nOutputs[rip]
mov r11, QWORD PTR 8[rsp]
xor r9d, r9d
mov rax, r10
sal r10, 5
test eax, eax
je .L1687
.p2align 4,,10
.p2align 3
.L1700:
mov rdi, QWORD PTR [rbx+r9]
add rdi, QWORD PTR 0[rbp+r9]
call fxp_quantize
mov QWORD PTR [r11+r9], rax
add r9, 32
cmp r10, r9
jne .L1700
.L1687:
mov edi, DWORD PTR nStates[rip]
mov r9, rbx
mov r8, r15
mov rcx, r14
mov edx, 1
mov esi, edi
call fxp_matrix_multiplication.part.0
mov r8, QWORD PTR [rsp]
mov r9, rbp
mov rcx, r13
mov esi, DWORD PTR nInputs[rip]
mov edi, DWORD PTR nStates[rip]
mov edx, 1
call fxp_matrix_multiplication.part.0
mov r10d, DWORD PTR nStates[rip]
xor r9d, r9d
mov r11, r10
sal r10, 5
test r11d, r11d
je .L1695
.p2align 4,,10
.p2align 3
.L1698:
mov rdi, QWORD PTR [rbx+r9]
add rdi, QWORD PTR 0[rbp+r9]
call fxp_quantize
mov QWORD PTR [r15+r9], rax
add r9, 32
cmp r10, r9
jne .L1698
test r11d, r11d
jg .L1750
.L1695:
movsx rax, DWORD PTR nOutputs[rip]
test eax, eax
jg .L1751
.L1693:
movsd xmm0, QWORD PTR _controller[rip+640]
mov rax, QWORD PTR 1224[rsp]
sub rax, QWORD PTR fs:40
jne .L1752
add rsp, 1240
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L1679:
.cfi_restore_state
mov r9d, DWORD PTR 40[rsp]
xor r11d, r11d
lea rcx, _controller[rip+512]
sal r9, 5
.L1683:
movsd xmm0, QWORD PTR [rcx+r11]
call fxp_double_to_fxp
mov QWORD PTR [r15+r11], rax
add r11, 32
cmp r11, r9
jne .L1683
test edi, edi
jle .L1682
.L1681:
sal rdi, 5
xor ecx, ecx
lea r9, _controller[rip+768]
.L1688:
movsd xmm0, QWORD PTR [r9+rcx]
call fxp_double_to_fxp
mov rdx, QWORD PTR [rsp]
mov QWORD PTR [rdx+rcx], rax
add rcx, 32
cmp rdi, rcx
jne .L1688
.L1682:
mov eax, DWORD PTR 16[rsp]
test eax, eax
jle .L1690
movsx rax, DWORD PTR 16[rsp]
mov QWORD PTR 56[rsp], rax
jmp .L1685
.p2align 4,,10
.p2align 3
.L1750:
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
lea rcx, _controller[rip+512]
movsd xmm1, QWORD PTR [rax+rdx*8]
xor eax, eax
.L1696:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r15+rax]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp r10, rax
jne .L1696
movsx rax, DWORD PTR nOutputs[rip]
test eax, eax
jle .L1693
.L1751:
movsx rcx, DWORD PTR impl[rip+4]
lea rdx, scale_factor_inv[rip]
sal rax, 5
lea rdi, _controller[rip+640]
movsd xmm1, QWORD PTR [rdx+rcx*8]
mov rcx, QWORD PTR 8[rsp]
xor edx, edx
.L1697:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rcx+rdx]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rdx], xmm0
add rdx, 32
cmp rax, rdx
je .L1693
jmp .L1697
.L1665:
mov eax, DWORD PTR nOutputs[rip]
lea edx, -1[rdi]
mov DWORD PTR 24[rsp], edx
mov DWORD PTR 16[rsp], eax
test eax, eax
jg .L1702
test edi, edi
jle .L1690
jmp .L1681
.L1752:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE122:
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata.str1.8
.align 8
.LC53:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.align 8
.LC59:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 6"
.text
.p2align 4
.globl sinTyl
.type sinTyl, @function
sinTyl:
.LFB123:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
test edi, edi
js .L1776
je .L1756
pxor xmm1, xmm1
addsd xmm1, xmm0
cmp edi, 1
je .L1753
movapd xmm2, xmm0
mulsd xmm2, xmm0
mulsd xmm0, xmm2
movapd xmm3, xmm0
divsd xmm3, QWORD PTR .LC54[rip]
subsd xmm1, xmm3
cmp edi, 2
je .L1753
mulsd xmm0, xmm2
movapd xmm3, xmm0
divsd xmm3, QWORD PTR .LC55[rip]
addsd xmm1, xmm3
cmp edi, 3
je .L1753
mulsd xmm0, xmm2
movapd xmm3, xmm0
divsd xmm3, QWORD PTR .LC56[rip]
subsd xmm1, xmm3
cmp edi, 4
je .L1753
mulsd xmm0, xmm2
movapd xmm3, xmm0
divsd xmm3, QWORD PTR .LC57[rip]
addsd xmm1, xmm3
cmp edi, 5
je .L1753
mulsd xmm0, xmm2
divsd xmm0, QWORD PTR .LC58[rip]
subsd xmm1, xmm0
cmp edi, 6
jne .L1777
.L1753:
movapd xmm0, xmm1
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1776:
.cfi_restore_state
lea rdi, .LC53[rip]
call puts@PLT
pxor xmm1, xmm1
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1756:
.cfi_restore_state
pxor xmm1, xmm1
jmp .L1753
.p2align 4,,10
.p2align 3
.L1777:
lea rdi, .LC59[rip]
movsd QWORD PTR 8[rsp], xmm1
call puts@PLT
movsd xmm1, QWORD PTR 8[rsp]
jmp .L1753
.cfi_endproc
.LFE123:
.size sinTyl, .-sinTyl
.section .rodata.str1.8
.align 8
.LC60:
.string "Warning: Function cosTyl from bmc/core/filter_functions.h: Precision must be a positive integer. Assuming 0 precision"
.text
.p2align 4
.globl cosTyl
.type cosTyl, @function
cosTyl:
.LFB124:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
test edi, edi
js .L1800
je .L1781
movsd xmm1, QWORD PTR .LC6[rip]
cmp edi, 1
je .L1778
mulsd xmm0, xmm0
movsd xmm2, QWORD PTR .LC11[rip]
mulsd xmm2, xmm0
subsd xmm1, xmm2
cmp edi, 2
je .L1778
movapd xmm2, xmm0
mulsd xmm2, xmm0
movapd xmm3, xmm2
divsd xmm3, QWORD PTR .LC61[rip]
addsd xmm1, xmm3
cmp edi, 3
je .L1778
mulsd xmm2, xmm0
movapd xmm3, xmm2
divsd xmm3, QWORD PTR .LC62[rip]
subsd xmm1, xmm3
cmp edi, 4
je .L1778
mulsd xmm2, xmm0
movapd xmm3, xmm2
divsd xmm3, QWORD PTR .LC63[rip]
addsd xmm1, xmm3
cmp edi, 5
je .L1778
mulsd xmm0, xmm2
divsd xmm0, QWORD PTR .LC64[rip]
subsd xmm1, xmm0
cmp edi, 6
jne .L1801
.L1778:
movapd xmm0, xmm1
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1800:
.cfi_restore_state
lea rdi, .LC60[rip]
call puts@PLT
pxor xmm1, xmm1
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
movapd xmm0, xmm1
ret
.p2align 4,,10
.p2align 3
.L1781:
.cfi_restore_state
pxor xmm1, xmm1
jmp .L1778
.p2align 4,,10
.p2align 3
.L1801:
lea rdi, .LC59[rip]
movsd QWORD PTR 8[rsp], xmm1
call puts@PLT
movsd xmm1, QWORD PTR 8[rsp]
jmp .L1778
.cfi_endproc
.LFE124:
.size cosTyl, .-cosTyl
.section .rodata.str1.8
.align 8
.LC68:
.string "Warning: Function sinTyl from bmc/core/filter_functions.h: Precision representation exceeded. Assuming maximum precision of 4"
.text
.p2align 4
.globl atanTyl
.type atanTyl, @function
atanTyl:
.LFB125:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
test edi, edi
js .L1815
je .L1805
cmp edi, 1
je .L1802
movapd xmm1, xmm0
mulsd xmm1, xmm0
movapd xmm2, xmm1
divsd xmm2, QWORD PTR .LC65[rip]
subsd xmm0, xmm2
cmp edi, 2
je .L1802
movapd xmm2, xmm1
mulsd xmm2, xmm1
movapd xmm3, xmm2
divsd xmm3, QWORD PTR .LC66[rip]
addsd xmm0, xmm3
cmp edi, 3
je .L1802
mulsd xmm1, xmm2
divsd xmm1, QWORD PTR .LC67[rip]
subsd xmm0, xmm1
cmp edi, 6
jle .L1802
lea rdi, .LC68[rip]
movsd QWORD PTR 8[rsp], xmm0
call puts@PLT
movsd xmm0, QWORD PTR 8[rsp]
.L1802:
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1815:
.cfi_restore_state
lea rdi, .LC53[rip]
call puts@PLT
pxor xmm0, xmm0
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L1805:
.cfi_restore_state
pxor xmm0, xmm0
jmp .L1802
.cfi_endproc
.LFE125:
.size atanTyl, .-atanTyl
.p2align 4
.globl sqrt1
.type sqrt1, @function
sqrt1:
.LFB126:
.cfi_startproc
endbr64
movss xmm3, DWORD PTR .LC69[rip]
movaps xmm2, xmm0
movd edx, xmm0
mov eax, 1597463007
sar edx
movss xmm1, DWORD PTR .LC70[rip]
mulss xmm3, xmm2
sub eax, edx
movd xmm0, eax
mulss xmm3, xmm0
mulss xmm3, xmm0
mulss xmm0, xmm2
subss xmm1, xmm3
mulss xmm0, xmm1
ret
.cfi_endproc
.LFE126:
.size sqrt1, .-sqrt1
.p2align 4
.globl sqrt2
.type sqrt2, @function
sqrt2:
.LFB127:
.cfi_startproc
endbr64
movd eax, xmm0
sar eax
add eax, 532676608
movd xmm0, eax
ret
.cfi_endproc
.LFE127:
.size sqrt2, .-sqrt2
.p2align 4
.globl fabsolut
.type fabsolut, @function
fabsolut:
.LFB128:
.cfi_startproc
endbr64
pxor xmm1, xmm1
comiss xmm1, xmm0
ja .L1822
ret
.p2align 4,,10
.p2align 3
.L1822:
xorps xmm0, XMMWORD PTR .LC2[rip]
ret
.cfi_endproc
.LFE128:
.size fabsolut, .-fabsolut
.section .rodata.str1.8
.align 8
.LC71:
.string "#matrix STATES -------------------------------"
.align 8
.LC72:
.string "#matrix OUTPUTS -------------------------------"
.align 8
.LC73:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_limit_cycle.h"
.text
.p2align 4
.globl verify_limit_cycle_state_space
.type verify_limit_cycle_state_space, @function
verify_limit_cycle_state_space:
.LFB131:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
mov ecx, 16
lea r9, _controller[rip+512]
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
lea r8, -256[r9]
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
sub rsp, 536
.cfi_def_cfa_offset 576
mov esi, DWORD PTR nStates[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 520[rsp], rax
xor eax, eax
lea r12, 256[rsp]
mov r14, rsp
lea r13, 384[rsp]
mov rdi, r12
lea rbp, 128[rsp]
sub rsp, 8
.cfi_def_cfa_offset 584
mov edx, esi
rep stosq
mov ecx, 16
mov rdi, r13
rep stosq
mov ecx, 16
mov rdi, r14
rep stosq
mov ecx, 16
mov rdi, rbp
rep stosq
push r12
.cfi_def_cfa_offset 592
mov edi, DWORD PTR nOutputs[rip]
mov ecx, 1
call double_matrix_multiplication
mov esi, DWORD PTR nInputs[rip]
mov edi, DWORD PTR nOutputs[rip]
lea r9, _controller[rip+768]
lea r8, -384[r9]
mov ecx, 1
mov QWORD PTR [rsp], r13
mov edx, esi
call double_matrix_multiplication
mov rcx, r13
mov rdx, r12
mov esi, 1
mov edi, DWORD PTR nOutputs[rip]
lea r8, _controller[rip+640]
call double_add_matrix
lea rdi, .LC71[rip]
xor eax, eax
call printf@PLT
mov esi, DWORD PTR nStates[rip]
xor edx, edx
mov rdi, r14
call print_matrix
lea rdi, .LC72[rip]
xor eax, eax
call printf@PLT
mov esi, DWORD PTR nOutputs[rip]
xor edx, edx
mov rdi, rbp
call print_matrix
lea rcx, __PRETTY_FUNCTION__.8[rip]
mov edx, 93
lea rsi, .LC73[rip]
lea rdi, .LC52[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE131:
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata.str1.8
.align 8
.LC74:
.string "X_SIZE must be at least 2 * ds.a_size"
.text
.p2align 4
.globl verify_limit_cycle
.type verify_limit_cycle, @function
verify_limit_cycle:
.LFB132:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC74[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 72
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov eax, DWORD PTR ds[rip+800]
mov DWORD PTR overflow_mode[rip], 3
lea ebx, [rax+rax]
xor eax, eax
call printf@PLT
cmp DWORD PTR X_SIZE_VALUE[rip], ebx
jl .L1903
movsx rax, DWORD PTR ds[rip+800]
mov rcx, rsp
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1829
.L1904:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1904
.L1829:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L1905
.L1830:
movsx rax, DWORD PTR ds[rip+1608]
mov rcx, rsp
mov r14, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1832
.L1906:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1906
.L1832:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L1907
.L1833:
mov edx, r8d
mov rsi, r14
lea rdi, ds[rip]
mov r15, rsp
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rsi, r15
add rdi, 808
call fxp_double_to_fxp_array
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rsp
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1835
.L1908:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1908
.L1835:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1836
or QWORD PTR -8[rsp+rdx], 0
.L1836:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -72[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1838
.L1909:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1909
.L1838:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L1839
or QWORD PTR -8[rsp+rax], 0
.L1839:
movsd xmm0, QWORD PTR impl[rip+16]
mov rcx, rsp
mov r13, rsp
call fxp_double_to_fxp
movsd xmm0, QWORD PTR impl[rip+8]
mov QWORD PTR -96[rbp], rax
call fxp_double_to_fxp
mov QWORD PTR -104[rbp], rax
movsx rax, DWORD PTR ds[rip+1608]
lea rdx, 15[0+rax*8]
mov rax, rdx
and rdx, -4096
sub rcx, rdx
and rax, -16
cmp rsp, rcx
je .L1841
.L1910:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1910
.L1841:
and eax, 4095
sub rsp, rax
test rax, rax
je .L1842
or QWORD PTR -8[rsp+rax], 0
.L1842:
xor eax, eax
mov rbx, rsp
call nondet_int@PLT
movsx r12, eax
cmp r12, QWORD PTR -104[rbp]
setle al
xor edi, edi
cmp r12, QWORD PTR -96[rbp]
setge dil
and edi, eax
xor eax, eax
call __ESBMC_assume@PLT
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
test r8d, r8d
jle .L1847
mov esi, r8d
mov rax, r13
lea rdx, 0[r13+rsi*8]
.p2align 4,,10
.p2align 3
.L1846:
mov QWORD PTR [rax], r12
add rax, 8
cmp rax, rdx
jne .L1846
mov rdi, QWORD PTR -72[rbp]
lea rdx, 0[0+rsi*8]
xor esi, esi
mov DWORD PTR -76[rbp], r8d
call memset@PLT
mov r8d, DWORD PTR -76[rbp]
.L1847:
mov edx, DWORD PTR ds[rip+1608]
cmp DWORD PTR ds[rip+800], edx
mov eax, edx
cmovge eax, DWORD PTR ds[rip+800]
mov DWORD PTR -76[rbp], eax
cdqe
lea rsi, 0[0+rax*8]
lea rax, [rbx+rdx*8]
test edx, edx
jle .L1911
.p2align 4,,10
.p2align 3
.L1848:
mov QWORD PTR [rbx], r12
add rbx, 8
cmp rbx, rax
jne .L1848
lea rax, 15[rsi]
mov rcx, rsp
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1861
.L1912:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1912
.L1861:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1862
or QWORD PTR -8[rsp+rdx], 0
.L1862:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1864
.L1913:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1913
.L1864:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1865
or QWORD PTR -8[rsp+rdx], 0
.L1865:
mov QWORD PTR -88[rbp], rsp
.L1866:
xor r12d, r12d
.p2align 4,,10
.p2align 3
.L1857:
xor eax, eax
call nondet_int@PLT
cdqe
cmp rax, QWORD PTR -104[rbp]
setle cl
mov QWORD PTR [rbx+r12*8], rax
xor edi, edi
cmp rax, QWORD PTR -96[rbp]
setge dil
xor eax, eax
and edi, ecx
call __ESBMC_assume@PLT
mov rax, QWORD PTR [rbx+r12*8]
mov rsi, QWORD PTR -88[rbp]
mov QWORD PTR [rsi+r12*8], rax
add r12, 1
cmp DWORD PTR -76[rbp], r12d
jg .L1857
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
.L1856:
test r8d, r8d
jle .L1858
xor r12d, r12d
.p2align 4,,10
.p2align 3
.L1859:
mov rsi, QWORD PTR 0[r13+r12*8]
mov rcx, r15
mov rdx, r14
mov rdi, rbx
mov r8d, DWORD PTR ds[rip+800]
mov r9d, DWORD PTR ds[rip+1608]
call fxp_transposed_direct_form_2
mov rcx, QWORD PTR -72[rbp]
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
mov QWORD PTR [rcx+r12*8], rax
add r12, 1
cmp r8d, r12d
jg .L1859
.L1858:
mov rdi, QWORD PTR -72[rbp]
mov esi, r8d
call fxp_check_persistent_limit_cycle
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L1914
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L1905:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L1830
.L1907:
or QWORD PTR -8[rsp+rdx], 0
jmp .L1833
.p2align 4,,10
.p2align 3
.L1911:
lea rax, 15[rsi]
mov rcx, rsp
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1851
.L1915:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1915
.L1851:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1852
or QWORD PTR -8[rsp+rdx], 0
.L1852:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1854
.L1916:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L1916
.L1854:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L1855
or QWORD PTR -8[rsp+rax], 0
.L1855:
mov eax, DWORD PTR -76[rbp]
mov QWORD PTR -88[rbp], rsp
test eax, eax
jle .L1856
jmp .L1866
.L1903:
call __DSVERIFIER_assert.part.0
.L1914:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE132:
.size verify_limit_cycle, .-verify_limit_cycle
.p2align 4
.globl verify_error
.type verify_error, @function
verify_error:
.LFB133:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 136
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR ds[rip+800]
mov rcx, rsp
mov DWORD PTR overflow_mode[rip], 2
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1919
.L2011:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2011
.L1919:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2012
.L1920:
movsx rax, DWORD PTR ds[rip+1608]
mov rcx, rsp
mov QWORD PTR -88[rbp], rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1922
.L2013:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2013
.L1922:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2014
.L1923:
mov rsi, QWORD PTR -88[rbp]
mov edx, r8d
mov rbx, rsp
lea rdi, ds[rip]
mov QWORD PTR -96[rbp], rbx
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rsi, rbx
add rdi, 808
call fxp_double_to_fxp_array
movsd xmm0, QWORD PTR impl[rip+16]
mov rcx, rsp
call fxp_double_to_fxp
movsd xmm0, QWORD PTR impl[rip+8]
mov QWORD PTR -112[rbp], rax
call fxp_double_to_fxp
mov QWORD PTR -104[rbp], rax
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov DWORD PTR -128[rbp], eax
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1925
.L2015:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2015
.L1925:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1926
or QWORD PTR -8[rsp+rdx], 0
.L1926:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov QWORD PTR -80[rbp], rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1928
.L2016:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2016
.L1928:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1929
or QWORD PTR -8[rsp+rdx], 0
.L1929:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov r12, rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L1931
.L2017:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2017
.L1931:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L1932
or QWORD PTR -8[rsp+rdx], 0
.L1932:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -72[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L1934
.L2018:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2018
.L1934:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L1935
or QWORD PTR -8[rsp+rax], 0
.L1935:
movsx rdx, DWORD PTR ds[rip+800]
mov eax, DWORD PTR ds[rip+1608]
mov rcx, rsp
mov r13, rsp
cmp eax, edx
lea rsi, 15[0+rdx*8]
mov DWORD PTR -132[rbp], eax
mov r8, rdx
cmovl eax, edx
mov rdi, rsi
and rdi, -4096
mov DWORD PTR -136[rbp], eax
mov rax, rsi
sub rcx, rdi
and rax, -16
.L1936:
cmp rsp, rcx
je .L1937
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1936
.p2align 4,,10
.p2align 3
.L2012:
or QWORD PTR -8[rsp+rdx], 0
jmp .L1920
.L2014:
or QWORD PTR -8[rsp+rdx], 0
jmp .L1923
.L1937:
and eax, 4095
sub rsp, rax
test rax, rax
je .L1938
or QWORD PTR -8[rsp+rax], 0
.L1938:
movsx rax, DWORD PTR -132[rbp]
mov r9, rsp
mov rdi, rsp
lea rcx, 15[0+rax*8]
mov QWORD PTR -160[rbp], rax
mov r10, rcx
mov rax, rcx
and r10, -4096
and rax, -16
sub r9, r10
.L1939:
cmp rsp, r9
je .L1940
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1939
.L1940:
and eax, 4095
sub rsp, rax
test rax, rax
je .L1941
or QWORD PTR -8[rsp+rax], 0
.L1941:
movsx rax, DWORD PTR -136[rbp]
mov QWORD PTR -144[rbp], rsp
mov r10, rsp
mov QWORD PTR -168[rbp], rax
lea rax, 15[0+rax*8]
mov r11, rax
mov r9, rax
and r11, -4096
and r9, -16
sub r10, r11
.L1942:
cmp rsp, r10
je .L1943
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1942
.L1943:
and r9d, 4095
sub rsp, r9
test r9, r9
je .L1944
or QWORD PTR -8[rsp+r9], 0
.L1944:
mov r9, rsi
mov r10, rsp
and rsi, -4096
mov r14, rsp
and r9, -16
sub r10, rsi
.L1945:
cmp rsp, r10
je .L1946
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1945
.L1946:
mov rsi, r9
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L1947
or QWORD PTR -8[rsp+rsi], 0
.L1947:
mov QWORD PTR -152[rbp], rsp
mov rsi, rcx
mov r9, rsp
and rcx, -4096
and rsi, -16
sub r9, rcx
.L1948:
cmp rsp, r9
je .L1949
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1948
.L1949:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L1950
or QWORD PTR -8[rsp+rsi], 0
.L1950:
mov rcx, rax
mov rsi, rsp
and rax, -4096
mov rbx, rsp
and rcx, -16
sub rsi, rax
.L1951:
cmp rsp, rsi
je .L1952
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L1951
.L1952:
mov rax, rcx
and eax, 4095
sub rsp, rax
test rax, rax
je .L1953
or QWORD PTR -8[rsp+rax], 0
.L1953:
mov r15, rsp
test r8d, r8d
jle .L1957
sal rdx, 3
xor esi, esi
mov QWORD PTR -120[rbp], rdx
call memset@PLT
mov rdx, QWORD PTR -120[rbp]
mov rdi, QWORD PTR -152[rbp]
xor esi, esi
call memset@PLT
.L1957:
mov ecx, DWORD PTR -132[rbp]
test ecx, ecx
jle .L1956
mov rdx, QWORD PTR -160[rbp]
mov rdi, QWORD PTR -144[rbp]
xor esi, esi
sal rdx, 3
mov QWORD PTR -120[rbp], rdx
call memset@PLT
mov rdx, QWORD PTR -120[rbp]
xor esi, esi
mov rdi, rbx
call memset@PLT
.L1956:
mov edx, DWORD PTR -136[rbp]
test edx, edx
jle .L1959
mov rbx, QWORD PTR -168[rbp]
xor esi, esi
mov rdi, r14
sal rbx, 3
mov rdx, rbx
call memset@PLT
mov rdx, rbx
xor esi, esi
mov rdi, r15
call memset@PLT
.L1959:
mov eax, DWORD PTR -128[rbp]
xor ebx, ebx
test eax, eax
jle .L1961
mov QWORD PTR -128[rbp], r15
mov r15, QWORD PTR -80[rbp]
mov QWORD PTR -120[rbp], r14
mov r14, rbx
.p2align 4,,10
.p2align 3
.L1960:
mov QWORD PTR [r15+r14*8], 0
xor eax, eax
call nondet_int@PLT
mov ebx, eax
cdqe
cmp QWORD PTR -104[rbp], rax
setge sil
xor edi, edi
cmp QWORD PTR -112[rbp], rax
mov QWORD PTR [r12+r14*8], rax
setle dil
xor eax, eax
and edi, esi
call __ESBMC_assume@PLT
mov rax, QWORD PTR -72[rbp]
pxor xmm0, xmm0
lea rcx, scale_factor_inv[rip]
cvtsi2sd xmm0, ebx
mov QWORD PTR [rax+r14*8], 0x000000000
movsx rax, DWORD PTR impl[rip+4]
mulsd xmm0, QWORD PTR [rcx+rax*8]
mov eax, DWORD PTR X_SIZE_VALUE[rip]
movsd QWORD PTR 0[r13+r14*8], xmm0
add r14, 1
cmp eax, r14d
jg .L1960
mov r14, QWORD PTR -120[rbp]
mov r15, QWORD PTR -128[rbp]
test eax, eax
jle .L1961
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L1965:
mov rsi, QWORD PTR [r12+rbx*8]
mov r9d, DWORD PTR ds[rip+1608]
mov rdi, r14
mov r8d, DWORD PTR ds[rip+800]
mov rcx, QWORD PTR -96[rbp]
mov rdx, QWORD PTR -88[rbp]
call fxp_transposed_direct_form_2
lea rdx, ds[rip+808]
mov rdi, r15
movsd xmm0, QWORD PTR 0[r13+rbx*8]
mov r11, rax
mov rax, QWORD PTR -80[rbp]
mov r8d, DWORD PTR ds[rip+1608]
lea rsi, -808[rdx]
mov ecx, DWORD PTR ds[rip+800]
mov QWORD PTR [rax+rbx*8], r11
call double_transposed_direct_form_2
mov rax, QWORD PTR -72[rbp]
movsx rdx, DWORD PTR impl[rip+4]
pxor xmm1, xmm1
cvtsi2sd xmm1, r11d
movsd QWORD PTR [rax+rbx*8], xmm0
lea rax, scale_factor_inv[rip]
mulsd xmm1, QWORD PTR [rax+rdx*8]
subsd xmm0, xmm1
movsd xmm1, QWORD PTR impl[rip+48]
comisd xmm1, xmm0
ja .L2019
.L1962:
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L2019:
xorpd xmm1, XMMWORD PTR .LC8[rip]
comisd xmm0, xmm1
jbe .L1962
add rbx, 1
cmp DWORD PTR X_SIZE_VALUE[rip], ebx
jg .L1965
.L1961:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2020
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L2020:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE133:
.size verify_error, .-verify_error
.section .rodata.str1.8
.align 8
.LC75:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycle.h"
.align 8
.LC76:
.string "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na"
.text
.p2align 4
.globl verify_zero_input_limit_cycle
.type verify_zero_input_limit_cycle, @function
verify_zero_input_limit_cycle:
.LFB134:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC74[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 72
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
mov eax, DWORD PTR ds[rip+800]
mov DWORD PTR overflow_mode[rip], 3
lea ebx, [rax+rax]
xor eax, eax
call printf@PLT
cmp DWORD PTR X_SIZE_VALUE[rip], ebx
jl .L2079
movsx rax, DWORD PTR ds[rip+800]
mov rcx, rsp
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2024
.L2080:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2080
.L2024:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2081
.L2025:
movsx rax, DWORD PTR ds[rip+1608]
mov rcx, rsp
mov r14, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2027
.L2082:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2082
.L2027:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2083
.L2028:
mov edx, r8d
mov rbx, rsp
lea rdi, ds[rip]
mov rsi, r14
mov QWORD PTR -104[rbp], rbx
call fxp_double_to_fxp_array
mov edx, DWORD PTR ds[rip+1608]
mov rsi, rbx
add rdi, 808
call fxp_double_to_fxp_array
movsd xmm0, QWORD PTR impl[rip+16]
mov rcx, rsp
call fxp_double_to_fxp
movsd xmm0, QWORD PTR impl[rip+8]
mov QWORD PTR -96[rbp], rax
call fxp_double_to_fxp
movsx rbx, DWORD PTR X_SIZE_VALUE[rip]
mov QWORD PTR -88[rbp], rax
lea rax, 15[0+rbx*8]
mov r8, rbx
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2030
.L2084:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2084
.L2030:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2031
or QWORD PTR -8[rsp+rdx], 0
.L2031:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -72[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2033
.L2085:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2085
.L2033:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L2034
or QWORD PTR -8[rsp+rax], 0
.L2034:
mov r13, rsp
test r8d, r8d
jle .L2047
mov rdi, QWORD PTR -72[rbp]
lea r12, 0[0+rbx*8]
xor esi, esi
mov DWORD PTR -80[rbp], r8d
mov rdx, r12
call memset@PLT
mov rdx, r12
xor esi, esi
mov rdi, r13
call memset@PLT
mov r8d, DWORD PTR -80[rbp]
.L2047:
movsx rax, DWORD PTR ds[rip+1608]
cmp DWORD PTR ds[rip+800], eax
mov rcx, rsp
mov esi, eax
mov r9, rax
lea rax, 15[0+rax*8]
cmovge esi, DWORD PTR ds[rip+800]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2037
.L2086:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2086
.L2037:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2038
or QWORD PTR -8[rsp+rdx], 0
.L2038:
movsx rax, esi
mov rcx, rsp
mov QWORD PTR -112[rbp], rsp
lea rax, 15[0+rax*8]
mov rdi, rax
mov rdx, rax
and rdi, -4096
and rdx, -16
sub rcx, rdi
cmp rsp, rcx
je .L2040
.L2087:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2087
.L2040:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2041
or QWORD PTR -8[rsp+rdx], 0
.L2041:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2043
.L2088:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2088
.L2043:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2044
or QWORD PTR -8[rsp+rdx], 0
.L2044:
mov rcx, rsp
test esi, esi
jle .L2046
mov esi, esi
mov r15, rbx
mov r12, rcx
lea rax, [rbx+rsi*8]
mov QWORD PTR -80[rbp], rax
.p2align 4,,10
.p2align 3
.L2048:
xor eax, eax
call nondet_int@PLT
cdqe
cmp QWORD PTR -88[rbp], rax
setge sil
mov QWORD PTR [r15], rax
xor edi, edi
cmp QWORD PTR -96[rbp], rax
setle dil
xor eax, eax
add r15, 8
add r12, 8
and edi, esi
call __ESBMC_assume@PLT
mov rax, QWORD PTR -8[r15]
mov QWORD PTR -8[r12], rax
cmp r15, QWORD PTR -80[rbp]
jne .L2048
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
mov r9d, DWORD PTR ds[rip+1608]
.L2046:
test r9d, r9d
jle .L2052
movsx rdx, r9d
mov rdi, QWORD PTR -112[rbp]
xor esi, esi
mov DWORD PTR -88[rbp], r8d
sal rdx, 3
mov DWORD PTR -80[rbp], r9d
call memset@PLT
mov r9d, DWORD PTR -80[rbp]
mov r8d, DWORD PTR -88[rbp]
.L2052:
xor r12d, r12d
test r8d, r8d
jg .L2050
jmp .L2051
.p2align 4,,10
.p2align 3
.L2089:
mov r9d, DWORD PTR ds[rip+1608]
.L2050:
mov rsi, QWORD PTR 0[r13+r12*8]
mov rcx, QWORD PTR -104[rbp]
mov rdx, r14
mov rdi, rbx
mov r8d, DWORD PTR ds[rip+800]
call fxp_transposed_direct_form_2
mov rcx, QWORD PTR -72[rbp]
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
mov QWORD PTR [rcx+r12*8], rax
add r12, 1
cmp r8d, r12d
jg .L2089
.L2051:
mov rdi, QWORD PTR -72[rbp]
mov esi, r8d
call fxp_check_persistent_limit_cycle
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2090
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L2081:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L2025
.L2083:
or QWORD PTR -8[rsp+rdx], 0
jmp .L2028
.L2079:
lea rcx, __PRETTY_FUNCTION__.7[rip]
mov edx, 23
lea rsi, .LC75[rip]
lea rdi, .LC76[rip]
call __assert_fail@PLT
.L2090:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE134:
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.section .rodata.str1.8
.align 8
.LC77:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_generic_timing.h"
.section .rodata.str1.1
.LC78:
.string "spent_time <= ds.sample_time"
.text
.p2align 4
.globl verify_generic_timing
.type verify_generic_timing, @function
verify_generic_timing:
.LFB135:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rsp
mov r10, rax
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2093
.L2143:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2143
.L2093:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2144
.L2094:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -72[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2096
.L2145:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2145
.L2096:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2146
.L2097:
mov r12, rsp
test r10d, r10d
jle .L2098
xor r13d, r13d
.p2align 4,,10
.p2align 3
.L2101:
mov rax, QWORD PTR -72[rbp]
mov QWORD PTR [rax+r13*8], 0x000000000
xor eax, eax
call nondet_float@PLT
xor edi, edi
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR impl[rip+16]
movsd QWORD PTR [r12+r13*8], xmm0
jb .L2099
movsd xmm1, QWORD PTR impl[rip+8]
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L2099:
xor eax, eax
add r13, 1
call __ESBMC_assume@PLT
mov r10d, DWORD PTR X_SIZE_VALUE[rip]
cmp r10d, r13d
jg .L2101
.L2098:
movsx rdx, DWORD PTR ds[rip+800]
mov r8d, DWORD PTR ds[rip+1608]
mov rdi, rsp
cmp r8d, edx
lea rax, 15[0+rdx*8]
mov r14d, edx
mov rcx, rdx
cmovge r14d, r8d
mov rsi, rax
and rax, -4096
sub rdi, rax
and rsi, -16
cmp rsp, rdi
je .L2103
.L2147:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L2147
.L2103:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L2104
or QWORD PTR -8[rsp+rsi], 0
.L2104:
movsx rbx, r8d
mov r9, rsp
mov rdi, rsp
lea rax, 15[0+rbx*8]
mov rsi, rax
and rax, -4096
sub r9, rax
and rsi, -16
cmp rsp, r9
je .L2106
.L2148:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r9
jne .L2148
.L2106:
and esi, 4095
sub rsp, rsi
test rsi, rsi
jne .L2149
.L2107:
movsx rax, r14d
mov r9, rsp
mov r15, rsp
mov QWORD PTR -96[rbp], rax
lea rax, 15[0+rax*8]
mov rsi, rax
and rax, -4096
sub r9, rax
and rsi, -16
cmp rsp, r9
je .L2109
.L2150:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r9
jne .L2150
.L2109:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L2110
or QWORD PTR -8[rsp+rsi], 0
.L2110:
mov r13, rsp
test ecx, ecx
jle .L2114
sal rdx, 3
xor esi, esi
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -80[rbp], r8d
mov DWORD PTR -76[rbp], r10d
call memset@PLT
mov r10d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
mov ecx, DWORD PTR -84[rbp]
.L2114:
test r8d, r8d
jle .L2113
lea rdx, 0[0+rbx*8]
xor esi, esi
mov rdi, r15
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -80[rbp], r8d
mov DWORD PTR -76[rbp], r10d
call memset@PLT
mov r10d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
mov ecx, DWORD PTR -84[rbp]
.L2113:
test r14d, r14d
jle .L2116
mov rdx, QWORD PTR -96[rbp]
xor esi, esi
mov rdi, r13
mov DWORD PTR -84[rbp], ecx
mov DWORD PTR -80[rbp], r8d
sal rdx, 3
mov DWORD PTR -76[rbp], r10d
call memset@PLT
mov r10d, DWORD PTR -76[rbp]
mov r8d, DWORD PTR -80[rbp]
mov ecx, DWORD PTR -84[rbp]
.L2116:
mov esi, DWORD PTR hw[rip+44]
mov eax, DWORD PTR hw[rip+80]
xor r15d, r15d
lea r14, ds[rip+808]
mov ebx, DWORD PTR generic_timer[rip]
lea r9d, [rax+rsi*2]
add ebx, r9d
mov DWORD PTR generic_timer[rip], ebx
test r10d, r10d
jg .L2117
jmp .L2118
.p2align 4,,10
.p2align 3
.L2152:
mov esi, DWORD PTR hw[rip+44]
mov r8d, DWORD PTR ds[rip+1608]
mov ecx, DWORD PTR ds[rip+800]
.L2117:
mov eax, DWORD PTR hw[rip+48]
movsd xmm0, QWORD PTR [r12+r15*8]
mov rdi, r13
lea edx, [rax+rax]
mov eax, DWORD PTR hw[rip+132]
add eax, edx
add edx, DWORD PTR hw[rip+76]
add eax, DWORD PTR hw[rip+104]
lea edx, [rdx+rsi*2]
add eax, DWORD PTR hw[rip+128]
lea rsi, ds[rip]
add edx, ebx
add eax, edx
mov rdx, r14
mov DWORD PTR generic_timer[rip], eax
call generic_timing_double_transposed_direct_form_2
mov rax, QWORD PTR -72[rbp]
movsd xmm1, QWORD PTR ds[rip+1616]
movsd QWORD PTR [rax+r15*8], xmm0
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR generic_timer[rip]
mulsd xmm0, QWORD PTR hw[rip+16]
comisd xmm1, xmm0
jb .L2151
add r15, 1
cmp DWORD PTR X_SIZE_VALUE[rip], r15d
mov DWORD PTR generic_timer[rip], ebx
jg .L2152
.L2118:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2153
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L2144:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L2094
.L2149:
or QWORD PTR -8[rsp+rsi], 0
jmp .L2107
.L2146:
or QWORD PTR -8[rsp+rdx], 0
jmp .L2097
.L2151:
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 89
lea rsi, .LC77[rip]
lea rdi, .LC78[rip]
call __assert_fail@PLT
.L2153:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE135:
.size verify_generic_timing, .-verify_generic_timing
.p2align 4
.globl verify_timing_msp_430
.type verify_timing_msp_430, @function
verify_timing_msp_430:
.LFB136:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rsp
mov r9, rax
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2156
.L2205:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2205
.L2156:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2206
.L2157:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2159
.L2207:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2207
.L2159:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2208
.L2160:
mov r12, rsp
test r9d, r9d
jle .L2161
xor r13d, r13d
.p2align 4,,10
.p2align 3
.L2164:
xor eax, eax
mov QWORD PTR [rbx+r13*8], 0x000000000
call nondet_float@PLT
xor edi, edi
cvtss2sd xmm0, xmm0
comisd xmm0, QWORD PTR impl[rip+16]
movsd QWORD PTR [r12+r13*8], xmm0
jb .L2162
movsd xmm1, QWORD PTR impl[rip+8]
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L2162:
xor eax, eax
add r13, 1
call __ESBMC_assume@PLT
mov r9d, DWORD PTR X_SIZE_VALUE[rip]
cmp r9d, r13d
jg .L2164
.L2161:
movsx rdx, DWORD PTR ds[rip+800]
mov r8d, DWORD PTR ds[rip+1608]
mov rdi, rsp
cmp r8d, edx
lea rax, 15[0+rdx*8]
mov r14d, edx
mov rcx, rdx
cmovge r14d, r8d
mov rsi, rax
and rax, -4096
sub rdi, rax
and rsi, -16
cmp rsp, rdi
je .L2166
.L2209:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L2209
.L2166:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L2167
or QWORD PTR -8[rsp+rsi], 0
.L2167:
movsx rax, r8d
mov r10, rsp
mov rdi, rsp
mov QWORD PTR -88[rbp], rax
lea rax, 15[0+rax*8]
mov rsi, rax
and rax, -4096
sub r10, rax
and rsi, -16
cmp rsp, r10
je .L2169
.L2210:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r10
jne .L2210
.L2169:
and esi, 4095
sub rsp, rsi
test rsi, rsi
jne .L2211
.L2170:
movsx rax, r14d
mov r10, rsp
mov r15, rsp
mov QWORD PTR -96[rbp], rax
lea rax, 15[0+rax*8]
mov rsi, rax
and rax, -4096
sub r10, rax
and rsi, -16
cmp rsp, r10
je .L2172
.L2212:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, r10
jne .L2212
.L2172:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L2173
or QWORD PTR -8[rsp+rsi], 0
.L2173:
mov r13, rsp
test ecx, ecx
jle .L2177
sal rdx, 3
xor esi, esi
mov DWORD PTR -76[rbp], r8d
mov DWORD PTR -72[rbp], ecx
mov DWORD PTR -68[rbp], r9d
call memset@PLT
mov r9d, DWORD PTR -68[rbp]
mov ecx, DWORD PTR -72[rbp]
mov r8d, DWORD PTR -76[rbp]
.L2177:
test r8d, r8d
jle .L2176
mov rdx, QWORD PTR -88[rbp]
xor esi, esi
mov rdi, r15
mov DWORD PTR -76[rbp], r8d
mov DWORD PTR -72[rbp], ecx
sal rdx, 3
mov DWORD PTR -68[rbp], r9d
call memset@PLT
mov r9d, DWORD PTR -68[rbp]
mov ecx, DWORD PTR -72[rbp]
mov r8d, DWORD PTR -76[rbp]
.L2176:
test r14d, r14d
jle .L2179
mov rdx, QWORD PTR -96[rbp]
xor esi, esi
mov rdi, r13
mov DWORD PTR -76[rbp], r8d
mov DWORD PTR -72[rbp], ecx
sal rdx, 3
mov DWORD PTR -68[rbp], r9d
call memset@PLT
mov r9d, DWORD PTR -68[rbp]
mov ecx, DWORD PTR -72[rbp]
mov r8d, DWORD PTR -76[rbp]
.L2179:
xor r14d, r14d
lea r15, ds[rip+808]
test r9d, r9d
jg .L2180
jmp .L2181
.p2align 4,,10
.p2align 3
.L2213:
mov r8d, DWORD PTR ds[rip+1608]
mov ecx, DWORD PTR ds[rip+800]
.L2180:
movsd xmm0, QWORD PTR [r12+r14*8]
mov rdx, r15
lea rsi, ds[rip]
mov rdi, r13
call double_transposed_direct_form_2_MSP430
movsd QWORD PTR [rbx+r14*8], xmm0
add r14, 1
cmp DWORD PTR X_SIZE_VALUE[rip], r14d
jg .L2213
.L2181:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2214
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L2206:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L2157
.L2211:
or QWORD PTR -8[rsp+rsi], 0
jmp .L2170
.L2208:
or QWORD PTR -8[rsp+rdx], 0
jmp .L2160
.L2214:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE136:
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata.str1.8
.align 8
.LC79:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_stability.h"
.align 8
.LC80:
.string "check_stability(_a, ds.a_size)"
.text
.p2align 4
.globl verify_stability
.type verify_stability, @function
verify_stability:
.LFB137:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
movsx rax, DWORD PTR ds[rip+800]
mov rdx, rsp
mov DWORD PTR overflow_mode[rip], 0
lea r11, 15[0+rax*8]
mov r10, rax
mov rcx, r11
mov rax, r11
and rcx, -4096
and rax, -16
sub rdx, rcx
cmp rsp, rdx
je .L2217
.L2246:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2246
.L2217:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L2247
.L2218:
mov rdi, rsp
test r10d, r10d
jle .L2219
lea rcx, ds[rip]
lea eax, -1[r10]
mov rsi, rdi
lea rdx, 8[rcx]
lea r9, [rdx+rax*8]
.p2align 4,,10
.p2align 3
.L2220:
movsd xmm0, QWORD PTR [rcx]
add rcx, 8
add rsi, 8
call fxp_double_to_fxp
mov QWORD PTR -8[rsi], rax
cmp rcx, r9
jne .L2220
mov rax, r11
mov rdx, rsp
and r11, -4096
sub rdx, r11
and rax, -16
cmp rsp, rdx
je .L2225
.L2248:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2248
.L2225:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L2249
.L2226:
movsx rcx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
mov rdx, rsp
mov r8, rdx
movsd xmm1, QWORD PTR [rax+rcx*8]
mov ecx, r10d
xor eax, eax
.p2align 4,,10
.p2align 3
.L2222:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rdi+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rdx+rax*8], xmm0
add rax, 1
cmp rcx, rax
jne .L2222
.L2230:
mov esi, r10d
mov rdi, r8
call check_stability
test eax, eax
je .L2250
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
jne .L2251
leave
.cfi_remember_state
.cfi_def_cfa 7, 8
xor eax, eax
ret
.p2align 4,,10
.p2align 3
.L2247:
.cfi_restore_state
or QWORD PTR -8[rsp+rax], 0
jmp .L2218
.p2align 4,,10
.p2align 3
.L2249:
or QWORD PTR -8[rsp+rax], 0
jmp .L2226
.L2219:
mov rax, r11
mov rdx, rsp
and r11, -4096
sub rdx, r11
and rax, -16
cmp rsp, rdx
je .L2228
.L2252:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2252
.L2228:
and eax, 4095
sub rsp, rax
test rax, rax
je .L2229
or QWORD PTR -8[rsp+rax], 0
.L2229:
mov r8, rsp
jmp .L2230
.L2250:
lea rcx, __PRETTY_FUNCTION__.5[rip]
mov edx, 37
lea rsi, .LC79[rip]
lea rdi, .LC80[rip]
call __assert_fail@PLT
.L2251:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE137:
.size verify_stability, .-verify_stability
.p2align 4
.globl verify_minimum_phase
.type verify_minimum_phase, @function
verify_minimum_phase:
.LFB138:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
sub rsp, 16
mov rax, QWORD PTR fs:40
mov QWORD PTR -8[rbp], rax
xor eax, eax
movsx rax, DWORD PTR ds[rip+1608]
mov rdx, rsp
mov DWORD PTR overflow_mode[rip], 0
lea r11, 15[0+rax*8]
mov r10, rax
mov rcx, r11
mov rax, r11
and rcx, -4096
and rax, -16
sub rdx, rcx
cmp rsp, rdx
je .L2255
.L2284:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2284
.L2255:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L2285
.L2256:
mov rdi, rsp
test r10d, r10d
jle .L2257
lea rcx, ds[rip+808]
lea eax, -1[r10]
mov rsi, rdi
lea rdx, 8[rcx]
lea r9, [rdx+rax*8]
.p2align 4,,10
.p2align 3
.L2258:
movsd xmm0, QWORD PTR [rcx]
add rcx, 8
add rsi, 8
call fxp_double_to_fxp
mov QWORD PTR -8[rsi], rax
cmp rcx, r9
jne .L2258
mov rax, r11
mov rdx, rsp
and r11, -4096
sub rdx, r11
and rax, -16
cmp rsp, rdx
je .L2263
.L2286:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2286
.L2263:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L2287
.L2264:
movsx rcx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
mov rdx, rsp
mov r8, rdx
movsd xmm1, QWORD PTR [rax+rcx*8]
mov ecx, r10d
xor eax, eax
.p2align 4,,10
.p2align 3
.L2260:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rdi+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rdx+rax*8], xmm0
add rax, 1
cmp rcx, rax
jne .L2260
.L2268:
mov esi, r10d
mov rdi, r8
call check_stability
test eax, eax
je .L2288
mov rax, QWORD PTR -8[rbp]
sub rax, QWORD PTR fs:40
jne .L2289
leave
.cfi_remember_state
.cfi_def_cfa 7, 8
xor eax, eax
ret
.p2align 4,,10
.p2align 3
.L2285:
.cfi_restore_state
or QWORD PTR -8[rsp+rax], 0
jmp .L2256
.p2align 4,,10
.p2align 3
.L2287:
or QWORD PTR -8[rsp+rax], 0
jmp .L2264
.L2257:
mov rax, r11
mov rdx, rsp
and r11, -4096
sub rdx, r11
and rax, -16
cmp rsp, rdx
je .L2266
.L2290:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2290
.L2266:
and eax, 4095
sub rsp, rax
test rax, rax
je .L2267
or QWORD PTR -8[rsp+rax], 0
.L2267:
mov r8, rsp
jmp .L2268
.L2288:
call __DSVERIFIER_assert.part.0
.L2289:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE138:
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata.str1.8
.align 8
.LC81:
.string "Verifying stability for closedloop function"
.text
.p2align 4
.globl verify_stability_closedloop_using_dslib
.type verify_stability_closedloop_using_dslib, @function
verify_stability_closedloop_using_dslib:
.LFB139:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 824
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
movsx rax, DWORD PTR controller[rip+1608]
mov rcx, rsp
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2293
.L2325:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2325
.L2293:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2326
.L2294:
mov r11, rsp
mov edx, r8d
lea rdi, controller[rip+808]
mov rsi, r11
call fxp_double_to_fxp_array
movsx rax, DWORD PTR controller[rip+800]
mov rsi, rsp
mov rdx, rax
lea rax, 15[0+rax*8]
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2296
.L2327:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2327
.L2296:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L2328
.L2297:
mov rbx, rsp
lea rdi, controller[rip]
mov rsi, rbx
call fxp_double_to_fxp_array
movsx rdx, DWORD PTR controller[rip+1608]
mov rdi, rsp
lea rax, 15[0+rdx*8]
mov rsi, rdx
mov rcx, rax
and rax, -4096
sub rdi, rax
and rcx, -16
cmp rsp, rdi
je .L2299
.L2329:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L2329
.L2299:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2300
or QWORD PTR -8[rsp+rcx], 0
.L2300:
mov rcx, rsp
test esi, esi
jle .L2301
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2302:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r11+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rdx, rax
jne .L2302
.L2301:
movsx rdx, DWORD PTR controller[rip+800]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov r12, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2304
.L2330:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2330
.L2304:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2305
or QWORD PTR -8[rsp+rcx], 0
.L2305:
mov rcx, rsp
test r12d, r12d
jle .L2306
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2307:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rbx+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rax, rdx
jne .L2307
.L2306:
mov ebx, DWORD PTR plant[rip+800]
mov r13d, DWORD PTR plant[rip+1608]
lea rdi, .LC81[rip]
call puts@PLT
lea r8, plant[rip]
lea rdi, -848[rbp]
lea esi, -1[r12+rbx]
mov r9d, ebx
mov ecx, r13d
lea rdx, 808[r8]
call check_stability_closedloop
test eax, eax
je .L2331
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L2332
lea rsp, -24[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L2326:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L2294
.L2328:
or QWORD PTR -8[rsp+rcx], 0
jmp .L2297
.L2331:
call __DSVERIFIER_assert.part.0
.L2332:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE139:
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.p2align 4
.globl verify_limit_cycle_closed_loop
.type verify_limit_cycle_closed_loop, @function
verify_limit_cycle_closed_loop:
.LFB140:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 1656
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR controller[rip+1608]
mov rcx, rsp
mov DWORD PTR overflow_mode[rip], 3
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2335
.L2436:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2436
.L2335:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2437
.L2336:
mov r11, rsp
mov edx, r8d
lea rdi, controller[rip+808]
mov rsi, r11
call fxp_double_to_fxp_array
movsx rax, DWORD PTR controller[rip+800]
mov rsi, rsp
mov rdx, rax
lea rax, 15[0+rax*8]
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2338
.L2438:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2438
.L2338:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L2439
.L2339:
mov r13, rsp
lea rdi, controller[rip]
mov rsi, r13
call fxp_double_to_fxp_array
movsx rdx, DWORD PTR controller[rip+1608]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov rbx, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2341
.L2440:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2440
.L2341:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2342
or QWORD PTR -8[rsp+rcx], 0
.L2342:
mov rcx, rsp
test ebx, ebx
jle .L2350
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2349:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r11+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rax, rdx
jne .L2349
.L2350:
movsx rdx, DWORD PTR controller[rip+800]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov r12, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2345
.L2441:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2441
.L2345:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2346
or QWORD PTR -8[rsp+rcx], 0
.L2346:
mov rcx, rsp
test r12d, r12d
jle .L2348
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2362:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR 0[r13+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rdx, rax
jne .L2362
.L2348:
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rsp
add ebx, DWORD PTR plant[rip+1608]
add r12d, DWORD PTR plant[rip+800]
lea r13d, -1[rbx]
lea rax, 15[0+rax*8]
sub r12d, 1
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2352
.L2442:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2442
.L2352:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2353
or QWORD PTR -8[rsp+rdx], 0
.L2353:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -1672[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2355
.L2443:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2443
.L2355:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2356
or QWORD PTR -8[rsp+rdx], 0
.L2356:
movsx rax, r13d
mov rcx, rsp
mov r14, rsp
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2358
.L2444:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2444
.L2358:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2359
or QWORD PTR -8[rsp+rdx], 0
.L2359:
xor eax, eax
mov r15, rsp
call nondet_double@PLT
xor edi, edi
comisd xmm0, QWORD PTR impl[rip+16]
jb .L2361
movsd xmm1, QWORD PTR impl[rip+8]
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L2361:
xor eax, eax
movsd QWORD PTR -1680[rbp], xmm0
call __ESBMC_assume@PLT
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
movsd xmm0, QWORD PTR -1680[rbp]
test r8d, r8d
jle .L2367
mov ecx, r8d
mov rax, r14
lea rdx, [r14+rcx*8]
.p2align 4,,10
.p2align 3
.L2366:
movsd QWORD PTR [rax], xmm0
add rax, 8
cmp rdx, rax
jne .L2366
mov rdi, QWORD PTR -1672[rbp]
xor esi, esi
lea rdx, 0[0+rcx*8]
mov DWORD PTR -1688[rbp], r8d
movsd QWORD PTR -1680[rbp], xmm0
call memset@PLT
movsd xmm0, QWORD PTR -1680[rbp]
mov r8d, DWORD PTR -1688[rbp]
.L2367:
cmp r13d, r12d
mov eax, r12d
cmovge eax, r13d
mov DWORD PTR -1680[rbp], eax
cdqe
lea rcx, 0[0+rax*8]
test r13d, r13d
jle .L2445
lea edx, -2[rbx]
mov rax, r15
lea rdx, 8[r15+rdx*8]
.p2align 4,,10
.p2align 3
.L2368:
movsd QWORD PTR [rax], xmm0
add rax, 8
cmp rax, rdx
jne .L2368
lea rax, 15[rcx]
mov rcx, rsp
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2383
.L2446:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2446
.L2383:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2384
or QWORD PTR -8[rsp+rdx], 0
.L2384:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2386
.L2447:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2447
.L2386:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2387
or QWORD PTR -8[rsp+rdx], 0
.L2387:
mov QWORD PTR -1688[rbp], rsp
.L2388:
xor r15d, r15d
.p2align 4,,10
.p2align 3
.L2379:
xor eax, eax
call nondet_int@PLT
pxor xmm0, xmm0
xor edi, edi
cvtsi2sd xmm0, eax
comisd xmm0, QWORD PTR impl[rip+16]
movsd QWORD PTR [rbx+r15*8], xmm0
jb .L2377
movsd xmm1, QWORD PTR impl[rip+8]
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L2377:
xor eax, eax
call __ESBMC_assume@PLT
movsd xmm0, QWORD PTR [rbx+r15*8]
mov rax, QWORD PTR -1688[rbp]
movsd QWORD PTR [rax+r15*8], xmm0
add r15, 1
cmp DWORD PTR -1680[rbp], r15d
jg .L2379
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
.L2376:
test r8d, r8d
jle .L2380
lea rax, -864[rbp]
xor r11d, r11d
lea r15, -1664[rbp]
mov QWORD PTR -1680[rbp], rax
.p2align 4,,10
.p2align 3
.L2381:
movsd xmm0, QWORD PTR [r14+r11*8]
mov r8d, r13d
mov ecx, r12d
mov rdx, r15
mov rsi, QWORD PTR -1680[rbp]
mov rdi, rbx
call double_transposed_direct_form_2
mov rax, QWORD PTR -1672[rbp]
mov r8d, DWORD PTR X_SIZE_VALUE[rip]
movsd QWORD PTR [rax+r11*8], xmm0
add r11, 1
cmp r8d, r11d
jg .L2381
.L2380:
mov rdi, QWORD PTR -1672[rbp]
mov esi, r8d
call double_check_persistent_limit_cycle
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2448
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.p2align 4,,10
.p2align 3
.L2437:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L2336
.L2439:
or QWORD PTR -8[rsp+rcx], 0
jmp .L2339
.p2align 4,,10
.p2align 3
.L2445:
lea rax, 15[rcx]
mov rcx, rsp
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2371
.L2449:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2449
.L2371:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2372
or QWORD PTR -8[rsp+rdx], 0
.L2372:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov rbx, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2374
.L2450:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2450
.L2374:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L2375
or QWORD PTR -8[rsp+rax], 0
.L2375:
mov eax, DWORD PTR -1680[rbp]
mov QWORD PTR -1688[rbp], rsp
test eax, eax
jle .L2376
jmp .L2388
.L2448:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE140:
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.p2align 4
.globl verify_error_closedloop
.type verify_error_closedloop, @function
verify_error_closedloop:
.LFB141:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 3288
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, DWORD PTR controller[rip+1608]
mov rcx, rsp
mov DWORD PTR overflow_mode[rip], 3
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2453
.L2573:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2573
.L2453:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2574
.L2454:
mov r11, rsp
mov edx, r8d
lea rdi, controller[rip+808]
mov rsi, r11
call fxp_double_to_fxp_array
movsx rax, DWORD PTR controller[rip+800]
mov rcx, rsp
mov r8, rax
lea rax, 15[0+rax*8]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2456
.L2575:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2575
.L2456:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L2576
.L2457:
mov r12, rsp
mov edx, r8d
lea rdi, controller[rip]
mov rsi, r12
call fxp_double_to_fxp_array
movsx rdx, DWORD PTR controller[rip+1608]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov r14, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2459
.L2577:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2577
.L2459:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2460
or QWORD PTR -8[rsp+rcx], 0
.L2460:
mov rcx, rsp
test r14d, r14d
jle .L2468
lea rax, scale_factor_inv[rip]
mov rdi, rax
movsx rax, DWORD PTR impl[rip+4]
movsd xmm1, QWORD PTR [rdi+rax*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2467:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r11+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rax, rdx
jne .L2467
.L2468:
movsx rdx, DWORD PTR controller[rip+800]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov rbx, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L2463
.L2578:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L2578
.L2463:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L2464
or QWORD PTR -8[rsp+rcx], 0
.L2464:
mov rcx, rsp
test ebx, ebx
jle .L2466
lea rax, scale_factor_inv[rip]
mov rdi, rax
movsx rax, DWORD PTR impl[rip+4]
movsd xmm1, QWORD PTR [rdi+rax*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L2489:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r12+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rdx, rax
jne .L2489
.L2466:
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
mov rcx, rsp
add r14d, DWORD PTR plant[rip+1608]
add ebx, DWORD PTR plant[rip+800]
mov DWORD PTR -3280[rbp], r14d
lea r12d, -1[r14]
lea rax, 15[0+rax*8]
sub ebx, 1
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2470
.L2579:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2579
.L2470:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2471
or QWORD PTR -8[rsp+rdx], 0
.L2471:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov QWORD PTR -3272[rbp], rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2473
.L2580:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2580
.L2473:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2474
or QWORD PTR -8[rsp+rdx], 0
.L2474:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov QWORD PTR -3288[rbp], rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2476
.L2581:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2581
.L2476:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2477
or QWORD PTR -8[rsp+rdx], 0
.L2477:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov r14, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2479
.L2582:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2582
.L2479:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L2480
or QWORD PTR -8[rsp+rax], 0
.L2480:
movsx rax, r12d
mov rcx, rsp
mov r13, rsp
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2482
.L2583:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2583
.L2482:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2483
or QWORD PTR -8[rsp+rdx], 0
.L2483:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov r15, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2485
.L2584:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2584
.L2485:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L2486
or QWORD PTR -8[rsp+rax], 0
.L2486:
mov rcx, rsp
xor eax, eax
mov QWORD PTR -3296[rbp], rcx
call nondet_double@PLT
xor edi, edi
comisd xmm0, QWORD PTR impl[rip+16]
mov rcx, QWORD PTR -3296[rbp]
jb .L2488
movsd xmm1, QWORD PTR impl[rip+8]
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L2488:
xor eax, eax
mov QWORD PTR -3304[rbp], rcx
movsd QWORD PTR -3296[rbp], xmm0
call __ESBMC_assume@PLT
movsx rax, DWORD PTR X_SIZE_VALUE[rip]
xor edx, edx
movsd xmm0, QWORD PTR -3296[rbp]
mov rcx, QWORD PTR -3304[rbp]
test eax, eax
mov r8, rax
jle .L2494
.p2align 4,,10
.p2align 3
.L2493:
movsd QWORD PTR [r14+rdx*8], xmm0
movsd QWORD PTR 0[r13+rdx*8], xmm0
add rdx, 1
cmp rdx, rax
jne .L2493
mov rdi, QWORD PTR -3288[rbp]
sal rdx, 3
xor esi, esi
mov DWORD PTR -3312[rbp], r8d
mov QWORD PTR -3304[rbp], rcx
movsd QWORD PTR -3320[rbp], xmm0
mov QWORD PTR -3296[rbp], rdx
call memset@PLT
mov rdx, QWORD PTR -3296[rbp]
mov rdi, QWORD PTR -3272[rbp]
xor esi, esi
call memset@PLT
mov rcx, QWORD PTR -3304[rbp]
mov r8d, DWORD PTR -3312[rbp]
movsd xmm0, QWORD PTR -3320[rbp]
.L2494:
cmp ebx, r12d
mov edi, r12d
cmovge edi, ebx
movsx rax, edi
lea r10, 0[0+rax*8]
mov eax, DWORD PTR -3280[rbp]
lea esi, -2[rax]
xor eax, eax
test r12d, r12d
jle .L2585
.p2align 4,,10
.p2align 3
.L2495:
mov rdx, rax
movsd QWORD PTR [r15+rax*8], xmm0
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rdx, rsi
jne .L2495
lea rax, 15[r10]
mov rcx, rsp
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L2510
.L2586:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2586
.L2510:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2511
or QWORD PTR -8[rsp+rdx], 0
.L2511:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -3280[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2513
.L2587:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2587
.L2513:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L2514
or QWORD PTR -8[rsp+rdx], 0
.L2514:
mov r15, rsp
.L2515:
lea eax, -1[rdi]
test edi, edi
mov rdi, QWORD PTR -3280[rbp]
mov DWORD PTR -3304[rbp], r8d
lea rdx, 8[0+rax*8]
mov eax, 8
cmovle rdx, rax
xor esi, esi
mov QWORD PTR -3296[rbp], rdx
call memset@PLT
mov rdx, QWORD PTR -3296[rbp]
xor esi, esi
mov rdi, r15
call memset@PLT
mov r8d, DWORD PTR -3304[rbp]
.L2503:
test r8d, r8d
jle .L2504
lea rax, scale_factor_inv[rip]
xor r11d, r11d
movq xmm5, QWORD PTR .LC8[rip]
mov QWORD PTR -3320[rbp], rax
lea rax, -2464[rbp]
mov QWORD PTR -3328[rbp], rax
lea rax, -1664[rbp]
mov QWORD PTR -3312[rbp], rax
lea rax, -3264[rbp]
mov QWORD PTR -3304[rbp], rax
lea rax, -864[rbp]
mov QWORD PTR -3296[rbp], rax
mov rax, r11
mov r11d, r12d
mov r12, rax
.p2align 4,,10
.p2align 3
.L2508:
mov rdx, QWORD PTR -3328[rbp]
mov rsi, QWORD PTR -3312[rbp]
mov r8d, r11d
mov ecx, ebx
mov rdi, QWORD PTR -3280[rbp]
movsd xmm0, QWORD PTR [r14+r12*8]
call double_transposed_direct_form_2
mov r8d, r11d
mov ecx, ebx
mov rdi, r15
mov rax, QWORD PTR -3272[rbp]
mov rdx, QWORD PTR -3304[rbp]
movapd xmm4, xmm0
mov rsi, QWORD PTR -3296[rbp]
movsd QWORD PTR [rax+r12*8], xmm0
movsd xmm0, QWORD PTR 0[r13+r12*8]
call double_transposed_direct_form_2
cvttsd2si rdx, xmm4
mov rax, QWORD PTR -3288[rbp]
pxor xmm1, xmm1
movsd QWORD PTR [rax+r12*8], xmm0
mov rax, QWORD PTR -3320[rbp]
cvtsi2sd xmm1, edx
movsx rdx, DWORD PTR impl[rip+4]
mulsd xmm1, QWORD PTR [rax+rdx*8]
subsd xmm0, xmm1
movsd xmm1, QWORD PTR impl[rip+48]
comisd xmm1, xmm0
ja .L2588
.L2505:
lea rcx, __PRETTY_FUNCTION__.21[rip]
mov edx, 36
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.p2align 4,,10
.p2align 3
.L2574:
or QWORD PTR -8[rsp+rdx], 0
jmp .L2454
.L2576:
or QWORD PTR -8[rsp+rdx], 0
jmp .L2457
.p2align 4,,10
.p2align 3
.L2588:
xorpd xmm1, xmm5
comisd xmm0, xmm1
jbe .L2505
add r12, 1
cmp DWORD PTR X_SIZE_VALUE[rip], r12d
jg .L2508
.L2504:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L2589
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L2585:
.cfi_restore_state
lea rax, 15[r10]
mov rdx, rsp
mov rcx, rax
mov rsi, rax
and rcx, -4096
and rsi, -16
sub rdx, rcx
cmp rsp, rdx
je .L2498
.L2590:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L2590
.L2498:
and esi, 4095
sub rsp, rsi
test rsi, rsi
je .L2499
or QWORD PTR -8[rsp+rsi], 0
.L2499:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov QWORD PTR -3280[rbp], rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L2501
.L2591:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L2591
.L2501:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L2502
or QWORD PTR -8[rsp+rax], 0
.L2502:
mov r15, rsp
test edi, edi
jle .L2503
jmp .L2515
.L2589:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE141:
.size verify_error_closedloop, .-verify_error_closedloop
.p2align 4
.globl ss_system_quantization_error
.type ss_system_quantization_error, @function
ss_system_quantization_error:
.LFB142:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pxor xmm2, xmm2
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
cvtsi2sd xmm2, rdi
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 1096
.cfi_def_cfa_offset 1152
mov r12d, DWORD PTR nStates[rip]
mov r13d, DWORD PTR nInputs[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 1080[rsp], rax
xor eax, eax
movsd QWORD PTR 8[rsp], xmm2
movsd QWORD PTR _controller[rip+768], xmm2
test r12d, r12d
jle .L2593
mov r14d, r12d
xor r15d, r15d
lea rbx, 32[rsp]
mov rax, r14
lea rbp, _controller[rip]
sal r14, 3
sal rax, 5
mov QWORD PTR [rsp], rax
.L2594:
lea rdi, [rbx+r15]
lea rsi, 0[rbp+r15]
mov rdx, r14
add r15, 32
call memcpy@PLT
cmp r15, QWORD PTR [rsp]
jne .L2594
lea eax, -1[r13]
lea r14d, 4[r12]
mov DWORD PTR 16[rsp], eax
sal r14, 5
lea r15, 8[0+rax*8]
mov QWORD PTR [rsp], r14
mov r14d, 128
.L2595:
test r13d, r13d
jle .L2598
lea rdi, [rbx+r14]
lea rsi, 0[rbp+r14]
mov rdx, r15
call memcpy@PLT
.L2598:
add r14, 32
cmp r14, QWORD PTR [rsp]
jne .L2595
mov r14d, DWORD PTR nOutputs[rip]
test r14d, r14d
jle .L2606
.L2651:
lea ebx, 8[r14]
lea eax, -1[r12]
mov ebp, 256
sal rbx, 5
lea r15, 8[0+rax*8]
.L2599:
test r12d, r12d
jle .L2602
lea rax, _controller[rip]
lea rdi, 32[rsp+rbp]
mov rdx, r15
lea rsi, [rax+rbp]
call memcpy@PLT
.L2602:
add rbp, 32
cmp rbp, rbx
jne .L2599
mov eax, DWORD PTR 16[rsp]
lea ebx, 12[r14]
mov ebp, 384
sal rbx, 5
lea r15, 8[0+rax*8]
.L2600:
test r13d, r13d
jle .L2605
lea rax, _controller[rip]
lea rdi, 32[rsp+rbp]
mov rdx, r15
lea rsi, [rax+rbp]
call memcpy@PLT
.L2605:
add rbp, 32
cmp rbp, rbx
jne .L2600
lea rbx, 32[rsp]
lea rbp, _controller[rip]
test r12d, r12d
jg .L2606
test r13d, r13d
jg .L2652
.L2612:
lea edx, 20[r14]
mov eax, 640
lea rbx, 32[rsp]
sal rdx, 5
lea rbp, _controller[rip]
.L2617:
movsd xmm0, QWORD PTR 0[rbp+rax]
movsd QWORD PTR [rbx+rax], xmm0
add rax, 32
cmp rax, rdx
jne .L2617
.L2613:
test r12d, r12d
jg .L2614
.L2619:
call double_state_space_representation
mov r12d, DWORD PTR nStates[rip]
movsd QWORD PTR 16[rsp], xmm0
test r12d, r12d
jg .L2684
mov r13d, DWORD PTR nInputs[rip]
movsd xmm4, QWORD PTR 8[rsp]
lea rbx, 32[rsp]
lea rbp, _controller[rip]
mov eax, DWORD PTR nOutputs[rip]
movsd QWORD PTR 800[rsp], xmm4
lea ecx, -1[r13]
mov DWORD PTR 8[rsp], eax
mov DWORD PTR 28[rsp], ecx
test eax, eax
jle .L2685
.L2650:
mov eax, DWORD PTR 8[rsp]
mov r14d, 256
add eax, 8
sal rax, 5
mov QWORD PTR [rsp], rax
lea eax, -1[r12]
lea r15, 8[0+rax*8]
.L2627:
test r12d, r12d
jle .L2630
lea rdi, 0[rbp+r14]
lea rsi, [rbx+r14]
mov rdx, r15
call memcpy@PLT
.L2630:
add r14, 32
cmp r14, QWORD PTR [rsp]
jne .L2627
mov eax, DWORD PTR 8[rsp]
mov r14d, 384
add eax, 12
sal rax, 5
mov QWORD PTR [rsp], rax
mov eax, DWORD PTR 28[rsp]
lea r15, 8[0+rax*8]
.L2628:
test r13d, r13d
jle .L2633
lea rdi, 0[rbp+r14]
lea rsi, [rbx+r14]
mov rdx, r15
call memcpy@PLT
.L2633:
add r14, 32
cmp QWORD PTR [rsp], r14
jne .L2628
test r12d, r12d
jg .L2634
test r13d, r13d
jg .L2636
.L2640:
mov eax, DWORD PTR 8[rsp]
lea edx, 20[rax]
mov eax, 640
sal rdx, 5
.L2646:
movsd xmm0, QWORD PTR [rbx+rax]
movsd QWORD PTR 0[rbp+rax], xmm0
add rax, 32
cmp rdx, rax
jne .L2646
.L2641:
test r12d, r12d
jg .L2643
.L2648:
call fxp_state_space_representation
movsx rax, DWORD PTR nStates[rip]
movapd xmm1, xmm0
test eax, eax
jg .L2686
.L2645:
movsd xmm0, QWORD PTR 16[rsp]
subsd xmm0, xmm1
mov rax, QWORD PTR 1080[rsp]
sub rax, QWORD PTR fs:40
jne .L2687
add rsp, 1096
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L2606:
.cfi_restore_state
lea edx, 16[r12]
mov eax, 512
sal rdx, 5
.L2610:
movsd xmm0, QWORD PTR 0[rbp+rax]
movsd QWORD PTR [rbx+rax], xmm0
add rax, 32
cmp rax, rdx
jne .L2610
test r13d, r13d
jle .L2608
.p2align 4,,10
.p2align 3
.L2652:
mov edx, DWORD PTR 16[rsp]
movsd xmm0, QWORD PTR 8[rsp]
xor eax, eax
lea rcx, 800[rsp]
lea rsi, _controller[rip+800]
sal rdx, 5
.L2609:
movsd QWORD PTR [rcx+rax], xmm0
cmp rax, rdx
jne .L2688
.L2608:
test r14d, r14d
jg .L2612
test r12d, r12d
jle .L2619
.L2614:
movsx r12, r12d
xor eax, eax
lea rdx, _controller[rip+512]
sal r12, 5
lea rcx, new_state[rip]
.L2618:
movsd xmm0, QWORD PTR [rcx+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 32
cmp rax, r12
je .L2619
jmp .L2618
.p2align 4,,10
.p2align 3
.L2684:
mov r14d, r12d
xor eax, eax
lea rdx, _controller[rip+512]
mov r13, r14
lea rcx, new_state[rip]
sal r13, 5
.L2620:
movsd xmm0, QWORD PTR [rdx+rax]
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp rax, r13
jne .L2620
movsd xmm3, QWORD PTR 8[rsp]
sal r14, 3
xor r15d, r15d
lea rbx, 32[rsp]
lea rbp, _controller[rip]
movsd QWORD PTR 800[rsp], xmm3
.L2622:
lea rdi, 0[rbp+r15]
lea rsi, [rbx+r15]
mov rdx, r14
add r15, 32
call memcpy@PLT
cmp r15, r13
jne .L2622
mov r13d, DWORD PTR nInputs[rip]
lea r14d, 4[r12]
sal r14, 5
lea eax, -1[r13]
mov QWORD PTR [rsp], r14
mov r14d, 128
mov DWORD PTR 28[rsp], eax
lea r15, 8[0+rax*8]
.L2623:
test r13d, r13d
jle .L2626
lea rdi, 0[rbp+r14]
lea rsi, [rbx+r14]
mov rdx, r15
call memcpy@PLT
.L2626:
add r14, 32
cmp r14, QWORD PTR [rsp]
jne .L2623
mov eax, DWORD PTR nOutputs[rip]
mov DWORD PTR 8[rsp], eax
test eax, eax
jg .L2650
.L2634:
lea edx, 16[r12]
mov eax, 512
sal rdx, 5
.L2638:
movsd xmm0, QWORD PTR [rbx+rax]
movsd QWORD PTR 0[rbp+rax], xmm0
add rax, 32
cmp rdx, rax
jne .L2638
test r13d, r13d
jg .L2636
.L2637:
mov eax, DWORD PTR 8[rsp]
test eax, eax
jg .L2640
test r12d, r12d
jle .L2648
.L2643:
movsx r12, r12d
xor eax, eax
lea rdx, _controller[rip+512]
sal r12, 5
lea rsi, new_stateFWL[rip]
.L2647:
movsd xmm0, QWORD PTR [rsi+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 32
cmp r12, rax
je .L2648
jmp .L2647
.p2align 4,,10
.p2align 3
.L2686:
sal rax, 5
xor ecx, ecx
lea rdx, _controller[rip+512]
lea rsi, new_stateFWL[rip]
.L2649:
movsd xmm0, QWORD PTR [rdx+rcx]
movsd QWORD PTR [rsi+rcx], xmm0
add rcx, 32
cmp rcx, rax
je .L2645
jmp .L2649
.L2685:
test r13d, r13d
jle .L2641
.p2align 4,,10
.p2align 3
.L2636:
lea edx, 24[r13]
mov eax, 768
sal rdx, 5
.L2642:
movsd xmm0, QWORD PTR [rbx+rax]
movsd QWORD PTR 0[rbp+rax], xmm0
add rax, 32
cmp rax, rdx
je .L2637
jmp .L2642
.p2align 4,,10
.p2align 3
.L2593:
mov r14d, DWORD PTR nOutputs[rip]
lea eax, -1[r13]
mov DWORD PTR 16[rsp], eax
test r14d, r14d
jg .L2651
test r13d, r13d
jle .L2613
jmp .L2652
.p2align 4,,10
.p2align 3
.L2688:
movsd xmm0, QWORD PTR [rsi+rax]
add rax, 32
jmp .L2609
.L2687:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE142:
.size ss_system_quantization_error, .-ss_system_quantization_error
.p2align 4
.globl fxp_ss_closed_loop_quantization_error
.type fxp_ss_closed_loop_quantization_error, @function
fxp_ss_closed_loop_quantization_error:
.LFB143:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movapd xmm1, xmm0
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 1064
.cfi_def_cfa_offset 1120
mov edi, DWORD PTR nOutputs[rip]
mov esi, DWORD PTR nInputs[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 1048[rsp], rax
xor eax, eax
test edi, edi
je .L2690
lea rdx, _controller_fxp[rip]
lea ecx, -1[rdi]
pxor xmm0, xmm0
xor r8d, r8d
sal rcx, 5
lea rax, 32[rdx]
add rcx, rax
.p2align 4,,10
.p2align 3
.L2691:
xor eax, eax
test esi, esi
je .L2696
.L2694:
ucomisd xmm0, QWORD PTR 384[rdx+rax*8]
jp .L2745
comisd xmm0, QWORD PTR 384[rdx+rax*8]
je .L2692
.L2745:
mov r8d, 1
.L2692:
add rax, 1
cmp esi, eax
ja .L2694
.L2696:
add rdx, 32
cmp rdx, rcx
jne .L2691
mov WORD PTR 14[rsp], r8w
.L2695:
lea r15, 16[rsp]
lea r10, 400[rsp]
mov r8, r15
mov rax, r10
lea rcx, 528[rsp]
mov rdx, r15
.L2697:
mov QWORD PTR [rax], 0
add rax, 32
add rdx, 32
mov QWORD PTR -32[rdx], 0x000000000
mov QWORD PTR -24[rax], 0
mov QWORD PTR -16[rax], 0
mov QWORD PTR -8[rax], 0
cmp rax, rcx
jne .L2697
test esi, esi
je .L2702
lea edx, -1[rsi]
lea rax, 32[r15]
movsd QWORD PTR [r8], xmm1
sal rdx, 5
mov r8, rax
add rdx, rax
cmp rax, rdx
je .L2702
.L2776:
add rax, 32
movsd QWORD PTR [r8], xmm1
mov r8, rax
cmp rax, rdx
jne .L2776
.L2702:
mov esi, DWORD PTR nStates[rip]
xor r9d, r9d
mov QWORD PTR 528[rsp], 0
lea r11, _controller_fxp[rip+896]
mov QWORD PTR 560[rsp], 0
mov QWORD PTR 592[rsp], 0
mov QWORD PTR 624[rsp], 0
test esi, esi
je .L2700
.L2699:
movsd xmm0, QWORD PTR [r11+r9*8]
call fxp_double_to_fxp
mov QWORD PTR [r10+r9*8], rax
add r9, 1
cmp esi, r9d
ja .L2699
.L2700:
lea rbx, 272[rsp]
lea r12, 144[rsp]
mov QWORD PTR [rsp], rbx
mov rbp, r12
mov rdx, rbx
mov rax, r12
.L2703:
mov QWORD PTR [rax], 0x000000000
add rax, 32
add rdx, 32
mov QWORD PTR -32[rdx], 0x000000000
mov QWORD PTR -24[rax], 0x000000000
mov QWORD PTR -24[rdx], 0x000000000
mov QWORD PTR -16[rax], 0x000000000
mov QWORD PTR -16[rdx], 0x000000000
mov QWORD PTR -8[rax], 0x000000000
mov QWORD PTR -8[rdx], 0x000000000
cmp rax, rbx
jne .L2703
mov r11d, esi
xor r13d, r13d
lea r9, _controller_fxp[rip+512]
sal r11, 5
test esi, esi
je .L2708
.L2707:
movsd xmm0, QWORD PTR [r9+r13]
call fxp_double_to_fxp
mov QWORD PTR [rcx+r13], rax
add r13, 32
cmp r13, r11
jne .L2707
.L2708:
lea r13, 656[rsp]
mov r8, rcx
mov edx, 1
mov rcx, r10
mov r9, r13
call fxp_matrix_multiplication.part.0
mov r10d, DWORD PTR nInputs[rip]
test r10d, r10d
je .L2706
mov r9d, r10d
xor r14d, r14d
lea r11, 784[rsp]
sal r9, 5
.L2709:
cvttsd2si rdi, QWORD PTR [r15+r14]
pxor xmm0, xmm0
call fxp_quantize
cvtsi2sd xmm0, rax
call fxp_double_to_fxp
mov QWORD PTR [r11+r14], rax
add r14, 32
cmp r14, r9
jne .L2709
xor r14d, r14d
lea r15, 912[rsp]
.p2align 4,,10
.p2align 3
.L2710:
mov rdi, QWORD PTR [r11+r14]
sub rdi, QWORD PTR 0[r13+r14]
call fxp_quantize
mov QWORD PTR [r15+r14], rax
add r14, 32
cmp r14, r9
jne .L2710
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
xor r13d, r13d
lea r11, _controller_fxp[rip+768]
movsd xmm1, QWORD PTR [rax+rdx*8]
.L2711:
mov rdi, QWORD PTR [r15+r13]
pxor xmm0, xmm0
call fxp_quantize
cvtsi2sd xmm0, eax
mulsd xmm0, xmm1
movsd QWORD PTR [r11+r13], xmm0
add r13, 32
cmp r13, r9
jne .L2711
.L2706:
mov r11d, DWORD PTR nOutputs[rip]
mov edi, DWORD PTR nStates[rip]
test r11d, r11d
je .L2713
lea eax, -1[r11]
mov r15, rax
sal rax, 5
lea r8, 32[r12+rax]
mov rax, r12
.p2align 4,,10
.p2align 3
.L2738:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rax, r8
jne .L2738
lea r13, _controller_fxp[rip]
lea r9d, -1[rdi]
mov rsi, r12
lea rax, 264[r13]
lea rcx, [rax+r9*8]
not r9
sal r9, 3
.p2align 4,,10
.p2align 3
.L2739:
test edi, edi
je .L2717
movsd xmm1, QWORD PTR [rsi]
lea rax, [r9+rcx]
mov rdx, r13
.p2align 4,,10
.p2align 3
.L2714:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L2714
movsd QWORD PTR [rsi], xmm1
.L2717:
add rsi, 32
add rcx, 32
cmp rsi, r8
jne .L2739
cmp WORD PTR 14[rsp], 1
je .L2777
.L2721:
xor eax, eax
xor edx, edx
lea rcx, _controller_fxp[rip+640]
.p2align 4,,10
.p2align 3
.L2735:
movsd xmm0, QWORD PTR [r12+rax]
addsd xmm0, QWORD PTR [rbx+rax]
add edx, 1
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp r11d, edx
ja .L2735
.L2713:
test edi, edi
je .L2719
lea edx, -1[rdi]
lea rsi, 32[r12]
mov rax, r12
mov r9, rdx
sal r9, 5
lea r11, [rsi+r9]
.p2align 4,,10
.p2align 3
.L2733:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r11, rax
jne .L2733
mov edi, edi
lea r8, _controller_fxp[rip]
mov r13, rdi
lea rax, 8[r8]
neg r13
lea rcx, [rax+rdx*8]
sal r13, 3
.p2align 4,,10
.p2align 3
.L2734:
movsd xmm1, QWORD PTR 0[rbp]
lea rax, 0[r13+rcx]
mov rdx, r8
.p2align 4,,10
.p2align 3
.L2724:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2724
movsd QWORD PTR 0[rbp], xmm1
add rcx, 32
mov rbp, rsi
cmp rsi, r11
je .L2725
add rsi, 32
jmp .L2734
.L2727:
mov rdx, QWORD PTR [rsp]
sal rdi, 5
xor eax, eax
lea r9, _controller_fxp[rip+512]
.p2align 4,,10
.p2align 3
.L2730:
movsd xmm0, QWORD PTR [r12+rax]
addsd xmm0, QWORD PTR [rdx+rax]
movsd QWORD PTR [r9+rax], xmm0
add rax, 32
cmp rdi, rax
jne .L2730
.L2719:
movsd xmm0, QWORD PTR _controller_fxp[rip+640]
mov rax, QWORD PTR 1048[rsp]
sub rax, QWORD PTR fs:40
jne .L2778
add rsp, 1064
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L2725:
.cfi_restore_state
lea rsi, 32[rbx]
mov rax, rbx
add r9, rsi
.p2align 4,,10
.p2align 3
.L2731:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r9, rax
jne .L2731
lea r11d, -1[r10]
lea rax, _controller_fxp[rip+136]
lea rcx, [rax+r11*8]
not r11
sal r11, 3
.p2align 4,,10
.p2align 3
.L2732:
test r10d, r10d
je .L2729
movsd xmm1, QWORD PTR [rbx]
lea rax, [r11+rcx]
mov rdx, r8
.p2align 4,,10
.p2align 3
.L2726:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2726
movsd QWORD PTR [rbx], xmm1
.L2729:
mov rbx, rsi
add rcx, 32
cmp r9, rsi
je .L2727
add rsi, 32
jmp .L2732
.L2690:
xor eax, eax
mov WORD PTR 14[rsp], ax
jmp .L2695
.L2777:
mov eax, r15d
sal rax, 5
lea r8, 32[rbx+rax]
mov rax, rbx
.p2align 4,,10
.p2align 3
.L2736:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r8, rax
jne .L2736
lea eax, -1[r10]
lea rdx, _controller_fxp[rip+392]
mov rsi, rbx
lea rcx, [rdx+rax*8]
not rax
lea r9, 0[0+rax*8]
.p2align 4,,10
.p2align 3
.L2737:
test r10d, r10d
je .L2723
movsd xmm1, QWORD PTR [rsi]
lea rax, [r9+rcx]
mov rdx, r13
.p2align 4,,10
.p2align 3
.L2720:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2720
movsd QWORD PTR [rsi], xmm1
.L2723:
add rsi, 32
add rcx, 32
cmp r8, rsi
jne .L2737
jmp .L2721
.L2778:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE143:
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.p2align 4
.globl ss_closed_loop_quantization_error
.type ss_closed_loop_quantization_error, @function
ss_closed_loop_quantization_error:
.LFB144:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movapd xmm1, xmm0
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 424
.cfi_def_cfa_offset 480
mov r13d, DWORD PTR nOutputs[rip]
mov r9d, DWORD PTR nInputs[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 408[rsp], rax
xor eax, eax
test r13d, r13d
je .L2832
lea rdx, _controller_double[rip]
lea ecx, -1[r13]
pxor xmm0, xmm0
xor r14d, r14d
sal rcx, 5
lea rax, 32[rdx]
add rcx, rax
.p2align 4,,10
.p2align 3
.L2781:
xor eax, eax
test r9d, r9d
je .L2785
.L2784:
ucomisd xmm0, QWORD PTR 384[rdx+rax*8]
jp .L2834
comisd xmm0, QWORD PTR 384[rdx+rax*8]
je .L2782
.L2834:
mov r14d, 1
.L2782:
add rax, 1
cmp r9d, eax
ja .L2784
.L2785:
add rdx, 32
cmp rdx, rcx
jne .L2781
.L2780:
test r9d, r9d
jne .L2863
.L2786:
lea r10, 144[rsp]
lea rsi, 272[rsp]
mov rbx, r10
mov r15, rsi
mov rdx, rsi
mov rax, r10
.L2788:
mov QWORD PTR [rax], 0x000000000
add rax, 32
add rdx, 32
mov QWORD PTR -32[rdx], 0x000000000
mov QWORD PTR -24[rax], 0x000000000
mov QWORD PTR -24[rdx], 0x000000000
mov QWORD PTR -16[rax], 0x000000000
mov QWORD PTR -16[rdx], 0x000000000
mov QWORD PTR -8[rax], 0x000000000
mov QWORD PTR -8[rdx], 0x000000000
cmp rax, rsi
jne .L2788
mov r11d, DWORD PTR nStates[rip]
test r13d, r13d
je .L2864
lea ebp, -1[r13]
lea r8, 32[r10]
mov rax, r10
mov DWORD PTR [rsp], ebp
sal rbp, 5
add rbp, r8
.p2align 4,,10
.p2align 3
.L2827:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rax, rbp
jne .L2827
lea r12, _controller_double[rip]
lea eax, -1[r11]
mov QWORD PTR 8[rsp], rbx
mov rdi, r10
lea rdx, 904[r12]
mov DWORD PTR 4[rsp], eax
lea rcx, [rdx+rax*8]
not rax
sal rax, 3
mov rbx, rax
.p2align 4,,10
.p2align 3
.L2828:
test r11d, r11d
je .L2794
movsd xmm1, QWORD PTR [rdi]
lea rax, [rbx+rcx]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L2791:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L2791
movsd QWORD PTR [rdi], xmm1
.L2794:
add rdi, 32
add rcx, 32
cmp rdi, rbp
jne .L2828
mov rbx, QWORD PTR 8[rsp]
test r9d, r9d
je .L2797
.L2795:
mov edx, r9d
xor eax, eax
lea rdi, 16[rsp]
sal rdx, 5
lea rcx, _controller_double[rip+768]
.p2align 4,,10
.p2align 3
.L2825:
movsd xmm0, QWORD PTR [rdi+rax]
subsd xmm0, QWORD PTR [r10+rax]
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp rax, rdx
jne .L2825
test r13d, r13d
je .L2808
lea eax, -1[r13]
lea r12, _controller_double[rip]
mov DWORD PTR [rsp], eax
lea eax, -1[r11]
lea r8, 32[r10]
mov DWORD PTR 4[rsp], eax
.L2797:
mov eax, DWORD PTR [rsp]
sal rax, 5
add r8, rax
mov rax, r10
.p2align 4,,10
.p2align 3
.L2823:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rax, r8
jne .L2823
mov ebp, DWORD PTR 4[rsp]
lea rax, _controller_double[rip+264]
mov rdi, r10
lea rcx, [rax+rbp*8]
not rbp
sal rbp, 3
.p2align 4,,10
.p2align 3
.L2824:
test r11d, r11d
je .L2801
movsd xmm1, QWORD PTR [rdi]
lea rax, 0[rbp+rcx]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L2798:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rax, rcx
jne .L2798
movsd QWORD PTR [rdi], xmm1
.L2801:
add rdi, 32
add rcx, 32
cmp rdi, r8
jne .L2824
cmp r14w, 1
je .L2865
test r13d, r13d
je .L2808
.L2805:
xor eax, eax
xor edx, edx
lea rcx, _controller_double[rip+640]
.p2align 4,,10
.p2align 3
.L2820:
movsd xmm0, QWORD PTR [r10+rax]
addsd xmm0, QWORD PTR [rsi+rax]
add edx, 1
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp edx, r13d
jb .L2820
.L2808:
test r11d, r11d
je .L2803
lea edx, -1[r11]
lea r8, 32[r10]
mov rax, r10
mov rbp, rdx
sal rbp, 5
lea r12, [r8+rbp]
.p2align 4,,10
.p2align 3
.L2818:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r12, rax
jne .L2818
mov r11d, r11d
lea rdi, _controller_double[rip]
mov r13, r11
lea rax, 8[rdi]
neg r13
lea rcx, [rax+rdx*8]
sal r13, 3
.p2align 4,,10
.p2align 3
.L2819:
movsd xmm1, QWORD PTR [rbx]
lea rax, 0[r13+rcx]
mov rdx, rdi
.p2align 4,,10
.p2align 3
.L2809:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 512[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2809
movsd QWORD PTR [rbx], xmm1
add rcx, 32
mov rbx, r8
cmp r8, r12
je .L2810
add r8, 32
jmp .L2819
.L2812:
sal r11, 5
xor eax, eax
lea rdx, _controller_double[rip+512]
.p2align 4,,10
.p2align 3
.L2815:
movsd xmm0, QWORD PTR [r10+rax]
addsd xmm0, QWORD PTR [r15+rax]
movsd QWORD PTR [rdx+rax], xmm0
add rax, 32
cmp r11, rax
jne .L2815
.L2803:
movsd xmm0, QWORD PTR _controller_double[rip+640]
mov rax, QWORD PTR 408[rsp]
sub rax, QWORD PTR fs:40
jne .L2866
add rsp, 424
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L2810:
.cfi_restore_state
lea r8, 32[rsi]
mov rax, rsi
add rbp, r8
.p2align 4,,10
.p2align 3
.L2816:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp rbp, rax
jne .L2816
lea ebx, -1[r9]
lea rax, _controller_double[rip+136]
lea rcx, [rax+rbx*8]
not rbx
sal rbx, 3
.p2align 4,,10
.p2align 3
.L2817:
test r9d, r9d
je .L2814
movsd xmm1, QWORD PTR [rsi]
lea rax, [rbx+rcx]
mov rdx, rdi
.p2align 4,,10
.p2align 3
.L2811:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2811
movsd QWORD PTR [rsi], xmm1
.L2814:
mov rsi, r8
add rcx, 32
cmp rbp, r8
je .L2812
add r8, 32
jmp .L2817
.L2863:
lea edx, -1[r9]
lea rax, 16[rsp]
sal rdx, 5
lea rdx, 48[rsp+rdx]
.L2787:
movsd QWORD PTR [rax], xmm1
add rax, 32
cmp rax, rdx
je .L2786
jmp .L2787
.L2832:
xor r14d, r14d
jmp .L2780
.L2865:
mov eax, DWORD PTR [rsp]
sal rax, 5
lea r8, 32[rsi+rax]
mov rax, rsi
.p2align 4,,10
.p2align 3
.L2821:
mov QWORD PTR [rax], 0x000000000
add rax, 32
cmp r8, rax
jne .L2821
lea eax, -1[r9]
lea rdx, _controller_double[rip+392]
mov rdi, rsi
lea rcx, [rdx+rax*8]
not rax
lea rbp, 0[0+rax*8]
.p2align 4,,10
.p2align 3
.L2822:
test r9d, r9d
je .L2807
movsd xmm1, QWORD PTR [rdi]
lea rax, 0[rbp+rcx]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L2804:
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, QWORD PTR 768[rdx]
add rax, 8
add rdx, 32
addsd xmm1, xmm0
cmp rcx, rax
jne .L2804
movsd QWORD PTR [rdi], xmm1
.L2807:
add rdi, 32
add rcx, 32
cmp r8, rdi
jne .L2822
jmp .L2805
.L2864:
test r9d, r9d
jne .L2795
jmp .L2808
.L2866:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE144:
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.p2align 4
.globl verify_error_state_space
.type verify_error_state_space, @function
verify_error_state_space:
.LFB145:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
movsx rax, DWORD PTR nStates[rip]
test eax, eax
jg .L2879
.L2868:
movsd xmm0, QWORD PTR impl[rip+16]
lea rdi, _controller_fxp[rip]
mov DWORD PTR overflow_mode[rip], 0
lea rsi, _controller[rip]
mov ecx, 130
rep movsq
lea rdi, _controller_double[rip]
lea rsi, _controller[rip]
mov ecx, 130
rep movsq
call fxp_double_to_fxp
movsd xmm0, QWORD PTR impl[rip+8]
mov rbx, rax
call fxp_double_to_fxp
mov rbp, rax
xor eax, eax
call nondet_double@PLT
pxor xmm1, xmm1
xor edi, edi
cvtsi2sd xmm1, rbx
comisd xmm0, xmm1
jb .L2871
pxor xmm1, xmm1
xor edi, edi
cvtsi2sd xmm1, rbp
comisd xmm1, xmm0
setnb dil
.L2871:
xor eax, eax
call __ESBMC_assume@PLT
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 24
xor eax, eax
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L2879:
.cfi_restore_state
sal rax, 5
xor edx, edx
lea rsi, new_state[rip]
lea rcx, _controller[rip+512]
.L2869:
movsd xmm0, QWORD PTR [rcx+rdx]
movsd QWORD PTR [rsi+rdx], xmm0
add rdx, 32
cmp rdx, rax
jne .L2869
xor edx, edx
lea rsi, new_stateFWL[rip]
.L2870:
movsd xmm0, QWORD PTR [rcx+rdx]
movsd QWORD PTR [rsi+rdx], xmm0
add rdx, 32
cmp rdx, rax
je .L2868
jmp .L2870
.cfi_endproc
.LFE145:
.size verify_error_state_space, .-verify_error_state_space
.p2align 4
.globl fxp_ss_closed_loop_safety
.type fxp_ss_closed_loop_safety, @function
fxp_ss_closed_loop_safety:
.LFB146:
.cfi_startproc
endbr64
movsd xmm0, QWORD PTR _controller[rip+640]
ret
.cfi_endproc
.LFE146:
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata.str1.8
.align 8
.LC82:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_safety_state_space.h"
.section .rodata.str1.1
.LC83:
.string "output_double <= error_limit"
.text
.p2align 4
.globl verify_safety_state_space
.type verify_safety_state_space, @function
verify_safety_state_space:
.LFB147:
.cfi_startproc
endbr64
cvttsd2si rax, QWORD PTR _controller[rip+640]
movsx rdx, DWORD PTR impl[rip+4]
pxor xmm0, xmm0
movsd xmm1, QWORD PTR error_limit[rip]
cvtsi2sd xmm0, eax
lea rax, scale_factor_inv[rip]
mulsd xmm0, QWORD PTR [rax+rdx*8]
comisd xmm1, xmm0
jb .L2886
xor eax, eax
ret
.L2886:
push rax
.cfi_def_cfa_offset 16
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 140
lea rsi, .LC82[rip]
lea rdi, .LC83[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE147:
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata.str1.8
.align 8
.LC84:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_controllability.h"
.align 8
.LC85:
.string "determinant(controllabilityMatrix_double,nStates) != 0"
.text
.p2align 4
.globl verify_controllability
.type verify_controllability, @function
verify_controllability:
.LFB148:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 968
.cfi_def_cfa_offset 1024
mov ebp, DWORD PTR nStates[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 952[rsp], rax
xor eax, eax
mov eax, DWORD PTR nInputs[rip]
mov DWORD PTR 24[rsp], eax
test ebp, ebp
jle .L2888
mov r12d, eax
movsx rax, ebp
mov DWORD PTR 44[rsp], ebp
xor ebx, ebx
imul r12d, ebp
mov QWORD PTR 32[rsp], rax
sal rax, 5
lea r13, 48[rsp]
mov QWORD PTR 16[rsp], rax
lea r15, 432[rsp]
lea eax, -1[r12]
mov DWORD PTR 40[rsp], eax
lea r14, 8[0+rax*8]
lea rax, 304[rsp]
mov QWORD PTR 8[rsp], rax
lea rax, 176[rsp]
mov rbp, rax
.L2889:
test r12d, r12d
jle .L2892
lea rdi, 0[r13+rbx]
mov rdx, r14
xor esi, esi
call memset@PLT
lea rdi, 0[rbp+rbx]
mov rdx, r14
xor esi, esi
call memset@PLT
mov rax, QWORD PTR 8[rsp]
mov rdx, r14
xor esi, esi
lea rdi, [rax+rbx]
call memset@PLT
lea rdi, [r15+rbx]
mov rdx, r14
xor esi, esi
call memset@PLT
lea rdi, 560[rsp+rbx]
mov rdx, r14
xor esi, esi
call memset@PLT
lea rdi, 688[rsp+rbx]
mov rdx, r14
xor esi, esi
call memset@PLT
.L2892:
add rbx, 32
cmp rbx, QWORD PTR 16[rsp]
jne .L2889
mov rsi, QWORD PTR 32[rsp]
mov ebp, DWORD PTR 44[rsp]
xor r9d, r9d
lea rdi, _controller[rip]
mov r10, QWORD PTR 16[rsp]
sal rsi, 3
.L2894:
mov rcx, r9
.L2893:
movsd xmm0, QWORD PTR [rdi+rcx]
call fxp_double_to_fxp
mov QWORD PTR 0[r13+rcx], rax
add rcx, 8
cmp rcx, rsi
jne .L2893
add r9, 32
lea rsi, 32[rcx]
cmp r9, r10
jne .L2894
mov r11d, DWORD PTR 24[rsp]
mov rbx, QWORD PTR 16[rsp]
xor r10d, r10d
lea r9, _controller[rip+128]
lea eax, -1[r11]
lea rsi, 8[0+rax*8]
.L2895:
mov rcx, r10
lea rdi, 176[rsp]
test r11d, r11d
jle .L2898
.L2896:
movsd xmm0, QWORD PTR [r9+rcx]
call fxp_double_to_fxp
mov QWORD PTR [rdi+rcx], rax
add rcx, 8
cmp rcx, rsi
jne .L2896
.L2898:
add r10, 32
add rsi, 32
cmp r10, rbx
jne .L2895
cmp DWORD PTR 24[rsp], 1
jle .L2976
test r12d, r12d
jle .L2899
lea rdx, 568[rsp]
xor r10d, r10d
mov edi, ebp
mov r12, r13
mov QWORD PTR 16[rsp], rdx
xor ebx, ebx
mov ebp, r10d
lea rax, 176[rsp]
lea r14, 560[rsp]
mov r13, rax
.p2align 4,,10
.p2align 3
.L2905:
mov ecx, ebx
mov esi, edi
mov r8, r15
mov rdx, r12
call fxp_exp_matrix
mov r9, r14
mov r8, r13
mov rcx, r15
mov edi, DWORD PTR nStates[rip]
mov edx, DWORD PTR nInputs[rip]
add ebx, 1
mov esi, edi
call fxp_matrix_multiplication.part.0
mov r9d, DWORD PTR nInputs[rip]
mov edi, DWORD PTR nStates[rip]
test r9d, r9d
jle .L2903
mov rdx, QWORD PTR 8[rsp]
movsx rax, ebp
lea r8d, -1[rdi]
mov rcx, r14
add r8, 1
lea rsi, [rdx+rax*8]
mov rdx, QWORD PTR 16[rsp]
lea eax, -1[r9]
sal r8, 5
lea r11, [rdx+rax*8]
.L2901:
xor eax, eax
test edi, edi
jle .L2904
.L2902:
mov rdx, QWORD PTR [rcx+rax]
mov QWORD PTR [rsi+rax], rdx
add rax, 32
cmp rax, r8
jne .L2902
.L2904:
add rcx, 8
add rsi, 8
cmp rcx, r11
jne .L2901
add ebp, r9d
.L2903:
imul r9d, edi
cmp r9d, ebp
jg .L2905
mov r12d, r9d
mov ebp, edi
test edi, edi
jle .L2912
lea eax, -1[r9]
mov DWORD PTR 40[rsp], eax
.L2899:
lea eax, -1[rbp]
mov r14, r15
mov rdi, r15
mov QWORD PTR 24[rsp], rax
sal rax, 5
lea rbx, 464[rsp+rax]
mov eax, DWORD PTR 40[rsp]
mov QWORD PTR 16[rsp], rax
lea r13, 8[0+rax*8]
.p2align 4,,10
.p2align 3
.L2907:
test r12d, r12d
jle .L2910
mov rdx, r13
xor esi, esi
call memset@PLT
mov rdi, rax
.L2910:
add rdi, 32
cmp rdi, rbx
jne .L2907
mov rax, QWORD PTR 16[rsp]
lea rdi, 8[r15]
mov r8, QWORD PTR 8[rsp]
lea rsi, 312[rsp+rax*8]
mov rax, QWORD PTR 24[rsp]
lea r9, [rdi+rax*8]
.L2908:
mov rax, r8
test r12d, r12d
jle .L2913
.L2911:
mov rdx, QWORD PTR [rax]
add rax, 8
add r14, 32
mov QWORD PTR -32[r14], rdx
cmp rax, rsi
jne .L2911
.L2913:
add r8, 32
mov r14, rdi
add rsi, 32
cmp rdi, r9
je .L2912
add rdi, 8
jmp .L2908
.L2976:
lea rax, 176[rsp]
mov rbx, QWORD PTR 8[rsp]
mov edi, ebp
xor r12d, r12d
lea r14, 560[rsp]
mov rbp, rax
.L2925:
mov esi, edi
mov r8, r15
mov ecx, r12d
mov rdx, r13
call fxp_exp_matrix
mov r9, r14
mov r8, rbp
mov rcx, r15
mov edi, DWORD PTR nStates[rip]
mov edx, DWORD PTR nInputs[rip]
mov esi, edi
call fxp_matrix_multiplication.part.0
mov edi, DWORD PTR nStates[rip]
test edi, edi
jle .L2934
movsx rsi, edi
xor eax, eax
mov rcx, rsi
sal rcx, 5
.L2926:
mov rdx, QWORD PTR [r14+rax]
mov QWORD PTR [rbx+rax], rdx
add rax, 32
cmp rax, rcx
jne .L2926
add r12d, 1
add rbx, 8
cmp edi, r12d
jg .L2925
mov ebp, edi
test edi, edi
jle .L2934
movsx rdx, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
mov r8, QWORD PTR 8[rsp]
xor ecx, ecx
lea rdi, 688[rsp]
movsd xmm1, QWORD PTR [rax+rdx*8]
lea rdx, 0[0+rsi*8]
sal rsi, 5
.p2align 4,,10
.p2align 3
.L2930:
mov rax, rcx
.L2929:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r8+rax]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rax], xmm0
add rax, 8
cmp rax, rdx
jne .L2929
add rcx, 32
lea rdx, 32[rax]
cmp rcx, rsi
jne .L2930
cmp ebp, 1
je .L2977
cmp ebp, 2
je .L2978
mov esi, ebp
call determinant.part.0
.L2932:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L2922
comisd xmm0, xmm1
jne .L2922
.L2934:
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 113
lea rsi, .LC84[rip]
lea rdi, .LC85[rip]
call __assert_fail@PLT
.L2888:
mov eax, DWORD PTR 24[rsp]
cmp eax, 1
jle .L2934
imul eax, ebp
lea r15, 432[rsp]
mov r12d, eax
lea rax, 304[rsp]
mov QWORD PTR 8[rsp], rax
.L2912:
mov rcx, QWORD PTR 8[rsp]
mov r8, r15
mov edx, ebp
mov esi, r12d
lea rbx, 816[rsp]
mov edi, ebp
mov r9, rbx
call fxp_matrix_multiplication.part.0
mov r8d, DWORD PTR nStates[rip]
test r8d, r8d
jle .L2920
movsx rdx, DWORD PTR impl[rip+4]
movsx rsi, r8d
lea rax, scale_factor_inv[rip]
xor ecx, ecx
lea rdi, 688[rsp]
movsd xmm1, QWORD PTR [rax+rdx*8]
lea rdx, 0[0+rsi*8]
sal rsi, 5
.p2align 4,,10
.p2align 3
.L2916:
mov rax, rcx
.L2915:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rbx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rax], xmm0
add rax, 8
cmp rdx, rax
jne .L2915
add rcx, 32
add rdx, 32
cmp rcx, rsi
jne .L2916
cmp r8d, 1
je .L2979
cmp r8d, 2
je .L2980
mov esi, r8d
call determinant.part.0
.L2918:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L2922
comisd xmm0, xmm1
je .L2920
.L2922:
mov rax, QWORD PTR 952[rsp]
sub rax, QWORD PTR fs:40
jne .L2981
add rsp, 968
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L2980:
.cfi_restore_state
movsd xmm0, QWORD PTR 688[rsp]
movsd xmm1, QWORD PTR 720[rsp]
mulsd xmm0, QWORD PTR 728[rsp]
mulsd xmm1, QWORD PTR 696[rsp]
subsd xmm0, xmm1
jmp .L2918
.L2979:
movsd xmm0, QWORD PTR 688[rsp]
jmp .L2918
.L2920:
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 91
lea rsi, .LC84[rip]
lea rdi, .LC85[rip]
call __assert_fail@PLT
.L2981:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L2977:
movsd xmm0, QWORD PTR 688[rsp]
jmp .L2932
.L2978:
movsd xmm0, QWORD PTR 688[rsp]
movsd xmm1, QWORD PTR 720[rsp]
mulsd xmm0, QWORD PTR 728[rsp]
mulsd xmm1, QWORD PTR 696[rsp]
subsd xmm0, xmm1
jmp .L2932
.cfi_endproc
.LFE148:
.size verify_controllability, .-verify_controllability
.section .rodata.str1.8
.align 8
.LC86:
.string "determinant(controllabilityMatrix,nStates) != 0"
.align 8
.LC87:
.string "determinant(mimo_controllabilityMatrix_double,nStates) != 0"
.text
.p2align 4
.globl verify_controllability_double
.type verify_controllability_double, @function
verify_controllability_double:
.LFB149:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 552
.cfi_def_cfa_offset 608
mov r11d, DWORD PTR nInputs[rip]
mov r10d, DWORD PTR nStates[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 536[rsp], rax
xor eax, eax
cmp r11d, 1
jle .L3033
imul r11d, r10d
lea rbx, 144[rsp]
lea r12, 16[rsp]
test r11d, r11d
jle .L2985
xor ebp, ebp
xor r14d, r14d
lea rbx, 144[rsp]
lea r15, 272[rsp]
lea r12, 16[rsp]
lea r13, 280[rsp]
.p2align 4,,10
.p2align 3
.L2991:
mov esi, r10d
mov edi, r10d
mov ecx, ebp
mov r8, rbx
lea rdx, _controller[rip]
add ebp, 1
call double_exp_matrix
mov edi, DWORD PTR nStates[rip]
mov r9, r15
mov edx, DWORD PTR nInputs[rip]
lea r8, _controller[rip+128]
mov rcx, rbx
mov esi, edi
call double_matrix_multiplication.part.0
mov r11d, DWORD PTR nInputs[rip]
mov r10d, DWORD PTR nStates[rip]
test r11d, r11d
jle .L2989
movsx rax, r14d
lea esi, -1[r10]
mov rdx, r15
lea rcx, [r12+rax*8]
add rsi, 1
lea eax, -1[r11]
lea rdi, 0[r13+rax*8]
sal rsi, 5
.L2987:
xor eax, eax
test r10d, r10d
jle .L2990
.L2988:
movsd xmm0, QWORD PTR [rdx+rax]
movsd QWORD PTR [rcx+rax], xmm0
add rax, 32
cmp rax, rsi
jne .L2988
.L2990:
add rdx, 8
add rcx, 8
cmp rdx, rdi
jne .L2987
add r14d, r11d
.L2989:
imul r11d, r10d
cmp r11d, r14d
jg .L2991
.L2985:
test r10d, r10d
jle .L2993
lea eax, -1[r10]
lea r14d, -1[r11]
mov r15, rbx
mov rdi, rbx
mov QWORD PTR 8[rsp], rax
sal rax, 5
lea r13, 8[0+r14*8]
lea rbp, 176[rsp+rax]
.p2align 4,,10
.p2align 3
.L2994:
test r11d, r11d
jle .L2997
mov rdx, r13
xor esi, esi
mov DWORD PTR 4[rsp], r11d
mov DWORD PTR [rsp], r10d
call memset@PLT
mov r11d, DWORD PTR 4[rsp]
mov r10d, DWORD PTR [rsp]
mov rdi, rax
.L2997:
add rdi, 32
cmp rdi, rbp
jne .L2994
mov rax, QWORD PTR 8[rsp]
lea rdi, 8[rbx]
mov r8, r12
lea rsi, 24[rsp+r14*8]
lea r9, [rdi+rax*8]
.L2995:
mov rdx, r15
mov rax, r8
test r11d, r11d
jle .L2999
.L2998:
movsd xmm0, QWORD PTR [rax]
add rax, 8
add rdx, 32
movsd QWORD PTR -32[rdx], xmm0
cmp rsi, rax
jne .L2998
.L2999:
add r8, 32
mov r15, rdi
add rsi, 32
cmp rdi, r9
je .L2993
add rdi, 8
jmp .L2995
.L2993:
mov esi, r11d
mov r8, rbx
mov rcx, r12
mov edx, r10d
lea rbp, 400[rsp]
mov edi, r10d
mov r9, rbp
call double_matrix_multiplication.part.0
mov esi, DWORD PTR nStates[rip]
test esi, esi
jle .L3000
movsd xmm0, QWORD PTR 400[rsp]
cmp esi, 1
je .L3002
cmp esi, 2
je .L3034
mov rdi, rbp
call determinant.part.0
.L3002:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L3005
comisd xmm0, xmm1
je .L3000
.L3005:
mov rax, QWORD PTR 536[rsp]
sub rax, QWORD PTR fs:40
jne .L3035
add rsp, 552
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L3033:
.cfi_restore_state
test r10d, r10d
jle .L3011
lea r12, 16[rsp]
xor r14d, r14d
lea rbx, 144[rsp]
mov r13, r12
lea r15, 272[rsp]
lea rbp, _controller[rip]
.L3008:
mov esi, r10d
mov edi, r10d
mov r8, rbx
mov ecx, r14d
mov rdx, rbp
call double_exp_matrix
mov edi, DWORD PTR nStates[rip]
mov r9, r15
mov edx, DWORD PTR nInputs[rip]
lea r8, _controller[rip+128]
mov rcx, rbx
mov esi, edi
call double_matrix_multiplication.part.0
mov r10d, DWORD PTR nStates[rip]
test r10d, r10d
jle .L3011
movsx rdx, r10d
xor eax, eax
sal rdx, 5
.L3009:
movsd xmm0, QWORD PTR [r15+rax]
movsd QWORD PTR 0[r13+rax], xmm0
add rax, 32
cmp rax, rdx
jne .L3009
add r14d, 1
add r13, 8
cmp r14d, r10d
jl .L3008
test r10d, r10d
jle .L3011
movsd xmm0, QWORD PTR 16[rsp]
cmp r10d, 1
je .L3013
cmp r10d, 2
je .L3036
mov esi, r10d
mov rdi, r12
call determinant.part.0
.L3013:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L3005
comisd xmm0, xmm1
jne .L3005
.L3011:
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 163
lea rsi, .LC84[rip]
lea rdi, .LC86[rip]
call __assert_fail@PLT
.L3034:
movsd xmm0, QWORD PTR 400[rsp]
movsd xmm1, QWORD PTR 432[rsp]
mulsd xmm0, QWORD PTR 440[rsp]
mulsd xmm1, QWORD PTR 408[rsp]
subsd xmm0, xmm1
jmp .L3002
.L3000:
lea rcx, __PRETTY_FUNCTION__.1[rip]
mov edx, 154
lea rsi, .LC84[rip]
lea rdi, .LC87[rip]
call __assert_fail@PLT
.L3035:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L3036:
movsd xmm0, QWORD PTR 16[rsp]
movsd xmm1, QWORD PTR 48[rsp]
mulsd xmm0, QWORD PTR 56[rsp]
mulsd xmm1, QWORD PTR 24[rsp]
subsd xmm0, xmm1
jmp .L3013
.cfi_endproc
.LFE149:
.size verify_controllability_double, .-verify_controllability_double
.section .rodata.str1.8
.align 8
.LC88:
.string "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4.0-cbmc-5.6/bmc/engine/verify_observability.h"
.align 8
.LC89:
.string "determinant(observabilityMatrix_double,nStates) != 0"
.text
.p2align 4
.globl verify_observability
.type verify_observability, @function
verify_observability:
.LFB150:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 984
.cfi_def_cfa_offset 1040
mov ebp, DWORD PTR nStates[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 968[rsp], rax
xor eax, eax
test ebp, ebp
jle .L3044
movsx rbx, ebp
mov DWORD PTR 24[rsp], ebp
xor r12d, r12d
lea r13, 64[rsp]
lea rdx, 192[rsp]
mov r15, rbx
lea rax, 320[rsp]
sal rbx, 3
mov QWORD PTR 8[rsp], rdx
lea rdx, 576[rsp]
sal r15, 5
mov rbp, rax
mov QWORD PTR 16[rsp], rdx
lea r14, 448[rsp]
.L3041:
lea rdi, 0[rbp+r12]
mov rdx, rbx
xor esi, esi
call memset@PLT
lea rdi, 0[r13+r12]
mov rdx, rbx
xor esi, esi
call memset@PLT
mov rax, QWORD PTR 8[rsp]
mov rdx, rbx
xor esi, esi
lea rdi, [rax+r12]
call memset@PLT
lea rdi, [r14+r12]
mov rdx, rbx
xor esi, esi
call memset@PLT
mov rax, QWORD PTR 16[rsp]
mov rdx, rbx
xor esi, esi
lea rdi, [rax+r12]
add r12, 32
call memset@PLT
cmp r12, r15
jne .L3041
mov ebp, DWORD PTR 24[rsp]
xor edi, edi
lea rsi, _controller[rip]
.L3043:
mov rcx, rdi
.L3042:
movsd xmm0, QWORD PTR [rsi+rcx]
call fxp_double_to_fxp
mov QWORD PTR 0[r13+rcx], rax
add rcx, 8
cmp rcx, rbx
jne .L3042
add rdi, 32
add rbx, 32
cmp rdi, r15
jne .L3043
.L3044:
mov r12d, DWORD PTR nOutputs[rip]
test r12d, r12d
jle .L3039
lea eax, -1[rbp]
movsx r11, r12d
lea r9, _controller[rip+256]
xor r10d, r10d
lea rsi, 8[0+rax*8]
sal r11, 5
.L3040:
mov rcx, r10
lea rdi, 192[rsp]
test ebp, ebp
jle .L3047
.L3045:
movsd xmm0, QWORD PTR [r9+rcx]
call fxp_double_to_fxp
mov QWORD PTR [rdi+rcx], rax
add rcx, 8
cmp rcx, rsi
jne .L3045
.L3047:
add r10, 32
add rsi, 32
cmp r10, r11
jne .L3040
cmp r12d, 1
jle .L3039
test ebp, ebp
jle .L3051
lea rax, 320[rsp]
lea r13, 64[rsp]
xor r12d, r12d
mov DWORD PTR 36[rsp], 0
mov QWORD PTR 40[rsp], rax
lea rax, 192[rsp]
lea r14, 448[rsp]
mov QWORD PTR 8[rsp], rax
lea rax, 576[rsp]
mov QWORD PTR 16[rsp], rax
lea rax, 608[rsp]
mov QWORD PTR 56[rsp], rax
mov QWORD PTR 48[rsp], r13
.p2align 4,,10
.p2align 3
.L3057:
mov rdx, QWORD PTR 48[rsp]
mov ecx, r12d
mov esi, ebp
mov edi, ebp
mov r8, r14
add r12d, 1
call fxp_exp_matrix
mov esi, DWORD PTR nStates[rip]
mov r15, QWORD PTR 16[rsp]
mov r8, r14
mov rcx, QWORD PTR 8[rsp]
mov edi, DWORD PTR nOutputs[rip]
mov r9, r15
mov edx, esi
call fxp_matrix_multiplication.part.0
mov eax, DWORD PTR nOutputs[rip]
mov ebp, DWORD PTR nStates[rip]
mov DWORD PTR 24[rsp], eax
test eax, eax
jle .L3054
movsx rdi, DWORD PTR 36[rsp]
lea ebx, -1[rax]
lea eax, -1[rbp]
sal rbx, 5
lea r13, 8[0+rax*8]
add rbx, QWORD PTR 56[rsp]
sal rdi, 5
add rdi, QWORD PTR 40[rsp]
.L3053:
test ebp, ebp
jle .L3056
mov rdx, r13
mov rsi, r15
call memcpy@PLT
mov rdi, rax
.L3056:
add r15, 32
add rdi, 32
cmp r15, rbx
jne .L3053
mov edx, DWORD PTR 24[rsp]
add DWORD PTR 36[rsp], edx
.L3054:
cmp ebp, r12d
jg .L3057
mov r12d, DWORD PTR 24[rsp]
imul r12d, ebp
test ebp, ebp
jle .L3058
lea eax, -1[rbp]
mov rcx, r14
sal rax, 5
lea rbx, 480[rsp+rax]
lea eax, -1[r12]
lea r13, 8[0+rax*8]
.p2align 4,,10
.p2align 3
.L3059:
test r12d, r12d
jle .L3061
mov rdi, rcx
mov rdx, r13
xor esi, esi
call memset@PLT
mov rcx, rax
.L3061:
add rcx, 32
cmp rcx, rbx
jne .L3059
.L3058:
test r12d, r12d
jle .L3062
lea eax, -1[rbp]
mov r8, QWORD PTR 40[rsp]
mov rdi, r14
lea rsi, 328[rsp+rax*8]
lea eax, -1[r12]
lea r9, 456[rsp+rax*8]
.p2align 4,,10
.p2align 3
.L3063:
mov rdx, rdi
mov rax, r8
test ebp, ebp
jle .L3065
.L3064:
mov rcx, QWORD PTR [rax]
add rax, 8
add rdx, 32
mov QWORD PTR -32[rdx], rcx
cmp rax, rsi
jne .L3064
.L3065:
add rdi, 8
add r8, 32
add rsi, 32
cmp rdi, r9
jne .L3063
.L3062:
mov r8, QWORD PTR 40[rsp]
mov rcx, r14
mov edx, ebp
mov esi, r12d
lea rbx, 832[rsp]
mov edi, ebp
mov r9, rbx
call fxp_matrix_multiplication.part.0
mov r8d, DWORD PTR nStates[rip]
test r8d, r8d
jle .L3072
movsx rdx, DWORD PTR impl[rip+4]
movsx rsi, r8d
lea rax, scale_factor_inv[rip]
xor ecx, ecx
lea rdi, 704[rsp]
movsd xmm1, QWORD PTR [rax+rdx*8]
lea rdx, 0[0+rsi*8]
sal rsi, 5
.p2align 4,,10
.p2align 3
.L3068:
mov rax, rcx
.L3067:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [rbx+rax]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rax], xmm0
add rax, 8
cmp rdx, rax
jne .L3067
add rcx, 32
add rdx, 32
cmp rsi, rcx
jne .L3068
cmp r8d, 1
je .L3113
cmp r8d, 2
je .L3114
mov esi, r8d
call determinant.part.0
.L3070:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L3074
comisd xmm0, xmm1
je .L3072
.L3074:
mov rax, QWORD PTR 968[rsp]
sub rax, QWORD PTR fs:40
jne .L3115
add rsp, 984
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L3039:
.cfi_restore_state
test ebp, ebp
jle .L3082
lea rax, 320[rsp]
lea r13, 64[rsp]
xor r15d, r15d
mov QWORD PTR 40[rsp], rax
mov rbx, rax
lea rax, 192[rsp]
lea r14, 448[rsp]
mov QWORD PTR 8[rsp], rax
mov rax, r13
lea r12, 576[rsp]
mov r13d, r15d
mov r15, rax
.L3076:
mov esi, ebp
mov edi, ebp
mov r8, r14
mov ecx, r13d
mov rdx, r15
call fxp_exp_matrix
mov rcx, QWORD PTR 8[rsp]
mov r9, r12
mov r8, r14
mov esi, DWORD PTR nStates[rip]
mov edi, DWORD PTR nOutputs[rip]
mov edx, esi
call fxp_matrix_multiplication.part.0
mov ebp, DWORD PTR nStates[rip]
test ebp, ebp
jle .L3082
movsx rcx, ebp
mov rdi, rbx
mov rsi, r12
add r13d, 1
lea rdx, 0[0+rcx*8]
mov QWORD PTR 24[rsp], rcx
add rbx, 32
mov QWORD PTR 16[rsp], rdx
call memcpy@PLT
cmp r13d, ebp
mov rdx, QWORD PTR 16[rsp]
mov rcx, QWORD PTR 24[rsp]
jl .L3076
mov r12, rdx
movsx rdx, DWORD PTR impl[rip+4]
mov rsi, rcx
lea rax, scale_factor_inv[rip]
mov r8, QWORD PTR 40[rsp]
sal rsi, 5
xor ecx, ecx
lea rdi, 704[rsp]
movsd xmm1, QWORD PTR [rax+rdx*8]
mov rdx, r12
.p2align 4,,10
.p2align 3
.L3078:
mov rax, rcx
.L3077:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r8+rax]
mulsd xmm0, xmm1
movsd QWORD PTR [rdi+rax], xmm0
add rax, 8
cmp rax, rdx
jne .L3077
add rcx, 32
lea rdx, 32[rax]
cmp rcx, rsi
jne .L3078
cmp ebp, 1
je .L3116
cmp ebp, 2
je .L3117
mov esi, ebp
call determinant.part.0
.L3080:
pxor xmm1, xmm1
ucomisd xmm0, xmm1
jp .L3074
comisd xmm0, xmm1
jne .L3074
.L3082:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 134
lea rsi, .LC88[rip]
lea rdi, .LC89[rip]
call __assert_fail@PLT
.L3072:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 119
lea rsi, .LC88[rip]
lea rdi, .LC89[rip]
call __assert_fail@PLT
.L3114:
movsd xmm0, QWORD PTR 704[rsp]
movsd xmm1, QWORD PTR 736[rsp]
mulsd xmm0, QWORD PTR 744[rsp]
mulsd xmm1, QWORD PTR 712[rsp]
subsd xmm0, xmm1
jmp .L3070
.L3113:
movsd xmm0, QWORD PTR 704[rsp]
jmp .L3070
.L3051:
lea rax, 320[rsp]
lea r14, 448[rsp]
imul r12d, ebp
mov QWORD PTR 40[rsp], rax
jmp .L3062
.L3115:
call __stack_chk_fail@PLT
.p2align 4,,10
.p2align 3
.L3116:
movsd xmm0, QWORD PTR 704[rsp]
jmp .L3080
.L3117:
movsd xmm0, QWORD PTR 704[rsp]
movsd xmm1, QWORD PTR 736[rsp]
mulsd xmm0, QWORD PTR 744[rsp]
mulsd xmm1, QWORD PTR 712[rsp]
subsd xmm0, xmm1
jmp .L3080
.cfi_endproc
.LFE150:
.size verify_observability, .-verify_observability
.p2align 4
.globl resp_mag
.type resp_mag, @function
resp_mag:
.LFB151:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 120
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov DWORD PTR -140[rbp], esi
mov QWORD PTR -152[rbp], rdx
mov DWORD PTR -144[rbp], ecx
mov rcx, rsp
mov QWORD PTR -136[rbp], rdi
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
lea eax, 1[r9]
cdqe
lea rax, 15[0+rax*8]
mov rsi, rax
mov rdx, rax
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L3120
.L3157:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L3157
.L3120:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L3158
.L3121:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov r14, rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L3123
.L3159:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L3159
.L3123:
and edx, 4095
sub rsp, rdx
test rdx, rdx
jne .L3160
.L3124:
mov rsi, rax
mov rcx, rsp
mov rdx, rax
mov r12, rsp
and rsi, -4096
and rdx, -16
sub rcx, rsi
cmp rsp, rcx
je .L3126
.L3161:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L3161
.L3126:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L3127
or QWORD PTR -8[rsp+rdx], 0
.L3127:
mov rdx, rax
mov rcx, rsp
and rax, -4096
mov r15, rsp
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L3129
.L3162:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L3162
.L3129:
mov rax, rdx
and eax, 4095
sub rsp, rax
test rax, rax
je .L3130
or QWORD PTR -8[rsp+rax], 0
.L3130:
mov eax, DWORD PTR -140[rbp]
pxor xmm7, xmm7
mov QWORD PTR -128[rbp], r8
mov r13, rsp
mov rsi, QWORD PTR -136[rbp]
cvtsi2sd xmm7, r9d
mov QWORD PTR -72[rbp], 0x000000000
sub eax, 2
lea rax, 16[rsi+rax*8]
mov rsi, QWORD PTR -152[rbp]
mov QWORD PTR -120[rbp], rax
mov eax, DWORD PTR -144[rbp]
movsd QWORD PTR -160[rbp], xmm7
sub eax, 2
lea rax, 16[rsi+rax*8]
mov QWORD PTR -112[rbp], rax
.p2align 4,,10
.p2align 3
.L3137:
mov rax, QWORD PTR -136[rbp]
cmp DWORD PTR -140[rbp], 1
mov QWORD PTR [r12], 0x000000000
movsd xmm7, QWORD PTR [rax]
lea rbx, 8[rax]
movsd QWORD PTR -80[rbp], xmm7
movsd QWORD PTR [r14], xmm7
jle .L3135
.p2align 4,,10
.p2align 3
.L3134:
movsd xmm0, QWORD PTR -72[rbp]
mov edi, 6
add rbx, 8
call cosTyl
movsd xmm2, QWORD PTR -80[rbp]
mov edi, 6
mulsd xmm2, xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -104[rbp], xmm2
call sinTyl
movsd xmm1, QWORD PTR [r12]
movsd xmm2, QWORD PTR -104[rbp]
mov edi, 6
movsd xmm3, QWORD PTR -80[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -96[rbp], xmm1
movsd QWORD PTR -88[rbp], xmm3
subsd xmm2, xmm0
addsd xmm2, QWORD PTR -8[rbx]
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -80[rbp], xmm2
movsd QWORD PTR [r14], xmm2
call sinTyl
movsd xmm4, QWORD PTR -88[rbp]
mov edi, 6
mulsd xmm4, xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -88[rbp], xmm4
call cosTyl
movsd xmm1, QWORD PTR -96[rbp]
mulsd xmm1, xmm0
addsd xmm1, QWORD PTR -88[rbp]
movsd QWORD PTR [r12], xmm1
cmp rbx, QWORD PTR -120[rbp]
jne .L3134
.L3135:
mov rax, QWORD PTR -152[rbp]
cmp DWORD PTR -144[rbp], 1
mov QWORD PTR 0[r13], 0x000000000
movsd xmm7, QWORD PTR [rax]
lea rbx, 8[rax]
movsd QWORD PTR -80[rbp], xmm7
movsd QWORD PTR [r15], xmm7
pxor xmm7, xmm7
jle .L3133
.p2align 4,,10
.p2align 3
.L3136:
movsd xmm0, QWORD PTR -72[rbp]
mov edi, 6
add rbx, 8
call cosTyl
movsd xmm2, QWORD PTR -80[rbp]
mov edi, 6
mulsd xmm2, xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -104[rbp], xmm2
call sinTyl
movsd xmm1, QWORD PTR 0[r13]
movsd xmm2, QWORD PTR -104[rbp]
mov edi, 6
movsd xmm5, QWORD PTR -80[rbp]
mulsd xmm0, xmm1
movsd QWORD PTR -96[rbp], xmm1
movsd QWORD PTR -88[rbp], xmm5
subsd xmm2, xmm0
addsd xmm2, QWORD PTR -8[rbx]
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -80[rbp], xmm2
movsd QWORD PTR [r15], xmm2
call sinTyl
movsd xmm6, QWORD PTR -88[rbp]
mov edi, 6
mulsd xmm6, xmm0
movsd xmm0, QWORD PTR -72[rbp]
movsd QWORD PTR -88[rbp], xmm6
call cosTyl
movsd xmm1, QWORD PTR -96[rbp]
mulsd xmm1, xmm0
addsd xmm1, QWORD PTR -88[rbp]
movsd QWORD PTR 0[r13], xmm1
cmp QWORD PTR -112[rbp], rbx
jne .L3136
movapd xmm7, xmm1
mulsd xmm7, xmm1
.L3133:
movsd xmm0, QWORD PTR [r14]
movsd xmm1, QWORD PTR [r12]
mulsd xmm0, xmm0
mulsd xmm1, xmm1
addsd xmm0, xmm1
cvtsd2ss xmm0, xmm0
call sqrt3
movsd xmm1, QWORD PTR -80[rbp]
mov rbx, QWORD PTR -128[rbp]
cvtss2sd xmm0, xmm0
mulsd xmm1, xmm1
movsd QWORD PTR [rbx], xmm0
pxor xmm0, xmm0
addsd xmm1, xmm7
pxor xmm7, xmm7
cvtsd2ss xmm0, xmm1
call sqrt3
mov eax, 1
ucomiss xmm0, xmm7
movss DWORD PTR -80[rbp], xmm0
setp dil
movzx edi, dil
cmovne edi, eax
xor eax, eax
add rbx, 8
add r14, 8
add r12, 8
add r15, 8
add r13, 8
call __ESBMC_assume@PLT
movsd xmm1, QWORD PTR -8[rbx]
movss xmm0, DWORD PTR -80[rbp]
movsd xmm7, QWORD PTR -72[rbp]
movsd xmm6, QWORD PTR .LC90[rip]
cvtss2sd xmm0, xmm0
divsd xmm1, xmm0
movsd xmm0, QWORD PTR .LC90[rip]
divsd xmm0, QWORD PTR -160[rbp]
addsd xmm7, xmm0
movsd QWORD PTR -72[rbp], xmm7
movsd QWORD PTR -8[rbx], xmm1
comisd xmm6, xmm7
mov QWORD PTR -128[rbp], rbx
jnb .L3137
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L3163
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L3158:
.cfi_restore_state
or QWORD PTR -8[rsp+rdx], 0
jmp .L3121
.L3160:
or QWORD PTR -8[rsp+rdx], 0
jmp .L3124
.L3163:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE151:
.size resp_mag, .-resp_mag
.section .rodata.str1.8
.align 8
.LC91:
.string "|----------------Passband Failure-------------|"
.align 8
.LC92:
.string "|-------------Cutoff Frequency Failure--------|"
.align 8
.LC93:
.string "|----------------Stopband Failure-------------|"
.text
.p2align 4
.globl verify_magnitude
.type verify_magnitude, @function
verify_magnitude:
.LFB152:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 56
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
mov rax, rsp
cmp rsp, rax
je .L3166
.L3235:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rax
jne .L3235
.L3166:
sub rsp, 816
or QWORD PTR 808[rsp], 0
movsx rax, DWORD PTR ds[rip+800]
mov rdx, rax
lea rax, 15[0+rax*8]
mov rcx, rax
and rax, -4096
and rcx, -16
mov rsi, rsp
mov rbx, rsp
sub rsi, rax
cmp rsp, rsi
je .L3169
.L3236:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L3236
.L3169:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L3237
.L3170:
mov r11, rsp
lea rdi, ds[rip]
mov rsi, r11
call fxp_double_to_fxp_array
movsx rdx, DWORD PTR ds[rip+800]
mov rdi, rsp
lea rcx, 15[0+rdx*8]
mov rsi, rdx
mov rax, rcx
and rcx, -4096
sub rdi, rcx
and rax, -16
cmp rsp, rdi
je .L3172
.L3238:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L3238
.L3172:
and eax, 4095
sub rsp, rax
test rax, rax
je .L3173
or QWORD PTR -8[rsp+rax], 0
.L3173:
mov rcx, rsp
test esi, esi
jle .L3174
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L3175:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r11+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rax, rdx
jne .L3175
.L3174:
movsx rax, DWORD PTR ds[rip+1608]
mov rsi, rsp
mov rdx, rax
lea rax, 15[0+rax*8]
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L3177
.L3239:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L3239
.L3177:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L3178
or QWORD PTR -8[rsp+rcx], 0
.L3178:
mov r11, rsp
lea rdi, ds[rip+808]
mov rsi, r11
call fxp_double_to_fxp_array
movsx rdx, DWORD PTR ds[rip+1608]
mov rsi, rsp
lea rax, 15[0+rdx*8]
mov r10, rdx
mov rcx, rax
and rax, -4096
sub rsi, rax
and rcx, -16
cmp rsp, rsi
je .L3180
.L3240:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L3240
.L3180:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
je .L3181
or QWORD PTR -8[rsp+rcx], 0
.L3181:
mov rcx, rsp
test r10d, r10d
jle .L3182
movsx rsi, DWORD PTR impl[rip+4]
lea rax, scale_factor_inv[rip]
movsd xmm1, QWORD PTR [rax+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L3183:
pxor xmm0, xmm0
cvtsi2sd xmm0, DWORD PTR [r11+rax*8]
mulsd xmm0, xmm1
movsd QWORD PTR [rcx+rax*8], xmm0
add rax, 1
cmp rdx, rax
jne .L3183
.L3182:
lea rdx, ds[rip]
mov ecx, DWORD PTR ds[rip+800]
mov r8, rbx
mov esi, r10d
mov r9d, 100
lea rdi, 808[rdx]
call resp_mag
mov eax, DWORD PTR filter[rip+24]
cmp eax, 1
je .L3241
cmp eax, 2
jne .L3195
lea r13, 800[rbx]
pxor xmm0, xmm0
lea r12, filter[rip]
jmp .L3203
.p2align 4,,10
.p2align 3
.L3228:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+16]
ucomisd xmm1, xmm0
jnp .L3242
.L3199:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+12]
comisd xmm0, xmm1
ja .L3243
.L3198:
add rbx, 8
addsd xmm0, QWORD PTR .LC42[rip]
cmp r13, rbx
je .L3194
.L3203:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+20]
comisd xmm1, xmm0
jb .L3228
movsd xmm2, QWORD PTR [rbx]
pxor xmm1, xmm1
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC93[rip]
cvtss2sd xmm1, DWORD PTR filter[rip+4]
movsd QWORD PTR -64[rbp], xmm1
movsd QWORD PTR -56[rbp], xmm2
.L3233:
xor eax, eax
lea rdi, .LC9[rip]
call printf@PLT
movsd xmm1, QWORD PTR -64[rbp]
comisd xmm1, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR -72[rbp]
jnb .L3198
.L3190:
lea rcx, __PRETTY_FUNCTION__.20[rip]
mov edx, 41
lea rsi, .LC4[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.L3237:
or QWORD PTR -8[rsp+rcx], 0
jmp .L3170
.p2align 4,,10
.p2align 3
.L3242:
jne .L3199
movsd xmm3, QWORD PTR [rbx]
pxor xmm1, xmm1
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC92[rip]
cvtss2sd xmm1, DWORD PTR filter[rip+8]
movsd QWORD PTR -64[rbp], xmm1
movsd QWORD PTR -56[rbp], xmm3
jmp .L3233
.p2align 4,,10
.p2align 3
.L3243:
movsd xmm1, QWORD PTR [rbx]
pxor xmm5, xmm5
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC91[rip]
cvtss2sd xmm5, DWORD PTR [r12]
movsd QWORD PTR -56[rbp], xmm5
movsd QWORD PTR -64[rbp], xmm1
jmp .L3233
.p2align 4,,10
.p2align 3
.L3194:
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L3244
lea rsp, -24[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L3241:
.cfi_restore_state
lea r13, 800[rbx]
pxor xmm0, xmm0
lea r12, filter[rip]
jmp .L3193
.p2align 4,,10
.p2align 3
.L3227:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+16]
ucomisd xmm1, xmm0
jnp .L3245
.L3188:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+20]
comisd xmm0, xmm1
jnb .L3246
.L3187:
add rbx, 8
addsd xmm0, QWORD PTR .LC42[rip]
cmp r13, rbx
je .L3194
.L3193:
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR filter[rip+12]
comisd xmm1, xmm0
jb .L3227
movsd xmm1, QWORD PTR [rbx]
pxor xmm4, xmm4
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC91[rip]
cvtss2sd xmm4, DWORD PTR [r12]
movsd QWORD PTR -56[rbp], xmm4
movsd QWORD PTR -64[rbp], xmm1
.L3231:
xor eax, eax
lea rdi, .LC9[rip]
call printf@PLT
movsd xmm1, QWORD PTR -64[rbp]
comisd xmm1, QWORD PTR -56[rbp]
movsd xmm0, QWORD PTR -72[rbp]
jnb .L3187
jmp .L3190
.p2align 4,,10
.p2align 3
.L3245:
jne .L3188
movsd xmm6, QWORD PTR [rbx]
pxor xmm1, xmm1
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC92[rip]
cvtss2sd xmm1, DWORD PTR filter[rip+8]
movsd QWORD PTR -64[rbp], xmm1
movsd QWORD PTR -56[rbp], xmm6
jmp .L3231
.p2align 4,,10
.p2align 3
.L3246:
movsd xmm7, QWORD PTR [rbx]
pxor xmm1, xmm1
movsd QWORD PTR -72[rbp], xmm0
lea rsi, .LC93[rip]
cvtss2sd xmm1, DWORD PTR filter[rip+4]
movsd QWORD PTR -64[rbp], xmm1
movsd QWORD PTR -56[rbp], xmm7
jmp .L3231
.L3195:
call __DSVERIFIER_assert.part.0
.L3244:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE152:
.size verify_magnitude, .-verify_magnitude
.section .rodata.str1.8
.align 8
.LC94:
.string "\n\n****************************************************************************"
.align 8
.LC95:
.string "* set (ds and impl) parameters to check with DSVerifier *"
.align 8
.LC96:
.string "****************************************************************************"
.text
.p2align 4
.globl validation
.type validation, @function
validation:
.LFB154:
.cfi_startproc
endbr64
mov ecx, DWORD PTR ds[rip+800]
test ecx, ecx
je .L3248
mov edx, DWORD PTR ds[rip+1608]
test edx, edx
je .L3248
mov DWORD PTR X_SIZE_VALUE[rip], 5
ret
.L3248:
push rax
.cfi_def_cfa_offset 16
lea rdi, .LC94[rip]
call puts@PLT
lea rdi, .LC95[rip]
call puts@PLT
lea rdi, .LC96[rip]
call puts@PLT
call __DSVERIFIER_assert.part.0
.cfi_endproc
.LFE154:
.size validation, .-validation
.p2align 4
.globl call_verification_task
.type call_verification_task, @function
call_verification_task:
.LFB155:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
mov rbx, rdi
sub rsp, 32
.cfi_def_cfa_offset 80
mov edx, DWORD PTR ds[rip+1608]
test edx, edx
jle .L3271
lea r13, ds[rip+808]
xor ebp, ebp
xor r14d, r14d
xor r12d, r12d
pxor xmm2, xmm2
jmp .L3261
.p2align 4,,10
.p2align 3
.L3289:
mov edx, ebp
movsd QWORD PTR 24[rsp], xmm2
xor edx, 1
and al, dl
cmovne ebp, eax
xor eax, eax
call nondet_double@PLT
movsd xmm3, QWORD PTR 16[rsp]
xor edi, edi
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 24[rsp]
movsd QWORD PTR 0[r13], xmm0
movapd xmm4, xmm3
subsd xmm4, xmm1
comisd xmm0, xmm4
jb .L3259
addsd xmm1, xmm3
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L3259:
xor eax, eax
movsd QWORD PTR 8[rsp], xmm2
call __ESBMC_assume@PLT
movsd xmm2, QWORD PTR 8[rsp]
.L3254:
add r14d, 1
add r13, 8
cmp DWORD PTR ds[rip+1608], r14d
jle .L3253
.L3261:
movsd xmm1, QWORD PTR 1616[r13]
comisd xmm1, xmm2
jbe .L3254
movsd xmm3, QWORD PTR 0[r13]
mulsd xmm1, xmm3
divsd xmm1, QWORD PTR .LC97[rip]
comisd xmm2, xmm1
jbe .L3256
xorpd xmm1, XMMWORD PTR .LC8[rip]
.L3256:
ucomisd xmm1, xmm2
movsd QWORD PTR 16[rsp], xmm3
movsd QWORD PTR 8[rsp], xmm1
setnp al
cmovne eax, r12d
mov edx, eax
and dl, bpl
je .L3289
mov ebp, edx
jmp .L3254
.p2align 4,,10
.p2align 3
.L3271:
xor ebp, ebp
.p2align 4,,10
.p2align 3
.L3253:
mov eax, DWORD PTR ds[rip+800]
test eax, eax
jle .L3262
lea r13, ds[rip]
xor r14d, r14d
pxor xmm2, xmm2
xor r12d, r12d
jmp .L3270
.p2align 4,,10
.p2align 3
.L3290:
mov edx, ebp
movsd QWORD PTR 24[rsp], xmm2
xor edx, 1
and al, dl
cmovne ebp, eax
xor eax, eax
call nondet_double@PLT
movsd xmm3, QWORD PTR 16[rsp]
xor edi, edi
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 24[rsp]
movsd QWORD PTR 0[r13], xmm0
movapd xmm4, xmm3
subsd xmm4, xmm1
comisd xmm0, xmm4
jb .L3268
addsd xmm1, xmm3
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L3268:
xor eax, eax
movsd QWORD PTR 8[rsp], xmm2
call __ESBMC_assume@PLT
movsd xmm2, QWORD PTR 8[rsp]
.L3263:
add r14d, 1
add r13, 8
cmp DWORD PTR ds[rip+800], r14d
jle .L3262
.L3270:
movsd xmm1, QWORD PTR 1624[r13]
comisd xmm1, xmm2
jbe .L3263
movsd xmm3, QWORD PTR 0[r13]
mulsd xmm1, xmm3
divsd xmm1, QWORD PTR .LC97[rip]
comisd xmm2, xmm1
jbe .L3265
xorpd xmm1, XMMWORD PTR .LC8[rip]
.L3265:
ucomisd xmm1, xmm2
movsd QWORD PTR 16[rsp], xmm3
movsd QWORD PTR 8[rsp], xmm1
setnp al
cmovne eax, r12d
mov edx, eax
and dl, bpl
je .L3290
mov ebp, edx
jmp .L3263
.p2align 4,,10
.p2align 3
.L3262:
add rsp, 32
.cfi_def_cfa_offset 48
mov rcx, rbx
xor eax, eax
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
jmp rcx
.cfi_endproc
.LFE155:
.size call_verification_task, .-call_verification_task
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB153:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
xor eax, eax
call initialization
xor eax, eax
call validation
lea rdi, verify_overflow[rip]
mov DWORD PTR rounding_mode[rip], 1
call call_verification_task
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE153:
.size main, .-main
.text
.p2align 4
.globl call_closedloop_verification_task
.type call_closedloop_verification_task, @function
call_closedloop_verification_task:
.LFB156:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 32
.cfi_def_cfa_offset 80
mov edx, DWORD PTR plant[rip+1608]
test edx, edx
jle .L3312
lea r12, plant[rip+808]
xor r14d, r14d
xor ebx, ebx
xor r13d, r13d
pxor xmm2, xmm2
jmp .L3302
.p2align 4,,10
.p2align 3
.L3330:
mov edx, ebx
movsd QWORD PTR 24[rsp], xmm2
xor edx, 1
and al, dl
cmovne ebx, eax
xor eax, eax
call nondet_double@PLT
movsd xmm3, QWORD PTR 16[rsp]
xor edi, edi
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 24[rsp]
movsd QWORD PTR [r12], xmm0
movapd xmm4, xmm3
subsd xmm4, xmm1
comisd xmm0, xmm4
jb .L3300
addsd xmm1, xmm3
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L3300:
xor eax, eax
movsd QWORD PTR 8[rsp], xmm2
call __ESBMC_assume@PLT
movsd xmm2, QWORD PTR 8[rsp]
.L3295:
add r14d, 1
add r12, 8
cmp DWORD PTR plant[rip+1608], r14d
jle .L3294
.L3302:
movsd xmm1, QWORD PTR 1616[r12]
comisd xmm1, xmm2
jbe .L3295
movsd xmm3, QWORD PTR [r12]
mulsd xmm1, xmm3
divsd xmm1, QWORD PTR .LC97[rip]
comisd xmm2, xmm1
jbe .L3297
xorpd xmm1, XMMWORD PTR .LC8[rip]
.L3297:
ucomisd xmm1, xmm2
movsd QWORD PTR 16[rsp], xmm3
movsd QWORD PTR 8[rsp], xmm1
setnp al
cmovne eax, r13d
mov edx, eax
and dl, bl
je .L3330
mov ebx, edx
jmp .L3295
.p2align 4,,10
.p2align 3
.L3312:
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L3294:
mov eax, DWORD PTR plant[rip+800]
test eax, eax
jle .L3303
lea r12, plant[rip]
xor r14d, r14d
pxor xmm2, xmm2
xor r13d, r13d
jmp .L3311
.p2align 4,,10
.p2align 3
.L3331:
mov edx, ebx
movsd QWORD PTR 24[rsp], xmm2
xor edx, 1
and al, dl
cmovne ebx, eax
xor eax, eax
call nondet_double@PLT
movsd xmm3, QWORD PTR 16[rsp]
xor edi, edi
movsd xmm1, QWORD PTR 8[rsp]
movsd xmm2, QWORD PTR 24[rsp]
movsd QWORD PTR [r12], xmm0
movapd xmm4, xmm3
subsd xmm4, xmm1
comisd xmm0, xmm4
jb .L3309
addsd xmm1, xmm3
xor edi, edi
comisd xmm1, xmm0
setnb dil
.L3309:
xor eax, eax
movsd QWORD PTR 8[rsp], xmm2
call __ESBMC_assume@PLT
movsd xmm2, QWORD PTR 8[rsp]
.L3304:
add r14d, 1
add r12, 8
cmp DWORD PTR plant[rip+800], r14d
jle .L3303
.L3311:
movsd xmm1, QWORD PTR 1624[r12]
comisd xmm1, xmm2
jbe .L3304
movsd xmm3, QWORD PTR [r12]
mulsd xmm1, xmm3
divsd xmm1, QWORD PTR .LC97[rip]
comisd xmm2, xmm1
jbe .L3306
xorpd xmm1, XMMWORD PTR .LC8[rip]
.L3306:
ucomisd xmm1, xmm2
movsd QWORD PTR 16[rsp], xmm3
movsd QWORD PTR 8[rsp], xmm1
setnp al
cmovne eax, r13d
mov edx, eax
and dl, bl
je .L3331
mov ebx, edx
jmp .L3304
.p2align 4,,10
.p2align 3
.L3303:
add rsp, 32
.cfi_def_cfa_offset 48
mov rcx, rbp
xor eax, eax
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
jmp rcx
.cfi_endproc
.LFE156:
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.section .rodata
.align 16
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 21
__PRETTY_FUNCTION__.0:
.string "verify_observability"
.align 16
.type __PRETTY_FUNCTION__.1, @object
.size __PRETTY_FUNCTION__.1, 30
__PRETTY_FUNCTION__.1:
.string "verify_controllability_double"
.align 16
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 23
__PRETTY_FUNCTION__.2:
.string "verify_controllability"
.align 16
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 26
__PRETTY_FUNCTION__.3:
.string "verify_safety_state_space"
.align 16
.type __PRETTY_FUNCTION__.5, @object
.size __PRETTY_FUNCTION__.5, 17
__PRETTY_FUNCTION__.5:
.string "verify_stability"
.align 16
.type __PRETTY_FUNCTION__.6, @object
.size __PRETTY_FUNCTION__.6, 22
__PRETTY_FUNCTION__.6:
.string "verify_generic_timing"
.align 16
.type __PRETTY_FUNCTION__.7, @object
.size __PRETTY_FUNCTION__.7, 30
__PRETTY_FUNCTION__.7:
.string "verify_zero_input_limit_cycle"
.align 16
.type __PRETTY_FUNCTION__.8, @object
.size __PRETTY_FUNCTION__.8, 31
__PRETTY_FUNCTION__.8:
.string "verify_limit_cycle_state_space"
.align 8
.type __PRETTY_FUNCTION__.9, @object
.size __PRETTY_FUNCTION__.9, 15
__PRETTY_FUNCTION__.9:
.string "initialization"
.align 32
.type __PRETTY_FUNCTION__.10, @object
.size __PRETTY_FUNCTION__.10, 39
__PRETTY_FUNCTION__.10:
.string "double_transposed_direct_form_2_MSP430"
.align 16
.type __PRETTY_FUNCTION__.11, @object
.size __PRETTY_FUNCTION__.11, 28
__PRETTY_FUNCTION__.11:
.string "double_direct_form_2_MSP430"
.align 16
.type __PRETTY_FUNCTION__.12, @object
.size __PRETTY_FUNCTION__.12, 28
__PRETTY_FUNCTION__.12:
.string "double_direct_form_1_MSP430"
.align 16
.type __PRETTY_FUNCTION__.13, @object
.size __PRETTY_FUNCTION__.13, 21
__PRETTY_FUNCTION__.13:
.string "iirIItOutTime_double"
.align 8
.type __PRETTY_FUNCTION__.14, @object
.size __PRETTY_FUNCTION__.14, 14
__PRETTY_FUNCTION__.14:
.string "iirIItOutTime"
.align 8
.type __PRETTY_FUNCTION__.15, @object
.size __PRETTY_FUNCTION__.15, 13
__PRETTY_FUNCTION__.15:
.string "iirIIOutTime"
.align 8
.type __PRETTY_FUNCTION__.16, @object
.size __PRETTY_FUNCTION__.16, 9
__PRETTY_FUNCTION__.16:
.string "snrPoint"
.align 8
.type __PRETTY_FUNCTION__.17, @object
.size __PRETTY_FUNCTION__.17, 9
__PRETTY_FUNCTION__.17:
.string "snrPower"
.align 8
.type __PRETTY_FUNCTION__.18, @object
.size __PRETTY_FUNCTION__.18, 12
__PRETTY_FUNCTION__.18:
.string "snrVariance"
.align 16
.type __PRETTY_FUNCTION__.19, @object
.size __PRETTY_FUNCTION__.19, 26
__PRETTY_FUNCTION__.19:
.string "double_check_oscillations"
.align 16
.type __PRETTY_FUNCTION__.20, @object
.size __PRETTY_FUNCTION__.20, 24
__PRETTY_FUNCTION__.20:
.string "__DSVERIFIER_assert_msg"
.align 16
.type __PRETTY_FUNCTION__.21, @object
.size __PRETTY_FUNCTION__.21, 20
__PRETTY_FUNCTION__.21:
.string "__DSVERIFIER_assert"
.globl impl
.data
.align 32
.type impl, @object
.size impl, 56
impl:
.long 12
.long 4
.long 0
.long 1072693248
.long 0
.long -1074790400
.zero 32
.globl ds
.align 32
.type ds, @object
.size ds, 3224
ds:
.long 0
.long 1072693248
.long 0
.long 0
.long 0
.long -1074790400
.zero 776
.long 3
.zero 4
.long 0
.long 1084180480
.long 0
.long -1062256640
.long 0
.long 1084176384
.zero 776
.long 3
.zero 4
.long -755914244
.long 1062232653
.zero 1600
.globl plant_cbmc
.bss
.align 32
.type plant_cbmc, @object
.size plant_cbmc, 3224
plant_cbmc:
.zero 3224
.globl _controller_double
.align 32
.type _controller_double, @object
.size _controller_double, 1040
_controller_double:
.zero 1040
.globl _controller_fxp
.align 32
.type _controller_fxp, @object
.size _controller_fxp, 1040
_controller_fxp:
.zero 1040
.globl new_stateFWL
.align 32
.type new_stateFWL, @object
.size new_stateFWL, 128
new_stateFWL:
.zero 128
.globl new_state
.align 32
.type new_state, @object
.size new_state, 128
new_state:
.zero 128
.globl generic_timer
.align 4
.type generic_timer, @object
.size generic_timer, 4
generic_timer:
.zero 4
.globl next
.data
.align 8
.type next, @object
.size next, 8
next:
.quad 1
.section .rodata
.align 32
.type scale_factor_inv, @object
.size scale_factor_inv, 248
scale_factor_inv:
.long 0
.long 1072693248
.long 0
.long 1071644672
.long 0
.long 1070596096
.long 0
.long 1069547520
.long 0
.long 1068498944
.long 0
.long 1067450368
.long 0
.long 1066401792
.long 0
.long 1065353216
.long 0
.long 1064304640
.long 0
.long 1063256064
.long 0
.long 1062207488
.long 0
.long 1061158912
.long 0
.long 1060110336
.long 0
.long 1059061760
.long 0
.long 1058013184
.long 0
.long 1056964608
.long 147574
.long 1055916032
.long -295148
.long 1054867455
.long 442722
.long 1053818880
.long 442722
.long 1052770304
.long -3836923
.long 1051721727
.long -3836923
.long 1050673151
.long -3836923
.long 1049624575
.long 16971005
.long 1048576000
.long 16971005
.long 1047527424
.long -117173718
.long 1046478847
.long -117173718
.long 1045430271
.long 243644596
.long 1044381696
.long -721636628
.long 1043333119
.long -721636628
.long 1042284543
.long 2057033325
.long 1041235968
.align 32
.type scale_factor, @object
.size scale_factor, 248
scale_factor:
.long 0
.long 1072693248
.long 0
.long 1073741824
.long 0
.long 1074790400
.long 0
.long 1075838976
.long 0
.long 1076887552
.long 0
.long 1077936128
.long 0
.long 1078984704
.long 0
.long 1080033280
.long 0
.long 1081081856
.long 0
.long 1082130432
.long 0
.long 1083179008
.long 0
.long 1084227584
.long 0
.long 1085276160
.long 0
.long 1086324736
.long 0
.long 1087373312
.long 0
.long 1088421888
.long 0
.long 1089470464
.long 0
.long 1090519040
.long 0
.long 1091567616
.long 0
.long 1092616192
.long 0
.long 1093664768
.long 0
.long 1094713344
.long 0
.long 1095761920
.long 0
.long 1096810496
.long 0
.long 1097859072
.long 0
.long 1098907648
.long 0
.long 1099956224
.long 0
.long 1101004800
.long 0
.long 1102053376
.long 0
.long 1103101952
.long 0
.long 1104150528
.globl _fxp_imask
.bss
.align 8
.type _fxp_imask, @object
.size _fxp_imask, 8
_fxp_imask:
.zero 8
.globl _fxp_fmask
.align 8
.type _fxp_fmask, @object
.size _fxp_fmask, 8
_fxp_fmask:
.zero 8
.globl _dbl_min
.align 8
.type _dbl_min, @object
.size _dbl_min, 8
_dbl_min:
.zero 8
.globl _dbl_max
.align 8
.type _dbl_max, @object
.size _dbl_max, 8
_dbl_max:
.zero 8
.globl _fxp_max
.align 8
.type _fxp_max, @object
.size _fxp_max, 8
_fxp_max:
.zero 8
.globl _fxp_min
.align 8
.type _fxp_min, @object
.size _fxp_min, 8
_fxp_min:
.zero 8
.globl _fxp_minus_one
.align 8
.type _fxp_minus_one, @object
.size _fxp_minus_one, 8
_fxp_minus_one:
.zero 8
.globl _fxp_half
.align 8
.type _fxp_half, @object
.size _fxp_half, 8
_fxp_half:
.zero 8
.globl _fxp_one
.align 8
.type _fxp_one, @object
.size _fxp_one, 8
_fxp_one:
.zero 8
.globl rounding_mode
.align 4
.type rounding_mode, @object
.size rounding_mode, 4
rounding_mode:
.zero 4
.globl overflow_mode
.data
.align 4
.type overflow_mode, @object
.size overflow_mode, 4
overflow_mode:
.long 1
.globl X_SIZE_VALUE
.bss
.align 4
.type X_SIZE_VALUE, @object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.zero 4
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 0
.align 4
.LC1:
.long 1092616192
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC2:
.long -2147483648
.long 0
.long 0
.long 0
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC3:
.long -1998362383
.long 1055193269
.align 8
.LC6:
.long 0
.long 1072693248
.align 8
.LC7:
.long 0
.long 0
.section .rodata.cst16
.align 16
.LC8:
.long 0
.long -2147483648
.long 0
.long 0
.section .rodata.cst8
.align 8
.LC11:
.long 0
.long 1071644672
.align 8
.LC30:
.long 0
.long 1089470464
.align 8
.LC31:
.long 0
.long 1088421824
.align 8
.LC32:
.long 8388608
.long 1104150400
.align 8
.LC33:
.long -1574947053
.long 1075974094
.align 8
.LC34:
.long -1574947053
.long 1074925518
.section .rodata.cst4
.align 4
.LC35:
.long 1176256410
.align 4
.LC38:
.long 1125515264
.align 4
.LC39:
.long -1021968384
.section .rodata.cst8
.align 8
.LC41:
.long 0
.long 1097761920
.align 8
.LC42:
.long 1202590843
.long 1065646817
.align 8
.LC48:
.long 0
.long 1079771136
.align 8
.LC54:
.long 0
.long 1075314688
.align 8
.LC55:
.long 0
.long 1079902208
.align 8
.LC56:
.long 0
.long 1085517824
.align 8
.LC57:
.long 0
.long 1091970560
.align 8
.LC58:
.long 0
.long 1099106472
.align 8
.LC61:
.long 0
.long 1077411840
.align 8
.LC62:
.long 0
.long 1082556416
.align 8
.LC63:
.long 0
.long 1088663552
.align 8
.LC64:
.long 0
.long 1095479168
.align 8
.LC65:
.long 0
.long 1074266112
.align 8
.LC66:
.long 0
.long 1075052544
.align 8
.LC67:
.long 0
.long 1075576832
.section .rodata.cst4
.align 4
.LC69:
.long 1056964608
.align 4
.LC70:
.long 1069547520
.section .rodata.cst8
.align 8
.LC90:
.long 1413754136
.long 1074340347
.align 8
.LC97:
.long 0
.long 1079574528
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100113.c"
.text
.global __aeabi_fcmpeq
.global __aeabi_fdiv
.global __aeabi_fmul
.global __aeabi_fsub
.global __aeabi_f2d
.global __aeabi_dadd
.global __aeabi_ddiv
.global __aeabi_d2f
.global __aeabi_fadd
.global __aeabi_fcmplt
.global __aeabi_dcmple
.align 2
.syntax unified
.arm
.fpu softvfp
.type sqrt3, %function
sqrt3:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r1, #0
mov r5, r0
bl __aeabi_fcmpeq
cmp r0, #0
movne r4, #0
bne .L1
mov r0, r5
ldr r1, .L12
bl __aeabi_fdiv
mov r10, #1
mov r4, r0
mov fp, #0
ldr r8, .L12+4
ldr r9, .L12+8
.L5:
mov r1, r4
mov r0, r4
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
bl __aeabi_f2d
mov r6, r0
mov r0, r4
mov r7, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
bl __aeabi_d2f
mov r1, r0
mov r0, r4
bl __aeabi_fadd
mov r1, r0
mov r4, r0
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
mov r1, fp
mov r6, r0
bl __aeabi_fcmplt
add r3, r6, #-2147483648
cmp r0, #0
movne r6, r3
mov r0, r6
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmple
cmp r0, #0
add r10, r10, #1
beq .L11
.L1:
mov r0, r4
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L11:
cmp r10, #20
bne .L5
mov r0, r4
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L13:
.align 2
.L12:
.word 1092616192
.word -1998362383
.word 1055193269
.size sqrt3, .-sqrt3
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/compatibility.h\000"
.align 2
.LC1:
.ascii "expression\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert.part.0, %function
__DSVERIFIER_assert.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #36
push {r4, lr}
ldr r3, .L16
ldr r1, .L16+4
ldr r0, .L16+8
bl __assert_fail
.L17:
.align 2
.L16:
.word .LANCHOR0
.word .LC0
.word .LC1
.size __DSVERIFIER_assert.part.0, .-__DSVERIFIER_assert.part.0
.align 2
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert_msg.part.0, %function
__DSVERIFIER_assert_msg.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #41
push {r4, lr}
ldr r3, .L20
ldr r1, .L20+4
ldr r0, .L20+8
bl __assert_fail
.L21:
.align 2
.L20:
.word .LANCHOR0+20
.word .LC0
.word .LC1
.size __DSVERIFIER_assert_msg.part.0, .-__DSVERIFIER_assert_msg.part.0
.global __aeabi_dmul
.align 2
.syntax unified
.arm
.fpu softvfp
.type double_matrix_multiplication.part.0, %function
double_matrix_multiplication.part.0:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r0, #0
sub sp, sp, #20
str r0, [sp, #12]
str r1, [sp, #4]
beq .L22
mov fp, r2
mov lr, #0
mov r0, #0
mov r1, #0
ldr r4, [sp, #12]
ldr r5, [sp, #60]
.L23:
cmp fp, #0
movne r2, #0
addne ip, r5, lr, lsl #5
beq .L28
.L25:
add r2, r2, #1
cmp r2, fp
stm ip!, {r0-r1}
bne .L25
.L28:
add lr, lr, #1
cmp lr, r4
bne .L23
mov r2, #0
str r2, [sp, #8]
ldr r2, [sp, #4]
str r3, [sp]
add r9, r3, r2, lsl #3
.L26:
cmp fp, #0
beq .L30
mov r10, #0
ldr r3, [sp, #60]
ldr r2, [sp, #8]
add r8, r3, r2, lsl #5
.L33:
ldr r3, [sp, #4]
cmp r3, #0
beq .L32
ldmia r8, {r4-r5}
ldr r3, [sp, #56]
ldr r7, [sp]
add r6, r3, r10, lsl #3
.L29:
ldmia r6, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
cmp r7, r9
stm r8, {r4-r5}
add r6, r6, #32
bne .L29
.L32:
add r10, r10, #1
cmp fp, r10
add r8, r8, #8
bne .L33
.L30:
ldr r3, [sp, #8]
ldr r2, [sp, #12]
add r3, r3, #1
str r3, [sp, #8]
cmp r2, r3
ldr r3, [sp]
add r9, r9, #32
add r3, r3, #32
str r3, [sp]
bne .L26
.L22:
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size double_matrix_multiplication.part.0, .-double_matrix_multiplication.part.0
.section .rodata.str1.4
.align 2
.LC2:
.ascii "\012\012*******************************************"
.ascii "*********************************\000"
.align 2
.LC3:
.ascii "* set (ds and impl) parameters to check with DSVeri"
.ascii "fier *\000"
.align 2
.LC4:
.ascii "***************************************************"
.ascii "*************************\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type validation.part.0, %function
validation.part.0:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L45
bl puts
ldr r0, .L45+4
bl puts
ldr r0, .L45+8
bl puts
bl __DSVERIFIER_assert.part.0
.L46:
.align 2
.L45:
.word .LC2
.word .LC3
.word .LC4
.size validation.part.0, .-validation.part.0
.align 2
.global __DSVERIFIER_assume
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assume, %function
__DSVERIFIER_assume:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b __ESBMC_assume
.size __DSVERIFIER_assume, .-__DSVERIFIER_assume
.align 2
.global __DSVERIFIER_assert
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert, %function
__DSVERIFIER_assert:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #0
bxne lr
push {r4, lr}
bl __DSVERIFIER_assert.part.0
.size __DSVERIFIER_assert, .-__DSVERIFIER_assert
.section .rodata.str1.4
.align 2
.LC5:
.ascii "%s\000"
.text
.align 2
.global __DSVERIFIER_assert_msg
.syntax unified
.arm
.fpu softvfp
.type __DSVERIFIER_assert_msg, %function
__DSVERIFIER_assert_msg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r0, .L56
bl printf
cmp r4, #0
popne {r4, pc}
bl __DSVERIFIER_assert_msg.part.0
.L57:
.align 2
.L56:
.word .LC5
.size __DSVERIFIER_assert_msg, .-__DSVERIFIER_assert_msg
.global __aeabi_idiv
.global __aeabi_idivmod
.align 2
.global wrap
.syntax unified
.arm
.fpu softvfp
.type wrap, %function
wrap:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
cmp r1, r0
sub r5, r2, r1
mov r4, r1
mov r6, r0
add r5, r5, #1
ble .L59
mov r1, r5
sub r0, r4, r0
bl __aeabi_idiv
add r0, r0, #1
mla r6, r5, r0, r6
.L59:
mov r1, r5
sub r0, r6, r4
bl __aeabi_idivmod
add r0, r1, r4
pop {r4, r5, r6, pc}
.size wrap, .-wrap
.align 2
.global fxp_get_int_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_int_part, %function
fxp_get_int_part:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L64
cmp r0, #0
ldr r3, [r3]
rsblt r0, r0, #0
andlt r0, r0, r3
rsblt r0, r0, #0
andge r0, r0, r3
bx lr
.L65:
.align 2
.L64:
.word _fxp_imask
.size fxp_get_int_part, .-fxp_get_int_part
.align 2
.global fxp_get_frac_part
.syntax unified
.arm
.fpu softvfp
.type fxp_get_frac_part, %function
fxp_get_frac_part:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L69
cmp r0, #0
ldr r3, [r3]
rsblt r0, r0, #0
andlt r0, r0, r3
rsblt r0, r0, #0
andge r0, r0, r3
bx lr
.L70:
.align 2
.L69:
.word _fxp_fmask
.size fxp_get_frac_part, .-fxp_get_frac_part
.align 2
.global fxp_quantize
.syntax unified
.arm
.fpu softvfp
.type fxp_quantize, %function
fxp_quantize:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L82
push {r4, r5, r6, lr}
ldr r3, [r3]
mov r4, r0
cmp r3, #2
beq .L80
cmp r3, #3
beq .L81
.L78:
mov r0, r4
pop {r4, r5, r6, pc}
.L81:
ldr r2, .L82+4
ldr r3, .L82+8
ldr r6, [r2]
ldr r3, [r3]
cmp r0, r6
blt .L74
cmp r0, r3
ble .L78
sub r3, r3, r6
add r5, r3, #1
.L76:
sub r0, r4, r6
mov r1, r5
bl __aeabi_idivmod
add r4, r1, r6
mov r0, r4
pop {r4, r5, r6, pc}
.L80:
ldr r3, .L82+4
ldr r3, [r3]
cmp r3, r0
movgt r4, r3
bgt .L78
ldr r3, .L82+8
ldr r3, [r3]
cmp r4, r3
movge r4, r3
mov r0, r4
pop {r4, r5, r6, pc}
.L74:
sub r3, r3, r6
add r5, r3, #1
mov r1, r5
sub r0, r6, r0
bl __aeabi_idiv
add r0, r0, #1
mla r4, r5, r0, r4
b .L76
.L83:
.align 2
.L82:
.word .LANCHOR1
.word _fxp_min
.word _fxp_max
.size fxp_quantize, .-fxp_quantize
.section .rodata.str1.4
.align 2
.LC6:
.ascii "An Overflow Occurred in system's output\000"
.text
.align 2
.global fxp_verify_overflow
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow, %function
fxp_verify_overflow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r0, .L89
bl printf
ldr r3, .L89+4
ldr r3, [r3]
cmp r3, r4
bge .L88
.L85:
bl __DSVERIFIER_assert.part.0
.L88:
ldr r3, .L89+8
ldr r3, [r3]
cmp r3, r4
pople {r4, pc}
b .L85
.L90:
.align 2
.L89:
.word .LC6
.word _fxp_max
.word _fxp_min
.size fxp_verify_overflow, .-fxp_verify_overflow
.align 2
.global fxp_verify_overflow_node
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_node, %function
fxp_verify_overflow_node:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
ldr r0, .L96
bl printf
ldr r3, .L96+4
ldr r3, [r3]
cmp r3, r4
bge .L95
.L92:
bl __DSVERIFIER_assert.part.0
.L95:
ldr r3, .L96+8
ldr r3, [r3]
cmp r3, r4
pople {r4, pc}
b .L92
.L97:
.align 2
.L96:
.word .LC5
.word _fxp_max
.word _fxp_min
.size fxp_verify_overflow_node, .-fxp_verify_overflow_node
.align 2
.global fxp_verify_overflow_array
.syntax unified
.arm
.fpu softvfp
.type fxp_verify_overflow_array, %function
fxp_verify_overflow_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
bxle lr
push {r4, r5, r6, lr}
sub r4, r0, #4
add r5, r4, r1, lsl #2
.L100:
ldr r0, [r4, #4]!
bl fxp_verify_overflow
cmp r4, r5
bne .L100
pop {r4, r5, r6, pc}
.size fxp_verify_overflow_array, .-fxp_verify_overflow_array
.align 2
.global fxp_int_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_int_to_fxp, %function
fxp_int_to_fxp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L107
ldr r3, [r3]
mul r0, r3, r0
bx lr
.L108:
.align 2
.L107:
.word _fxp_one
.size fxp_int_to_fxp, .-fxp_int_to_fxp
.align 2
.global fxp_to_int
.syntax unified
.arm
.fpu softvfp
.type fxp_to_int, %function
fxp_to_int:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L112
cmp r0, #0
ldr r3, [r3]
addge r0, r0, r3
sublt r0, r0, r3
ldr r3, .L112+4
ldr r3, [r3, #12]
asr r0, r0, r3
bx lr
.L113:
.align 2
.L112:
.word _fxp_half
.word .LANCHOR1
.size fxp_to_int, .-fxp_to_int
.global __aeabi_fcmpge
.global __aeabi_d2iz
.global __aeabi_dsub
.align 2
.global fxp_float_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp, %function
fxp_float_to_fxp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L121
push {r4, r5, r6, lr}
ldr r3, [r3, #12]
ldr r4, .L121+4
mov r6, r0
add r4, r4, r3, lsl #3
bl __aeabi_f2d
add r3, r4, #48
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, #0
bl __aeabi_fcmpge
cmp r0, #0
mov r1, r5
mov r0, r4
mov r2, #0
ldr r3, .L121+8
beq .L119
bl __aeabi_dadd
bl __aeabi_d2iz
pop {r4, r5, r6, pc}
.L119:
bl __aeabi_dsub
bl __aeabi_d2iz
pop {r4, r5, r6, pc}
.L122:
.align 2
.L121:
.word .LANCHOR1
.word .LANCHOR0
.word 1071644672
.size fxp_float_to_fxp, .-fxp_float_to_fxp
.global __aeabi_dcmpge
.global __aeabi_i2d
.global __aeabi_dcmpeq
.global __aeabi_dcmplt
.align 2
.global fxp_double_to_fxp
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp, %function
fxp_double_to_fxp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r2, .L139
ldr r3, .L139+4
ldr r2, [r2, #12]
push {r4, r5, r6, r7, r8, lr}
add r3, r3, r2, lsl #3
add r3, r3, #48
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
bl __aeabi_dmul
ldr r3, .L139+8
mov r6, r0
ldr r3, [r3]
mov r7, r1
cmp r3, #0
bne .L124
mov r1, r5
mov r2, #0
mov r3, #0
mov r0, r4
bl __aeabi_dcmpge
cmp r0, #0
mov r1, r7
mov r0, r6
mov r2, #0
ldr r3, .L139+12
beq .L138
bl __aeabi_dadd
bl __aeabi_d2iz
mov r8, r0
.L123:
mov r0, r8
pop {r4, r5, r6, r7, r8, pc}
.L124:
cmp r3, #1
bne .L123
bl __aeabi_d2iz
mov r8, r0
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
clz ip, r0
mov r1, r5
lsr ip, ip, #5
mov r0, r4
mov r2, #0
mov r3, #0
mov r4, ip
bl __aeabi_dcmplt
cmp r0, #0
moveq ip, #0
andne ip, r4, #1
cmp ip, #0
beq .L123
mov r0, r6
mov r1, r7
mov r2, #0
ldr r3, .L139+16
.L138:
bl __aeabi_dsub
bl __aeabi_d2iz
mov r8, r0
mov r0, r8
pop {r4, r5, r6, r7, r8, pc}
.L140:
.align 2
.L139:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
.word 1071644672
.word 1072693248
.size fxp_double_to_fxp, .-fxp_double_to_fxp
.align 2
.global fxp_float_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_float_to_fxp_array, %function
fxp_float_to_fxp_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
ldr ip, .L155
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr ip, [ip, #12]
ldr r3, .L155+4
sub r4, r0, #4
add r3, r3, ip, lsl #3
mov r10, #0
add r7, r3, #48
ldmia r7, {r6-r7}
mov fp, r4
add r9, r4, r2, lsl #2
sub r8, r1, #4
b .L146
.L154:
bl __aeabi_dadd
bl __aeabi_d2iz
.L145:
cmp fp, r9
str r0, [r8, #4]!
popeq {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L146:
ldr r5, [fp, #4]! @ float
mov r0, r5
bl __aeabi_f2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r5
mov r1, r10
mov r4, r2
mov r5, r3
bl __aeabi_fcmpge
cmp r0, #0
mov r1, r5
mov r0, r4
mov r2, #0
ldr r3, .L155+8
bne .L154
bl __aeabi_dsub
bl __aeabi_d2iz
b .L145
.L156:
.align 2
.L155:
.word .LANCHOR1
.word .LANCHOR0
.word 1071644672
.size fxp_float_to_fxp_array, .-fxp_float_to_fxp_array
.align 2
.global fxp_double_to_fxp_array
.syntax unified
.arm
.fpu softvfp
.type fxp_double_to_fxp_array, %function
fxp_double_to_fxp_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
push {r4, r5, r6, lr}
mov r4, r0
sub r5, r1, #4
add r6, r0, r2, lsl #3
.L159:
ldmia r4!, {r0-r1}
bl fxp_double_to_fxp
cmp r4, r6
str r0, [r5, #4]!
bne .L159
pop {r4, r5, r6, pc}
.size fxp_double_to_fxp_array, .-fxp_double_to_fxp_array
.align 2
.global fxp_to_float
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float, %function
fxp_to_float:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L167
push {r4, lr}
ldr r3, [r3, #12]
ldr r4, .L167+4
add r4, r4, r3, lsl #3
bl __aeabi_i2d
add r3, r4, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
bl __aeabi_d2f
pop {r4, pc}
.L168:
.align 2
.L167:
.word .LANCHOR1
.word .LANCHOR0
.size fxp_to_float, .-fxp_to_float
.align 2
.global fxp_to_double
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double, %function
fxp_to_double:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L171
push {r4, lr}
ldr r3, [r3, #12]
ldr r4, .L171+4
add r4, r4, r3, lsl #3
bl __aeabi_i2d
add r3, r4, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
pop {r4, pc}
.L172:
.align 2
.L171:
.word .LANCHOR1
.word .LANCHOR0
.size fxp_to_double, .-fxp_to_double
.align 2
.global fxp_to_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_float_array, %function
fxp_to_float_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
ldr ip, .L181
ldr r3, .L181+4
ldr ip, [ip, #12]
push {r4, r5, r6, r7, r8, lr}
sub r4, r1, #4
add r3, r3, ip, lsl #3
add r8, r4, r2, lsl #2
sub r5, r0, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L175:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
bl __aeabi_d2f
cmp r4, r8
str r0, [r5, #4]! @ float
bne .L175
pop {r4, r5, r6, r7, r8, pc}
.L182:
.align 2
.L181:
.word .LANCHOR1
.word .LANCHOR0
.size fxp_to_float_array, .-fxp_to_float_array
.align 2
.global fxp_to_double_array
.syntax unified
.arm
.fpu softvfp
.type fxp_to_double_array, %function
fxp_to_double_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
push {r4, r5, r6, r7, r8, lr}
mov r8, r0
ldr r0, .L191
ldr r3, .L191+4
ldr r0, [r0, #12]
sub r4, r1, #4
add r3, r3, r0, lsl #3
add r5, r4, r2, lsl #2
add r7, r3, #296
ldmia r7, {r6-r7}
.L185:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r5
stm r8!, {r0-r1}
bne .L185
pop {r4, r5, r6, r7, r8, pc}
.L192:
.align 2
.L191:
.word .LANCHOR1
.word .LANCHOR0
.size fxp_to_double_array, .-fxp_to_double_array
.align 2
.global fxp_abs
.syntax unified
.arm
.fpu softvfp
.type fxp_abs, %function
fxp_abs:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, #0
rsblt r0, r0, #0
b fxp_quantize
.size fxp_abs, .-fxp_abs
.align 2
.global fxp_add
.syntax unified
.arm
.fpu softvfp
.type fxp_add, %function
fxp_add:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
add r0, r0, r1
b fxp_quantize
.size fxp_add, .-fxp_add
.align 2
.global fxp_sub
.syntax unified
.arm
.fpu softvfp
.type fxp_sub, %function
fxp_sub:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
sub r0, r0, r1
b fxp_quantize
.size fxp_sub, .-fxp_sub
.align 2
.global fxp_mult
.syntax unified
.arm
.fpu softvfp
.type fxp_mult, %function
fxp_mult:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r3, #1
ldr r2, .L199
muls r0, r1, r0
ldr r1, [r2, #12]
sub r2, r1, #1
lsl r3, r3, r2
rsbmi r2, r0, #0
andmi r3, r3, r2
andpl r3, r3, r0
rsbmi r0, r0, r3, lsl #1
addpl r0, r0, r3, lsl #1
asrmi r0, r0, r1
asrpl r0, r0, r1
rsbmi r0, r0, #0
b fxp_quantize
.L200:
.align 2
.L199:
.word .LANCHOR1
.size fxp_mult, .-fxp_mult
.align 2
.syntax unified
.arm
.fpu softvfp
.type fxp_matrix_multiplication.part.0, %function
fxp_matrix_multiplication.part.0:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r0, #0
sub sp, sp, #20
str r0, [sp, #12]
beq .L201
mov ip, #0
mov r7, r1
mov r0, ip
mov r9, r2
ldr r2, [sp, #60]
ldr r4, [sp, #12]
sub lr, r2, #4
.L202:
cmp r9, #0
movne r2, #0
addne r1, lr, ip, lsl #4
beq .L207
.L204:
add r2, r2, #1
cmp r2, r9
str r0, [r1, #4]!
bne .L204
.L207:
add ip, ip, #1
cmp ip, r4
bne .L202
sub r3, r3, #4
str r3, [sp, #4]
mov r3, #0
str r3, [sp, #8]
.L205:
cmp r9, #0
beq .L209
mov r8, #0
ldr r3, [sp, #60]
ldr r2, [sp, #8]
ldr r6, [sp, #56]
add r5, r3, r2, lsl #4
.L212:
cmp r7, #0
beq .L211
mov fp, #0
ldr r10, [sp, #4]
ldr r4, [r5]
.L208:
ldr r1, [r6, fp, lsl #4]
ldr r0, [r10, #4]!
bl fxp_mult
add r0, r0, r4
bl fxp_quantize
add fp, fp, #1
cmp fp, r7
mov r4, r0
str r0, [r5]
bne .L208
.L211:
add r8, r8, #1
cmp r9, r8
add r6, r6, #4
add r5, r5, #4
bne .L212
.L209:
ldr r3, [sp, #8]
ldr r2, [sp, #12]
add r3, r3, #1
str r3, [sp, #8]
cmp r2, r3
ldr r3, [sp, #4]
add r3, r3, #16
str r3, [sp, #4]
bne .L205
.L201:
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size fxp_matrix_multiplication.part.0, .-fxp_matrix_multiplication.part.0
.align 2
.global fxp_div
.syntax unified
.arm
.fpu softvfp
.type fxp_div, %function
fxp_div:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r5, r0
mov r4, r1
subs r0, r1, #0
movne r0, #1
bl __ESBMC_assume
ldr r3, .L224
mov r1, r4
ldr r0, [r3, #12]
lsl r0, r5, r0
bl __aeabi_idiv
pop {r4, r5, r6, lr}
b fxp_quantize
.L225:
.align 2
.L224:
.word .LANCHOR1
.size fxp_div, .-fxp_div
.align 2
.global fxp_neg
.syntax unified
.arm
.fpu softvfp
.type fxp_neg, %function
fxp_neg:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
rsb r0, r0, #0
b fxp_quantize
.size fxp_neg, .-fxp_neg
.align 2
.global fxp_sign
.syntax unified
.arm
.fpu softvfp
.type fxp_sign, %function
fxp_sign:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, #0
bxeq lr
ldrlt r3, .L233
ldrge r3, .L233+4
ldr r0, [r3]
bx lr
.L234:
.align 2
.L233:
.word _fxp_minus_one
.word _fxp_one
.size fxp_sign, .-fxp_sign
.align 2
.global fxp_shrl
.syntax unified
.arm
.fpu softvfp
.type fxp_shrl, %function
fxp_shrl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
lsr r0, r0, r1
bx lr
.size fxp_shrl, .-fxp_shrl
.align 2
.global fxp_square
.syntax unified
.arm
.fpu softvfp
.type fxp_square, %function
fxp_square:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r1, r0
b fxp_mult
.size fxp_square, .-fxp_square
.section .rodata.str1.4
.align 2
.LC7:
.ascii "\012%i\000"
.text
.align 2
.global fxp_print_int
.syntax unified
.arm
.fpu softvfp
.type fxp_print_int, %function
fxp_print_int:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r1, r0
ldr r0, .L238
b printf
.L239:
.align 2
.L238:
.word .LC7
.size fxp_print_int, .-fxp_print_int
.section .rodata.str1.4
.align 2
.LC8:
.ascii "\012%f\000"
.text
.align 2
.global fxp_print_float
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float, %function
fxp_print_float:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L242
push {r4, lr}
ldr r3, [r3, #12]
ldr r4, .L242+4
add r4, r4, r3, lsl #3
bl __aeabi_i2d
add r3, r4, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
pop {r4, lr}
mov r2, r0
mov r3, r1
ldr r0, .L242+8
b printf
.L243:
.align 2
.L242:
.word .LANCHOR1
.word .LANCHOR0
.word .LC8
.size fxp_print_float, .-fxp_print_float
.align 2
.global fxp_print_float_array
.syntax unified
.arm
.fpu softvfp
.type fxp_print_float_array, %function
fxp_print_float_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
bxle lr
push {r4, r5, r6, r7, r8, r9, r10, lr}
sub r5, r0, #4
ldr r9, .L252
ldr r8, .L252+4
ldr r7, .L252+8
add r6, r5, r1, lsl #2
.L246:
ldr r4, [r8, #12]
ldr r0, [r5, #4]!
add r4, r9, r4, lsl #3
bl __aeabi_i2d
add r3, r4, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r7
bl printf
cmp r6, r5
bne .L246
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L253:
.align 2
.L252:
.word .LANCHOR0
.word .LANCHOR1
.word .LC8
.size fxp_print_float_array, .-fxp_print_float_array
.section .rodata.str1.4
.align 2
.LC9:
.ascii "%s = {\000"
.align 2
.LC10:
.ascii " %jd \000"
.align 2
.LC11:
.ascii "}\000"
.text
.align 2
.global print_fxp_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_fxp_array_elements, %function
print_fxp_array_elements:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, r0
push {r4, r5, r6, lr}
mov r5, r2
mov r4, r1
ldr r0, .L259
mov r1, r3
bl printf
cmp r5, #0
ble .L255
sub r4, r4, #4
ldr r6, .L259+4
add r5, r4, r5, lsl #2
.L256:
ldr r1, [r4, #4]!
mov r0, r6
bl printf
cmp r4, r5
bne .L256
.L255:
pop {r4, r5, r6, lr}
ldr r0, .L259+8
b puts
.L260:
.align 2
.L259:
.word .LC9
.word .LC10
.word .LC11
.size print_fxp_array_elements, .-print_fxp_array_elements
.align 2
.global initialize_array
.syntax unified
.arm
.fpu softvfp
.type initialize_array, %function
initialize_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r1, #0
bxle lr
mov r2, #0
mov r3, #0
add r1, r0, r1, lsl #3
.L263:
stm r0!, {r2-r3}
cmp r0, r1
bne .L263
bx lr
.size initialize_array, .-initialize_array
.align 2
.global revert_array
.syntax unified
.arm
.fpu softvfp
.type revert_array, %function
revert_array:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r2, #0
bxle lr
push {r4, r5}
mov r3, r1
mov r4, #0
mov r5, #0
add ip, r1, r2, lsl #3
.L267:
stm r3!, {r4-r5}
cmp ip, r3
bne .L267
add r2, r0, r2, lsl #3
.L268:
ldmdb r2!, {r4-r5}
cmp r0, r2
stm r1!, {r4-r5}
bne .L268
pop {r4, r5}
bx lr
.size revert_array, .-revert_array
.global __aeabi_dcmpgt
.align 2
.global internal_pow
.syntax unified
.arm
.fpu softvfp
.type internal_pow, %function
internal_pow:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r6, r2
mov r7, r3
mov r8, r0
mov r9, r1
mov r2, #0
mov r3, #0
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
mov r4, #0
ldr r5, .L284
beq .L275
mov r10, #0
.L278:
mov r2, r8
mov r3, r9
mov r0, r4
mov r1, r5
bl __aeabi_dmul
add r10, r10, #1
mov r4, r0
mov r0, r10
mov r5, r1
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dcmplt
cmp r0, #0
bne .L278
.L275:
mov r0, r4
mov r1, r5
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L285:
.align 2
.L284:
.word 1072693248
.size internal_pow, .-internal_pow
.align 2
.global internal_abs
.syntax unified
.arm
.fpu softvfp
.type internal_abs, %function
internal_abs:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r2, #0
mov r3, #0
mov r4, r1
mov r5, r0
mov r7, r1
mov r6, r0
bl __aeabi_dcmplt
cmp r0, #0
addne r4, r4, #-2147483648
mov r0, r5
mov r1, r4
pop {r4, r5, r6, r7, r8, pc}
.size internal_abs, .-internal_abs
.align 2
.global fatorial
.syntax unified
.arm
.fpu softvfp
.type fatorial, %function
fatorial:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
subs r3, r0, #0
mov r0, #1
bxeq lr
.L293:
mov r2, r3
subs r3, r3, #1
mul r0, r2, r0
bne .L293
bx lr
.size fatorial, .-fatorial
.section .rodata.str1.4
.align 2
.LC12:
.ascii "[DEBUG] the first constraint of Jury criteria faile"
.ascii "d: (F(1) > 0)\000"
.align 2
.LC13:
.ascii "[DEBUG] the second constraint of Jury criteria fail"
.ascii "ed: (F(-1)*(-1)^n > 0)\000"
.align 2
.LC14:
.ascii "[DEBUG] the third constraint of Jury criteria faile"
.ascii "d: (abs(a0) < a_{n}*z^{n})\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC15:
.word __stack_chk_guard
.text
.align 2
.global check_stability
.syntax unified
.arm
.fpu softvfp
.type check_stability, %function
check_stability:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #60
mov r9, r1
lsl r3, r1, #1
sub r3, r3, #1
lsl r1, r1, #3
str r3, [fp, #-52]
mul r3, r1, r3
sub sp, sp, r3
ldr r3, .L354
str r1, [fp, #-56]
str r0, [fp, #-64]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
cmp r9, #0
sub r3, r9, #1
mov r10, sp
str r3, [fp, #-48]
sub sp, sp, r1
ble .L298
mov r2, sp
mov r8, r0
mov r3, r0
add r7, r1, r0
.L299:
ldmia r3!, {r0-r1}
cmp r3, r7
stm r2!, {r0-r1}
bne .L299
mov r4, #0
mov r5, #0
ldr r6, [fp, #-64]
.L300:
mov r0, r4
ldmia r6!, {r2-r3}
mov r1, r5
bl __aeabi_dadd
cmp r6, r7
mov r4, r0
mov r5, r1
bne .L300
mov r2, #0
mov r3, #0
bl __aeabi_dcmple
cmp r0, #0
bne .L298
ldmia r8!, {r0-r1}
ldr r4, [fp, #-48]
mov r5, #0
cmp r4, #0
mov r6, #0
beq .L303
.L349:
mov r3, #0
mov lr, r3
ldr ip, .L354+4
.L304:
add r3, r3, #1
cmp r3, r4
add ip, ip, #-2147483648
bne .L304
mov r2, lr
mov r3, ip
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r5
mov r1, r6
bl __aeabi_dadd
sub r4, r4, #1
cmp r4, #0
mov r5, r0
mov r6, r1
ldmia r8!, {r0-r1}
bne .L349
.L303:
mov r2, r5
mov r3, r6
bl __aeabi_dadd
ldr r2, [fp, #-48]
cmp r2, #0
ble .L306
mov r3, r4
ldr ip, .L354+4
.L307:
add r3, r3, #1
cmp r3, r2
add ip, ip, #-2147483648
bne .L307
mov r2, r4
mov r3, ip
bl __aeabi_dmul
.L306:
mov r2, #0
mov r3, #0
bl __aeabi_dcmple
cmp r0, #0
bne .L350
ldr r5, [r7, #-4]
ldr r4, [r7, #-8]
mov r1, r5
mov r2, #0
mov r3, #0
mov r0, r4
bl __aeabi_dcmplt
ldr r1, [fp, #-64]
cmp r0, #0
addne r5, r5, #-2147483648
mov r2, r4
ldmia r1, {r0-r1}
mov r3, r5
bl __aeabi_dcmplt
cmp r0, #0
bne .L312
ldr r3, [fp, #-52]
cmp r3, #0
ble .L328
ldr r3, [fp, #-56]
mov lr, r0
lsr r1, r3, #3
str r1, [fp, #-84]
mov r0, #0
mov r1, #0
mov r4, r3
add r2, r3, r10
rsb ip, r9, r9, lsl #29
ldr r5, [fp, #-52]
str r2, [fp, #-92]
lsl ip, ip, #3
.L315:
add r3, r2, ip
.L314:
stm r3!, {r0-r1}
cmp r2, r3
bne .L314
add r3, lr, #1
cmp r3, r5
add r2, r2, r4
movne lr, r3
bne .L315
.L351:
ldr r3, [fp, #-84]
mov r8, #0
rsb r3, r3, #0
str r3, [fp, #-72]
mvn r3, #0
str lr, [fp, #-88]
str r3, [fp, #-68]
.L316:
cmp r9, #0
ble .L324
ldr r3, [fp, #-84]
sub r7, r8, #2
mov r2, r3
mul r2, r7, r2
mov r7, r2
mov r2, r3
mul r2, r8, r2
str r2, [fp, #-52]
ldr r2, [fp, #-68]
mov r4, #0
mul r3, r2, r3
str r3, [fp, #-60]
add r3, r10, r7, lsl #3
ldr r2, [fp, #-92]
str r3, [fp, #-56]
ldr r3, [fp, #-72]
add r2, r2, r3, lsl #3
str r2, [fp, #-76]
sub r3, r3, #-536870911
and r2, r8, #1
str r2, [fp, #-48]
str r3, [fp, #-80]
b .L321
.L317:
ldr r3, [fp, #-48]
cmp r3, #0
bne .L352
add r3, r7, r9
add r3, r10, r3, lsl #3
ldmia r3, {r0-r1}
ldr r3, [fp, #-52]
add r6, r7, r4
add r5, r3, r4
ldr r3, [fp, #-56]
add r6, r10, r6, lsl #3
ldmia r3, {r2-r3}
bl __aeabi_ddiv
ldr r3, [fp, #-60]
add r5, r10, r5, lsl #3
add r3, r3, r4
add r3, r10, r3, lsl #3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia r6, {r0-r1}
bl __aeabi_dsub
stm r5, {r0-r1}
add r4, r4, #1
.L318:
cmp r9, r4
ble .L324
.L321:
cmp r8, #0
bne .L317
ldr r3, [fp, #-64]
add r1, r10, r4, lsl #3
add r3, r3, r4, lsl #3
add r4, r4, #1
cmp r9, r4
ldmia r3, {r2-r3}
stm r1, {r2-r3}
bgt .L321
.L324:
ldr r3, [fp, #-88]
ldr r2, [fp, #-84]
cmp r3, r8
ldr r3, [fp, #-68]
add r8, r8, #1
add r3, r3, #1
str r3, [fp, #-68]
ldr r3, [fp, #-72]
add r3, r3, r2
str r3, [fp, #-72]
bne .L316
ldmia r10, {r0-r1}
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
mov r6, #0
subs r8, r0, r6
movne r8, #1
mov r4, #0
mov r5, #0
ldr r9, [fp, #-88]
.L327:
ands r7, r6, #1
bne .L325
ldr r3, [fp, #-84]
mov r2, r4
mul r3, r6, r3
add r3, r10, r3, lsl #3
ldmia r3, {r0-r1}
mov r3, r5
bl __aeabi_dcmpge
subs r3, r0, #0
movne r3, #1
cmp r3, r8
beq .L325
.L348:
mov r0, #0
.L297:
ldr r3, .L354
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L353
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L352:
mov r3, #0
ldr r2, [fp, #-80]
ldr ip, [fp, #-76]
add r2, r2, r9
add r2, r2, #1
add r2, r10, r2, lsl #3
.L320:
add r3, r3, #1
cmp r3, r9
ldmdb r2!, {r0-r1}
stm ip!, {r0-r1}
blt .L320
mov r4, r9
sub r9, r9, #1
b .L318
.L325:
cmp r6, r9
add r6, r6, #1
bne .L327
.L328:
mov r0, #1
b .L297
.L298:
ldr r0, .L354+8
bl printf
mov r0, #0
b .L297
.L312:
ldr r0, .L354+12
bl printf
b .L348
.L350:
ldr r0, .L354+16
bl printf
mov r0, #0
b .L297
.L353:
bl __stack_chk_fail
.L355:
.align 2
.L354:
.word .LC15
.word 1072693248
.word .LC12
.word .LC14
.word .LC13
.size check_stability, .-check_stability
.align 2
.global poly_sum
.syntax unified
.arm
.fpu softvfp
.type poly_sum, %function
poly_sum:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
cmp r3, r1
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
movge r10, r3
movlt r10, r1
sub sp, sp, #28
cmp r10, #0
str r0, [sp, #4]
ble .L356
mov r8, r3
mov fp, r2
mov r7, r2
rsb r2, r3, r3, lsl #29
rsb r3, r1, r1, lsl #29
add r3, r3, r8
str r3, [sp, #8]
sub r3, r8, r1
add r2, r2, r1
str r3, [sp, #16]
sub r3, r1, r8
mov r9, r1
mov r6, r0
mov r4, #0
ldr r5, [sp, #64]
str r2, [sp, #12]
str r3, [sp, #20]
b .L362
.L367:
ldr r1, [sp, #8]
ldr r0, [sp, #20]
add r1, r4, r1
cmp r0, r4
ldmia r6, {r2-r3}
add r1, fp, r1, lsl #3
stm r5, {r2-r3}
bgt .L360
.L366:
ldmia r1, {r0-r1}
bl __aeabi_dadd
stm r5, {r0-r1}
.L360:
add r4, r4, #1
cmp r10, r4
add r5, r5, #8
add r7, r7, #8
add r6, r6, #8
beq .L356
.L362:
cmp r8, r9
blt .L367
ldr r3, [sp, #12]
ldr r2, [sp, #4]
add r3, r4, r3
add r1, r2, r3, lsl #3
ldr r3, [sp, #16]
cmp r3, r4
ldmia r7, {r2-r3}
stm r5, {r2-r3}
bgt .L360
b .L366
.L356:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size poly_sum, .-poly_sum
.align 2
.global poly_mult
.syntax unified
.arm
.fpu softvfp
.type poly_mult, %function
poly_mult:
@ args = 8, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r1, #0
ldr r9, [sp, #40]
add lr, r1, r3
pople {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
mov r8, r3
mov r7, r2
mov r10, lr
mov r2, lr
mov r4, #0
mov r5, #0
sub r3, r9, #8
sub r3, r3, r8, lsl #3
add r3, r3, lr, lsl #3
lsl r6, r8, #3
.L372:
cmp r8, #0
addgt ip, r3, r6
ble .L375
.L371:
stmdb ip!, {r4-r5}
cmp ip, r3
bne .L371
.L375:
sub r2, r2, #1
cmp r2, r8
sub r3, r3, #8
bne .L372
sub lr, lr, #1
add r9, r9, lr, lsl #3
add r6, r0, r1, lsl #3
add fp, r7, r8, lsl #3
.L373:
cmp r8, #0
movgt r5, fp
movgt r4, r9
ble .L378
.L376:
ldmdb r5!, {r2-r3}
ldmdb r6, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmdb r4!, {r0-r1}
bl __aeabi_dadd
cmp r7, r5
stm r4, {r0-r1}
bne .L376
.L378:
sub r10, r10, #1
cmp r10, r8
sub r9, r9, #8
sub r6, r6, #8
bne .L373
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size poly_mult, .-poly_mult
.section .rodata.str1.4
.align 2
.LC16:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/util.h\000"
.align 2
.LC17:
.ascii "!(window_count == window_size)\000"
.text
.align 2
.global double_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type double_check_oscillations, %function
double_check_oscillations:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldmia r0, {r2-r3}
sub sp, sp, #12
mov fp, r1
add r1, r0, r1, lsl #3
str r0, [sp, #4]
mov r4, r0
ldmdb r1, {r0-r1}
bl __aeabi_dcmpeq
clz r0, r0
lsr r0, r0, #5
bl __ESBMC_assume
cmp fp, #2
ble .L384
mov r6, #0
mov r9, #2
mov r5, r6
add r3, r4, #16
add r10, fp, #2
str r3, [sp]
.L387:
mov r4, r9
ldr r8, [sp, #4]
ldr r7, [sp]
b .L392
.L399:
ldmia r7!, {r2-r3}
ldmia r8!, {r0-r1}
bl __aeabi_dcmpeq
cmp r0, #0
beq .L390
add r6, r6, #1
cmp r6, r9
beq .L398
.L390:
add r4, r4, #1
cmp r4, r10
add r5, r5, #1
beq .L389
.L392:
cmp r5, r9
movgt r6, #0
movgt r5, r6
cmp fp, r4
bgt .L399
.L389:
ldr r3, [sp]
add r9, r9, #1
add r3, r3, #8
cmp fp, r9
add r10, r10, #1
str r3, [sp]
bne .L387
.L384:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L398:
mov r2, #209
ldr r3, .L400
ldr r1, .L400+4
ldr r0, .L400+8
bl __assert_fail
.L401:
.align 2
.L400:
.word .LANCHOR0+544
.word .LC16
.word .LC17
.size double_check_oscillations, .-double_check_oscillations
.section .rodata.str1.4
.align 2
.LC18:
.ascii "window_size %d\012\000"
.align 2
.LC19:
.ascii "%.0f == %.0f\012\000"
.align 2
.LC20:
.ascii "desired_elements %d\012\000"
.align 2
.LC21:
.ascii "found_elements %d\012\000"
.text
.align 2
.global double_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_limit_cycle, %function
double_check_limit_cycle:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub r5, r1, #-536870911
add r3, r0, r5, lsl #3
cmp r1, #1
mov r7, r1
ldmia r3, {r8-r9}
mov r6, r0
sub sp, sp, #12
lsl r5, r5, #3
ble .L413
sub r4, r1, #1
mov r10, #1
add fp, r0, r4, lsl #3
b .L405
.L404:
add r10, r10, #1
cmp r7, r10
beq .L418
.L405:
ldmdb fp!, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpeq
cmp r0, #0
beq .L404
cmp r10, #1
cmpne r7, r10
movne r0, #1
moveq r0, #0
lsl r9, r10, #1
.L403:
bl __ESBMC_assume
mov r1, r10
ldr r0, .L420
bl printf
cmp r4, #0
blt .L407
.L406:
sub r7, r7, r10
add r5, r5, #8
add r5, r6, r5
mov r8, #0
ldr fp, .L420+4
add r6, r6, r7, lsl #3
b .L411
.L408:
sub r4, r4, #1
cmn r4, #1
sub r5, r5, #8
sub r6, r6, #8
beq .L409
.L411:
cmp r4, r7
blt .L408
ldmdb r5, {r2-r3}
ldmdb r6, {r0-r1}
stm sp, {r0-r1}
mov r0, fp
bl printf
sub r3, r4, r10
cmp r3, #0
ble .L409
ldmdb r6, {r2-r3}
ldmdb r5, {r0-r1}
bl __aeabi_dcmpeq
cmp r0, #0
addne r8, r8, #2
bne .L408
.L409:
mov r1, r9
ldr r0, .L420+8
bl printf
mov r1, r8
ldr r0, .L420+12
bl printf
cmp r9, r8
beq .L419
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L418:
bl __ESBMC_assume
mov r1, r7
ldr r0, .L420
bl printf
lsl r9, r7, #1
b .L406
.L413:
mov r9, #2
mov r0, #0
mov r10, #1
sub r4, r1, #1
b .L403
.L407:
mov r1, r9
ldr r0, .L420+8
bl printf
mov r1, #0
ldr r0, .L420+12
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b printf
.L419:
bl __DSVERIFIER_assert.part.0
.L421:
.align 2
.L420:
.word .LC18
.word .LC19
.word .LC20
.word .LC21
.size double_check_limit_cycle, .-double_check_limit_cycle
.section .rodata.cst4
.align 2
.LC22:
.word __stack_chk_guard
.text
.align 2
.global double_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type double_check_persistent_limit_cycle, %function
double_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #20
ldr r3, .L454
str r0, [fp, #-48]
subs r8, r1, #0
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldmia r0, {r6-r7}
ble .L423
mov r4, #0
mov r2, r6
mov r3, r7
mov r5, r4
mov r10, r4
add r9, r0, #8
b .L429
.L450:
ldmia r9!, {r2-r3}
.L429:
mov r0, r6
mov r1, r7
bl __aeabi_dcmpeq
cmp r0, #0
addeq r4, r4, #1
beq .L426
cmp r4, #0
bne .L427
add r10, r10, #1
.L426:
add r5, r5, #1
cmp r8, r5
bne .L450
add r4, r10, r4
cmp r4, #1
lsl r5, r4, #3
ble .L441
.L438:
cmp r4, r8, asr #1
movle r0, #1
movgt r0, #0
.L430:
bl __ESBMC_assume
sub sp, sp, r5
mov r6, sp
mov r1, #0
.L432:
cmp r1, r4
bge .L431
ldr r3, [fp, #-48]
add r0, r6, r1, lsl #3
add r3, r3, r1, lsl #3
ldmia r3, {r2-r3}
stm r0, {r2-r3}
.L431:
add r1, r1, #1
cmp r8, r1
bgt .L432
mov ip, #0
ldr r9, [fp, #-48]
mov r7, ip
b .L436
.L452:
cmp r5, r4
movne ip, r5
moveq ip, #0
cmp r8, r7
ble .L451
.L436:
ldmia r9!, {r0-r1}
add r3, r6, ip, lsl #3
ldmia r3, {r2-r3}
add r5, ip, #1
bl __aeabi_dcmpeq
cmp r0, #0
add r7, r7, #1
bne .L452
.L422:
ldr r3, .L454
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L453
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L427:
add r4, r10, r4
cmp r4, #1
lsl r5, r4, #3
bne .L438
.L441:
mov r0, #0
b .L430
.L451:
bl __DSVERIFIER_assert.part.0
.L423:
mov r0, #0
bl __ESBMC_assume
b .L422
.L453:
bl __stack_chk_fail
.L455:
.align 2
.L454:
.word .LC22
.size double_check_persistent_limit_cycle, .-double_check_persistent_limit_cycle
.section .rodata.str1.4
.align 2
.LC23:
.ascii " %.32f \000"
.text
.align 2
.global print_array_elements
.syntax unified
.arm
.fpu softvfp
.type print_array_elements, %function
print_array_elements:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, r0
push {r4, r5, r6, lr}
mov r5, r2
mov r4, r1
ldr r0, .L461
mov r1, r3
bl printf
cmp r5, #0
ble .L457
ldr r6, .L461+4
add r5, r4, r5, lsl #3
.L458:
ldmia r4!, {r2-r3}
mov r0, r6
bl printf
cmp r4, r5
bne .L458
.L457:
pop {r4, r5, r6, lr}
ldr r0, .L461+8
b puts
.L462:
.align 2
.L461:
.word .LC9
.word .LC23
.word .LC11
.size print_array_elements, .-print_array_elements
.align 2
.global double_add_matrix
.syntax unified
.arm
.fpu softvfp
.type double_add_matrix, %function
double_add_matrix:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs fp, r0, #0
movne r9, #0
sub sp, sp, #12
movne r8, r1
movne r10, r9
stm sp, {r2, r3}
beq .L463
.L464:
cmp r8, #0
beq .L468
mov r4, #0
ldr r3, [sp]
add r7, r3, r9
ldr r3, [sp, #4]
add r6, r3, r9
ldr r3, [sp, #48]
add r5, r3, r9
.L466:
ldmia r6!, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dadd
add r4, r4, #1
cmp r8, r4
stm r5!, {r0-r1}
bne .L466
.L468:
add r10, r10, #1
cmp fp, r10
add r9, r9, #32
bne .L464
.L463:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size double_add_matrix, .-double_add_matrix
.align 2
.global double_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type double_sub_matrix, %function
double_sub_matrix:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs fp, r0, #0
movne r9, #0
sub sp, sp, #12
movne r8, r1
movne r10, r9
stm sp, {r2, r3}
beq .L472
.L473:
cmp r8, #0
beq .L477
mov r4, #0
ldr r3, [sp]
add r7, r3, r9
ldr r3, [sp, #4]
add r6, r3, r9
ldr r3, [sp, #48]
add r5, r3, r9
.L475:
ldmia r6!, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dsub
add r4, r4, #1
cmp r8, r4
stm r5!, {r0-r1}
bne .L475
.L477:
add r10, r10, #1
cmp fp, r10
add r9, r9, #32
bne .L473
.L472:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size double_sub_matrix, .-double_sub_matrix
.section .rodata.str1.4
.align 2
.LC24:
.ascii "\012Error! Operation invalid, please enter with val"
.ascii "id matrices.\000"
.text
.align 2
.global double_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type double_matrix_multiplication, %function
double_matrix_multiplication:
@ args = 12, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
cmp r1, r2
mov r2, r3
ldmib sp, {r3, ip, lr}
bne .L482
stmib sp, {ip, lr}
ldr lr, [sp], #4
b double_matrix_multiplication.part.0
.L482:
ldr r0, .L484
ldr lr, [sp], #4
b puts
.L485:
.align 2
.L484:
.word .LC24
.size double_matrix_multiplication, .-double_matrix_multiplication
.align 2
.global fxp_matrix_multiplication
.syntax unified
.arm
.fpu softvfp
.type fxp_matrix_multiplication, %function
fxp_matrix_multiplication:
@ args = 12, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
cmp r1, r2
mov r2, r3
ldmib sp, {r3, ip, lr}
bne .L487
stmib sp, {ip, lr}
ldr lr, [sp], #4
b fxp_matrix_multiplication.part.0
.L487:
ldr r0, .L489
ldr lr, [sp], #4
b puts
.L490:
.align 2
.L489:
.word .LC24
.size fxp_matrix_multiplication, .-fxp_matrix_multiplication
.section .rodata.cst4
.align 2
.LC25:
.word __stack_chk_guard
.text
.align 2
.global fxp_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_exp_matrix, %function
fxp_exp_matrix:
@ args = 4, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r3, #0
sub sp, sp, #116
str r3, [sp, #28]
ldr r3, .L548
str r0, [sp, #24]
str r2, [sp, #16]
mov r5, r1
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
ldr r9, [sp, #152]
beq .L492
cmp r0, #0
beq .L494
mov ip, #0
ldr r3, [sp, #16]
ldr r6, [sp, #24]
sub r4, r3, #4
sub lr, r9, #4
.L493:
cmp r5, #0
movne r3, #0
addne r1, r4, ip, lsl #4
addne r2, lr, ip, lsl #4
beq .L506
.L504:
ldr r0, [r1, #4]!
add r3, r3, #1
cmp r5, r3
str r0, [r2, #4]!
bne .L504
.L506:
add ip, ip, #1
cmp r6, ip
bne .L493
.L494:
ldr r3, [sp, #28]
cmp r3, #1
beq .L491
rsb r3, r5, r5, lsl #30
lsl r3, r3, #2
str r3, [sp, #36]
add r3, r9, r5, lsl #2
str r3, [sp, #32]
sub r3, r9, #4
str r3, [sp, #12]
mov r3, #1
mov fp, #0
str r3, [sp, #20]
.L507:
ldr r4, [sp, #24]
cmp r4, #0
beq .L518
add r3, sp, #44
mov ip, r3
mov lr, #0
ldr r0, [sp, #32]
ldr r6, [sp, #36]
str r3, [sp]
.L521:
cmp r5, #0
movne r2, ip
addne r3, r0, r6
beq .L511
.L508:
ldr r1, [r3], #4
cmp r3, r0
str r1, [r2], #4
bne .L508
.L511:
add r3, lr, #1
cmp r4, r3
add ip, ip, #16
add r0, r0, #16
beq .L524
mov lr, r3
b .L521
.L518:
ldr r3, [sp, #20]
ldr r2, [sp, #28]
add r3, r3, #1
cmp r2, r3
str r3, [sp, #20]
bhi .L507
.L491:
ldr r3, .L548
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L546
add sp, sp, #116
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L524:
mov r0, lr
mov r1, #0
ldr ip, [sp, #12]
str lr, [sp, #8]
.L509:
cmp r5, #0
movne r3, #0
addne r2, ip, r1, lsl #4
beq .L515
.L512:
add r3, r3, #1
cmp r5, r3
str fp, [r2, #4]!
bne .L512
.L515:
cmp r0, r1
add r1, r1, #1
bne .L509
mov r3, #0
str r3, [sp, #4]
.L513:
cmp r5, #0
beq .L517
mov r8, #0
ldr r3, [sp, #12]
ldr r2, [sp, #4]
ldr r6, [sp, #16]
add r7, r3, r2, lsl #4
.L519:
mov r4, #0
ldr r9, [r7, #4]!
ldr r10, [sp]
.L516:
ldr r1, [r6, r4, lsl #4]
ldr r0, [r10], #4
bl fxp_mult
add r0, r0, r9
bl fxp_quantize
mov r2, r4
add r4, r4, #1
cmp r5, r4
mov r9, r0
str r0, [r7]
bne .L516
cmp r8, r2
add r6, r6, #4
add r8, r8, #1
bne .L519
.L517:
ldr r3, [sp, #4]
ldr r2, [sp, #8]
add r10, r3, #1
cmp r2, r3
ldr r3, [sp]
add r3, r3, #16
str r3, [sp]
beq .L518
str r10, [sp, #4]
b .L513
.L492:
ldr r3, [sp, #24]
cmp r3, #0
beq .L491
ldr r6, [sp, #28]
ldr r3, .L548+4
mov r8, r6
ldr r2, [r3, #12]
ldr r3, .L548+8
ldr fp, .L548+12
ldr r10, [r3]
add fp, fp, r2, lsl #3
.L496:
cmp r5, #0
movne r4, #0
addne r7, r9, r6, lsl #4
beq .L503
.L501:
cmp r6, r4
strne r8, [r7, r4, lsl #2]
beq .L547
.L500:
add r4, r4, #1
cmp r5, r4
bne .L501
.L503:
ldr r3, [sp, #24]
add r6, r6, #1
cmp r3, r6
bne .L496
b .L491
.L547:
cmp r10, #0
add r1, fp, #48
ldmia r1, {r0-r1}
bne .L498
mov r2, #0
ldr r3, .L548+16
bl __aeabi_dadd
bl __aeabi_d2iz
mov ip, r0
.L499:
str ip, [r7, r4, lsl #2]
b .L500
.L498:
cmp r10, #1
bne .L499
bl __aeabi_d2iz
mov ip, r0
b .L499
.L546:
bl __stack_chk_fail
.L549:
.align 2
.L548:
.word .LC25
.word .LANCHOR1
.word .LANCHOR2
.word .LANCHOR0
.word 1071644672
.size fxp_exp_matrix, .-fxp_exp_matrix
.section .rodata.cst4
.align 2
.LC26:
.word __stack_chk_guard
.text
.align 2
.global double_exp_matrix
.syntax unified
.arm
.fpu softvfp
.type double_exp_matrix, %function
double_exp_matrix:
@ args = 4, pretend = 0, frame = 184
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r3, #0
sub sp, sp, #188
str r3, [sp, #36]
ldr r3, .L603
str r0, [sp, #32]
ldr r3, [r3]
str r3, [sp, #180]
mov r3,#0
ldr r3, [sp, #224]
mov fp, r1
str r3, [sp, #20]
beq .L551
cmp r0, #0
beq .L553
mov r4, #0
ldr ip, [sp, #32]
ldr lr, [sp, #20]
.L552:
cmp fp, #0
movne r3, #0
addne r0, r2, r4, lsl #5
addne r1, lr, r4, lsl #5
beq .L563
.L561:
ldmia r0!, {r6-r7}
add r3, r3, #1
cmp fp, r3
stm r1!, {r6-r7}
bne .L561
.L563:
add r4, r4, #1
cmp ip, r4
bne .L552
.L553:
ldr r3, [sp, #36]
cmp r3, #1
beq .L550
rsb r3, fp, fp, lsl #27
lsl r3, r3, #5
str r3, [sp, #8]
ldr r3, [sp, #20]
add r2, r2, fp, lsl #5
add r3, r3, fp, lsl #3
str r3, [sp, #40]
mov r3, #1
rsb r1, fp, fp, lsl #29
str r2, [sp, #24]
lsl r2, r1, #3
str r2, [sp, #44]
str r3, [sp, #28]
.L564:
ldr r5, [sp, #32]
cmp r5, #0
beq .L575
mov r3, #0
add lr, sp, #48
mov r7, lr
mov r4, r3
ldr ip, [sp, #40]
ldr r6, [sp, #44]
.L578:
cmp fp, #0
movne r2, lr
addne r3, ip, r6
beq .L568
.L565:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L565
.L568:
add r3, r4, #1
cmp r5, r3
add lr, lr, #32
add ip, ip, #32
beq .L582
mov r4, r3
b .L578
.L599:
ldr fp, [sp, #4]
.L575:
ldr r3, [sp, #28]
ldr r2, [sp, #36]
add r3, r3, #1
cmp r2, r3
str r3, [sp, #28]
bhi .L564
.L550:
ldr r3, .L603
ldr r2, [r3]
ldr r3, [sp, #180]
eors r2, r3, r2
mov r3, #0
bne .L601
add sp, sp, #188
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L582:
mov r0, r4
mov r1, #0
ldr ip, [sp, #20]
str r4, [sp, #16]
.L566:
cmp fp, #0
movne r3, #0
addne r2, ip, r1, lsl #5
beq .L572
.L569:
mov r4, #0
mov r5, #0
add r3, r3, #1
cmp fp, r3
stm r2!, {r4-r5}
bne .L569
.L572:
cmp r0, r1
add r1, r1, #1
bne .L566
mov r3, #0
str fp, [sp, #4]
mov fp, r7
str r3, [sp, #12]
.L570:
ldr r3, [sp, #4]
cmp r3, #0
beq .L574
mov r10, #0
ldr r3, [sp, #20]
ldr r2, [sp, #12]
ldr r8, [sp, #24]
add r9, r3, r2, lsl #5
.L576:
mov r7, fp
ldmia r9!, {r4-r5}
ldr r3, [sp, #8]
add r6, r3, r8
.L573:
ldmia r6, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r6, r6, #32
cmp r8, r6
stmdb r9, {r4-r5}
bne .L573
ldr r3, [sp, #4]
add r10, r10, #1
cmp r3, r10
add r8, r8, #8
bne .L576
.L574:
ldr r3, [sp, #12]
ldr r2, [sp, #16]
add fp, fp, #32
cmp r2, r3
add r3, r3, #1
beq .L599
str r3, [sp, #12]
b .L570
.L551:
ldr r3, [sp, #32]
cmp r3, #0
beq .L550
mov r0, #0
mov r1, #0
mov r4, #0
ldr ip, [sp, #36]
ldr r5, .L603+4
ldr lr, [sp, #32]
ldr r6, [sp, #20]
.L554:
cmp fp, #0
movne r3, #0
addne r2, r6, ip, lsl #5
beq .L560
.L558:
cmp ip, r3
beq .L602
stm r2, {r0-r1}
.L557:
add r3, r3, #1
cmp fp, r3
add r2, r2, #8
bne .L558
.L560:
add ip, ip, #1
cmp lr, ip
bne .L554
b .L550
.L602:
stm r2, {r4-r5}
b .L557
.L601:
bl __stack_chk_fail
.L604:
.align 2
.L603:
.word .LC26
.word 1072693248
.size double_exp_matrix, .-double_exp_matrix
.align 2
.global fxp_add_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_add_matrix, %function
fxp_add_matrix:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r8, r0, #0
sub sp, sp, #12
beq .L605
mov r7, r1
mov r6, #0
sub r3, r3, #4
str r3, [sp, #4]
ldr r3, [sp, #48]
sub r2, r2, #4
str r2, [sp]
sub fp, r3, #4
.L606:
cmp r7, #0
beq .L610
mov r4, #0
ldr r3, [sp]
add r5, fp, r6, lsl #4
add r10, r3, r6, lsl #4
ldr r3, [sp, #4]
add r9, r3, r6, lsl #4
.L608:
ldr r1, [r9, #4]!
ldr r0, [r10, #4]!
add r4, r4, #1
add r0, r0, r1
bl fxp_quantize
cmp r7, r4
str r0, [r5, #4]!
bne .L608
.L610:
add r6, r6, #1
cmp r8, r6
bne .L606
.L605:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size fxp_add_matrix, .-fxp_add_matrix
.align 2
.global fxp_sub_matrix
.syntax unified
.arm
.fpu softvfp
.type fxp_sub_matrix, %function
fxp_sub_matrix:
@ args = 4, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r8, r0, #0
sub sp, sp, #12
beq .L614
mov r7, r1
mov r6, #0
sub r3, r3, #4
str r3, [sp, #4]
ldr r3, [sp, #48]
sub r2, r2, #4
str r2, [sp]
sub fp, r3, #4
.L615:
cmp r7, #0
beq .L619
mov r4, #0
ldr r3, [sp]
add r5, fp, r6, lsl #4
add r10, r3, r6, lsl #4
ldr r3, [sp, #4]
add r9, r3, r6, lsl #4
.L617:
ldr r1, [r9, #4]!
ldr r0, [r10, #4]!
add r4, r4, #1
sub r0, r0, r1
bl fxp_quantize
cmp r7, r4
str r0, [r5, #4]!
bne .L617
.L619:
add r6, r6, #1
cmp r8, r6
bne .L615
.L614:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size fxp_sub_matrix, .-fxp_sub_matrix
.section .rodata.str1.4
.align 2
.LC27:
.ascii "\012Matrix\012=====================\012\000"
.align 2
.LC28:
.ascii "#matrix[%d][%d]: %2.2f \000"
.text
.align 2
.global print_matrix
.syntax unified
.arm
.fpu softvfp
.type print_matrix, %function
print_matrix:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov fp, r0
mov r10, r1
sub sp, sp, #20
ldr r0, .L632
str fp, [sp, #12]
mov r8, r2
bl puts
cmp r10, #0
movne fp, #0
ldrne r9, .L632+4
beq .L625
.L624:
cmp r8, #0
beq .L628
mov r4, #0
ldr r3, [sp, #12]
add r5, r3, fp, lsl #5
.L626:
mov r2, r4
ldmia r5!, {r6-r7}
mov r1, fp
mov r0, r9
stm sp, {r6-r7}
add r4, r4, #1
bl printf
cmp r8, r4
bne .L626
.L628:
mov r0, #10
add fp, fp, #1
bl putchar
cmp r10, fp
bne .L624
.L625:
mov r0, #10
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b putchar
.L633:
.align 2
.L632:
.word .LC27
.word .LC28
.size print_matrix, .-print_matrix
.section .rodata.cst4
.align 2
.LC29:
.word __stack_chk_guard
.text
.align 2
.global determinant
.syntax unified
.arm
.fpu softvfp
.type determinant, %function
determinant:
@ args = 0, pretend = 0, frame = 160
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L661
sub sp, sp, #164
str r0, [sp, #20]
subs r5, r1, #0
ldr r3, [r3]
str r3, [sp, #156]
mov r3,#0
ble .L648
ldmia r0, {r3-r4}
cmp r5, #1
stm sp, {r3-r4}
beq .L634
cmp r5, #2
beq .L636
mov r3, #0
mov r4, #0
mov r6, #0
str r3, [sp, #8]
str r4, [sp, #12]
add r3, r0, #32
sub fp, r5, #1
str r3, [sp, #16]
.L646:
mov lr, #0
ldr r8, [sp, #16]
.L640:
mov ip, #0
mov r4, ip
cmp r4, r6
mov r2, r8
lsl r7, lr, #2
beq .L638
.L659:
ldmia r2, {r0-r1}
add r3, r7, ip
add r9, sp, #160
add r3, r9, r3, lsl #3
str r0, [r3, #-136]
str r1, [r3, #-132]
add ip, ip, #1
.L638:
add r3, r4, #1
cmp r5, r3
add r2, r2, #8
beq .L658
.L649:
mov r4, r3
cmp r4, r6
bne .L659
add r3, r4, #1
cmp r5, r3
add r2, r2, #8
bne .L649
.L658:
add r3, lr, #2
cmp r5, r3
add r8, r8, #32
add lr, lr, #1
bgt .L640
cmp r5, #1
movgt r3, r4
movle r3, #1
add r3, r3, #2
cmp r3, fp
blt .L646
mov r0, r6
bl __aeabi_i2d
mov r2, #0
ldr r3, .L661+4
bl __aeabi_dadd
mov r2, #0
ldr r3, .L661+4
bl __aeabi_dadd
mov r2, #0
mov r3, #0
mov r8, r0
mov r9, r1
bl __aeabi_dcmpgt
cmp r0, #0
beq .L642
mov r7, #0
ldr r10, .L661+4
.L644:
add r7, r7, #1
mov r0, r7
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dcmpgt
cmp r0, #0
add r10, r10, #-2147483648
bne .L644
ldmia sp, {r0-r1}
mov r2, #0
mov r3, r10
bl __aeabi_dmul
stm sp, {r0-r1}
.L642:
mov r1, fp
add r0, sp, #24
bl determinant
ldmia sp, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
add r1, sp, #8
ldmia r1, {r0-r1}
bl __aeabi_dadd
cmp r4, r6
str r0, [sp, #8]
str r1, [sp, #12]
add r6, r6, #1
beq .L645
ldr r3, [sp, #20]
add r3, r3, r6, lsl #3
ldmia r3, {r3-r4}
stm sp, {r3-r4}
b .L646
.L648:
mov r3, #0
mov r4, #0
stm sp, {r3-r4}
.L634:
ldr r3, .L661
ldr r2, [r3]
ldr r3, [sp, #156]
eors r2, r3, r2
mov r3, #0
bne .L660
ldmia sp, {r0-r1}
add sp, sp, #164
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L645:
add r4, sp, #8
ldmia r4, {r3-r4}
stm sp, {r3-r4}
b .L634
.L636:
ldr r6, [sp, #20]
ldmia sp, {r0-r1}
add r3, r6, #40
ldmia r3, {r2-r3}
bl __aeabi_dmul
add r3, r6, #8
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
add r1, r6, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
stm sp, {r0-r1}
b .L634
.L660:
bl __stack_chk_fail
.L662:
.align 2
.L661:
.word .LC29
.word 1072693248
.size determinant, .-determinant
.section .rodata.cst4
.align 2
.LC30:
.word __stack_chk_guard
.text
.align 2
.global fxp_determinant
.syntax unified
.arm
.fpu softvfp
.type fxp_determinant, %function
fxp_determinant:
@ args = 0, pretend = 0, frame = 288
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L695
sub sp, sp, #292
subs r10, r1, #0
ldr r3, [r3]
str r3, [sp, #284]
mov r3,#0
ble .L681
ldr r2, .L695+4
ldr r3, .L695+8
ldr r2, [r2, #12]
add r9, r0, r10, lsl #2
add r3, r3, r2, lsl #3
add r7, r3, #296
ldmia r7, {r6-r7}
add r3, r0, r10, lsl #4
str r10, [sp]
mov r8, r0
mov r10, r3
add fp, sp, #24
.L665:
mov r5, fp
mov r4, r8
.L666:
ldr r0, [r4], #4
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r9
stm r5!, {r0-r1}
bne .L666
add r8, r8, #16
cmp r8, r10
add fp, fp, #32
add r9, r4, #16
bne .L665
add r4, sp, #24
ldmia r4, {r3-r4}
ldr r10, [sp]
stm sp, {r3-r4}
cmp r10, #1
beq .L663
cmp r10, #2
beq .L668
ldmia sp, {r3-r4}
str r3, [sp, #8]
str r4, [sp, #12]
mov r3, #0
mov r4, #0
mov r5, #0
stm sp, {r3-r4}
add r3, sp, #32
sub fp, r10, #1
str r3, [sp, #20]
.L678:
mov lr, #0
add r7, sp, #56
.L674:
mov ip, #0
mov r4, ip
cmp r4, r5
mov r2, r7
lsl r6, lr, #2
beq .L670
.L693:
ldmia r2, {r0-r1}
add r3, r6, ip
add r8, sp, #288
add r3, r8, r3, lsl #3
str r0, [r3, #-136]
str r1, [r3, #-132]
add ip, ip, #1
.L670:
add r3, r4, #1
cmp r10, r3
add r2, r2, #8
beq .L692
.L682:
mov r4, r3
cmp r4, r5
bne .L693
add r3, r4, #1
cmp r10, r3
add r2, r2, #8
bne .L682
.L692:
add r3, lr, #2
cmp r10, r3
add r7, r7, #32
add lr, lr, #1
bgt .L674
cmp r10, #1
movgt r3, r4
movle r3, #1
add r3, r3, #2
cmp fp, r3
bgt .L678
mov r0, r5
bl __aeabi_i2d
mov r2, #0
ldr r3, .L695+12
bl __aeabi_dadd
mov r2, #0
ldr r3, .L695+12
bl __aeabi_dadd
mov r2, #0
mov r3, #0
mov r6, r0
mov r7, r1
bl __aeabi_dcmpgt
cmp r0, #0
beq .L675
mov r8, #0
ldr r9, .L695+12
.L677:
add r8, r8, #1
mov r0, r8
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
add r9, r9, #-2147483648
bne .L677
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
mov r3, r9
bl __aeabi_dmul
str r0, [sp, #8]
str r1, [sp, #12]
.L675:
mov r1, fp
add r0, sp, #152
bl determinant
add r3, sp, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia sp, {r0-r1}
bl __aeabi_dadd
cmp r4, r5
stm sp, {r0-r1}
add r5, r5, #1
beq .L663
ldr r2, [sp, #20]
ldmia r2!, {r3-r4}
str r3, [sp, #8]
str r4, [sp, #12]
str r2, [sp, #20]
b .L678
.L668:
ldmia sp, {r0-r1}
add r3, sp, #64
ldmia r3, {r2-r3}
bl __aeabi_dmul
add r3, sp, #32
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
stm sp, {r0-r1}
.L663:
ldr r3, .L695
ldr r2, [r3]
ldr r3, [sp, #284]
eors r2, r3, r2
mov r3, #0
bne .L694
ldmia sp, {r0-r1}
add sp, sp, #292
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L681:
mov r3, #0
mov r4, #0
stm sp, {r3-r4}
b .L663
.L694:
bl __stack_chk_fail
.L696:
.align 2
.L695:
.word .LC30
.word .LANCHOR1
.word .LANCHOR0
.word 1072693248
.size fxp_determinant, .-fxp_determinant
.align 2
.global transpose
.syntax unified
.arm
.fpu softvfp
.type transpose, %function
transpose:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
push {r4, r5, r6, r7, lr}
mov r6, #0
rsb r7, r3, r3, lsl #29
add lr, r0, r3, lsl #3
lsl r7, r7, #3
.L699:
cmp r3, #0
addgt ip, lr, r7
addgt r0, r1, r6, lsl #3
ble .L702
.L700:
ldmia ip!, {r4-r5}
cmp ip, lr
stm r0, {r4-r5}
add r0, r0, #32
bne .L700
.L702:
add r6, r6, #1
cmp r2, r6
add lr, lr, #32
bne .L699
pop {r4, r5, r6, r7, pc}
.size transpose, .-transpose
.align 2
.global fxp_transpose
.syntax unified
.arm
.fpu softvfp
.type fxp_transpose, %function
fxp_transpose:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
bxle lr
push {r4, r5, lr}
mov r4, #0
sub r5, r0, #4
.L710:
cmp r3, #0
movgt r0, #0
addgt ip, r5, r4, lsl #4
ble .L713
.L711:
ldr lr, [ip, #4]!
str lr, [r1, r0, lsl #4]
add r0, r0, #1
cmp r3, r0
bne .L711
.L713:
add r4, r4, #1
cmp r2, r4
add r1, r1, #4
bne .L710
pop {r4, r5, pc}
.size fxp_transpose, .-fxp_transpose
.align 2
.global generic_timing_shift_l_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_l_double, %function
generic_timing_shift_l_double:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr lr, .L724
sub sp, sp, #60
mov r10, r3
ldmia r2, {r3-r4}
str r3, [sp, #32]
str r4, [sp, #36]
ldr r3, [lr, #32]
mov r8, r0
add r3, r3, r3, lsl #1
mov ip, r3
mov r9, r1
ldr fp, [lr, #20]
ldr r1, [lr, #16]
add r0, fp, fp, lsl #1
add r0, r0, r1, lsl #1
ldr r1, [lr, #24]
add r0, r0, ip
str r3, [sp, #20]
ldr r3, [lr, #40]
ldr r6, [lr, #28]
ldr r4, [lr, #76]
add r0, r0, r1
ldr r1, .L724+4
ldr r5, [lr, #36]
add ip, r3, r3, lsl #2
ldr r1, [r1, #4]
add r0, r0, r6
add ip, ip, r4, lsl #1
str r6, [sp, #24]
ldr r6, [lr, #84]
add r0, r0, r5, lsl #3
ldr r7, [lr, #72]
add ip, ip, r5, lsl #2
add r1, r0, r1
add ip, ip, r6
add r1, r1, ip
add r0, r7, r5, lsl #1
add r1, r1, r0
ldr r0, .L724+4
str r8, [sp, #40]
str r9, [sp, #44]
str r1, [r0, #4]
lsl r0, r5, #1
ldr r8, [lr, #56]
str r0, [sp, #48]
ldr r0, [lr, #52]
ldr r9, [lr, #60]
mov ip, r0
str r0, [sp, #28]
str r8, [sp, #4]
ldr r0, [lr, #68]
ldr r8, [lr, #116]
add r4, r4, r4, lsl #1
cmp r10, #1
str r9, [sp, #8]
str r8, [sp, #16]
ldr r9, [lr, #64]
ldr r8, [lr, #44]
lsl r4, r4, #1
str r0, [sp, #12]
ble .L720
add r0, r3, r3, lsl #4
add r0, r0, ip, lsl #2
ldr ip, [sp, #4]
lsl r7, r5, #2
add r0, r0, ip, lsl #2
ldr ip, [sp, #8]
add r7, r7, r5
add r0, r0, ip, lsl #1
add r0, r0, r9, lsl #1
ldr ip, [sp, #12]
add r0, r0, r4
add r0, r0, ip, lsl #1
add r0, r0, r7
ldr ip, [sp, #16]
add r0, r0, r6
ldr r7, [lr, #80]
add r0, r0, ip
add r0, r0, r8
ldr ip, [lr, #92]
add r0, r0, r7
ldr r7, [lr, #96]
add r0, r0, ip
ldr ip, [lr, #120]
add r0, r0, r7
add r0, r0, ip
mov ip, r2
add r7, r2, r10, lsl #3
sub r7, r7, #8
str r5, [sp, #52]
.L721:
add r6, ip, #8
ldmia r6, {r5-r6}
stm ip!, {r5-r6}
cmp r7, ip
add r1, r1, r0
bne .L721
ldr r5, [sp, #52]
.L720:
ldr r0, [sp, #48]
add r3, r3, r3, lsl #1
add r5, r0, r5
add r3, r4, r3, lsl #2
ldr r0, [sp, #28]
add r3, r3, r5
add r3, r3, r0, lsl #1
ldr r0, [sp, #4]
add r2, r2, r10, lsl #3
add r3, r3, r0, lsl #1
add r9, r3, r9
ldr r3, [sp, #8]
ldr r0, [lr, #112]
add r9, r9, r3
ldr r3, [lr, #48]
add r8, r9, r8
add r8, r8, r3
ldr r3, [sp, #16]
add ip, r8, r3
ldr r3, [sp, #12]
add ip, ip, r3
ldr r3, [lr, #108]
ldr lr, [sp, #24]
add ip, ip, fp
add ip, ip, lr
ldr lr, [sp, #20]
add r1, ip, r1
add r3, lr, r3, lsl #1
add ip, r3, r0
add r4, sp, #40
ldmia r4, {r3-r4}
stmdb r2, {r3-r4}
ldr r3, .L724+4
add ip, r1, ip
str ip, [r3, #4]
add r1, sp, #32
ldmia r1, {r0-r1}
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L725:
.align 2
.L724:
.word hw
.word .LANCHOR2
.size generic_timing_shift_l_double, .-generic_timing_shift_l_double
.align 2
.global generic_timing_shift_r_double
.syntax unified
.arm
.fpu softvfp
.type generic_timing_shift_r_double, %function
generic_timing_shift_r_double:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr ip, .L733
sub sp, sp, #60
ldr r6, [ip, #40]
str r0, [sp, #16]
str r1, [sp, #20]
ldr r1, [ip, #56]
ldr lr, [ip, #52]
rsb r0, r6, r6, lsl #3
ldr fp, [ip, #76]
add r0, r0, r1, lsl #1
str lr, [sp, #36]
add r0, r0, lr, lsl #1
ldr lr, [ip, #36]
ldr r5, [ip, #60]
add r0, r0, fp, lsl #1
add r0, r0, lr, lsl #2
ldr r10, [ip, #20]
str r5, [sp, #40]
add r0, r0, r5
ldr r5, [ip, #84]
ldr r9, [ip, #64]
ldr r4, [ip, #16]
str r1, [sp, #32]
ldr r1, [ip, #32]
str r5, [sp, #4]
add r8, r10, r10, lsl #1
add r1, r1, r1, lsl #1
str r9, [sp, #44]
add r8, r8, r4, lsl #1
add r0, r0, r9
ldr r4, [ip, #24]
ldr r9, [sp, #4]
ldr r5, [ip, #44]
ldr r7, .L733+4
str r1, [sp, #8]
add r8, r8, r1
ldr r1, [ip, #28]
add r0, r0, r9
add r8, r8, r4
ldr r9, [ip, #48]
str r1, [sp, #12]
add r8, r8, r1
add r0, r0, r5
ldr r1, [r7, #4]
str r5, [sp, #48]
str r9, [sp, #52]
add r0, r0, r9
add r8, r8, lr, lsl #3
ldr r9, [ip, #72]
add r5, lr, r6
add r8, r8, r1
add r5, r4, r5, lsl #1
add r0, r0, r8
sub r1, r3, #-536870911
add r5, r5, r9
cmp r3, #1
add r1, r2, r1, lsl #3
add r3, r0, r5
add r9, sp, #16
ldmia r9, {r8-r9}
lslle r0, fp, #2
str r8, [sp, #24]
str r9, [sp, #28]
ldmia r1, {r8-r9}
str r8, [sp, #16]
str r9, [sp, #20]
ldr r8, [ip, #116]
str r3, [r7, #4]
ble .L727
ldr r9, [sp, #36]
rsb r0, r6, r6, lsl #4
add r0, r0, r9, lsl #2
ldr r9, [sp, #32]
lsl r5, lr, #2
add r0, r0, r9, lsl #2
ldr r9, [sp, #40]
add r5, r5, lr
add r0, r0, r9, lsl #1
ldr r9, [sp, #44]
add r0, r0, r9, lsl #1
add r0, r0, fp, lsl #2
add r0, r0, r5
ldr r5, [sp, #48]
add r0, r0, r5
ldr r5, [sp, #52]
add r0, r0, r5
ldr r5, [sp, #4]
add r9, r0, r5
add r9, r9, r8
ldr r0, [ip, #92]
add r9, r9, r4
ldr r4, [ip, #96]
add r9, r9, r0
ldr r0, [ip, #120]
add r9, r9, r4
add r9, r9, r0
lsl r0, fp, #2
.L728:
ldmdb r1!, {r4-r5}
cmp r2, r1
str r4, [r1, #8]
str r5, [r1, #12]
add r3, r3, r9
bne .L728
.L727:
add r0, r0, fp
add r6, r6, r6, lsl #2
add r6, r0, r6, lsl #1
add r1, lr, lr, lsl #1
ldr r0, [sp, #8]
ldr r5, [ip, #108]
add r1, r6, r1
ldr r4, [ip, #112]
add r1, r1, r0
add r1, r1, r5, lsl #1
ldr r0, [sp, #12]
add r1, r1, r4, lsl #1
add r1, r1, r0
add r1, r1, r10
ldr r0, [ip, #68]
add r8, r1, r8
add r8, r8, r0
add r3, r8, r3
add r1, sp, #24
ldmia r1, {r0-r1}
stm r2, {r0-r1}
add r1, sp, #16
ldmia r1, {r0-r1}
str r3, [r7, #4]
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L734:
.align 2
.L733:
.word hw
.word .LANCHOR2
.size generic_timing_shift_r_double, .-generic_timing_shift_r_double
.align 2
.global shiftL
.syntax unified
.arm
.fpu softvfp
.type shiftL, %function
shiftL:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #1
push {r4, lr}
mov r4, r0
ldr r0, [r1]
ble .L736
mov r3, r1
add lr, r1, r2, lsl #2
sub lr, lr, #4
.L737:
ldr ip, [r3, #4]
str ip, [r3], #4
cmp r3, lr
bne .L737
.L736:
sub r2, r2, #-1073741823
str r4, [r1, r2, lsl #2]
pop {r4, pc}
.size shiftL, .-shiftL
.align 2
.global shiftR
.syntax unified
.arm
.fpu softvfp
.type shiftR, %function
shiftR:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r2, #1
sub r2, r2, #-1073741823
mov ip, r0
add r3, r1, r2, lsl #2
ldr r0, [r1, r2, lsl #2]
ble .L741
.L742:
ldr r2, [r3, #-4]!
cmp r1, r3
str r2, [r3, #4]
bne .L742
.L741:
str ip, [r1]
bx lr
.size shiftR, .-shiftR
.align 2
.global shiftLfloat
.syntax unified
.arm
.fpu softvfp
.type shiftLfloat, %function
shiftLfloat:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #1
push {r4, lr}
mov r4, r0
ldr r0, [r1] @ float
ble .L745
mov r3, r1
add lr, r1, r2, lsl #2
sub lr, lr, #4
.L746:
ldr ip, [r3, #4] @ float
str ip, [r3], #4 @ float
cmp r3, lr
bne .L746
.L745:
sub r2, r2, #-1073741823
str r4, [r1, r2, lsl #2] @ float
pop {r4, pc}
.size shiftLfloat, .-shiftLfloat
.align 2
.global shiftRfloat
.syntax unified
.arm
.fpu softvfp
.type shiftRfloat, %function
shiftRfloat:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r2, #1
sub r2, r2, #-1073741823
mov ip, r0
add r3, r1, r2, lsl #2
ldr r0, [r1, r2, lsl #2] @ float
ble .L750
.L751:
ldr r2, [r3, #-4]! @ float
cmp r1, r3
str r2, [r3, #4] @ float
bne .L751
.L750:
str ip, [r1] @ float
bx lr
.size shiftRfloat, .-shiftRfloat
.align 2
.global shiftRDdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRDdouble, %function
shiftRDdouble:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r3, #1
push {r4, r5, r6, r7, r8, r9}
ldmia r2, {r8-r9}
mov r6, r0
mov r7, r1
ble .L754
mov r1, r2
add ip, r2, r3, lsl #3
sub ip, ip, #8
.L755:
add r5, r1, #8
ldmia r5, {r4-r5}
stm r1!, {r4-r5}
cmp r1, ip
bne .L755
.L754:
add r2, r2, r3, lsl #3
mov r0, r8
mov r1, r9
stmdb r2, {r6-r7}
pop {r4, r5, r6, r7, r8, r9}
bx lr
.size shiftRDdouble, .-shiftRDdouble
.align 2
.global shiftRdouble
.syntax unified
.arm
.fpu softvfp
.type shiftRdouble, %function
shiftRdouble:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
push {r4, r5, r6, r7}
mov r7, r1
sub r1, r3, #-536870911
cmp r3, #1
add r3, r2, r1, lsl #3
mov r6, r0
ldmia r3, {r0-r1}
ble .L759
.L760:
ldmdb r3!, {r4-r5}
cmp r2, r3
str r4, [r3, #8]
str r5, [r3, #12]
bne .L760
.L759:
stm r2, {r6-r7}
pop {r4, r5, r6, r7}
bx lr
.size shiftRdouble, .-shiftRdouble
.align 2
.global shiftLDouble
.syntax unified
.arm
.fpu softvfp
.type shiftLDouble, %function
shiftLDouble:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
b shiftRDdouble
.size shiftLDouble, .-shiftLDouble
.align 2
.global shiftLboth
.syntax unified
.arm
.fpu softvfp
.type shiftLboth, %function
shiftLboth:
@ args = 4, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r7, [sp, #20]
cmp r7, #1
ble .L765
mov ip, r3
mov lr, r1
add r6, r3, r7, lsl #2
sub r6, r6, #4
.L766:
ldr r5, [ip, #4]
ldr r4, [lr, #4] @ float
str r5, [ip], #4
cmp ip, r6
str r4, [lr], #4 @ float
bne .L766
.L765:
sub r7, r7, #-1073741823
str r2, [r3, r7, lsl #2]
str r0, [r1, r7, lsl #2] @ float
pop {r4, r5, r6, r7, pc}
.size shiftLboth, .-shiftLboth
.align 2
.global shiftRboth
.syntax unified
.arm
.fpu softvfp
.type shiftRboth, %function
shiftRboth:
@ args = 4, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr lr, [sp, #12]
cmp lr, #1
ble .L770
sub lr, lr, #-1073741823
add ip, r3, lr, lsl #2
add lr, r1, lr, lsl #2
.L771:
ldr r5, [ip, #-4]!
ldr r4, [lr, #-4]! @ float
cmp ip, r3
str r5, [ip, #4]
str r4, [lr, #4] @ float
bne .L771
.L770:
str r2, [r3]
str r0, [r1] @ float
pop {r4, r5, pc}
.size shiftRboth, .-shiftRboth
.align 2
.global order
.syntax unified
.arm
.fpu softvfp
.type order, %function
order:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
subgt r0, r0, #1
suble r0, r1, #1
bx lr
.size order, .-order
.align 2
.global fxp_check_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_limit_cycle, %function
fxp_check_limit_cycle:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r1, #1
sub r3, r1, #-1073741823
mov r6, r1
sub r5, r1, #1
mov r8, r0
mov r7, #1
ldr r1, [r0, r3, lsl #2]
ble .L778
add r3, r0, r5, lsl #2
b .L779
.L790:
add r7, r7, #1
cmp r6, r7
beq .L789
.L779:
ldr r2, [r3, #-4]!
cmp r2, r1
bne .L790
.L778:
cmp r6, r7
cmpne r7, #1
movne r0, #1
moveq r0, #0
bl __ESBMC_assume
mov r1, r7
ldr r0, .L791
bl printf
cmp r5, #0
mov r4, r5
lsl r10, r7, #1
blt .L785
.L780:
mov fp, #0
ldr r9, .L791+4
sub r6, r6, r7
sub r5, r5, r7
b .L783
.L782:
sub r4, r4, #1
cmn r4, #1
sub r5, r5, #1
beq .L781
.L783:
cmp r4, r6
blt .L782
mov r0, r9
ldr r2, [r8, r5, lsl #2]
ldr r1, [r8, r4, lsl #2]
bl printf
cmp r5, #0
ble .L781
ldr r2, [r8, r4, lsl #2]
ldr r3, [r8, r5, lsl #2]
cmp r2, r3
bne .L781
sub r4, r4, #1
cmn r4, #1
add fp, fp, #2
sub r5, r5, #1
bne .L783
.L781:
cmp fp, #0
movle r0, #0
movgt r0, #1
bl __ESBMC_assume
mov r1, r10
ldr r0, .L791+8
bl printf
mov r1, fp
ldr r0, .L791+12
bl printf
sub r0, fp, r10
clz r0, r0
lsr r0, r0, #5
bl __ESBMC_assume
bl __DSVERIFIER_assert.part.0
.L789:
mov r0, #0
bl __ESBMC_assume
mov r1, r6
ldr r0, .L791
bl printf
mov r4, r5
lsl r10, r6, #1
b .L780
.L785:
mov fp, #0
b .L781
.L792:
.align 2
.L791:
.word .LC18
.word .LC19
.word .LC20
.word .LC21
.size fxp_check_limit_cycle, .-fxp_check_limit_cycle
.section .rodata.cst4
.align 2
.LC31:
.word __stack_chk_guard
.text
.align 2
.global fxp_check_persistent_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type fxp_check_persistent_limit_cycle, %function
fxp_check_persistent_limit_cycle:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, fp, lr}
add fp, sp, #20
sub sp, sp, #8
ldr r3, .L821
subs r4, r1, #0
mov r6, r0
ldr r3, [r3]
str r3, [fp, #-24]
mov r3,#0
ldr r0, [r0]
ble .L794
mov r1, #0
mov ip, r6
mov r3, r1
mov r5, r1
mov r2, r0
b .L799
.L796:
add r3, r3, #1
cmp r4, r3
beq .L798
.L817:
ldr r2, [ip, #4]!
.L799:
cmp r0, r2
addne r1, r1, #1
bne .L796
cmp r1, #0
bne .L797
add r3, r3, #1
cmp r4, r3
add r5, r5, #1
bne .L817
.L798:
add r5, r5, r1
cmp r5, #1
lsl r7, r5, #2
ble .L810
.L807:
cmp r5, r4, asr #1
movle r0, #1
movgt r0, #0
.L800:
add r7, r7, #7
bic r7, r7, #7
bl __ESBMC_assume
sub sp, sp, r7
mov lr, sp
mov r3, #0
.L802:
cmp r3, r5
ldrlt r2, [r6, r3, lsl #2]
strlt r2, [lr, r3, lsl #2]
add r3, r3, #1
cmp r4, r3
bgt .L802
mov r3, #0
sub r0, r6, #4
mov r2, r3
b .L805
.L819:
cmp r3, r5
moveq r3, #0
cmp r4, r2
ble .L818
.L805:
ldr r1, [lr, r3, lsl #2]
ldr ip, [r0, #4]!
add r2, r2, #1
cmp ip, r1
add r3, r3, #1
beq .L819
.L793:
ldr r3, .L821
ldr r2, [r3]
ldr r3, [fp, #-24]
eors r2, r3, r2
mov r3, #0
bne .L820
sub sp, fp, #20
@ sp needed
pop {r4, r5, r6, r7, fp, pc}
.L797:
add r5, r5, r1
cmp r5, #1
lsl r7, r5, #2
bne .L807
.L810:
mov r0, #0
b .L800
.L818:
bl __DSVERIFIER_assert.part.0
.L794:
mov r0, #0
bl __ESBMC_assume
b .L793
.L820:
bl __stack_chk_fail
.L822:
.align 2
.L821:
.word .LC31
.size fxp_check_persistent_limit_cycle, .-fxp_check_persistent_limit_cycle
.align 2
.global fxp_check_oscillations
.syntax unified
.arm
.fpu softvfp
.type fxp_check_oscillations, %function
fxp_check_oscillations:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
sub r3, r1, #-1073741823
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r2, [r0, r3, lsl #2]
mov r8, r1
ldr r1, [r0]
mov r9, r0
cmp r1, r2
moveq r0, #0
beq .L824
lsl r3, r3, #2
add r3, r9, r3
ldr r0, [r3, #-4]
subs r0, r0, r2
movne r0, #1
.L824:
bl __ESBMC_assume
cmp r8, #2
pople {r4, r5, r6, r7, r8, r9, r10, pc}
mov lr, #0
mov r6, #2
mov r2, lr
add r1, r9, #4
add r7, r8, #2
sub r9, r9, #4
.L826:
mov ip, r9
mov r3, r6
mov r0, r1
b .L830
.L829:
add r3, r3, #1
cmp r3, r7
add r2, r2, #1
beq .L828
.L830:
cmp r2, r6
movgt lr, #0
movgt r2, lr
cmp r8, r3
ble .L828
ldr r5, [ip, #4]!
ldr r4, [r0, #4]!
cmp r5, r4
bne .L829
add lr, lr, #1
cmp lr, r6
bne .L829
bl __DSVERIFIER_assert.part.0
.L828:
add r6, r6, #1
cmp r8, r6
add r7, r7, #1
add r1, r1, #4
bne .L826
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.size fxp_check_oscillations, .-fxp_check_oscillations
.align 2
.global fxp_ln
.syntax unified
.arm
.fpu softvfp
.type fxp_ln, %function
fxp_ln:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, #32768
ldrlt r3, .L854
lsllt r0, r0, #16
ldrge r3, .L854+4
cmp r0, #8388608
sublt r3, r3, #360448
sublt r3, r3, #2960
lsllt r0, r0, #8
sublt r3, r3, #1
cmn r0, #-134217727
suble r3, r3, #181248
lslle r0, r0, #4
suble r3, r3, #456
cmn r0, #-536870911
suble r3, r3, #90112
lslle r0, r0, #2
suble r3, r3, #740
cmn r0, #-1073741823
suble r3, r3, #45312
lslle r0, r0, #1
suble r3, r3, #114
adds r2, r0, r0, asr #1
bmi .L840
sub r3, r3, #26368
sub r3, r3, #205
add r2, r2, r2, asr #2
.L841:
sub r3, r3, #14592
sub r3, r3, #32
add r2, r2, r2, asr #3
.L843:
sub r3, r3, #7680
sub r3, r3, #39
add r2, r2, r2, asr #4
.L845:
sub r3, r3, #3968
sub r3, r3, #5
add r2, r2, r2, asr #5
.L847:
sub r3, r3, #2016
sub r3, r3, #1
add r2, r2, r2, asr #6
.L849:
sub r3, r3, #1016
add r0, r2, r2, asr #7
.L851:
sub r3, r3, #508
sub r3, r3, #2
.L852:
rsb r0, r0, #-2147483648
sub r0, r3, r0, asr #15
bx lr
.L840:
adds r2, r0, r0, asr #2
bpl .L841
adds r2, r0, r0, asr #3
bpl .L843
adds r2, r0, r0, asr #4
bpl .L845
adds r2, r0, r0, asr #5
bpl .L847
adds r2, r0, r0, asr #6
bpl .L849
adds r2, r0, r0, asr #7
bmi .L852
mov r0, r2
b .L851
.L855:
.align 2
.L854:
.word -45426
.word 681391
.size fxp_ln, .-fxp_ln
.align 2
.global fxp_log10_low
.syntax unified
.arm
.fpu softvfp
.type fxp_log10_low, %function
fxp_log10_low:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r2, #0
ldr r3, .L858
bl __aeabi_dmul
mov r2, #0
ldr r3, .L858+4
bl __aeabi_dadd
bl __aeabi_d2iz
bl fxp_ln
mov r1, r0
mov r0, #655360
bl fxp_ln
mov r6, r0
mov r0, r1
bl __aeabi_i2d
mov r4, r0
mov r0, r6
mov r5, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
pop {r4, r5, r6, pc}
.L859:
.align 2
.L858:
.word 1089470464
.word 1071644672
.size fxp_log10_low, .-fxp_log10_low
.align 2
.global fxp_log10
.syntax unified
.arm
.fpu softvfp
.type fxp_log10, %function
fxp_log10:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r2, #0
ldr r3, .L871
mov r4, r0
mov r5, r1
bl __aeabi_dcmpgt
cmp r0, #0
beq .L868
mov r2, #8388608
mov r0, r4
mov r1, r5
ldr r3, .L871+4
bl __aeabi_dcmpgt
cmp r0, #0
beq .L869
mov r2, #8388608
ldr r3, .L871+4
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
bl fxp_log10_low
ldr r2, .L871+8
ldr r3, .L871+12
bl __aeabi_dadd
pop {r4, r5, r6, pc}
.L868:
mov r0, r4
mov r1, r5
pop {r4, r5, r6, lr}
b fxp_log10_low
.L869:
mov r2, #0
ldr r3, .L871
mov r0, r4
mov r1, r5
bl __aeabi_ddiv
bl fxp_log10_low
ldr r2, .L871+8
ldr r3, .L871+16
bl __aeabi_dadd
pop {r4, r5, r6, pc}
.L872:
.align 2
.L871:
.word 1088421824
.word 1104150400
.word -1574947053
.word 1075974094
.word 1074925518
.size fxp_log10, .-fxp_log10
.section .rodata.str1.4
.align 2
.LC32:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/functions.h\000"
.align 2
.LC33:
.ascii "sv >= nv\000"
.text
.align 2
.global snrVariance
.syntax unified
.arm
.fpu softvfp
.type snrVariance, %function
snrVariance:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r3, r2, #0
sub sp, sp, #20
str r3, [sp]
ble .L886
mov r4, #0
mov r5, #0
sub r10, r0, #4
sub fp, r1, #4
add r3, r10, r3, lsl #2
mov r9, fp
mov r8, r10
str fp, [sp, #12]
mov r6, r4
mov fp, r10
mov r7, r5
mov r10, r3
str r3, [sp, #8]
.L875:
ldr r0, [r8, #4]! @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r6, r0
ldr r0, [r9, #4]! @ float
mov r7, r1
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, r8
mov r4, r0
mov r5, r1
bne .L875
ldr r0, [sp]
bl __aeabi_i2d
mov r8, r0
mov r9, r1
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r4, #0
mov r5, #0
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r8, r6
mov r9, r7
mov r6, r4
mov r7, r5
stm sp, {r0-r1}
mov r10, fp
ldr fp, [sp, #12]
.L877:
ldr r0, [r10, #4]! @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dsub
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r6, r0
ldr r0, [fp, #4]! @ float
mov r7, r1
bl __aeabi_f2d
ldmia sp, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, r5
mov r0, r4
bl __aeabi_dadd
ldr r3, [sp, #8]
mov r4, r0
cmp r3, r10
mov r5, r1
bne .L877
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
bne .L886
mov r2, r4
mov r3, r5
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
beq .L888
mov r2, r4
mov r3, r5
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
bl __aeabi_d2f
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L886:
ldr r0, .L889
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L888:
ldr r3, .L889+4
ldr r2, .L889+8
ldr r1, .L889+12
ldr r0, .L889+16
bl __assert_fail
.L890:
.align 2
.L889:
.word 1176256410
.word .LANCHOR0+572
.word 373
.word .LC32
.word .LC33
.size snrVariance, .-snrVariance
.align 2
.global snrPower
.syntax unified
.arm
.fpu softvfp
.type snrPower, %function
snrPower:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #0
ble .L896
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r4, #0
mov r5, #0
mov r6, r4
mov r7, r5
sub r8, r0, #4
add r10, r8, r2, lsl #2
sub r9, r1, #4
.L893:
ldr r1, [r8, #4]! @ float
mov r0, r1
bl __aeabi_fmul
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r7, r1
ldr r1, [r9, #4]! @ float
mov r6, r0
mov r0, r1
bl __aeabi_fmul
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r8, r10
mov r4, r0
mov r5, r1
bne .L893
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
bne .L900
mov r2, r4
mov r3, r5
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
beq .L905
mov r2, r4
mov r3, r5
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
bl __aeabi_d2f
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L900:
ldr r0, .L906
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L896:
ldr r0, .L906
bx lr
.L905:
ldr r3, .L906+4
ldr r2, .L906+8
ldr r1, .L906+12
ldr r0, .L906+16
bl __assert_fail
.L907:
.align 2
.L906:
.word 1176256410
.word .LANCHOR0+584
.word 394
.word .LC32
.word .LC33
.size snrPower, .-snrPower
.global __aeabi_fcmpgt
.section .rodata.str1.4
.align 2
.LC34:
.ascii "power >= 1.0f\000"
.text
.align 2
.global snrPoint
.syntax unified
.arm
.fpu softvfp
.type snrPoint, %function
snrPoint:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r7, r2, #0
ble .L909
mov r9, r0
mov r4, #0
mov r8, #0
ldr r10, .L915
ldr fp, .L915+4
sub r6, r1, #4
.L911:
ldr r5, [r6, #4]! @ float
mov r1, r8
mov r0, r5
bl __aeabi_fcmpeq
cmp r0, #0
bne .L910
mov r1, r5
ldr r0, [r9, r4, lsl #2] @ float
bl __aeabi_fdiv
mov r1, r10
mov r5, r0
bl __aeabi_fcmpgt
cmp r0, #0
bne .L910
mov r1, fp
mov r0, r5
bl __aeabi_fcmplt
cmp r0, #0
bne .L910
mov r0, r5
bl __aeabi_f2d
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r2, #0
ldr r3, .L915+8
bl __aeabi_dcmpge
cmp r0, #0
beq .L914
.L910:
add r4, r4, #1
cmp r7, r4
bne .L911
.L909:
ldr r0, .L915+12
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L914:
mov r2, #412
ldr r3, .L915+16
ldr r1, .L915+20
ldr r0, .L915+24
bl __assert_fail
.L916:
.align 2
.L915:
.word 1125515264
.word -1021968384
.word 1072693248
.word 1176256410
.word .LANCHOR0+596
.word .LC32
.word .LC34
.size snrPoint, .-snrPoint
.align 2
.global rand
.syntax unified
.arm
.fpu softvfp
.type rand, %function
rand:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L918
ldr r1, .L918+4
ldr r3, [r2, #64]
ldr r0, .L918+8
mul r3, r1, r3
add r3, r3, #12288
add r3, r3, #57
str r3, [r2, #64]
and r0, r0, r3, lsr #16
bx lr
.L919:
.align 2
.L918:
.word .LANCHOR1
.word 1103515245
.word 32767
.size rand, .-rand
.align 2
.global srand
.syntax unified
.arm
.fpu softvfp
.type srand, %function
srand:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L921
str r0, [r3, #64]
bx lr
.L922:
.align 2
.L921:
.word .LANCHOR1
.size srand, .-srand
.section .rodata.str1.4
.align 2
.LC35:
.ascii "(double)timer1*CYCLE <= (double)DEADLINE\000"
.text
.align 2
.global iirIIOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIIOutTime, %function
iirIIOutTime:
@ args = 8, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r0
mov r8, r2
ldr r2, [sp, #40]
mov r7, r0
cmp r2, #1
mov r10, r1
mov r5, r3
ldr r4, [r9], #4 @ float
ldr r6, [sp, #44]
ble .L924
add fp, r8, #4
add r8, r8, r2, lsl #2
.L925:
ldr r1, [r9], #4 @ float
ldr r0, [fp], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
cmp r8, fp
mov r4, r0
str r0, [r7] @ float
bne .L925
ldr r3, [sp, #40]
mov r1, r10
add r9, r3, r3, lsl #1
bl __aeabi_fadd
add r9, r9, r9, lsl #3
lsl r8, r9, #1
cmp r6, #0
add r8, r8, #17
str r0, [r7] @ float
ble .L935
.L930:
mov r4, #0
add r9, r5, r6, lsl #2
b .L928
.L927:
ldr r0, [r7, #4]! @ float
.L928:
ldr r1, [r5], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fadd
cmp r9, r5
mov r4, r0
bne .L927
add r3, r6, r6, lsl #1
rsb r6, r6, r3, lsl #3
add r8, r8, r6, lsl #1
.L926:
add r0, r8, #38
bl __aeabi_i2d
mov r2, #0
ldr r3, .L937
bl __aeabi_ddiv
ldr r2, .L937+4
ldr r3, .L937+8
bl __aeabi_dcmple
cmp r0, #0
beq .L936
.L923:
mov r0, r4
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L924:
mov r1, r4
mov r0, r10
bl __aeabi_fadd
cmp r6, #0
movgt r8, #71
str r0, [r7] @ float
bgt .L930
mov r4, #0
b .L923
.L935:
mov r4, #0
b .L926
.L936:
ldr r3, .L937+12
ldr r2, .L937+16
ldr r1, .L937+20
ldr r0, .L937+24
bl __assert_fail
.L938:
.align 2
.L937:
.word 1097761920
.word 1202590843
.word 1065646817
.word .LANCHOR0+608
.word 450
.word .LC32
.word .LC35
.size iirIIOutTime, .-iirIIOutTime
.align 2
.global iirIItOutTime
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime, %function
iirIItOutTime:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #20
ldr r9, [sp, #56]
ldr r8, [sp, #60]
mov r6, r3
cmp r8, r9
mov fp, r1
add r7, r2, #4
mov r4, r0
movge r2, r8
movlt r2, r9
ldr r1, [r6], #4 @ float
mov r0, fp
str r2, [sp, #4]
bl __aeabi_fmul
ldr r1, [r4] @ float
bl __aeabi_fadd
ldr r2, [sp, #4]
str r0, [sp, #12] @ float
cmp r2, #1
ble .L939
sub r8, r8, #1
sub r3, r2, #1
mov r10, #105
str r3, [sp, #8]
mov r3, r8
mov r5, #0
mov r8, r10
mov r10, r3
sub r9, r9, #1
.L943:
ldr r2, [r4, #4] @ float
cmp r5, r9
str r2, [r4], #4 @ float
str r2, [sp, #4]
bge .L941
ldr r1, [r7], #4 @ float
ldr r0, [sp, #12] @ float
bl __aeabi_fmul
ldr r2, [sp, #4]
mov r1, r0
mov r0, r2
bl __aeabi_fsub
add r8, r8, #41
str r0, [r4, #-4] @ float
.L941:
cmp r5, r10
movge r0, r8
bge .L942
ldr r1, [r6], #4 @ float
mov r0, fp
bl __aeabi_fmul
mov r1, r0
ldr r0, [r4, #-4] @ float
bl __aeabi_fadd
str r0, [r4, #-4] @ float
add r0, r8, #38
.L942:
ldr r3, [sp, #8]
add r5, r5, #1
cmp r3, r5
add r8, r0, #54
bne .L943
add r0, r0, #61
bl __aeabi_i2d
mov r2, #0
ldr r3, .L948
bl __aeabi_ddiv
ldr r2, .L948+4
ldr r3, .L948+8
bl __aeabi_dcmple
cmp r0, #0
beq .L947
.L939:
ldr r0, [sp, #12] @ float
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L947:
ldr r3, .L948+12
ldr r2, .L948+16
ldr r1, .L948+20
ldr r0, .L948+24
bl __assert_fail
.L949:
.align 2
.L948:
.word 1097761920
.word 1202590843
.word 1065646817
.word .LANCHOR0+624
.word 477
.word .LC32
.word .LC35
.size iirIItOutTime, .-iirIItOutTime
.align 2
.global iirIItOutTime_double
.syntax unified
.arm
.fpu softvfp
.type iirIItOutTime_double, %function
iirIItOutTime_double:
@ args = 16, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r4, r0
sub sp, sp, #28
ldr fp, [sp, #72]
ldr r9, [sp, #76]
ldr r7, [sp, #68]
cmp r9, fp
mov r0, r2
mov r1, r3
str r2, [sp, #16]
str r3, [sp, #20]
ldmia r7!, {r2-r3}
movge r8, r9
movlt r8, fp
bl __aeabi_dmul
ldmia r4, {r2-r3}
bl __aeabi_dadd
cmp r8, #1
str r0, [sp, #8]
str r1, [sp, #12]
ldr r6, [sp, #64]
ble .L950
mov r5, #0
mov r10, #105
sub r3, r9, #1
str r3, [sp, #4]
sub r3, r8, #1
add r6, r6, #8
sub fp, fp, #1
str r3, [sp]
.L954:
cmp r5, fp
add r9, r4, #8
ldmia r9, {r8-r9}
stm r4!, {r8-r9}
bge .L952
ldmia r6!, {r2-r3}
add r1, sp, #8
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
stmdb r4, {r0-r1}
add r10, r10, #41
.L952:
ldr r3, [sp, #4]
cmp r5, r3
movge r0, r10
bge .L953
ldmia r7!, {r2-r3}
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmdb r4, {r0-r1}
bl __aeabi_dadd
stmdb r4, {r0-r1}
add r0, r10, #38
.L953:
ldr r3, [sp]
add r5, r5, #1
cmp r3, r5
add r10, r0, #54
bne .L954
add r0, r0, #61
bl __aeabi_i2d
mov r2, #0
ldr r3, .L959
bl __aeabi_ddiv
ldr r2, .L959+4
ldr r3, .L959+8
bl __aeabi_dcmple
cmp r0, #0
beq .L958
.L950:
add r1, sp, #8
ldmia r1, {r0-r1}
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L958:
mov r2, #504
ldr r3, .L959+12
ldr r1, .L959+16
ldr r0, .L959+20
bl __assert_fail
.L960:
.align 2
.L959:
.word 1097761920
.word 1202590843
.word 1065646817
.word .LANCHOR0+640
.word .LC32
.word .LC35
.size iirIItOutTime_double, .-iirIItOutTime_double
.align 2
.global iirOutBoth
.syntax unified
.arm
.fpu softvfp
.type iirOutBoth, %function
iirOutBoth:
@ args = 32, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #20
ldr ip, [sp, #80]
ldr r7, [sp, #60]
sub lr, ip, #-1073741823
ldr ip, [sp, #84]
ldr r4, [sp, #64]
ldr r6, [sp, #68]
cmp ip, #0
sub ip, ip, #-1073741823
add r8, r2, #4
add r9, r0, lr, lsl #2
add r7, r7, lr, lsl #2
add r10, r1, ip, lsl #2
add r2, r4, ip, lsl #2
add r6, r6, #4
ble .L966
mov fp, r3
mov r3, #0
stm sp, {r6, r7, r8, r9}
mov r5, r3
mov r4, #0
mov r8, r2
mov r9, r3
ldr r6, [sp, #72]
ldr r7, [sp, #84]
.L963:
ldr r1, [r8], #-4
ldr r0, [r6], #4
bl fxp_mult
add r0, r0, r5
bl fxp_quantize
ldr r1, [r10], #-4 @ float
mov r5, r0
ldr r0, [fp], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fadd
add r9, r9, #1
cmp r7, r9
mov r4, r0
bne .L963
ldm sp, {r6, r7, r8, r9}
.L962:
ldr r3, [sp, #80]
cmp r3, #1
ble .L964
mov r10, #1
mov fp, r3
.L965:
ldr r1, [r7], #-4
ldr r0, [r6], #4
bl fxp_mult
sub r0, r5, r0
bl fxp_quantize
ldr r1, [r9], #-4 @ float
mov r5, r0
ldr r0, [r8], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
add r10, r10, #1
cmp fp, r10
mov r4, r0
bne .L965
.L964:
ldr r3, [sp, #76]
str r5, [r3]
ldr r3, [sp, #56]
str r4, [r3] @ float
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L966:
mov r5, #0
mov r4, #0
b .L962
.size iirOutBoth, .-iirOutBoth
.align 2
.global iirOutFixedL
.syntax unified
.arm
.fpu softvfp
.type iirOutFixedL, %function
iirOutFixedL:
@ args = 12, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #28
ldr r7, [sp, #68]
ldr lr, [sp, #72]
sub ip, r7, #-1073741823
ldr r8, [sp, #64]
cmp lr, #1
str r2, [sp, #8]
sub lr, lr, #-1073741823
add r2, r0, #4
add r9, r3, ip, lsl #2
lsl r3, ip, #2
mov r6, r1
str r0, [sp, #4]
str ip, [sp, #12]
str lr, [sp, #16]
str r2, [sp]
str r3, [sp, #20]
add r8, r8, lr, lsl #2
ble .L976
mov r10, r1
mov fp, r8
mov r4, #0
lsl r5, lr, #2
add r5, r1, r5
.L972:
ldr r3, [r10, #4]
str r3, [r10]
ldr r1, [r10], #4
ldr r0, [fp], #-4
bl fxp_mult
add r0, r0, r4
bl fxp_quantize
cmp r10, r5
mov r4, r0
bne .L972
ldr r3, [sp, #72]
rsb r3, r3, r3, lsl #30
add r8, r8, r3, lsl #2
ldr r3, [sp, #72]
add r8, r8, #4
sub r3, r3, #1
add r3, r6, r3, lsl #2
.L971:
ldr r2, [sp, #16]
ldr r1, [sp, #8]
str r1, [r6, r2, lsl #2]
ldr r1, [r3]
ldr r0, [r8]
bl fxp_mult
add r0, r0, r4
bl fxp_quantize
cmp r7, #2
mov r5, r0
ble .L973
mov r8, r9
ldr r3, [sp, #4]
ldr r2, [sp, #20]
ldr r4, [sp]
add r6, r3, r2
.L974:
ldr r1, [r4], #4
ldr r0, [r8], #-4
bl fxp_mult
sub r0, r5, r0
bl fxp_quantize
ldr r3, [r4]
cmp r4, r6
mov r5, r0
str r3, [r4, #-4]
bne .L974
ldr r2, [sp]
rsb r3, r7, r7, lsl #30
add r9, r9, r3, lsl #2
sub r3, r7, #2
add r3, r2, r3, lsl #2
add r9, r9, #8
str r3, [sp]
.L973:
cmp r7, #1
ble .L975
ldr r3, [sp]
ldr r0, [r9]
ldr r1, [r3]
bl fxp_mult
sub r0, r5, r0
bl fxp_quantize
mov r5, r0
.L975:
mov r0, r5
ldr r3, [sp, #4]
ldr r2, [sp, #12]
str r5, [r3, r2, lsl #2]
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L976:
mov r3, r1
mov r4, #0
b .L971
.size iirOutFixedL, .-iirOutFixedL
.align 2
.global iirOutFloatL
.syntax unified
.arm
.fpu softvfp
.type iirOutFloatL, %function
iirOutFloatL:
@ args = 12, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #28
ldr r7, [sp, #68]
ldr lr, [sp, #72]
sub ip, r7, #-1073741823
ldr r8, [sp, #64]
cmp lr, #1
str r2, [sp, #8] @ float
sub lr, lr, #-1073741823
add r2, r0, #4
add r9, r3, ip, lsl #2
lsl r3, ip, #2
mov r6, r1
str r0, [sp, #4]
str ip, [sp, #12]
str lr, [sp, #16]
str r2, [sp]
str r3, [sp, #20]
add r8, r8, lr, lsl #2
ble .L986
mov r4, r1
mov r10, r8
mov fp, #0
lsl r5, lr, #2
add r5, r1, r5
.L982:
ldr r3, [r4, #4] @ float
str r3, [r4] @ float
ldr r1, [r4], #4 @ float
ldr r0, [r10], #-4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, fp
bl __aeabi_fadd
cmp r4, r5
mov fp, r0
bne .L982
ldr r3, [sp, #72]
rsb r2, r3, r3, lsl #30
add r8, r8, r2, lsl #2
sub r2, r3, #1
add r8, r8, #4
add r2, r6, r2, lsl #2
.L981:
ldr r3, [sp, #16]
ldr r1, [sp, #8] @ float
str r1, [r6, r3, lsl #2] @ float
ldr r1, [r2] @ float
ldr r0, [r8] @ float
bl __aeabi_fmul
mov r1, fp
bl __aeabi_fadd
cmp r7, #2
mov r5, r0
ble .L983
mov r8, r9
ldr r3, [sp, #4]
ldr r2, [sp, #20]
ldr r4, [sp]
add r6, r3, r2
.L984:
ldr r1, [r4], #4 @ float
ldr r0, [r8], #-4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
ldr r3, [r4] @ float
cmp r4, r6
mov r5, r0
str r3, [r4, #-4] @ float
bne .L984
ldr r2, [sp]
rsb r3, r7, r7, lsl #30
add r9, r9, r3, lsl #2
sub r3, r7, #2
add r3, r2, r3, lsl #2
add r9, r9, #8
str r3, [sp]
.L983:
cmp r7, #1
ble .L985
ldr r3, [sp]
ldr r0, [r9] @ float
ldr r1, [r3] @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
mov r5, r0
.L985:
mov r0, r5
ldr r3, [sp, #4]
ldr r2, [sp, #12]
str r5, [r3, r2, lsl #2] @ float
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L986:
mov r2, r1
mov fp, #0
b .L981
.size iirOutFloatL, .-iirOutFloatL
.align 2
.global iirOutBothL
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL, %function
iirOutBothL:
@ args = 32, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov lr, r0
sub sp, sp, #44
ldr r4, [sp, #108]
ldr ip, [sp, #104]
sub fp, r4, #-1073741823
sub ip, ip, #-1073741823
add r2, r2, ip, lsl #2
add r7, r3, fp, lsl #2
ldr r10, [sp, #96]
ldr r3, [sp, #84]
str r0, [sp, #32]
ldr r0, [sp, #92]
str r2, [sp, #4]
lsl r2, ip, #2
add lr, lr, #4
str r2, [sp, #36]
add r9, r10, fp, lsl #2
add r2, r0, ip, lsl #2
add r3, r3, #4
cmp r4, #1
str ip, [sp, #28]
str r1, [sp, #24]
str lr, [sp]
str r2, [sp, #12]
str r7, [sp, #16]
str r9, [sp, #20]
str r3, [sp, #8]
ble .L997
mov r10, r1
mov r6, #0
mov r5, #0
ldr r4, [sp, #88]
lsl r8, fp, #2
add r8, r4, r8
.L992:
ldr r3, [r4, #4]
str r3, [r4]
ldr r1, [r4], #4
ldr r0, [r9], #-4
bl fxp_mult
add r0, r0, r6
bl fxp_quantize
ldr r3, [r10, #4] @ float
mov r6, r0
str r3, [r10] @ float
ldr r1, [r10], #4 @ float
ldr r0, [r7], #-4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fadd
cmp r4, r8
mov r5, r0
bne .L992
ldr r3, [sp, #108]
ldr r2, [sp, #108]
rsb r3, r3, r3, lsl #30
sub r9, r2, #1
lsl r3, r3, #2
ldr r2, [sp, #20]
add r3, r3, #4
add r2, r2, r3
str r2, [sp, #20]
ldr r2, [sp, #16]
add r3, r2, r3
str r3, [sp, #16]
ldr r2, [sp, #24]
ldr r3, [sp, #88]
add r3, r3, r9, lsl #2
add r9, r2, r9, lsl #2
.L991:
ldr r2, [sp, #88]
ldr r1, [sp, #100]
str r1, [r2, fp, lsl #2]
ldr r1, [r3]
ldr r3, [sp, #20]
ldr r0, [r3]
bl fxp_mult
add r0, r0, r6
bl fxp_quantize
ldr r2, [sp, #80] @ float
ldr r3, [sp, #24]
mov r6, r0
str r2, [r3, fp, lsl #2] @ float
ldr r3, [sp, #16]
ldr r1, [r9] @ float
ldr r0, [r3] @ float
bl __aeabi_fmul
mov r1, r5
bl __aeabi_fadd
ldr r3, [sp, #104]
mov r5, r0
cmp r3, #2
ble .L993
ldr r3, [sp, #84]
ldr r2, [sp, #36]
ldr r9, [sp]
ldr r7, [sp, #4]
ldr r4, [sp, #8]
ldr r10, [sp, #12]
add r8, r3, r2
.L994:
ldr r1, [r4], #4
ldr r0, [r10], #-4
bl fxp_mult
sub r0, r6, r0
bl fxp_quantize
ldr r3, [r4]
ldr r1, [r9], #4 @ float
mov r6, r0
str r3, [r4, #-4]
ldr r0, [r7], #-4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
ldr r3, [r9] @ float
cmp r4, r8
mov r5, r0
str r3, [r9, #-4] @ float
bne .L994
ldr r3, [sp, #104]
ldr r1, [sp, #12]
rsb r3, r3, r3, lsl #30
lsl r3, r3, #2
add r3, r3, #8
add r1, r1, r3
str r1, [sp, #12]
ldr r1, [sp, #4]
ldr r2, [sp, #104]
add r3, r1, r3
str r3, [sp, #4]
ldr r3, [sp, #8]
sub r2, r2, #2
add r3, r3, r2, lsl #2
str r3, [sp, #8]
ldr r3, [sp]
add r3, r3, r2, lsl #2
str r3, [sp]
.L993:
ldr r3, [sp, #104]
cmp r3, #1
ble .L995
ldr r3, [sp, #8]
ldr r1, [r3]
ldr r3, [sp, #12]
ldr r0, [r3]
bl fxp_mult
sub r0, r6, r0
bl fxp_quantize
ldr r3, [sp]
ldr r2, [sp, #28]
ldr r1, [r3] @ float
ldr r3, [sp, #84]
mov r6, r0
str r0, [r3, r2, lsl #2]
ldr r3, [sp, #4]
ldr r0, [r3] @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r5
bl __aeabi_fsub
mov r5, r0
.L996:
ldr r3, .L1002
ldr r2, [sp, #32]
ldr r3, [r3, #12]
ldr r1, [sp, #28]
ldr r4, .L1002+4
str r5, [r2, r1, lsl #2] @ float
add r4, r4, r3, lsl #3
mov r0, r6
bl __aeabi_i2d
add r3, r4, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
bl __aeabi_d2f
mov r1, r5
bl __aeabi_fsub
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L995:
ldr r3, [sp, #84]
ldr r2, [sp, #28]
str r6, [r3, r2, lsl #2]
b .L996
.L997:
mov r6, #0
mov r5, #0
ldr r9, [sp, #24]
ldr r3, [sp, #88]
b .L991
.L1003:
.align 2
.L1002:
.word .LANCHOR1
.word .LANCHOR0
.size iirOutBothL, .-iirOutBothL
.align 2
.global iirOutBothL2
.syntax unified
.arm
.fpu softvfp
.type iirOutBothL2, %function
iirOutBothL2:
@ args = 32, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #36
ldr r9, [sp, #100]
ldr lr, [sp, #96]
sub r10, r9, #1
sub lr, lr, #-1073741823
sub ip, r9, #-1073741823
str r2, [sp, #16]
cmp r10, #0
lsl r2, lr, #2
stmib sp, {r0, r1, lr}
str ip, [sp, #24]
str r3, [sp, #20]
str r2, [sp, #28]
ble .L1011
mov r5, #0
mov r4, #0
ldr r9, [sp, #80]
lsl r8, ip, #2
ldr r2, [sp, #88]
mov r6, r1
add r1, r8, #4
sub r8, r9, #4
add fp, r2, r1
add r7, r3, r1
add r8, r8, r1
.L1006:
ldr r1, [r9, #4]
str r1, [r9], #4
ldr r0, [fp, #-4]!
bl fxp_mult
add r0, r0, r5
bl fxp_quantize
ldr r3, [r6, #4] @ float
mov r5, r0
str r3, [r6], #4 @ float
mov r0, r3
ldr r1, [r7, #-4]! @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fadd
cmp r9, r8
mov r4, r0
bne .L1006
mov r6, #0
ldr r3, [sp, #80]
ldr r2, [sp, #8]
add r3, r3, r10, lsl #2
add r10, r2, r10, lsl #2
.L1005:
ldr r2, [sp, #80]
ldr r7, [sp, #24]
ldr r1, [sp, #92]
str r1, [r2, r7, lsl #2]
ldr r1, [r3]
ldr r3, [sp, #88]
ldr r0, [r3, r6, lsl #2]
bl fxp_mult
add r0, r0, r5
bl fxp_quantize
ldr r2, [sp, #72] @ float
ldr r3, [sp, #8]
mov r5, r0
str r2, [r3, r7, lsl #2] @ float
ldr r3, [sp, #20]
ldr r1, [r10] @ float
ldr r0, [r3, r6, lsl #2] @ float
bl __aeabi_fmul
mov r1, r4
bl __aeabi_fadd
ldr r3, [sp, #96]
mov r4, r0
cmp r3, #2
ble .L1012
ldr r3, [sp, #28]
add r7, r3, #4
ldr r3, [sp, #84]
add r10, r3, r7
ldr r3, [sp, #16]
add r7, r3, r7
ldr r3, [sp, #76]
add r9, r3, #4
ldr r3, [sp, #4]
add r6, r3, #4
ldr r3, [sp, #84]
add r8, r3, #8
.L1008:
ldr r1, [r9]
ldr r0, [r10, #-4]!
bl fxp_mult
sub r0, r5, r0
bl fxp_quantize
ldr r3, [r9, #4]!
ldr r1, [r7, #-4]! @ float
mov r5, r0
str r3, [r9, #-4]
ldr r0, [r6] @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
ldr r3, [r6, #4]! @ float
cmp r8, r10
mov r4, r0
str r3, [r6, #-4] @ float
bne .L1008
ldr r3, [sp, #96]
sub r6, r3, #1
.L1007:
ldr r3, [sp, #96]
cmp r3, #1
ble .L1009
sub r7, r3, r6
ldr r3, [sp, #84]
ldr r0, [r3, r7, lsl #2]
ldr r3, [sp, #76]
ldr r1, [r3, r6, lsl #2]
bl fxp_mult
sub r0, r5, r0
bl fxp_quantize
mov r5, r0
ldr r3, [sp, #16]
ldr r2, [sp, #12]
ldr r0, [r3, r7, lsl #2] @ float
ldr r3, [sp, #76]
str r5, [r3, r2, lsl #2]
ldr r3, [sp, #4]
ldr r1, [r3, r6, lsl #2] @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
mov r4, r0
.L1010:
ldr r2, .L1017
ldr r3, .L1017+4
ldr r2, [r2, #12]
ldr r1, [sp, #4]
ldr r0, [sp, #12]
str r4, [r1, r0, lsl #2] @ float
mov r0, r5
add r5, r3, r2, lsl #3
bl __aeabi_i2d
add r3, r5, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
bl __aeabi_d2f
mov r1, r4
bl __aeabi_fsub
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1009:
ldr r3, [sp, #76]
ldr r2, [sp, #12]
str r5, [r3, r2, lsl #2]
b .L1010
.L1012:
mov r6, #1
b .L1007
.L1011:
mov r6, r10
mov r5, #0
mov r4, #0
ldr r10, [sp, #8]
ldr r3, [sp, #80]
b .L1005
.L1018:
.align 2
.L1017:
.word .LANCHOR1
.word .LANCHOR0
.size iirOutBothL2, .-iirOutBothL2
.section .rodata.str1.4
.align 2
.LC36:
.ascii "An Overflow Occurred in the node a0\000"
.text
.align 2
.global fxp_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1, %function
fxp_direct_form_1:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #12
ldr fp, [sp, #52]
ldr r9, [sp, #48]
sub r7, fp, #-1073741823
sub r6, r9, #-1073741823
cmp fp, #0
str r2, [sp, #4]
add r6, r0, r6, lsl #2
add r7, r1, r7, lsl #2
add r8, r2, #4
ble .L1024
mov r5, #0
mov r10, r3
mov r4, r5
.L1021:
ldr r1, [r7], #-4
ldr r0, [r10], #4
bl fxp_mult
add r0, r0, r4
bl fxp_quantize
add r5, r5, #1
cmp fp, r5
mov r4, r0
bne .L1021
.L1020:
cmp r9, #1
ble .L1022
mov r5, #1
.L1023:
ldr r1, [r6], #-4
ldr r0, [r8], #4
bl fxp_mult
sub r0, r4, r0
bl fxp_quantize
add r5, r5, #1
cmp r9, r5
mov r4, r0
bne .L1023
.L1022:
mov r0, r4
ldr r1, .L1028
bl fxp_verify_overflow_node
ldr r3, [sp, #4]
mov r0, r4
ldr r1, [r3]
bl fxp_div
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b fxp_quantize
.L1024:
mov r4, #0
b .L1020
.L1029:
.align 2
.L1028:
.word .LC36
.size fxp_direct_form_1, .-fxp_direct_form_1
.section .rodata.str1.4
.align 2
.LC37:
.ascii "An Overflow Occurred in the node b0\000"
.text
.align 2
.global fxp_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_2, %function
fxp_direct_form_2:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #12
ldr r8, [sp, #48]
mov r5, r0
cmp r8, #1
mov r9, r2
mov r6, r3
ldr r4, [r0]
ldr r7, [sp, #52]
str r1, [sp, #4]
ble .L1031
mov fp, #1
add r10, r2, #4
.L1032:
ldr r1, [r5, fp, lsl #2]
ldr r0, [r10], #4
bl fxp_mult
sub r0, r4, r0
bl fxp_quantize
add fp, fp, #1
cmp r8, fp
mov r4, r0
str r0, [r5]
bne .L1032
.L1031:
ldr r3, [sp, #4]
add r0, r3, r4
bl fxp_quantize
str r0, [r5]
ldr r1, [r9]
bl fxp_div
ldr r1, .L1039
str r0, [r5]
bl fxp_verify_overflow_node
cmp r7, #0
ble .L1035
mov r8, #0
mov r4, r8
.L1034:
ldr r1, [r5], #4
ldr r0, [r6], #4
bl fxp_mult
add r0, r0, r4
bl fxp_quantize
add r8, r8, #1
cmp r7, r8
mov r4, r0
bne .L1034
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b fxp_quantize
.L1035:
mov r4, #0
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b fxp_quantize
.L1040:
.align 2
.L1039:
.word .LC37
.size fxp_direct_form_2, .-fxp_direct_form_2
.align 2
.global fxp_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type fxp_transposed_direct_form_2, %function
fxp_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r6, r3
sub sp, sp, #20
ldr r8, [sp, #56]
ldr r7, [sp, #60]
mov fp, r0
cmp r7, r8
str r0, [sp, #12]
ldr r0, [r6], #4
mov r5, r2
movge r9, r7
movlt r9, r8
str r1, [sp, #8]
bl fxp_mult
ldr r3, [fp]
add r0, r0, r3
bl fxp_quantize
ldr r1, [r5], #4
bl fxp_div
cmp r9, #1
mov r10, r0
ble .L1042
mov r4, #0
sub r8, r8, #1
sub r7, r7, #1
sub r9, r9, #1
.L1045:
ldr r2, [fp, #4]
cmp r4, r8
str r2, [fp], #4
str r2, [sp, #4]
bge .L1043
mov r1, r10
ldr r0, [r5], #4
bl fxp_mult
ldr r2, [sp, #4]
sub r0, r2, r0
bl fxp_quantize
str r0, [fp, #-4]
.L1043:
cmp r4, r7
add r4, r4, #1
bge .L1044
ldr r1, [sp, #8]
ldr r0, [r6], #4
bl fxp_mult
ldr r2, [fp, #-4]
add r0, r0, r2
bl fxp_quantize
str r0, [fp, #-4]
.L1044:
cmp r4, r9
bne .L1045
ldr r3, [sp, #12]
add r3, r3, r4, lsl #2
str r3, [sp, #12]
.L1042:
ldr r3, [sp, #12]
ldr r1, .L1048
ldr r0, [r3]
bl fxp_verify_overflow_node
mov r0, r10
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
b fxp_quantize
.L1049:
.align 2
.L1048:
.word .LC36
.size fxp_transposed_direct_form_2, .-fxp_transposed_direct_form_2
.section .rodata.cst4
.align 2
.LC38:
.word __stack_chk_guard
.text
.align 2
.global verify_overflow
.syntax unified
.arm
.fpu softvfp
.type verify_overflow, %function
verify_overflow:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #36
ldr r4, .L1079
ldr r3, .L1079+4
ldr r2, [r4, #872]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldr r3, [r4, #1680]
lsl r1, r2, #2
add r1, r1, #7
lsl r3, r3, #2
bic r1, r1, #7
add r3, r3, #7
sub sp, sp, r1
bic r3, r3, #7
add r1, sp, #8
sub sp, sp, r3
add r3, sp, #8
mov r5, r3
add r0, r4, #72
str r3, [fp, #-48]
str r1, [fp, #-52]
bl fxp_double_to_fxp_array
ldr r2, [r4, #1680]
mov r1, r5
add r0, r4, #880
bl fxp_double_to_fxp_array
add r1, r4, #24
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
ldr r9, .L1079+8
mov r6, r0
add r1, r4, #16
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
ldr r1, [r9, #8]
lsl r3, r1, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r2, sp, #8
sub sp, sp, r3
add r3, sp, #8
cmp r1, #0
str r2, [fp, #-56]
str r3, [fp, #-60]
ble .L1051
mov r7, r0
mov r10, #0
sub r8, r2, #4
add r5, sp, #4
.L1052:
mov r3, #0
str r3, [r8, #4]!
bl nondet_int
mov r3, r0
cmp r0, r7
cmple r6, r0
str r3, [r5, #4]!
movle r0, #1
movgt r0, #0
bl __ESBMC_assume
ldr r1, [r9, #8]
add r10, r10, #1
cmp r1, r10
bgt .L1052
.L1051:
ldr r0, [r4, #872]
ldr r2, [r4, #1680]
lsl lr, r0, #2
cmp r2, r0
movge ip, r2
movlt ip, r0
add lr, lr, #7
lsl r5, r2, #2
bic lr, lr, #7
add r5, r5, #7
lsl r3, ip, #2
sub sp, sp, lr
bic r5, r5, #7
add r3, r3, #7
bic r3, r3, #7
cmp r0, #0
add lr, sp, #8
sub sp, sp, r5
add r6, sp, #8
sub sp, sp, r3
movgt r3, #0
add r10, sp, #8
movgt r5, r3
subgt lr, lr, #4
ble .L1057
.L1056:
add r3, r3, #1
cmp r0, r3
str r5, [lr, #4]!
bne .L1056
.L1057:
cmp r2, #0
movgt r3, #0
subgt lr, r6, #4
movgt r5, r3
ble .L1055
.L1060:
add r3, r3, #1
cmp r2, r3
str r5, [lr, #4]!
bne .L1060
.L1055:
cmp ip, #0
movgt r3, #0
subgt lr, r10, #4
movgt r5, r3
ble .L1059
.L1063:
add r3, r3, #1
cmp ip, r3
str r5, [lr, #4]!
bne .L1063
.L1059:
cmp r1, #0
ble .L1061
ldr r3, [fp, #-56]
ldr r1, [fp, #-60]
sub r3, r3, #4
mov r7, r3
mov r6, #0
ldr r5, [fp, #-52]
str r3, [fp, #-56]
sub r8, r1, #4
str r3, [fp, #-60]
b .L1062
.L1077:
ldr r0, [r4, #872]
ldr r2, [r4, #1680]
.L1062:
ldr r1, [r8, #4]!
ldr r3, [fp, #-48]
stm sp, {r0, r2}
mov r2, r5
mov r0, r10
bl fxp_transposed_direct_form_2
ldr r3, [r9, #8]
add r6, r6, #1
cmp r3, r6
str r0, [r7, #4]!
bgt .L1077
mov r2, #1
cmp r3, #0
ldr r5, [fp, #-60]
str r2, [r4]
ble .L1066
ldr r2, [fp, #-56]
add r9, r2, r3, lsl #2
.L1067:
ldr r0, [r5, #4]!
bl fxp_verify_overflow
cmp r9, r5
bne .L1067
.L1066:
ldr r3, .L1079+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1078
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1061:
mov r3, #1
str r3, [r4]
b .L1066
.L1078:
bl __stack_chk_fail
.L1080:
.align 2
.L1079:
.word .LANCHOR1
.word .LC38
.word .LANCHOR2
.size verify_overflow, .-verify_overflow
.align 2
.global double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1, %function
double_direct_form_1:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #12
ldr fp, [sp, #52]
ldr r10, [sp, #48]
cmp fp, #0
str r2, [sp]
str r0, [sp, #4]
add r9, r2, #8
ble .L1086
mov r8, r3
mov r6, #0
mov r4, #0
mov r5, #0
add r7, r1, fp, lsl #3
.L1083:
ldmdb r7!, {r2-r3}
ldmia r8!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
add r6, r6, #1
cmp fp, r6
mov r4, r0
mov r5, r1
bne .L1083
.L1082:
cmp r10, #1
ble .L1084
mov r6, #1
ldr r3, [sp, #4]
add r7, r3, r10, lsl #3
.L1085:
ldmdb r7!, {r2-r3}
ldmia r9!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
add r6, r6, #1
cmp r10, r6
mov r4, r0
mov r5, r1
bne .L1085
.L1084:
ldr r3, [sp]
mov r0, r4
ldmia r3, {r2-r3}
mov r1, r5
bl __aeabi_ddiv
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1086:
mov r4, #0
mov r5, #0
b .L1082
.size double_direct_form_1, .-double_direct_form_1
.align 2
.global double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2, %function
double_direct_form_2:
@ args = 16, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r0
sub sp, sp, #20
ldr fp, [sp, #64]
stm sp, {r2-r3}
ldmia r9!, {r4-r5}
cmp fp, #1
mov r10, r0
ldr r3, [sp, #56]
ldr r7, [sp, #60]
str r9, [sp, #12]
ble .L1091
mov r6, #1
add r8, r3, #8
.L1092:
ldmia r9!, {r2-r3}
ldmia r8!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
add r6, r6, #1
cmp fp, r6
stm r10, {r4-r5}
bne .L1092
.L1091:
ldmia sp, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r10, {r2-r3}
ldr r3, [sp, #56]
ldmia r3, {r2-r3}
bl __aeabi_ddiv
ldr r3, [sp, #68]
stm r10, {r0-r1}
cmp r3, #0
ble .L1095
mov r6, #0
mov r4, #0
mov r5, #0
mov r9, r3
ldr r8, [sp, #12]
b .L1094
.L1099:
ldmia r8!, {r0-r1}
.L1094:
ldmia r7!, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
add r6, r6, #1
cmp r9, r6
mov r4, r0
mov r5, r1
bne .L1099
mov r0, r4
mov r1, r5
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1095:
mov r4, #0
mov r5, #0
mov r0, r4
mov r1, r5
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size double_direct_form_2, .-double_direct_form_2
.align 2
.global double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2, %function
double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r4, r0
sub sp, sp, #28
ldr fp, [sp, #72]
ldr r10, [sp, #76]
ldr r7, [sp, #68]
cmp r10, fp
mov r0, r2
mov r1, r3
str r2, [sp, #16]
str r3, [sp, #20]
ldmia r7!, {r2-r3}
ldr r6, [sp, #64]
movge r8, r10
movlt r8, fp
bl __aeabi_dmul
ldmia r4, {r2-r3}
bl __aeabi_dadd
ldmia r6!, {r2-r3}
bl __aeabi_ddiv
cmp r8, #1
str r0, [sp, #8]
str r1, [sp, #12]
ble .L1100
mov r5, #0
sub r3, r8, #1
sub fp, fp, #1
sub r10, r10, #1
str r3, [sp, #4]
.L1104:
cmp r5, fp
add r9, r4, #8
ldmia r9, {r8-r9}
stm r4!, {r8-r9}
bge .L1102
ldmia r6!, {r2-r3}
add r1, sp, #8
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
stmdb r4, {r0-r1}
.L1102:
cmp r5, r10
add r5, r5, #1
bge .L1103
ldmia r7!, {r2-r3}
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmdb r4, {r0-r1}
bl __aeabi_dadd
stmdb r4, {r0-r1}
.L1103:
ldr r3, [sp, #4]
cmp r5, r3
bne .L1104
.L1100:
add r1, sp, #8
ldmia r1, {r0-r1}
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size double_transposed_direct_form_2, .-double_transposed_direct_form_2
.align 2
.global float_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_1, %function
float_direct_form_1:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #12
ldr fp, [sp, #52]
ldr r9, [sp, #48]
sub r7, fp, #-1073741823
sub r6, r9, #-1073741823
cmp fp, #0
str r2, [sp, #4]
add r6, r0, r6, lsl #2
add r7, r1, r7, lsl #2
add r8, r2, #4
ble .L1113
mov r10, r3
mov r5, #0
mov r4, #0
.L1110:
ldr r1, [r7], #-4 @ float
ldr r0, [r10], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fadd
add r5, r5, #1
cmp fp, r5
mov r4, r0
bne .L1110
.L1109:
cmp r9, #1
ble .L1111
mov r5, #1
.L1112:
ldr r1, [r6], #-4 @ float
ldr r0, [r8], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
add r5, r5, #1
cmp r9, r5
mov r4, r0
bne .L1112
.L1111:
ldr r3, [sp, #4]
mov r0, r4
ldr r1, [r3] @ float
bl __aeabi_fdiv
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1113:
mov r4, #0
b .L1109
.size float_direct_form_1, .-float_direct_form_1
.align 2
.global float_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_direct_form_2, %function
float_direct_form_2:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r10, r0
sub sp, sp, #12
ldr r9, [sp, #48]
mov r5, r0
cmp r9, #1
mov r7, r3
ldr r4, [r10], #4 @ float
ldr r8, [sp, #52]
str r2, [sp, #4]
str r1, [sp] @ float
ble .L1118
mov r6, #1
add fp, r2, #4
.L1119:
ldr r1, [r10], #4 @ float
ldr r0, [fp], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fsub
add r6, r6, #1
cmp r9, r6
mov r4, r0
str r0, [r5] @ float
bne .L1119
.L1118:
mov r1, r4
ldr r0, [sp] @ float
bl __aeabi_fadd
ldr r3, [sp, #4]
str r0, [r5] @ float
ldr r1, [r3] @ float
bl __aeabi_fdiv
cmp r8, #0
str r0, [r5] @ float
ble .L1122
mov r6, #0
mov r4, #0
b .L1121
.L1125:
ldr r0, [r5, #4]! @ float
.L1121:
ldr r1, [r7], #4 @ float
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fadd
add r6, r6, #1
cmp r8, r6
mov r4, r0
bne .L1125
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1122:
mov r4, #0
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size float_direct_form_2, .-float_direct_form_2
.align 2
.global float_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type float_transposed_direct_form_2, %function
float_transposed_direct_form_2:
@ args = 8, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov fp, r1
mov r4, r0
mov r6, r2
sub sp, sp, #12
ldr r7, [sp, #48]
ldr r9, [sp, #52]
ldr r1, [r3], #4 @ float
cmp r9, r7
mov r0, fp
movge r8, r9
movlt r8, r7
str r3, [sp]
bl __aeabi_fmul
ldr r1, [r4] @ float
bl __aeabi_fadd
ldr r1, [r6], #4 @ float
bl __aeabi_fdiv
cmp r8, #1
mov r10, r0
ble .L1126
mov r5, #0
ldr r3, [sp]
sub r7, r7, #1
sub r9, r9, #1
sub r8, r8, #1
.L1130:
ldr r2, [r4, #4] @ float
cmp r5, r7
str r2, [r4], #4 @ float
str r2, [sp]
bge .L1128
ldr r1, [r6], #4 @ float
mov r0, r10
str r3, [sp, #4]
bl __aeabi_fmul
ldr r2, [sp]
mov r1, r0
mov r0, r2
bl __aeabi_fsub
ldr r3, [sp, #4]
str r0, [r4, #-4] @ float
.L1128:
cmp r5, r9
add r5, r5, #1
bge .L1129
ldr r1, [r3], #4 @ float
mov r0, fp
str r3, [sp]
str r3, [sp, #4]
bl __aeabi_fmul
mov r1, r0
ldr r0, [r4, #-4] @ float
bl __aeabi_fadd
ldr r3, [sp]
str r0, [r4, #-4] @ float
.L1129:
cmp r5, r8
bne .L1130
.L1126:
mov r0, r10
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.size float_transposed_direct_form_2, .-float_transposed_direct_form_2
.section .rodata.str1.4
.align 2
.LC39:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/realizations.h\000"
.align 2
.LC40:
.ascii "(double) timer1 * hw.cycle <= ds.sample_time\000"
.text
.align 2
.global double_direct_form_1_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_MSP430, %function
double_direct_form_1_MSP430:
@ args = 8, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, r2
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #20
ldr fp, [sp, #56]
ldr r10, [sp, #60]
str r2, [sp, #12]
sub r2, fp, #-536870911
mov r6, r3
cmp r10, #0
lsl r3, r2, #3
str r0, [sp, #8]
add r7, ip, #8
str r3, [sp, #4]
ble .L1140
mov r4, #0
mov r5, #0
sub r9, r10, #-536870911
lsl r9, r9, #3
add r9, r9, #8
add r8, r1, r9
add r9, r6, r9
.L1136:
ldmdb r8!, {r2-r3}
ldmia r6!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r6, r9
mov r4, r0
mov r5, r1
bne .L1136
add r3, r10, r10, lsl #1
rsb r10, r10, r3, lsl #4
add r10, r10, #91
.L1135:
cmp fp, #1
ble .L1137
ldr r3, [sp, #4]
add r8, r3, #8
ldr r3, [sp, #8]
add r6, r3, r8
ldr r3, [sp, #12]
add r8, r3, r8
.L1138:
ldmdb r6!, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r8, r7
mov r4, r0
mov r5, r1
bne .L1138
rsb r3, fp, fp, lsl #3
add fp, fp, r3, lsl #3
sub fp, fp, #57
add r10, fp, r10
.L1137:
add r0, r10, #3
bl __aeabi_i2d
ldr r3, .L1145
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
ldr r3, .L1145+4
ldr r2, [r3, #1688]
ldr r3, [r3, #1692]
bl __aeabi_dcmple
cmp r0, #0
beq .L1144
mov r0, r4
mov r1, r5
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1140:
mov r4, #0
mov r5, #0
mov r10, #91
b .L1135
.L1144:
mov r2, #235
ldr r3, .L1145+8
ldr r1, .L1145+12
ldr r0, .L1145+16
bl __assert_fail
.L1146:
.align 2
.L1145:
.word hw
.word .LANCHOR1
.word .LANCHOR0+664
.word .LC39
.word .LC40
.size double_direct_form_1_MSP430, .-double_direct_form_1_MSP430
.align 2
.global double_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_2_MSP430, %function
double_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r8, r0
sub sp, sp, #12
ldr r1, [sp, #56]
stm sp, {r2-r3}
ldmia r8!, {r4-r5}
cmp r1, #1
mov r10, r0
ldr r3, [sp, #48]
ldr r6, [sp, #52]
ble .L1154
mov r9, r8
add r7, r3, #8
add fp, r3, r1, lsl #3
.L1149:
ldmia r9!, {r2-r3}
ldmia r7!, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
cmp fp, r7
stm r10, {r4-r5}
bne .L1149
ldr r3, [sp, #56]
add r7, r3, r3, lsl #1
add r7, r7, r7, lsl #3
lsl r7, r7, #1
add r7, r7, #17
.L1148:
mov r2, r4
ldmia sp, {r0-r1}
mov r3, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
stm r10, {r2-r3}
ldr r3, [sp, #48]
mov r4, #0
ldmia r3, {r2-r3}
bl __aeabi_ddiv
ldr r3, [sp, #60]
mov r5, #0
cmp r3, #0
stm r10, {r0-r1}
ble .L1150
add r9, r6, r3, lsl #3
b .L1152
.L1151:
ldmia r8!, {r0-r1}
.L1152:
ldmia r6!, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r9, r6
mov r4, r0
mov r5, r1
bne .L1151
ldr r3, [sp, #60]
ldr r2, [sp, #60]
add r3, r3, r3, lsl #1
rsb r3, r2, r3, lsl #3
add r7, r7, r3, lsl #1
.L1150:
add r0, r7, #38
bl __aeabi_i2d
ldr r3, .L1159
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
ldr r3, .L1159+4
ldr r2, [r3, #1688]
ldr r3, [r3, #1692]
bl __aeabi_dcmple
cmp r0, #0
beq .L1158
mov r0, r4
mov r1, r5
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1154:
mov r7, #71
b .L1148
.L1158:
ldr r3, .L1159+8
ldr r2, .L1159+12
ldr r1, .L1159+16
ldr r0, .L1159+20
bl __assert_fail
.L1160:
.align 2
.L1159:
.word hw
.word .LANCHOR1
.word .LANCHOR0+692
.word 262
.word .LC39
.word .LC40
.size double_direct_form_2_MSP430, .-double_direct_form_2_MSP430
.align 2
.global double_transposed_direct_form_2_MSP430
.syntax unified
.arm
.fpu softvfp
.type double_transposed_direct_form_2_MSP430, %function
double_transposed_direct_form_2_MSP430:
@ args = 16, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r4, r0
sub sp, sp, #28
ldr fp, [sp, #72]
ldr r9, [sp, #76]
ldr r7, [sp, #68]
cmp r9, fp
mov r0, r2
mov r1, r3
str r2, [sp, #16]
str r3, [sp, #20]
ldmia r7!, {r2-r3}
movge r8, r9
movlt r8, fp
bl __aeabi_dmul
ldmia r4, {r2-r3}
bl __aeabi_dadd
cmp r8, #1
str r0, [sp, #8]
str r1, [sp, #12]
ldr r6, [sp, #64]
ble .L1167
mov r5, #0
mov r10, #105
sub r3, r9, #1
str r3, [sp, #4]
sub r3, r8, #1
add r6, r6, #8
sub fp, fp, #1
str r3, [sp]
.L1165:
cmp r5, fp
add r9, r4, #8
ldmia r9, {r8-r9}
stm r4!, {r8-r9}
bge .L1163
ldmia r6!, {r2-r3}
add r1, sp, #8
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
stmdb r4, {r0-r1}
add r10, r10, #41
.L1163:
ldr r3, [sp, #4]
cmp r5, r3
movge r0, r10
bge .L1164
ldmia r7!, {r2-r3}
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmdb r4, {r0-r1}
bl __aeabi_dadd
stmdb r4, {r0-r1}
add r0, r10, #38
.L1164:
ldr r3, [sp]
add r5, r5, #1
cmp r5, r3
add r10, r0, #54
bne .L1165
add r0, r0, #61
bl __aeabi_i2d
.L1162:
ldr r3, .L1172
add r3, r3, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
ldr r3, .L1172+4
ldr r2, [r3, #1688]
ldr r3, [r3, #1692]
bl __aeabi_dcmple
cmp r0, #0
beq .L1171
add r1, sp, #8
ldmia r1, {r0-r1}
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1167:
mov r0, #0
ldr r1, .L1172+8
b .L1162
.L1171:
ldr r3, .L1172+12
ldr r2, .L1172+16
ldr r1, .L1172+20
ldr r0, .L1172+24
bl __assert_fail
.L1173:
.align 2
.L1172:
.word hw
.word .LANCHOR1
.word 1079771136
.word .LANCHOR0+720
.word 291
.word .LC39
.word .LC40
.size double_transposed_direct_form_2_MSP430, .-double_transposed_direct_form_2_MSP430
.align 2
.global generic_timing_double_direct_form_1
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_1, %function
generic_timing_double_direct_form_1:
@ args = 8, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r6, .L1183
sub sp, sp, #52
ldr r9, [r6, #36]
ldr ip, [r6, #40]
ldr r4, [r6, #44]
ldr r7, [r6, #20]
ldr lr, [r6, #16]
str ip, [sp]
add ip, r9, ip
add ip, ip, ip, lsl #1
add ip, r4, ip, lsl #1
str r7, [sp, #24]
str r4, [sp, #16]
add lr, lr, lr, lsl #1
add r4, r7, r7, lsl #1
ldr r7, [r6, #24]
ldr r8, [r6, #48]
ldr r10, [r6, #28]
add lr, r4, lr, lsl #1
ldr r4, [r6, #32]
ldr r5, [r6, #52]
add lr, lr, r7
add ip, ip, r8
add lr, lr, r10
str r8, [sp, #20]
str r10, [sp, #28]
ldr r8, [r6, #56]
add r10, r4, r4, lsl #1
add ip, ip, r5, lsl #1
add lr, lr, r10
ldr r5, [r6, #60]
str r10, [sp, #32]
ldr r10, .L1183+4
ldr r7, [r6, #64]
add ip, ip, r8, lsl #1
ldr r4, [r10, #4]
ldr r8, [r6, #68]
add ip, ip, r5
add r5, r9, r9, lsl #1
add ip, ip, r7
add lr, lr, r5, lsl #2
ldr r5, [r6, #72]
add lr, lr, r4
ldr r7, [sp, #92]
add ip, r8, ip, lsl #1
add ip, ip, lr
add r4, r5, r9, lsl #1
mov lr, r9
str r9, [sp, #36]
add r9, r2, #8
ldr r2, [r6, #76]
cmp r7, #0
str r8, [sp, #4]
str r5, [sp, #8]
str r0, [sp, #40]
add r4, ip, r4
str r2, [sp, #12]
ble .L1179
ldr ip, [sp]
add r5, r2, r2, lsl #1
mov r8, r3
lsl r5, r5, #3
add r3, ip, ip, lsl #2
add r5, r5, r3, lsl #2
ldr r3, [sp, #16]
ldr r0, [sp, #20]
add r5, r5, r3, lsl #1
add r5, r5, r0
ldr r0, [sp, #92]
str r9, [sp, #44]
add r1, r1, r0, lsl #3
mov r7, #0
mov r10, #0
mov fp, #0
mov r9, r1
ldr r3, [r6, #80]
ldr r2, [sp, #4]
add r5, r5, r3
add r3, lr, lr, lsl #2
add r5, r5, r3, lsl #1
ldr r3, [r6, #84]
add r5, r5, r3, lsl #1
ldr r3, [r6, #88]
add r5, r5, r3, lsl #1
ldr r3, [r6, #92]
add r5, r5, r2
add r5, r5, r3
ldr r3, [r6, #96]
add r5, r5, r3
ldr r3, [r6, #104]
add r5, r5, r2
add r5, r5, r3
ldr r3, [sp, #8]
add r5, r5, r3
.L1176:
ldmdb r9!, {r2-r3}
ldmia r8!, {r0-r1}
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, fp
mov r0, r10
bl __aeabi_dadd
ldr r3, [sp, #92]
add r7, r7, #1
cmp r3, r7
mov r10, r0
mov fp, r1
add r4, r4, r5
bne .L1176
ldr r9, [sp, #44]
.L1175:
ldr r2, [sp, #88]
ldr r3, [r6, #100]
cmp r2, #1
ldr r2, [sp, #36]
ldr r1, [sp, #8]
add r3, r2, r3
add r3, r1, r3, lsl #1
add r4, r3, r4
ble .L1177
mov r7, #1
ldr r0, [sp]
ldr ip, [sp, #12]
add r3, r0, r0, lsl #2
add r5, ip, ip, lsl r7
add r3, r0, r3, lsl r7
lsl r5, r5, #3
add r5, r5, r3, lsl r7
ldr r3, [sp, #16]
ldr r0, [sp, #4]
add r5, r5, r3, lsl r7
add r5, r5, r2, lsl #3
ldr r2, [sp, #20]
ldr r3, [r6, #84]
add r5, r5, r2
ldr r2, [r6, #88]
add r5, r5, r3, lsl r7
ldr r3, [r6, #80]
add r5, r5, r2, lsl r7
add r5, r5, r3
ldr r2, [r6, #92]
ldr r3, [r6, #96]
add r5, r5, r0
add r5, r5, r2
add r5, r5, r3
ldr r3, [r6, #104]
add r5, r5, r0
add r5, r5, r3
ldr r2, [sp, #88]
ldr r3, [sp, #40]
add r5, r5, r1
add r8, r3, r2, lsl #3
.L1178:
ldmdb r8!, {r2-r3}
ldmia r9!, {r0-r1}
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, fp
mov r0, r10
bl __aeabi_dsub
ldr r3, [sp, #88]
add r7, r7, #1
cmp r3, r7
mov r10, r0
mov fp, r1
add r4, r4, r5
bne .L1178
.L1177:
ldr r2, [sp, #12]
ldr r3, [sp]
ldr r1, [sp, #28]
add r3, r3, r2
ldr r2, [sp, #4]
mov r0, r10
add r3, r2, r3, lsl #2
ldr r2, [sp, #24]
add r3, r3, r2
add r3, r3, r1
ldr r2, [r6, #108]
ldr r1, [sp, #32]
add r2, r2, r2, lsl #1
add r3, r3, r1
ldr r1, [r6, #112]
add r3, r3, r2, lsl #1
add r3, r3, r1
mov r1, fp
add r4, r3, r4
ldr r3, .L1183+4
str r4, [r3, #4]
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1179:
mov r10, #0
mov fp, #0
b .L1175
.L1184:
.align 2
.L1183:
.word hw
.word .LANCHOR2
.size generic_timing_double_direct_form_1, .-generic_timing_double_direct_form_1
.align 2
.global generic_timing_double_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_direct_form_2, %function
generic_timing_double_direct_form_2:
@ args = 16, pretend = 0, frame = 72
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r8, .L1195
mov r5, r0
ldr r4, [r8, #36]
sub sp, sp, #76
mov r6, r4
mov r1, r3
ldr ip, [r8, #16]
ldr r3, [r8, #32]
str r0, [sp]
mov r0, r2
rsb r2, r4, r4, lsl #3
ldr lr, [r8, #20]
lsl r2, r2, #1
add r3, r3, r3, lsl #1
add r2, r2, ip, lsl #3
str r3, [sp, #32]
ldr ip, [r8, #24]
add r2, r2, r3
add r3, lr, lr, lsl #1
add r2, r2, r3
add r2, r2, ip
ldr ip, .L1195+4
ldr fp, [r8, #28]
str r4, [sp, #28]
str lr, [sp, #36]
ldr lr, [ip, #4]
add ip, r4, r4, lsl #2
ldr r4, [r8, #100]
str fp, [sp, #40]
add r2, r2, fp
ldr fp, [r8, #72]
add r2, r2, lr
add lr, r6, r4
add lr, fp, lr, lsl #1
str fp, [sp, #20]
mov fp, r5
ldr r9, [r8, #40]
ldr r10, [r8, #68]
add r3, r9, r9, lsl #1
lsl r7, r3, #1
add r7, r7, ip, lsl #1
add r7, r7, r10, lsl #1
str r0, [sp, #48]
str r1, [sp, #52]
ldmia fp!, {r4-r5}
lsl r1, ip, #1
add r7, r2, r7
ldr ip, .L1195+4
add r7, r7, lr
ldr lr, [sp, #120]
str r7, [ip, #4]
lsl ip, r9, #1
str ip, [sp, #60]
cmp lr, #1
ldr ip, [r8, #76]
ldr lr, [r8, #84]
lsl r0, r6, #2
str r9, [sp, #12]
str r10, [sp, #4]
str r1, [sp, #68]
str r0, [sp, #56]
mov r1, r6
mov r0, r9
ldr r10, [sp, #112]
str fp, [sp, #64]
lsl r2, r6, #3
str ip, [sp, #16]
str lr, [sp, #44]
ldr r6, [r8, #88]
ldr r9, [r8, #116]
str r6, [sp, #8]
str r9, [sp, #24]
ble .L1186
mov r9, #1
rsb r6, r0, r3, lsl #3
add r2, r2, r1
ldr r3, [r8, #44]
add r6, r6, ip, lsl #5
add r6, r6, r2
add r6, r6, r3, lsl r9
ldr r1, [sp, #8]
add r3, lr, lr, lsl r9
add r6, r6, r3
ldr r3, [r8, #48]
add r6, r6, r1, lsl r9
add r6, r6, r3, lsl r9
ldr r3, [sp, #24]
ldr r2, [sp, #4]
add r6, r6, r3
ldr r3, [r8, #92]
add r6, r6, r2
ldr r2, [r8, #96]
add r6, r6, r3
ldr r3, [r8, #104]
add r6, r6, r2
add r10, r10, #8
add r6, r6, r3
.L1187:
ldmia fp!, {r2-r3}
ldmia r10!, {r0-r1}
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, r5
mov r0, r4
bl __aeabi_dsub
mov r4, r0
mov r5, r1
ldr r3, [sp, #120]
add r9, r9, #1
cmp r3, r9
ldr r3, [sp]
add r7, r7, r6
stm r3, {r4-r5}
bne .L1187
.L1186:
add r1, sp, #48
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dadd
ldr r3, [sp, #60]
ldr lr, [sp, #12]
ldr r4, [sp, #28]
add r2, r3, lr
ldr r3, [sp, #16]
ldr ip, [sp, #56]
add r2, lr, r2, lsl #2
add r3, r3, r3, lsl #1
add ip, ip, r4
add r2, r2, r3, lsl #2
add r2, r2, ip
ldr ip, [sp, #24]
ldr fp, [sp, #44]
add r2, r2, ip
ldr r5, [sp, #20]
ldr ip, [sp, #8]
add r2, r2, fp
add r2, r2, ip
add ip, r5, r4, lsl #1
ldr r4, [sp, #124]
add r7, r2, r7
ldr r2, [sp]
cmp r4, #0
stm r2, {r0-r1}
add r7, r7, ip
ble .L1190
ldr r2, [sp, #68]
lsl r6, r3, #3
add r3, lr, lr, lsl #2
add r6, r6, r3, lsl #2
ldr ip, [sp, #8]
add r6, r6, r2
add r6, r6, ip, lsl #1
ldr r2, [r8, #44]
ldr r3, [r8, #48]
add r6, r6, fp, lsl #1
add r6, r6, r2, lsl #1
ldr r2, [sp, #4]
add r6, r6, r3, lsl #1
ldr r3, [r8, #92]
add r6, r6, r2
ldr r2, [r8, #96]
add r6, r6, r3
ldr r3, [r8, #104]
add r6, r6, r2
add r6, r6, r3
ldr r3, [sp, #20]
mov r9, #0
mov r4, #0
mov r5, #0
ldr r10, [sp, #64]
ldr fp, [sp, #116]
add r6, r6, r3
b .L1189
.L1194:
ldmia r10!, {r0-r1}
.L1189:
ldmia fp!, {r2-r3}
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, r5
mov r0, r4
bl __aeabi_dadd
ldr r3, [sp, #124]
add r9, r9, #1
cmp r3, r9
mov r4, r0
mov r5, r1
add r7, r7, r6
bne .L1194
.L1188:
ldr r2, [sp, #16]
ldr r3, [sp, #12]
ldr r1, [r8, #108]
add r3, r3, r2
ldr r2, [sp, #4]
mov r0, r4
add r3, r2, r3, lsl #2
ldr r2, [sp, #36]
add r3, r3, r2
ldr r2, [sp, #40]
add r3, r3, r2
ldr r2, [sp, #32]
add r3, r3, r2
add r3, r3, r1, lsl #3
mov r1, r5
ldr r2, [r8, #112]
add r3, r3, r2
add r7, r3, r7
ldr r3, .L1195+4
str r7, [r3, #4]
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1190:
mov r4, #0
mov r5, #0
b .L1188
.L1196:
.align 2
.L1195:
.word hw
.word .LANCHOR2
.size generic_timing_double_direct_form_2, .-generic_timing_double_direct_form_2
.align 2
.global generic_timing_double_transposed_direct_form_2
.syntax unified
.arm
.fpu softvfp
.type generic_timing_double_transposed_direct_form_2, %function
generic_timing_double_transposed_direct_form_2:
@ args = 16, pretend = 0, frame = 72
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #76
ldr r1, [sp, #116]
ldr r7, .L1204
mov lr, r1
ldr r5, [sp, #120]
mov r4, r0
mov r1, r3
mov r0, r2
str r2, [sp, #24]
str r3, [sp, #28]
ldmia lr!, {r2-r3}
str lr, [sp]
ldr lr, [sp, #124]
ldr ip, [r7, #32]
cmp lr, r5
add r8, ip, ip, lsl #1
mov ip, lr
movge ip, lr
movlt ip, r5
ldr r10, [sp, #112]
str ip, [sp, #32]
add ip, r10, #8
str ip, [sp, #68]
str r8, [sp, #48]
bl __aeabi_dmul
ldmia r4, {r2-r3}
bl __aeabi_dadd
str r0, [sp, #8]
str r1, [sp, #12]
ldr r1, [r7, #40]
ldr r5, [r7, #36]
ldr ip, [r7, #76]
add r3, r1, r1, lsl #2
add r3, r1, r3, lsl #1
rsb r9, r5, r5, lsl #4
add r2, ip, ip, lsl #1
add r3, r9, r3, lsl #1
str r1, [sp, #36]
add r3, r3, r2, lsl #3
ldr r1, [r7, #16]
rsb r2, r5, r5, lsl #3
lsl r2, r2, #1
ldr fp, [r7, #20]
add r2, r2, r1, lsl #3
ldr r1, [r7, #48]
str fp, [sp, #52]
str r1, [sp, #4]
add r1, fp, fp, lsl #1
ldr fp, [r7, #104]
add r2, r2, r8
mov r10, fp
ldr fp, [r7, #28]
add r2, r2, r1
mov r1, fp
ldr r6, [r7, #88]
ldr lr, [r7, #84]
ldr r0, [r7, #92]
add r3, r3, r6, lsl #1
ldr r8, [r7, #24]
str r6, [sp, #60]
add r3, r3, lr, lsl #1
ldr r6, [r7, #96]
str ip, [sp, #40]
add r3, r3, r0
ldr ip, [r7, #44]
str fp, [sp, #56]
add r2, r2, r8
ldr fp, [sp, #4]
ldr r8, .L1204+4
add r3, r3, r6
add r3, r3, ip
add r3, r3, fp
ldr fp, [r7, #68]
ldr r8, [r8, #4]
add r3, r3, r10
add r2, r2, r1
ldr r1, [r7, #72]
add r3, r3, fp
add r2, r2, r8
str r10, [sp, #64]
ldr r10, [sp, #32]
add r2, r3, r2
ldr r8, .L1204+4
add r5, r1, r5, lsl #1
str fp, [sp, #44]
cmp r10, #1
add fp, r2, r5
str fp, [r8, #4]
add r3, sp, #8
ldmia r3, {r2-r3}
str r2, [sp, #16]
str r3, [sp, #20]
ble .L1198
mov r5, #0
ldr r3, [sp, #40]
ldr r2, [sp, #36]
add r8, r3, r3, lsl #2
rsb r3, r8, r8, lsl #3
add r8, r2, r2, lsl #6
add r8, r8, r3, lsl #1
ldr r3, [r7, #52]
ldr r2, [r7, #56]
add r3, r3, r3, lsl #1
add r3, r8, r3, lsl #2
add r2, r2, r2, lsl #1
ldr r8, [r7, #60]
add r2, r3, r2, lsl #2
ldr r3, [r7, #64]
add r2, r2, r9
add r8, r8, r8, lsl #1
add r8, r2, r8, lsl #1
add r3, r3, r3, lsl #1
add r8, r8, r3, lsl #1
ldr r3, [sp, #44]
add r6, r6, r6, lsl #1
add r8, r8, r3, lsl #1
add r8, r8, r6
add r0, r0, r0, lsl #1
ldr r6, [sp, #60]
add lr, lr, lr, lsl #2
add r8, r8, r0
add r8, r8, lr
add ip, ip, ip, lsl #2
add r6, r8, r6, lsl #2
ldr r2, [r7, #120]
add r1, r1, r1, lsl #1
ldr r3, [r7, #116]
add r6, r6, ip
add r6, r6, r1
add r6, r6, r2, lsl #1
ldr r1, [sp, #4]
add r3, r3, r3, lsl #1
ldr r2, [r7, #80]
add r6, r6, r3
add r2, r2, r2, lsl #1
add r6, r6, r1, lsl #1
add r6, r6, r2
ldr r2, [sp, #120]
sub r3, r10, #1
sub r2, r2, #1
ldr r10, [sp, #64]
str r2, [sp, #32]
ldr r2, [sp, #124]
add r6, r6, r10
sub r2, r2, #1
ldr r10, [sp, #68]
str r2, [sp, #8]
str r3, [sp, #4]
.L1201:
ldr r3, [sp, #32]
add r9, r4, #8
ldmia r9, {r8-r9}
cmp r5, r3
stm r4!, {r8-r9}
bge .L1199
ldmia r10!, {r2-r3}
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_dsub
stmdb r4, {r0-r1}
.L1199:
ldr r3, [sp, #8]
cmp r5, r3
add r5, r5, #1
bge .L1200
add r1, sp, #24
ldmia r1, {r0-r1}
ldr r8, [sp]
ldmia r8!, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmdb r4, {r0-r1}
bl __aeabi_dadd
stmdb r4, {r0-r1}
str r8, [sp]
.L1200:
ldr r3, [sp, #4]
add fp, fp, r6
cmp r5, r3
bne .L1201
.L1198:
ldr r1, [sp, #40]
ldr r3, [sp, #36]
ldr r2, [r7, #108]
add r3, r3, r1
add r3, r3, r2, lsl #1
ldr r2, [sp, #48]
ldr r1, [sp, #44]
add r3, r2, r3, lsl #2
ldr r2, [sp, #52]
add r3, r3, r2
ldr r2, [sp, #56]
add r3, r3, r2
ldr r2, [r7, #112]
add r3, r3, r1
add r3, r3, r2
ldr r2, .L1204+4
add r3, r3, fp
add r1, sp, #16
ldmia r1, {r0-r1}
str r3, [r2, #4]
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1205:
.align 2
.L1204:
.word hw
.word .LANCHOR2
.size generic_timing_double_transposed_direct_form_2, .-generic_timing_double_transposed_direct_form_2
.section .rodata.cst4
.align 2
.LC41:
.word __stack_chk_guard
.text
.align 2
.global double_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type double_direct_form_1_impl2, %function
double_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #44
mov ip, sp
sub ip, ip, r1, lsl #3
mov sp, ip
mov r10, r3
ldr r3, .L1229
str r1, [fp, #-56]
str r2, [fp, #-60]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
lsl r3, r1, #3
str r3, [fp, #-76]
ldr r3, [fp, #4]
cmp r1, #0
str r3, [fp, #-64]
ldr r3, [fp, #12]
str sp, [fp, #-68]
str r3, [fp, #-72]
ble .L1227
mov r9, #0
ldr r3, [fp, #-68]
str r3, [fp, #-52]
add r3, r0, #8
str r3, [fp, #-48]
.L1213:
mov r3, #0
mov r4, #0
ldr r2, [fp, #-52]
cmp r10, #0
stm r2!, {r3-r4}
str r2, [fp, #-52]
ble .L1211
mov r5, r4
mov r6, #0
mov r4, r3
ldr r8, [fp, #-60]
ldr r7, [fp, #-48]
.L1212:
ldmdb r7!, {r2-r3}
ldmia r8!, {r0-r1}
bl __aeabi_dmul
add r6, r6, #1
mov r3, r1
mov r2, r0
mov r1, r5
mov r0, r4
bl __aeabi_dadd
cmp r6, r9
movle r3, #0
movgt r3, #1
cmp r10, r6
orrle r3, r3, #1
cmp r3, #0
mov r4, r0
mov r5, r1
beq .L1212
ldr r3, [fp, #-52]
stmdb r3, {r4-r5}
.L1211:
ldr r3, [fp, #-56]
add r9, r9, #1
cmp r3, r9
ldr r3, [fp, #-48]
add r3, r3, #8
str r3, [fp, #-48]
bne .L1213
ldr r3, [fp, #-56]
ldr r1, [fp, #-72]
cmp r3, #1
ldr r3, [fp, #-68]
ldmia r3, {r2-r3}
stm r1, {r2-r3}
ble .L1206
mov r10, #1
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
add r9, r3, #8
ldr r3, [fp, #-68]
add r2, r3, r2
add r3, r3, #8
str r2, [fp, #-52]
str r3, [fp, #-48]
.L1216:
ldr ip, [fp, #-48]
mov r3, #0
ldmia ip!, {r0-r1}
mov r2, #0
str ip, [fp, #-48]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
ldr r3, [fp, #8]
mov r8, r9
cmp r3, #1
stm r9, {r4-r5}
add r9, r9, #8
ble .L1217
mov r7, #1
ldr r3, [fp, #-64]
add r6, r3, #8
.L1218:
ldr ip, [r6, #4]
ldr r3, [r6]
add r1, ip, #-2147483648
mov r0, r3
ldmdb r8!, {r2-r3}
bl __aeabi_dmul
mov r3, r1
mov r2, r0
mov r1, r5
mov r0, r4
bl __aeabi_dadd
ldr r3, [fp, #8]
add r7, r7, #1
cmp r3, r7
movgt r3, #0
movle r3, #1
cmp r7, r10
orrgt r3, r3, #1
mov r4, r0
mov r5, r1
cmp r3, #0
stmdb r9, {r4-r5}
add r6, r6, #8
beq .L1218
.L1217:
ldr r3, [fp, #-52]
ldr r2, [fp, #-48]
add r10, r10, #1
cmp r3, r2
bne .L1216
.L1206:
ldr r3, .L1229
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1228
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1227:
ldr r3, [fp, #-68]
ldr r1, [fp, #-72]
ldmia r3, {r2-r3}
stm r1, {r2-r3}
b .L1206
.L1228:
bl __stack_chk_fail
.L1230:
.align 2
.L1229:
.word .LC41
.size double_direct_form_1_impl2, .-double_direct_form_1_impl2
.section .rodata.cst4
.align 2
.LC42:
.word __stack_chk_guard
.text
.align 2
.global fxp_direct_form_1_impl2
.syntax unified
.arm
.fpu softvfp
.type fxp_direct_form_1_impl2, %function
fxp_direct_form_1_impl2:
@ args = 12, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #44
mov ip, r1
str r1, [fp, #-52]
mov r8, r3
lsl r1, r1, #2
ldr r3, .L1253
str r1, [fp, #-72]
str r2, [fp, #-56]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldr r3, [fp, #4]
add r1, r1, #7
bic r1, r1, #7
str r3, [fp, #-60]
ldr r3, [fp, #12]
sub sp, sp, r1
cmp ip, #0
str sp, [fp, #-64]
str r3, [fp, #-68]
ble .L1251
mov r6, #0
add r3, r0, #4
str r3, [fp, #-48]
ldr r3, [fp, #-64]
sub r7, r3, #4
.L1237:
mov r3, #0
cmp r8, #0
str r3, [r7, #4]!
ble .L1239
mov r4, #0
mov r5, r4
ldr r3, [fp, #-56]
ldr r9, [fp, #-48]
sub r10, r3, #4
.L1240:
ldr r1, [r10, #4]!
ldr r0, [r9, #-4]!
bl fxp_mult
add r5, r5, #1
add r0, r0, r4
bl fxp_quantize
cmp r5, r6
movle r3, #0
movgt r3, #1
cmp r8, r5
orrle r3, r3, #1
cmp r3, #0
mov r4, r0
str r0, [r7]
beq .L1240
.L1239:
ldr r3, [fp, #-52]
add r6, r6, #1
cmp r3, r6
ldr r3, [fp, #-48]
add r3, r3, #4
str r3, [fp, #-48]
bne .L1237
ldr r2, [fp, #-52]
ldr r3, [fp, #-64]
cmp r2, #1
ldr r3, [r3]
ldr r2, [fp, #-68]
str r3, [r2]
ble .L1231
mov r7, #1
ldr r3, [fp, #-64]
ldr r6, [fp, #-68]
ldr r2, [fp, #-72]
str r3, [fp, #-48]
sub r3, r6, #4
add r9, r3, r2
ldr r8, [fp, #8]
str r9, [fp, #-52]
.L1242:
mov r3, #0
str r3, [r6, #4]!
ldr r3, [fp, #-48]
ldr r0, [r3, #4]!
str r3, [fp, #-48]
bl fxp_quantize
cmp r8, #1
mov r4, r0
str r0, [r6]
ble .L1243
mov r9, r6
mov r5, #1
ldr r10, [fp, #-60]
.L1244:
ldr r1, [r10, #4]!
ldr r0, [r9, #-4]!
rsb r1, r1, #0
bl fxp_mult
add r5, r5, #1
add r0, r0, r4
bl fxp_quantize
cmp r8, r5
movgt r3, #0
movle r3, #1
cmp r5, r7
orrgt r3, r3, #1
cmp r3, #0
mov r4, r0
str r0, [r6]
beq .L1244
.L1243:
ldr r3, [fp, #-52]
add r7, r7, #1
cmp r3, r6
bne .L1242
.L1231:
ldr r3, .L1253
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1252
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1251:
ldr r3, [fp, #-64]
ldr r2, [fp, #-68]
ldr r3, [r3]
str r3, [r2]
b .L1231
.L1252:
bl __stack_chk_fail
.L1254:
.align 2
.L1253:
.word .LC42
.size fxp_direct_form_1_impl2, .-fxp_direct_form_1_impl2
.align 2
.global nchoosek
.syntax unified
.arm
.fpu softvfp
.type nchoosek, %function
nchoosek:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r1, #0
bne .L1257
mov r0, #1
bx lr
.L1257:
b nchoosek.part.0
.size nchoosek, .-nchoosek
.align 2
.syntax unified
.arm
.fpu softvfp
.type nchoosek.part.0, %function
nchoosek.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, r0
mov r5, r1
sub r0, r0, #1
sub r1, r1, #1
bl nchoosek
mov r1, r5
mul r0, r4, r0
bl __aeabi_idiv
pop {r4, r5, r6, pc}
.size nchoosek.part.0, .-nchoosek.part.0
.align 2
.global generate_delta_coefficients
.syntax unified
.arm
.fpu softvfp
.type generate_delta_coefficients, %function
generate_delta_coefficients:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
subs r8, r2, #1
sub sp, sp, #28
str r2, [sp, #20]
str r0, [sp, #16]
add fp, sp, #64
ldmia fp, {r10-fp}
bmi .L1260
str r1, [sp, #12]
str r2, [sp, #8]
.L1266:
mov r6, #0
mov r7, #0
ldr r3, [sp, #8]
ldr r2, [sp, #20]
ldr r5, [sp, #16]
sub r4, r2, r3
sub r9, r3, #1
.L1263:
cmp r4, #0
add r0, r9, r4
ldmia r5!, {r2-r3}
bne .L1272
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r6, r0
mov r7, r1
.L1268:
cmp r8, #0
beq .L1264
mov r4, #0
mov r0, #0
ldr r1, .L1273
.L1265:
mov r2, r10
mov r3, fp
add r4, r4, #1
bl __aeabi_dmul
cmp r8, r4
bne .L1265
mov r3, r1
mov r2, r0
mov r1, r7
mov r0, r6
bl __aeabi_dmul
ldr r3, [sp, #12]
sub r8, r8, #1
stm r3!, {r0-r1}
str r3, [sp, #12]
ldr r3, [sp, #8]
sub r3, r3, #1
str r3, [sp, #8]
b .L1266
.L1272:
mov r1, r4
stm sp, {r2-r3}
bl nchoosek.part.0
bl __aeabi_i2d
ldmia sp, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
sub r4, r4, #1
cmn r4, #1
mov r6, r0
mov r7, r1
bne .L1263
b .L1268
.L1264:
ldr r3, [sp, #12]
stm r3, {r6-r7}
.L1260:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1274:
.align 2
.L1273:
.word 1072693248
.size generate_delta_coefficients, .-generate_delta_coefficients
.align 2
.global get_delta_transfer_function
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function, %function
get_delta_transfer_function:
@ args = 16, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r4, r3
sub sp, sp, #8
ldr r5, [sp, #32]
ldr r8, [sp, #36]
add r7, sp, #40
ldmia r7, {r6-r7}
stm sp, {r6-r7}
bl generate_delta_coefficients
mov r0, r4
mov r2, r8
mov r1, r5
str r6, [sp, #32]
str r7, [sp, #36]
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, r7, r8, lr}
b generate_delta_coefficients
.size get_delta_transfer_function, .-get_delta_transfer_function
.align 2
.global get_delta_transfer_function_with_base
.syntax unified
.arm
.fpu softvfp
.type get_delta_transfer_function_with_base, %function
get_delta_transfer_function_with_base:
@ args = 16, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #44
str r0, [sp, #24]
ldr r0, [sp, #84]
str r3, [sp, #28]
subs r8, r0, #1
sub r3, r2, #1
str r2, [sp, #20]
str r1, [sp, #36]
str r3, [sp, #32]
add fp, sp, #88
ldmia fp, {r10-fp}
bmi .L1286
ldr r3, [sp, #80]
str r3, [sp, #16]
ldr r3, [sp, #84]
str r3, [sp, #12]
.L1285:
mov r6, #0
mov r7, #0
ldr r3, [sp, #12]
ldr r2, [sp, #84]
ldr r5, [sp, #28]
sub r4, r2, r3
sub r9, r3, #1
.L1282:
cmp r4, #0
add r0, r9, r4
ldmia r5!, {r2-r3}
bne .L1299
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r6, r0
mov r7, r1
.L1293:
cmp r8, #0
beq .L1283
mov r4, #0
mov r2, #0
ldr r3, .L1301
.L1284:
mov r0, r2
mov r1, r3
mov r2, r10
mov r3, fp
bl __aeabi_dmul
add r4, r4, #1
cmp r4, r8
mov r2, r0
mov r3, r1
bne .L1284
mov r3, r7
mov r2, r6
bl __aeabi_dmul
ldr r3, [sp, #16]
sub r8, r8, #1
stm r3!, {r0-r1}
str r3, [sp, #16]
ldr r3, [sp, #12]
sub r3, r3, #1
str r3, [sp, #12]
b .L1285
.L1299:
mov r1, r4
stm sp, {r2-r3}
bl nchoosek.part.0
bl __aeabi_i2d
ldmia sp, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
sub r4, r4, #1
cmn r4, #1
mov r6, r0
mov r7, r1
bne .L1282
b .L1293
.L1283:
ldr r3, [sp, #16]
stm r3, {r6-r7}
.L1286:
ldr r3, [sp, #32]
cmp r3, #0
blt .L1277
ldr r3, [sp, #36]
ldr r8, [sp, #32]
str r3, [sp, #16]
ldr r3, [sp, #20]
str r3, [sp, #12]
.L1291:
mov r6, #0
mov r7, #0
ldr r3, [sp, #12]
ldr r2, [sp, #20]
ldr r5, [sp, #24]
sub r4, r2, r3
sub r9, r3, #1
.L1288:
cmp r4, #0
add r0, r9, r4
ldmia r5!, {r2-r3}
bne .L1300
mov r0, r6
mov r1, r7
bl __aeabi_dadd
mov r6, r0
mov r7, r1
.L1292:
cmp r8, #0
beq .L1289
mov r4, #0
mov r0, #0
ldr r1, .L1301
.L1290:
mov r2, r10
mov r3, fp
add r4, r4, #1
bl __aeabi_dmul
cmp r4, r8
bne .L1290
mov r3, r1
mov r2, r0
mov r1, r7
mov r0, r6
bl __aeabi_dmul
ldr r3, [sp, #16]
sub r8, r8, #1
stm r3!, {r0-r1}
str r3, [sp, #16]
ldr r3, [sp, #12]
sub r3, r3, #1
str r3, [sp, #12]
b .L1291
.L1300:
mov r1, r4
stm sp, {r2-r3}
bl nchoosek.part.0
bl __aeabi_i2d
ldmia sp, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
sub r4, r4, #1
cmn r4, #1
mov r6, r0
mov r7, r1
bne .L1288
b .L1292
.L1289:
ldr r3, [sp, #16]
stm r3, {r6-r7}
.L1277:
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1302:
.align 2
.L1301:
.word 1072693248
.size get_delta_transfer_function_with_base, .-get_delta_transfer_function_with_base
.section .rodata.cst4
.align 2
.LC43:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_series
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_series, %function
ft_closedloop_series:
@ args = 32, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r6, r3
add fp, sp, #32
sub sp, sp, #28
mov r7, r2
ldr r2, [fp, #16]
ldr r3, [fp, #8]
add r5, r6, r2
mov r2, sp
sub r5, r5, #1
sub r2, r2, r5, lsl #3
mov sp, r2
ldr r8, [fp, #20]
add r4, r3, r1
sub r4, r4, #1
ldr r10, [fp, #12]
str r4, [sp, #4]
str r8, [sp]
ldr r2, [fp, #28]
ldr ip, .L1307
str r2, [fp, #-48]
ldr ip, [ip]
str ip, [fp, #-40]
mov ip,#0
ldr r2, [fp, #4]
bl poly_mult
add r9, sp, #8
str r5, [sp, #4]
ldr r3, [fp, #16]
mov r1, r6
mov r0, r7
mov r2, r10
str r9, [sp]
bl poly_mult
str r5, [sp, #4]
ldr r3, [fp, #-48]
mov r2, r9
str r3, [sp]
mov r1, r4
mov r3, r5
mov r0, r8
bl poly_sum
ldr r3, .L1307
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1306
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1306:
bl __stack_chk_fail
.L1308:
.align 2
.L1307:
.word .LC43
.size ft_closedloop_series, .-ft_closedloop_series
.section .rodata.cst4
.align 2
.LC44:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_sensitivity
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_sensitivity, %function
ft_closedloop_sensitivity:
@ args = 32, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r6, r1
add fp, sp, #32
sub sp, sp, #28
mov r7, r0
ldr r0, [fp, #8]
mov r1, r3
add r5, r0, r6
mov r0, sp
sub r5, r5, #1
sub r0, r0, r5, lsl #3
mov sp, r0
ldr r3, [fp, #16]
ldr r8, [fp, #20]
add r4, r1, r3
sub r4, r4, #1
ldr r10, [fp, #4]
str r4, [sp, #4]
str r8, [sp]
mov r0, r2
ldr r2, [fp, #28]
ldr ip, .L1313
str r2, [fp, #-48]
ldr ip, [ip]
str ip, [fp, #-40]
mov ip,#0
ldr r2, [fp, #12]
bl poly_mult
add r9, sp, #8
str r5, [sp, #4]
ldr r3, [fp, #8]
mov r1, r6
mov r0, r7
mov r2, r10
str r9, [sp]
bl poly_mult
str r4, [sp, #4]
ldr r3, [fp, #-48]
mov r2, r9
str r3, [sp]
mov r1, r4
mov r3, r5
mov r0, r8
bl poly_sum
ldr r3, .L1313
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1312
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1312:
bl __stack_chk_fail
.L1314:
.align 2
.L1313:
.word .LC44
.size ft_closedloop_sensitivity, .-ft_closedloop_sensitivity
.section .rodata.cst4
.align 2
.LC45:
.word __stack_chk_guard
.text
.align 2
.global ft_closedloop_feedback
.syntax unified
.arm
.fpu softvfp
.type ft_closedloop_feedback, %function
ft_closedloop_feedback:
@ args = 32, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r3
add fp, sp, #32
sub sp, sp, #36
ldr r3, [fp, #16]
mov r7, r2
add r6, r3, r5
mov r3, sp
sub r6, r6, #1
sub r3, r3, r6, lsl #3
mov sp, r3
mov r2, sp
ldr r9, [fp, #8]
add r3, sp, #8
add r4, r1, r9
sub r4, r4, #1
sub r2, r2, r4, lsl #3
mov sp, r2
ldr r2, [fp, #12]
add r10, sp, #8
ldr r8, [fp, #4]
str r3, [fp, #-48]
str r2, [fp, #-52]
str r4, [sp, #4]
str r10, [sp]
ldr ip, [fp, #28]
ldr lr, .L1319
str ip, [fp, #-60]
ldr lr, [lr]
str lr, [fp, #-40]
mov lr,#0
ldr lr, [fp, #20]
mov r3, r9
str lr, [fp, #-56]
mov r2, r8
bl poly_mult
str r6, [sp, #4]
ldr r3, [fp, #-48]
mov r1, r5
str r3, [sp]
mov r0, r7
ldr r3, [fp, #16]
ldr r2, [fp, #-52]
bl poly_mult
str r6, [sp, #4]
ldr ip, [fp, #-60]
mov r0, r10
str ip, [sp]
mov r3, r6
mov r1, r4
ldr r2, [fp, #-48]
bl poly_sum
ldr lr, [fp, #-56]
add r3, r9, r5
sub r3, r3, #1
mov r2, r8
str r3, [sp, #4]
mov r0, r7
mov r3, r9
mov r1, r5
str lr, [sp]
bl poly_mult
ldr r3, .L1319
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1318
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1318:
bl __stack_chk_fail
.L1320:
.align 2
.L1319:
.word .LC45
.size ft_closedloop_feedback, .-ft_closedloop_feedback
.section .rodata.cst4
.align 2
.LC46:
.word __stack_chk_guard
.text
.align 2
.global check_stability_closedloop
.syntax unified
.arm
.fpu softvfp
.type check_stability_closedloop, %function
check_stability_closedloop:
@ args = 8, pretend = 0, frame = 72
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #76
mov r9, r1
lsl r3, r1, #1
sub r3, r3, #1
lsl r1, r1, #3
str r3, [fp, #-104]
mul r3, r1, r3
sub sp, sp, r3
ldr r3, .L1366
str r1, [fp, #-100]
str r0, [fp, #-68]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
cmp r9, #0
sub r3, r9, #1
str r3, [fp, #-48]
ble .L1330
mov r10, sp
mov r5, r0
mov r4, r0
mov r2, #0
mov r3, #0
add r6, r1, r0
.L1323:
mov r0, r2
mov r1, r3
ldmia r4!, {r2-r3}
bl __aeabi_dadd
cmp r4, r6
mov r2, r0
mov r3, r1
bne .L1323
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
cmp r0, #0
beq .L1330
ldmia r5!, {r0-r1}
ldr r4, [fp, #-48]
mov r7, #0
cmp r4, #0
mov r8, #0
beq .L1325
.L1363:
mov r3, #0
ldr ip, .L1366+4
.L1326:
add r3, r3, #1
cmp r3, r4
add ip, ip, #-2147483648
bne .L1326
mov r3, ip
mov r2, #0
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r7
mov r1, r8
bl __aeabi_dadd
sub r4, r4, #1
cmp r4, #0
mov r7, r0
mov r8, r1
ldmia r5!, {r0-r1}
bne .L1363
.L1325:
mov r2, r7
mov r3, r8
bl __aeabi_dadd
ldr r2, [fp, #-48]
cmp r2, #0
ble .L1328
mov r3, r4
ldr ip, .L1366+4
.L1329:
add r3, r3, #1
cmp r3, r2
add ip, ip, #-2147483648
bne .L1329
mov r2, r4
mov r3, ip
bl __aeabi_dmul
.L1328:
mov r2, #0
mov r3, #0
bl __aeabi_dcmpgt
cmp r0, #0
beq .L1330
ldr r5, [r6, #-4]
ldr r4, [r6, #-8]
mov r1, r5
mov r2, #0
mov r3, #0
mov r0, r4
bl __aeabi_dcmplt
ldr r1, [fp, #-68]
cmp r0, #0
addne r5, r5, #-2147483648
mov r2, r4
ldmia r1, {r0-r1}
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
beq .L1330
ldr r3, [fp, #-104]
cmp r3, #0
ble .L1335
ldr r3, [fp, #-100]
mov r8, #0
lsr r3, r3, #3
str r3, [fp, #-96]
rsb r3, r3, #0
str r3, [fp, #-84]
mvn r3, #0
str r3, [fp, #-88]
mvn r3, #1
str r10, [fp, #-76]
str r3, [fp, #-92]
.L1336:
cmp r9, #0
ble .L1345
ldr r1, [fp, #-96]
ldr r0, [fp, #-92]
mov r3, r1
mov r2, r1
mul r3, r0, r3
ldr r0, [fp, #-88]
mul r2, r8, r2
str r3, [fp, #-56]
add r3, r10, r3, lsl #3
mul r1, r0, r1
str r3, [fp, #-60]
and r3, r8, #1
str r3, [fp, #-52]
ldr r3, [fp, #-84]
str r2, [fp, #-48]
sub r3, r3, #-536870911
add r2, r10, r2, lsl #3
mov r5, #0
str r1, [fp, #-64]
str r2, [fp, #-72]
str r3, [fp, #-80]
b .L1344
.L1337:
ldr r3, [fp, #-52]
cmp r3, #0
bne .L1364
ldr r3, [fp, #-60]
mov r2, #0
ldmia r3, {r6-r7}
mov r3, #0
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
beq .L1330
ldr ip, [fp, #-56]
mov r2, r6
add r1, ip, r9
add r1, r10, r1, lsl #3
mov r3, r7
ldmia r1, {r0-r1}
add r6, ip, r5
bl __aeabi_ddiv
ldr r3, [fp, #-64]
add r6, r10, r6, lsl #3
add r3, r3, r5
add r3, r10, r3, lsl #3
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia r6, {r0-r1}
bl __aeabi_dsub
stm r4, {r0-r1}
mov r2, #0
ldmia r10, {r0-r1}
mov r3, #0
bl __aeabi_dcmpge
cmp r0, #0
beq .L1330
ldr r3, [fp, #-72]
mov r2, #0
ldmia r3, {r0-r1}
mov r3, #0
bl __aeabi_dcmpge
cmp r0, #0
beq .L1330
add r5, r5, #1
.L1338:
cmp r9, r5
ble .L1345
.L1344:
ldr r3, [fp, #-48]
mov r2, #0
add r4, r3, r5
mov r3, #0
add r4, r10, r4, lsl #3
cmp r8, #0
stm r4, {r2-r3}
bne .L1337
ldr r3, [fp, #-68]
add r1, r10, r5, lsl #3
add r3, r3, r5, lsl #3
add r5, r5, #1
cmp r9, r5
ldmia r3, {r2-r3}
stm r1, {r2-r3}
bgt .L1344
.L1345:
ldr r3, [fp, #-104]
add r8, r8, #1
cmp r3, r8
ldr r3, [fp, #-92]
ldr r2, [fp, #-100]
add r3, r3, #1
str r3, [fp, #-92]
ldr r3, [fp, #-88]
add r3, r3, #1
str r3, [fp, #-88]
ldr r3, [fp, #-76]
add r3, r3, r2
str r3, [fp, #-76]
ldr r2, [fp, #-96]
ldr r3, [fp, #-84]
add r3, r3, r2
str r3, [fp, #-84]
bne .L1336
.L1335:
ldr r3, .L1366
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1365
mov r0, #1
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1364:
mov r3, #0
ldr r2, [fp, #-80]
ldr ip, [fp, #-76]
add r2, r2, r9
add r2, r2, #1
add r2, r10, r2, lsl #3
.L1340:
add r3, r3, #1
cmp r3, r9
ldmdb r2!, {r0-r1}
stm ip!, {r0-r1}
blt .L1340
mov r5, r9
sub r9, r9, #1
b .L1338
.L1330:
bl __DSVERIFIER_assert.part.0
.L1365:
bl __stack_chk_fail
.L1367:
.align 2
.L1366:
.word .LC46
.word 1072693248
.size check_stability_closedloop, .-check_stability_closedloop
.section .rodata.str1.4
.align 2
.LC47:
.ascii "impl.frac_bits must be less than word width!\000"
.align 2
.LC48:
.ascii "impl.int_bits must be less than word width subtract"
.ascii "ed by precision!\000"
.align 2
.LC49:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/core/initialization.h\000"
.align 2
.LC50:
.ascii "0\000"
.text
.align 2
.global initialization
.syntax unified
.arm
.fpu softvfp
.type initialization, %function
initialization:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r5, .L1384
ldr r3, [r5, #12]
cmp r3, #31
bgt .L1381
.L1369:
ldr r2, [r5, #8]
rsb r1, r3, #32
cmp r2, r1
bge .L1382
mov r6, #1
cmp r3, #31
lsl r0, r6, r3
movlt lr, r0
mvnge lr, #-2147483648
mov r1, #-2147483648
add r4, r2, r3
sub r4, r4, #1
ldr ip, .L1384+4
lsl r4, r6, r4
rsb r7, r4, #0
ldr r2, .L1384+8
str r7, [ip]
sub r4, r4, #1
ldr ip, .L1384+12
str r4, [r2]
ldr r2, .L1384+16
str lr, [ip]
rsb ip, r0, #0
str ip, [r2]
sub r2, r3, #1
rsb r3, r3, #31
ldr lr, .L1384+20
ldr ip, .L1384+24
lsr r3, r1, r3
ldr r1, .L1384+28
lsl r2, r6, r2
sub r8, r0, #1
str r8, [lr]
str r2, [ip]
str r3, [r1]
bl __aeabi_i2d
mov r8, r0
mov r9, r1
mov r0, r7
bl __aeabi_i2d
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r10, r0
mov fp, r1
ldr r3, .L1384+32
mov r0, r4
stm r3, {r10-fp}
bl __aeabi_i2d
mov r3, r9
mov r2, r8
bl __aeabi_ddiv
ldr r4, [r5, #48]
ldr r3, .L1384+36
cmp r4, r6
stm r3, {r0-r1}
bls .L1383
add r7, r5, #24
ldmia r7, {r6-r7}
mov r2, #0
mov r3, #0
mov r0, r6
mov r1, r7
bl __aeabi_dcmpeq
cmp r0, #0
bne .L1374
mov r0, r4
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
str r0, [r5, #24]
str r1, [r5, #28]
.L1374:
add r7, r5, #16
ldmia r7, {r6-r7}
mov r2, #0
mov r3, #0
mov r0, r6
mov r1, r7
bl __aeabi_dcmpeq
cmp r0, #0
popne {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
mov r0, r4
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
str r0, [r5, #16]
str r1, [r5, #20]
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1381:
ldr r0, .L1384+40
bl puts
ldr r3, [r5, #12]
b .L1369
.L1383:
str r6, [r5, #48]
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1382:
ldr r0, .L1384+44
bl puts
mov r2, #33
ldr r3, .L1384+48
ldr r1, .L1384+52
ldr r0, .L1384+56
bl __assert_fail
.L1385:
.align 2
.L1384:
.word .LANCHOR1
.word _fxp_min
.word _fxp_max
.word _fxp_one
.word _fxp_minus_one
.word _fxp_fmask
.word _fxp_half
.word _fxp_imask
.word _dbl_min
.word _dbl_max
.word .LC47
.word .LC48
.word .LANCHOR0+760
.word .LC49
.word .LC50
.size initialization, .-initialization
.section .rodata.cst4
.align 2
.LC51:
.word __stack_chk_guard
.text
.align 2
.global double_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type double_state_space_representation, %function
double_state_space_representation:
@ args = 0, pretend = 0, frame = 272
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L1406
sub sp, sp, #284
add r9, sp, #16
add r6, sp, #144
ldr r3, [r3]
str r3, [sp, #276]
mov r3,#0
mov lr, r6
mov r4, r9
mov r0, #0
mov r1, #0
add ip, sp, #48
add r5, sp, #176
.L1387:
mov r2, lr
sub r3, ip, #32
.L1388:
stm r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1388
add ip, r3, #32
cmp ip, r5
add lr, lr, #32
bne .L1387
ldr r7, .L1406+4
ldr r5, .L1406+8
ldr fp, .L1406+12
str r9, [sp, #4]
ldr r0, [r5]
mov r2, #1
ldr r1, [fp]
sub r3, r7, #256
str r7, [sp]
bl double_matrix_multiplication.part.0
add r3, sp, #144
str r3, [sp, #4]
ldr r2, .L1406+16
add r3, r7, #256
str r3, [sp]
ldr r1, [r2]
sub r3, r7, #128
mov r2, #1
ldr r0, [r5]
bl double_matrix_multiplication.part.0
ldr r10, [r5]
cmp r10, #0
moveq r3, r7
subeq r3, r3, #512
streq r3, [sp, #12]
beq .L1390
ldr r3, .L1406+4
mov r5, r9
sub r3, r3, #512
mov r8, r3
str r3, [sp, #12]
add r7, sp, #144
add r10, r9, r10, lsl #5
.L1391:
ldmia r5, {r0-r1}
ldmia r7, {r2-r3}
bl __aeabi_dadd
add r5, r5, #32
cmp r5, r10
str r0, [r8, #640]
str r1, [r8, #644]
add r7, r7, #32
add r8, r8, #32
bne .L1391
.L1390:
ldr r1, [fp]
ldr r3, .L1406+4
mov r0, r1
mov r2, #1
str r3, [sp]
str r9, [sp, #4]
sub r3, r3, #512
bl double_matrix_multiplication.part.0
add r3, sp, #144
str r3, [sp, #4]
ldr r3, .L1406+20
mov r2, #1
str r3, [sp]
ldr r3, .L1406+16
ldr r0, [fp]
ldr r1, [r3]
ldr r3, .L1406+24
bl double_matrix_multiplication.part.0
ldr r3, [fp]
cmp r3, #0
beq .L1392
ldr r5, .L1406+28
add r9, r9, r3, lsl #5
.L1393:
ldmia r4, {r0-r1}
ldmia r6, {r2-r3}
bl __aeabi_dadd
add r4, r4, #32
cmp r4, r9
str r0, [r5, #512]
str r1, [r5, #516]
add r6, r6, #32
add r5, r5, #32
bne .L1393
.L1392:
ldr r3, [sp, #12]
add r1, r3, #640
ldmia r1, {r0-r1}
ldr r3, .L1406
ldr r2, [r3]
ldr r3, [sp, #276]
eors r2, r3, r2
mov r3, #0
bne .L1405
add sp, sp, #284
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1405:
bl __stack_chk_fail
.L1407:
.align 2
.L1406:
.word .LC51
.word _controller+512
.word nOutputs
.word nStates
.word nInputs
.word _controller+768
.word _controller+128
.word _controller
.size double_state_space_representation, .-double_state_space_representation
.section .rodata.cst4
.align 2
.LC52:
.word __stack_chk_guard
.text
.align 2
.global fxp_state_space_representation
.syntax unified
.arm
.fpu softvfp
.type fxp_state_space_representation, %function
fxp_state_space_representation:
@ args = 0, pretend = 0, frame = 608
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L1485
sub sp, sp, #620
add r1, sp, #100
ldr r3, [r3]
str r3, [sp, #612]
mov r3,#0
mov r0, r1
mov r3, #0
add r2, sp, #36
.L1409:
str r3, [r2]
str r3, [r2, #4]
str r3, [r2, #8]
str r3, [r2, #12]
add r2, r2, #16
cmp r2, r0
str r3, [r1]
str r3, [r1, #4]
str r3, [r1, #8]
str r3, [r1, #12]
add r1, r1, #16
bne .L1409
add r7, sp, #164
mov r3, r7
mov r2, #0
.L1410:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #228
add r3, r3, #16
cmp r3, r1
bne .L1410
mov r3, r1
mov r2, #0
.L1411:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #292
add r3, r3, #16
cmp r3, r1
bne .L1411
mov r3, r1
mov r2, #0
.L1412:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #356
add r3, r3, #16
cmp r3, r1
bne .L1412
mov r3, r1
mov r2, #0
.L1413:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #420
add r3, r3, #16
cmp r3, r1
bne .L1413
mov r3, r1
mov r2, #0
.L1414:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #484
add r3, r3, #16
cmp r3, r1
bne .L1414
mov r3, r1
mov r2, #0
.L1415:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r1, sp, #548
add r3, r3, #16
cmp r3, r1
bne .L1415
mov r2, #0
mov r3, r1
add r1, sp, #612
.L1416:
str r2, [r3]
str r2, [r3, #4]
str r2, [r3, #8]
str r2, [r3, #12]
add r3, r3, #16
cmp r3, r1
bne .L1416
ldr r3, .L1485+4
ldr r5, [r3]
ldr r3, .L1485+8
cmp r5, #0
ldr r6, [r3]
ble .L1417
ldr r3, .L1485+12
add r10, r5, r5, lsl #2
str r3, [sp, #16]
rsb r8, r5, r5, lsl #29
add r4, r3, r5, lsl #3
add r10, r3, r10, lsl #3
lsl r3, r5, #2
lsl r8, r8, #3
str r3, [sp, #20]
.L1419:
mov fp, r7
add r9, r4, r8
.L1418:
ldmia r9!, {r0-r1}
bl fxp_double_to_fxp
cmp r9, r4
str r0, [fp], #4
bne .L1418
add r4, r9, #32
cmp r4, r10
add r7, r7, #16
bne .L1419
lsl r3, r6, #2
ldr r7, .L1485+16
str r3, [sp, #24]
add r3, sp, #228
rsb r8, r6, r6, lsl #30
add r4, r3, r6, lsl #2
lsl r3, r6, #30
add r10, r7, r5, lsl #5
lsl r8, r8, #2
str r3, [sp, #28]
.L1420:
cmp r6, #0
movgt fp, r7
addgt r9, r4, r8
ble .L1424
.L1421:
ldmia fp!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r9], #4
cmp r9, r4
bne .L1421
.L1424:
add r7, r7, #32
cmp r7, r10
add r4, r4, #16
bne .L1420
ldr r3, .L1485+20
ldr r8, [r3]
str r3, [sp, #12]
cmp r8, #0
ble .L1434
.L1451:
mov r7, #0
ldr r1, [sp, #20]
rsb r3, r5, r5, lsl #30
add r2, sp, #292
ldr r10, .L1485+24
add r4, r2, r1
lsl fp, r3, #2
str r6, [sp, #20]
.L1426:
cmp r5, #0
movgt r6, r10
addgt r9, r4, fp
ble .L1429
.L1425:
ldmia r6!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r9], #4
cmp r9, r4
bne .L1425
.L1429:
add r7, r7, #1
cmp r7, r8
add r10, r10, #32
add r4, r4, #16
bne .L1426
mov r7, #0
ldr r6, [sp, #20]
ldr r3, [sp, #28]
ldr r2, [sp, #24]
sub fp, r3, r6
ldr r10, .L1485+28
add r3, sp, #356
lsl fp, fp, #2
add r4, r3, r2
str r5, [sp, #20]
.L1427:
cmp r6, #0
movgt r5, r10
addgt r9, fp, r4
ble .L1433
.L1430:
ldmia r5!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r9], #4
cmp r9, r4
bne .L1430
.L1433:
add r7, r7, #1
cmp r7, r8
add r10, r10, #32
add r4, r4, #16
bne .L1427
ldr r5, [sp, #20]
cmp r5, #0
bgt .L1434
cmp r6, #0
bgt .L1436
.L1440:
mov r4, #1
ldr r6, .L1485+12
.L1444:
add r1, r6, #640
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
add r3, sp, #548
add r3, r3, r4, lsl #4
cmp r8, r4
add r6, r6, #32
str r0, [r3, #-16]
add r4, r4, #1
bne .L1444
.L1445:
add r3, sp, #36
str r3, [sp, #4]
add r3, sp, #420
mov r1, r5
mov r0, r8
mov r2, #1
str r3, [sp]
add r3, sp, #292
bl fxp_matrix_multiplication.part.0
add r3, sp, #100
ldr r4, [sp, #12]
str r3, [sp, #4]
ldr r5, .L1485+8
add r3, sp, #484
str r3, [sp]
ldr r0, [r4]
mov r2, #1
ldr r1, [r5]
add r3, sp, #356
bl fxp_matrix_multiplication.part.0
add r3, sp, #548
str r3, [sp]
ldr r0, [r4]
ldr r4, .L1485+4
mov r1, #1
add r3, sp, #100
add r2, sp, #36
bl fxp_add_matrix
ldr r1, [r4]
add r3, sp, #36
str r3, [sp, #4]
add r3, sp, #420
mov r0, r1
mov r2, #1
str r3, [sp]
add r3, sp, #164
bl fxp_matrix_multiplication.part.0
add r3, sp, #100
str r3, [sp, #4]
add r3, sp, #484
str r3, [sp]
mov r2, #1
ldr r1, [r5]
ldr r0, [r4]
add r3, sp, #228
bl fxp_matrix_multiplication.part.0
add r3, sp, #420
str r3, [sp]
mov r1, #1
ldr r0, [r4]
add r3, sp, #100
add r2, sp, #36
bl fxp_add_matrix
ldr r7, [r4]
cmp r7, #0
bgt .L1482
.L1442:
ldr r3, [sp, #12]
ldr r7, [r3]
cmp r7, #0
bgt .L1446
.L1449:
ldr r3, [sp, #16]
add r1, r3, #640
ldmia r1, {r0-r1}
ldr r3, .L1485
ldr r2, [r3]
ldr r3, [sp, #612]
eors r2, r3, r2
mov r3, #0
bne .L1483
add sp, sp, #620
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1417:
ldr r3, .L1485+20
ldr r8, [r3]
str r3, [sp, #12]
ldr r3, .L1485+12
cmp r8, #0
str r3, [sp, #16]
bgt .L1484
cmp r6, #0
ble .L1445
.L1436:
mov r4, #1
ldr r7, .L1485+12
.L1443:
add r1, r7, #768
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
add r3, sp, #484
add r3, r3, r4, lsl #4
cmp r6, r4
add r7, r7, #32
str r0, [r3, #-16]
add r4, r4, #1
bne .L1443
.L1437:
cmp r8, #0
ble .L1445
b .L1440
.L1446:
mov r6, #1
ldr r2, .L1485+32
ldr r3, .L1485+36
ldr r2, [r2, #12]
ldr r8, .L1485+12
add r3, r3, r2, lsl #3
add r5, r3, #296
ldmia r5, {r4-r5}
.L1448:
add r3, sp, #548
add r3, r3, r6, lsl #4
ldr r0, [r3, #-16]
bl __aeabi_i2d
mov r2, r4
mov r3, r5
bl __aeabi_dmul
cmp r7, r6
str r0, [r8, #640]
str r1, [r8, #644]
add r6, r6, #1
add r8, r8, #32
beq .L1449
b .L1448
.L1482:
mov r6, #1
ldr r2, .L1485+32
ldr r3, .L1485+36
ldr r2, [r2, #12]
ldr r8, .L1485+12
add r3, r3, r2, lsl #3
add r5, r3, #296
ldmia r5, {r4-r5}
.L1447:
add r3, sp, #420
add r3, r3, r6, lsl #4
ldr r0, [r3, #-16]
bl __aeabi_i2d
mov r2, r4
mov r3, r5
bl __aeabi_dmul
cmp r7, r6
str r0, [r8, #512]
str r1, [r8, #516]
add r6, r6, #1
add r8, r8, #32
beq .L1442
b .L1447
.L1434:
mov r4, #1
ldr r7, .L1485+12
.L1438:
add r1, r7, #512
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
add r3, sp, #420
add r3, r3, r4, lsl #4
cmp r4, r5
add r7, r7, #32
str r0, [r3, #-16]
add r4, r4, #1
bne .L1438
cmp r6, #0
ble .L1437
b .L1436
.L1484:
lsl r3, r5, #2
str r3, [sp, #20]
lsl r3, r6, #2
str r3, [sp, #24]
lsl r3, r6, #30
str r3, [sp, #28]
b .L1451
.L1483:
bl __stack_chk_fail
.L1486:
.align 2
.L1485:
.word .LC52
.word nStates
.word nInputs
.word _controller
.word _controller+128
.word nOutputs
.word _controller+256
.word _controller+384
.word .LANCHOR1
.word .LANCHOR0
.size fxp_state_space_representation, .-fxp_state_space_representation
.section .rodata.str1.4
.align 2
.LC53:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.align 2
.LC54:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 6\000"
.text
.align 2
.global sinTyl
.syntax unified
.arm
.fpu softvfp
.type sinTyl, %function
sinTyl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
subs r10, r2, #0
blt .L1510
beq .L1490
mov r2, #0
mov r3, #0
mov r6, r0
mov r7, r1
bl __aeabi_dadd
cmp r10, #1
mov r4, r0
mov r5, r1
beq .L1487
mov r2, r6
mov r3, r7
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1512
mov r6, r0
mov r7, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #2
mov r4, r0
mov r5, r1
beq .L1487
mov r2, r6
mov r3, r7
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1512+4
mov r6, r0
mov r7, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, #3
mov r4, r0
mov r5, r1
beq .L1487
mov r2, r6
mov r3, r7
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1512+8
mov r6, r0
mov r7, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #4
mov r4, r0
mov r5, r1
beq .L1487
mov r2, r6
mov r3, r7
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1512+12
mov r6, r0
mov r7, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, #5
mov r4, r0
mov r5, r1
beq .L1487
mov r2, r6
mov r3, r7
mov r0, r8
mov r1, r9
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1512+16
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #6
mov r4, r0
mov r5, r1
bne .L1511
.L1487:
mov r0, r4
mov r1, r5
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L1510:
ldr r0, .L1512+20
bl puts
mov r4, #0
mov r5, #0
b .L1487
.L1490:
mov r4, #0
mov r5, #0
b .L1487
.L1511:
ldr r0, .L1512+24
bl puts
b .L1487
.L1513:
.align 2
.L1512:
.word 1075314688
.word 1079902208
.word 1085517824
.word 1091970560
.word 1099106472
.word .LC53
.word .LC54
.size sinTyl, .-sinTyl
.section .rodata.str1.4
.align 2
.LC55:
.ascii "Warning: Function cosTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision must be a positive integer. Assum"
.ascii "ing 0 precision\000"
.text
.align 2
.global cosTyl
.syntax unified
.arm
.fpu softvfp
.type cosTyl, %function
cosTyl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
subs r10, r2, #0
blt .L1535
beq .L1517
cmp r10, #1
beq .L1518
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1536
mov r6, r0
mov r7, r1
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L1536+4
bl __aeabi_dsub
cmp r10, #2
mov r4, r0
mov r5, r1
beq .L1514
mov r2, r6
mov r3, r7
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1536+8
mov r8, r0
mov r9, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, #3
mov r4, r0
mov r5, r1
beq .L1514
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1536+12
mov r8, r0
mov r9, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #4
mov r4, r0
mov r5, r1
beq .L1514
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1536+16
mov r8, r0
mov r9, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, #5
mov r4, r0
mov r5, r1
beq .L1514
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1536+20
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #6
mov r4, r0
mov r5, r1
beq .L1514
ldr r0, .L1536+24
bl puts
b .L1514
.L1518:
mov r4, #0
ldr r5, .L1536+4
.L1514:
mov r0, r4
mov r1, r5
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L1535:
ldr r0, .L1536+28
bl puts
mov r4, #0
mov r5, #0
b .L1514
.L1517:
mov r4, #0
mov r5, #0
b .L1514
.L1537:
.align 2
.L1536:
.word 1071644672
.word 1072693248
.word 1077411840
.word 1082556416
.word 1088663552
.word 1095479168
.word .LC54
.word .LC55
.size cosTyl, .-cosTyl
.section .rodata.str1.4
.align 2
.LC56:
.ascii "Warning: Function sinTyl from bmc/core/filter_funct"
.ascii "ions.h: Precision representation exceeded. Assuming"
.ascii " maximum precision of 4\000"
.text
.align 2
.global atanTyl
.syntax unified
.arm
.fpu softvfp
.type atanTyl, %function
atanTyl:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
subs r10, r2, #0
blt .L1550
beq .L1541
cmp r10, #1
mov r4, r0
mov r5, r1
beq .L1538
mov r2, r0
mov r3, r1
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1551
mov r6, r0
mov r7, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #2
mov r4, r0
mov r5, r1
beq .L1538
mov r2, r6
mov r3, r7
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1551+4
mov r8, r0
mov r9, r1
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
cmp r10, #3
mov r4, r0
mov r5, r1
beq .L1538
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, #0
ldr r3, .L1551+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
cmp r10, #6
mov r4, r0
mov r5, r1
ble .L1538
ldr r0, .L1551+12
bl puts
.L1538:
mov r0, r4
mov r1, r5
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L1550:
ldr r0, .L1551+16
bl puts
mov r4, #0
mov r5, #0
b .L1538
.L1541:
mov r4, #0
mov r5, #0
b .L1538
.L1552:
.align 2
.L1551:
.word 1074266112
.word 1075052544
.word 1075576832
.word .LC56
.word .LC53
.size atanTyl, .-atanTyl
.align 2
.global sqrt1
.syntax unified
.arm
.fpu softvfp
.type sqrt1, %function
sqrt1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r4, .L1555
mov r1, #1056964608
sub r4, r4, r0, asr #1
mov r5, r0
bl __aeabi_fmul
mov r1, r4
bl __aeabi_fmul
mov r1, r4
bl __aeabi_fmul
mov r1, r0
mov r0, #1069547520
bl __aeabi_fsub
mov r3, r0
mov r1, r5
mov r0, r4
mov r4, r3
bl __aeabi_fmul
mov r1, r0
mov r0, r4
bl __aeabi_fmul
pop {r4, r5, r6, pc}
.L1556:
.align 2
.L1555:
.word 1597463007
.size sqrt1, .-sqrt1
.align 2
.global sqrt2
.syntax unified
.arm
.fpu softvfp
.type sqrt2, %function
sqrt2:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
asr r0, r0, #1
add r0, r0, #532676608
bx lr
.size sqrt2, .-sqrt2
.align 2
.global fabsolut
.syntax unified
.arm
.fpu softvfp
.type fabsolut, %function
fabsolut:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r1, #0
mov r4, r0
bl __aeabi_fcmplt
cmp r0, #0
addne r4, r4, #-2147483648
mov r0, r4
pop {r4, pc}
.size fabsolut, .-fabsolut
.section .rodata.str1.4
.align 2
.LC57:
.ascii "#matrix STATES -------------------------------\000"
.align 2
.LC58:
.ascii "#matrix OUTPUTS -------------------------------\000"
.align 2
.LC59:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_limit_cycle.h\000"
.section .rodata.cst4
.align 2
.LC60:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_state_space, %function
verify_limit_cycle_state_space:
@ args = 0, pretend = 0, frame = 520
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L1576
sub sp, sp, #532
add r6, sp, #392
ldr r3, [r3]
str r3, [sp, #524]
mov r3,#0
mov r5, r6
mov r8, r6
mov r2, #0
mov r3, #0
add r10, sp, #8
add r9, sp, #136
add r4, sp, #264
add r7, sp, #296
add fp, sp, #520
.L1564:
mov lr, r9
mov ip, r10
mov r0, r8
sub r1, r7, #32
.L1565:
stm r1!, {r2-r3}
cmp r1, r7
stm r0!, {r2-r3}
stm ip!, {r2-r3}
stm lr!, {r2-r3}
bne .L1565
add r8, r8, #32
cmp r8, fp
add r10, r10, #32
add r9, r9, #32
add r7, r1, #32
bne .L1564
ldr r10, .L1576+4
ldr r7, .L1576+8
add r3, sp, #264
ldr r8, .L1576+12
str r3, [sp, #4]
ldr r1, [r8]
ldr r0, [r7]
mov r2, #1
sub r3, r10, #256
str r10, [sp]
bl double_matrix_multiplication.part.0
add r3, r10, #256
stm sp, {r3, r6}
ldr r2, .L1576+16
ldr r0, [r7]
ldr r1, [r2]
sub r3, r10, #128
mov r2, #1
bl double_matrix_multiplication.part.0
ldr r9, [r7]
cmp r9, #0
beq .L1567
add r3, sp, #264
sub r10, r10, #512
add r9, r3, r9, lsl #5
.L1568:
ldmia r4, {r0-r1}
ldmia r5, {r2-r3}
bl __aeabi_dadd
add r4, r4, #32
cmp r4, r9
str r0, [r10, #640]
str r1, [r10, #644]
add r5, r5, #32
add r10, r10, #32
bne .L1568
.L1567:
ldr r0, .L1576+20
bl printf
mov r2, #0
ldr r1, [r8]
add r0, sp, #8
bl print_matrix
ldr r0, .L1576+24
bl printf
mov r2, #0
ldr r1, [r7]
add r0, sp, #136
bl print_matrix
mov r2, #93
ldr r3, .L1576+28
ldr r1, .L1576+32
ldr r0, .L1576+36
bl __assert_fail
.L1577:
.align 2
.L1576:
.word .LC60
.word _controller+512
.word nOutputs
.word nStates
.word nInputs
.word .LC57
.word .LC58
.word .LANCHOR0+776
.word .LC59
.word .LC50
.size verify_limit_cycle_state_space, .-verify_limit_cycle_state_space
.section .rodata.str1.4
.align 2
.LC61:
.ascii "X_SIZE must be at least 2 * ds.a_size\000"
.section .rodata.cst4
.align 2
.LC62:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle, %function
verify_limit_cycle:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #52
mov r3, #3
ldr r4, .L1604
ldr r2, .L1604+4
ldr r0, .L1604+8
ldr r2, [r2]
str r2, [fp, #-40]
mov r2,#0
ldr r5, [r4, #872]
str r3, [r4]
bl printf
ldr r3, .L1604+12
lsl r5, r5, #1
ldr r3, [r3, #8]
cmp r3, r5
blt .L1601
ldr r2, [r4, #872]
ldr r3, [r4, #1680]
lsl r1, r2, #2
add r1, r1, #7
lsl r3, r3, #2
bic r1, r1, #7
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r1
add r9, sp, #8
sub sp, sp, r3
mov r1, r9
ldr r7, .L1604+12
add r0, r4, #72
add r8, sp, #8
bl fxp_double_to_fxp_array
mov r1, r8
ldr r2, [r4, #1680]
add r0, r4, #880
bl fxp_double_to_fxp_array
add r1, r4, #24
ldmia r1, {r0-r1}
ldr r3, [r7, #8]
lsl r3, r3, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r2, sp, #8
sub sp, sp, r3
str r2, [fp, #-48]
bl fxp_double_to_fxp
mov r3, r0
add r1, r4, #16
ldmia r1, {r0-r1}
mov r6, r3
str r3, [fp, #-56]
bl fxp_double_to_fxp
ldr r3, [r4, #1680]
add r2, sp, #8
lsl r3, r3, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
mov r10, r0
str r2, [fp, #-52]
str r0, [fp, #-60]
bl nondet_int
cmp r6, r0
movgt r6, #0
movle r6, #1
cmp r10, r0
movlt r6, #0
mov r5, r0
mov r0, r6
bl __ESBMC_assume
ldr r1, [r7, #8]
add lr, sp, #8
cmp r1, #0
ble .L1584
mov r3, #0
mov ip, r3
ldr r2, [fp, #-52]
sub r0, r2, #4
ldr r2, [fp, #-48]
sub r2, r2, #4
.L1583:
add r3, r3, #1
cmp r3, r1
str r5, [r0, #4]!
str ip, [r2, #4]!
bne .L1583
.L1584:
ldr r2, [r4, #1680]
ldr r6, [r4, #872]
cmp r2, r6
movge r3, r2
movlt r3, r6
cmp r2, #0
mov ip, r3
lsl r0, r3, #2
subgt lr, lr, #4
movgt r3, #0
ble .L1602
.L1585:
add r3, r3, #1
cmp r3, r2
str r5, [lr, #4]!
bne .L1585
add r0, r0, #7
bic r0, r0, #7
sub sp, sp, r0
add r10, sp, #8
sub sp, sp, r0
add r2, sp, #8
.L1591:
str r8, [fp, #-64]
mov r5, #0
mov r8, ip
sub r7, r10, #4
sub r6, r2, #4
str r9, [fp, #-68]
str r10, [fp, #-72]
mov r9, r7
mov r10, r6
ldr r7, [fp, #-60]
ldr r6, [fp, #-56]
.L1588:
bl nondet_int
mov r2, r0
cmp r0, r7
str r0, [r9, #4]!
movgt r0, #0
movle r0, #1
cmp r2, r6
movlt r0, #0
bl __ESBMC_assume
add r5, r5, #1
ldr r1, [r9]
cmp r8, r5
str r1, [r10, #4]!
bgt .L1588
ldr r3, .L1604+12
ldr r8, [fp, #-64]
ldr r9, [fp, #-68]
ldr r10, [fp, #-72]
ldr r1, [r3, #8]
.L1587:
cmp r1, #0
ble .L1589
mov r5, #0
ldr r3, [fp, #-52]
sub r7, r3, #4
ldr r3, [fp, #-48]
sub r6, r3, #4
.L1590:
ldr r2, [r4, #1680]
ldr r3, [r4, #872]
ldr r1, [r7, #4]!
mov r0, r10
str r2, [sp, #4]
str r3, [sp]
mov r2, r9
mov r3, r8
bl fxp_transposed_direct_form_2
ldr r3, .L1604+12
add r5, r5, #1
ldr r1, [r3, #8]
str r0, [r6, #4]!
cmp r1, r5
bgt .L1590
.L1589:
ldr r0, [fp, #-48]
bl fxp_check_persistent_limit_cycle
ldr r3, .L1604+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1603
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1602:
add r3, r0, #7
bic r3, r3, #7
sub sp, sp, r3
add r10, sp, #8
cmp ip, #0
sub sp, sp, r3
add r2, sp, #8
ble .L1587
b .L1591
.L1603:
bl __stack_chk_fail
.L1601:
bl __DSVERIFIER_assert.part.0
.L1605:
.align 2
.L1604:
.word .LANCHOR1
.word .LC62
.word .LC61
.word .LANCHOR2
.size verify_limit_cycle, .-verify_limit_cycle
.section .rodata.cst4
.align 2
.LC63:
.word __stack_chk_guard
.text
.align 2
.global verify_error
.syntax unified
.arm
.fpu softvfp
.type verify_error, %function
verify_error:
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #76
mov ip, #2
ldr r4, .L1634
ldr r3, .L1634+4
ldr r2, [r4, #872]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldr r3, [r4, #1680]
lsl r1, r2, ip
lsl r3, r3, ip
add r1, r1, #7
bic r1, r1, #7
add r3, r3, #7
sub sp, sp, r1
bic r3, r3, #7
add r1, sp, #16
sub sp, sp, r3
add r3, sp, #16
mov r5, r3
add r0, r4, #72
str ip, [r4]
str r3, [fp, #-72]
str r1, [fp, #-76]
bl fxp_double_to_fxp_array
ldr r2, [r4, #1680]
mov r1, r5
add r0, r4, #880
bl fxp_double_to_fxp_array
add r1, r4, #24
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
mov r3, r0
add r1, r4, #16
ldmia r1, {r0-r1}
ldr r8, .L1634+8
str r3, [fp, #-88]
bl fxp_double_to_fxp
ldr r9, [r8, #8]
ldr r5, [r4, #872]
lsl r3, r9, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r1, sp, #16
sub sp, sp, r3
add r3, sp, #16
str r3, [fp, #-60]
mov r3, sp
sub r3, r3, r9, lsl #3
mov sp, r3
add r3, sp, #16
str r3, [fp, #-48]
mov r3, sp
ldr lr, [r4, #1680]
sub r3, r3, r9, lsl #3
cmp lr, r5
movge r7, lr
movlt r7, r5
mov sp, r3
lsl r2, r5, #2
str r1, [fp, #-56]
add r2, r2, #7
lsl r1, lr, #2
bic r2, r2, #7
add r1, r1, #7
lsl r3, r7, #2
add ip, sp, #16
bic r1, r1, #7
sub sp, sp, r2
add r3, r3, #7
bic r3, r3, #7
add r2, sp, #16
sub sp, sp, r1
add r10, sp, #16
sub sp, sp, r3
add r3, sp, #16
str r3, [fp, #-64]
mov r3, sp
sub r3, r3, r5, lsl #3
mov sp, r3
sub r3, r3, lr, lsl #3
str ip, [fp, #-80]
add ip, sp, #16
mov sp, r3
add r3, sp, #16
str r3, [fp, #-52]
mov r3, sp
sub r3, r3, r7, lsl #3
mov sp, r3
cmp r5, #0
add r3, sp, #16
str r0, [fp, #-84]
str r3, [fp, #-68]
ble .L1611
mov r3, #0
mov r0, #0
mov r6, r3
mov r1, #0
sub r2, r2, #4
.L1610:
add r3, r3, #1
cmp r5, r3
stm ip!, {r0-r1}
str r6, [r2, #4]!
bne .L1610
.L1611:
cmp lr, #0
ble .L1609
mov r1, #0
mov r2, #0
mov r5, r1
mov r3, #0
ldr ip, [fp, #-52]
sub r0, r10, #4
.L1614:
add r1, r1, #1
cmp lr, r1
stm ip!, {r2-r3}
str r5, [r0, #4]!
bne .L1614
.L1609:
cmp r7, #0
ble .L1613
mov r1, #0
mov r2, #0
mov lr, r1
mov r3, #0
ldr r0, [fp, #-64]
ldr ip, [fp, #-68]
sub r0, r0, #4
.L1617:
add r1, r1, #1
cmp r7, r1
stm ip!, {r2-r3}
str lr, [r0, #4]!
bne .L1617
.L1613:
cmp r9, #0
ble .L1616
mov r6, #0
ldr r3, [fp, #-56]
ldr r2, [fp, #-60]
ldr r7, [fp, #-48]
ldr r9, [fp, #-80]
sub r3, r3, #4
sub r10, r2, #4
str r7, [fp, #-52]
str r9, [fp, #-48]
str r3, [fp, #-56]
str r10, [fp, #-60]
str r3, [fp, #-80]
.L1618:
mov r2, #0
ldr r3, [fp, #-80]
add r6, r6, #1
str r2, [r3, #4]!
str r3, [fp, #-80]
bl nondet_int
mov r5, r0
ldr r0, [fp, #-84]
ldr r3, [fp, #-88]
cmp r0, r5
movlt r0, #0
movge r0, #1
cmp r3, r5
movgt r0, #0
str r5, [r10, #4]!
bl __ESBMC_assume
ldr r3, [r4, #12]
ldr r2, .L1634+12
mov r0, r5
add r5, r2, r3, lsl #3
mov r2, #0
mov r3, #0
stm r7!, {r2-r3}
bl __aeabi_i2d
mov r3, r1
mov r2, r0
add r1, r5, #296
ldmia r1, {r0-r1}
bl __aeabi_dmul
ldr r3, [r8, #8]
stm r9!, {r0-r1}
cmp r3, r6
bgt .L1618
cmp r3, #0
ble .L1616
mov r5, #0
.L1622:
ldr r3, [fp, #-60]
ldr r2, [r4, #1680]
ldr r1, [r3, #4]!
str r3, [fp, #-60]
ldr r3, [r4, #872]
str r2, [sp, #4]
str r3, [sp]
ldr r3, [fp, #-72]
ldr r2, [fp, #-76]
ldr r0, [fp, #-64]
bl fxp_transposed_direct_form_2
mov r9, r0
ldr ip, [fp, #-56]
ldr r1, [fp, #-48]
ldr r0, [r4, #1680]
str r9, [ip, #4]!
str ip, [fp, #-56]
ldmia r1!, {r2-r3}
str r1, [fp, #-48]
ldr r1, [r4, #872]
str r0, [sp, #12]
ldr r0, .L1634+16
str r1, [sp, #8]
str r0, [sp, #4]
sub r0, r0, #808
str r0, [sp]
ldr r0, [fp, #-68]
bl double_transposed_direct_form_2
mov r6, r0
mov r7, r1
ldr r2, .L1634+12
ldr r3, [r4, #12]
mov r0, r9
add r9, r2, r3, lsl #3
ldr r3, [fp, #-52]
stm r3!, {r6-r7}
str r3, [fp, #-52]
bl __aeabi_i2d
add r3, r9, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dsub
mov r6, r0
mov r7, r1
ldr r10, [r4, #56]
ldr r9, [r4, #60]
mov r0, r10
mov r1, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
bne .L1632
.L1619:
bl __DSVERIFIER_assert.part.0
.L1632:
mov r0, r10
mov r2, r6
mov r3, r7
add r1, r9, #-2147483648
bl __aeabi_dcmplt
cmp r0, #0
beq .L1619
ldr r3, [r8, #8]
add r5, r5, #1
cmp r3, r5
bgt .L1622
.L1616:
ldr r3, .L1634+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1633
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1633:
bl __stack_chk_fail
.L1635:
.align 2
.L1634:
.word .LANCHOR1
.word .LC63
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR1+880
.size verify_error, .-verify_error
.section .rodata.str1.4
.align 2
.LC64:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_zero_input_limit_cycl"
.ascii "e.h\000"
.align 2
.LC65:
.ascii "X_SIZE_VALUE >= Set_xsize_at_least_two_times_Na\000"
.section .rodata.cst4
.align 2
.LC66:
.word __stack_chk_guard
.text
.align 2
.global verify_zero_input_limit_cycle
.syntax unified
.arm
.fpu softvfp
.type verify_zero_input_limit_cycle, %function
verify_zero_input_limit_cycle:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #52
mov r3, #3
ldr r4, .L1658
ldr r2, .L1658+4
ldr r0, .L1658+8
ldr r2, [r2]
str r2, [fp, #-40]
mov r2,#0
ldr r5, [r4, #872]
str r3, [r4]
bl printf
ldr r3, .L1658+12
lsl r5, r5, #1
ldr r3, [r3, #8]
cmp r3, r5
blt .L1655
ldr r2, [r4, #872]
ldr r3, [r4, #1680]
lsl r1, r2, #2
add r1, r1, #7
lsl r3, r3, #2
bic r1, r1, #7
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r1
add r9, sp, #8
sub sp, sp, r3
mov r1, r9
add r0, r4, #72
add r8, sp, #8
bl fxp_double_to_fxp_array
ldr r2, [r4, #1680]
mov r1, r8
add r0, r4, #880
bl fxp_double_to_fxp_array
add r1, r4, #24
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
mov r7, r0
add r1, r4, #16
ldmia r1, {r0-r1}
str r7, [fp, #-56]
bl fxp_double_to_fxp
ldr r3, .L1658+12
mov lr, r0
ldr r1, [r3, #8]
lsl r3, r1, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r2, sp, #8
sub sp, sp, r3
add r3, sp, #8
cmp r1, #0
str r2, [fp, #-48]
str r3, [fp, #-52]
ble .L1642
mov r3, #0
mov ip, r3
ldr r2, [fp, #-48]
sub r0, r2, #4
ldr r2, [fp, #-52]
sub r2, r2, #4
.L1641:
add r3, r3, #1
cmp r1, r3
str ip, [r0, #4]!
str ip, [r2, #4]!
bne .L1641
.L1642:
ldr r3, [r4, #1680]
ldr r6, [r4, #872]
lsl r0, r3, #2
cmp r3, r6
movge ip, r3
movlt ip, r6
add r0, r0, #7
lsl r2, ip, #2
bic r0, r0, #7
add r2, r2, #7
bic r2, r2, #7
sub sp, sp, r0
add r0, sp, #8
sub sp, sp, r2
add r10, sp, #8
cmp ip, #0
sub sp, sp, r2
str r0, [fp, #-60]
add r2, sp, #8
ble .L1640
sub r7, r10, #4
str r8, [fp, #-64]
str r9, [fp, #-68]
mov r5, #0
mov r9, r7
mov r8, lr
mov r7, ip
sub r6, r2, #4
str r10, [fp, #-72]
mov r10, r6
ldr r6, [fp, #-56]
.L1643:
bl nondet_int
mov r2, r0
cmp r8, r0
str r0, [r9, #4]!
movlt r0, #0
movge r0, #1
cmp r6, r2
movgt r0, #0
bl __ESBMC_assume
add r5, r5, #1
ldr r1, [r9]
cmp r7, r5
str r1, [r10, #4]!
bne .L1643
ldr r3, .L1658+12
ldr r8, [fp, #-64]
ldr r1, [r3, #8]
ldr r9, [fp, #-68]
ldr r10, [fp, #-72]
ldr r3, [r4, #1680]
.L1640:
cmp r3, #0
ble .L1648
mov r2, #0
mov ip, r2
ldr r0, [fp, #-60]
sub r0, r0, #4
.L1647:
add r2, r2, #1
cmp r3, r2
str ip, [r0, #4]!
bne .L1647
.L1648:
cmp r1, #0
ble .L1645
ldr r2, [fp, #-52]
mov r5, #0
sub r7, r2, #4
ldr r2, [fp, #-48]
sub r6, r2, #4
b .L1646
.L1656:
ldr r3, [r4, #1680]
.L1646:
ldr r2, [r4, #872]
ldr r1, [r7, #4]!
mov r0, r10
stm sp, {r2, r3}
mov r3, r8
mov r2, r9
bl fxp_transposed_direct_form_2
ldr r3, .L1658+12
add r5, r5, #1
ldr r1, [r3, #8]
str r0, [r6, #4]!
cmp r1, r5
bgt .L1656
.L1645:
ldr r0, [fp, #-48]
bl fxp_check_persistent_limit_cycle
ldr r3, .L1658+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1657
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1655:
mov r2, #23
ldr r3, .L1658+16
ldr r1, .L1658+20
ldr r0, .L1658+24
bl __assert_fail
.L1657:
bl __stack_chk_fail
.L1659:
.align 2
.L1658:
.word .LANCHOR1
.word .LC66
.word .LC61
.word .LANCHOR2
.word .LANCHOR0+808
.word .LC64
.word .LC65
.size verify_zero_input_limit_cycle, .-verify_zero_input_limit_cycle
.section .rodata.str1.4
.align 2
.LC67:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_generic_timing.h\000"
.align 2
.LC68:
.ascii "spent_time <= ds.sample_time\000"
.section .rodata.cst4
.align 2
.LC69:
.word __stack_chk_guard
.text
.align 2
.global verify_generic_timing
.syntax unified
.arm
.fpu softvfp
.type verify_generic_timing, %function
verify_generic_timing:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #44
mov r2, sp
ldr r3, .L1692
ldr r4, .L1692+4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldr r3, [r4, #8]
sub r2, r2, r3, lsl #3
mov sp, r2
add r2, sp, #16
str r2, [fp, #-52]
mov r2, sp
sub r2, r2, r3, lsl #3
mov sp, r2
cmp r3, #0
add r2, sp, #16
ldrle r10, .L1692+8
str r2, [fp, #-56]
ble .L1661
mov r5, #0
ldr r8, [fp, #-52]
ldr r9, [fp, #-56]
ldr r10, .L1692+8
.L1665:
mov r2, #0
mov r3, #0
stm r8!, {r2-r3}
bl nondet_float
bl __aeabi_f2d
add r3, r10, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
stm r9!, {r6-r7}
bl __aeabi_dcmpge
cmp r0, #0
beq .L1662
add r3, r10, #16
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L1662:
bl __ESBMC_assume
ldr r3, [r4, #8]
add r5, r5, #1
cmp r3, r5
bgt .L1665
.L1661:
mov r2, sp
ldr r1, [r10, #872]
ldr ip, [r10, #1680]
sub r2, r2, r1, lsl #3
mov sp, r2
mov r0, sp
cmp ip, r1
movge r2, ip
movlt r2, r1
sub r0, r0, ip, lsl #3
add r5, sp, #16
mov sp, r0
sub r0, r0, r2, lsl #3
add lr, sp, #16
mov sp, r0
cmp r1, #0
add r0, sp, #16
str r0, [fp, #-48]
movgt r6, #0
movgt r0, #0
movgt r7, #0
ble .L1670
.L1669:
add r0, r0, #1
cmp r1, r0
stm r5!, {r6-r7}
bne .L1669
.L1670:
cmp ip, #0
movgt r0, #0
movgt r6, #0
movgt r7, #0
ble .L1668
.L1673:
add r0, r0, #1
cmp ip, r0
stm lr!, {r6-r7}
bne .L1673
.L1668:
cmp r2, #0
ble .L1672
mov r0, #0
mov r6, #0
mov r7, #0
ldr lr, [fp, #-48]
.L1676:
add r0, r0, #1
cmp r2, r0
stm lr!, {r6-r7}
bne .L1676
.L1672:
ldr r5, .L1692+12
ldr r0, [r4, #4]
ldr r2, [r5, #36]
ldr r7, [r5, #72]
cmp r3, #0
add r7, r7, r2, lsl #1
add r7, r7, r0
lsl r3, r2, #1
str r7, [r4, #4]
ble .L1674
mov r6, #0
ldr r9, [fp, #-56]
ldr r8, [fp, #-52]
b .L1675
.L1690:
ldr r3, [r5, #36]
ldr r1, [r10, #872]
ldr ip, [r10, #1680]
lsl r3, r3, #1
.L1675:
ldr lr, [r5, #40]
ldr r0, [r5, #124]
ldr r2, [r5, #68]
add r0, r0, lr, lsl #1
add r2, r2, lr, lsl #1
ldr lr, [r5, #96]
add r2, r2, r3
ldr r3, [r5, #120]
add r0, r0, lr
add r0, r0, r3
add r2, r2, r7
add lr, r0, r2
ldmia r9!, {r2-r3}
ldr r0, [fp, #-48]
str r1, [sp, #8]
ldr r1, .L1692+16
str ip, [sp, #12]
str r1, [sp, #4]
sub r1, r1, #808
str r1, [sp]
str lr, [r4, #4]
bl generic_timing_double_transposed_direct_form_2
mov r2, r0
mov r3, r1
ldr r0, [r4, #4]
stm r8!, {r2-r3}
bl __aeabi_i2d
add r3, r5, #8
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldr r0, [r10, #1688]
ldr r1, [r10, #1692]
bl __aeabi_dcmpge
cmp r0, #0
beq .L1689
ldr r3, [r4, #8]
add r6, r6, #1
cmp r3, r6
str r7, [r4, #4]
bgt .L1690
.L1674:
ldr r3, .L1692
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1691
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1689:
mov r2, #89
ldr r3, .L1692+20
ldr r1, .L1692+24
ldr r0, .L1692+28
bl __assert_fail
.L1691:
bl __stack_chk_fail
.L1693:
.align 2
.L1692:
.word .LC69
.word .LANCHOR2
.word .LANCHOR1
.word hw
.word .LANCHOR1+880
.word .LANCHOR0+840
.word .LC67
.word .LC68
.size verify_generic_timing, .-verify_generic_timing
.section .rodata.cst4
.align 2
.LC70:
.word __stack_chk_guard
.text
.align 2
.global verify_timing_msp_430
.syntax unified
.arm
.fpu softvfp
.type verify_timing_msp_430, %function
verify_timing_msp_430:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #36
ldr r3, .L1724
ldr r10, .L1724+4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov r3, sp
ldr r0, [r10, #8]
sub r3, r3, r0, lsl #3
mov sp, r3
add r3, sp, #16
str r3, [fp, #-48]
mov r3, sp
sub r3, r3, r0, lsl #3
mov sp, r3
cmp r0, #0
add r3, sp, #16
ldrle r4, .L1724+8
str r3, [fp, #-52]
ble .L1695
mov r5, #0
ldr r8, [fp, #-48]
ldr r9, [fp, #-52]
ldr r4, .L1724+8
.L1699:
mov r2, #0
mov r3, #0
stm r8!, {r2-r3}
bl nondet_float
bl __aeabi_f2d
add r3, r4, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
stm r9!, {r6-r7}
bl __aeabi_dcmpge
cmp r0, #0
beq .L1696
add r3, r4, #16
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L1696:
bl __ESBMC_assume
ldr r0, [r10, #8]
add r5, r5, #1
cmp r0, r5
bgt .L1699
.L1695:
mov r3, sp
ldr ip, [r4, #872]
ldr r1, [r4, #1680]
sub r3, r3, ip, lsl #3
mov sp, r3
cmp r1, ip
movge lr, r1
movlt lr, ip
sub r3, r3, r1, lsl #3
add r7, sp, #16
mov sp, r3
sub r3, r3, lr, lsl #3
add r6, sp, #16
mov sp, r3
cmp ip, #0
movgt r5, #0
movgt r2, #0
movgt r3, #0
add r8, sp, #16
ble .L1704
.L1703:
add r5, r5, #1
cmp ip, r5
stm r7!, {r2-r3}
bne .L1703
.L1704:
cmp r1, #0
movgt r5, #0
movgt r2, #0
movgt r3, #0
ble .L1702
.L1707:
add r5, r5, #1
cmp r1, r5
stm r6!, {r2-r3}
bne .L1707
.L1702:
cmp lr, #0
movgt r6, r8
movgt r5, #0
movgt r2, #0
movgt r3, #0
ble .L1706
.L1710:
add r5, r5, #1
cmp lr, r5
stm r6!, {r2-r3}
bne .L1710
.L1706:
cmp r0, #0
ble .L1708
mov r5, #0
ldr r9, .L1724+12
ldr r7, [fp, #-52]
ldr r6, [fp, #-48]
b .L1709
.L1722:
ldr ip, [r4, #872]
ldr r1, [r4, #1680]
.L1709:
ldmia r7!, {r2-r3}
str r1, [sp, #12]
ldr r1, .L1724+16
mov r0, r8
str ip, [sp, #8]
str r1, [sp, #4]
str r9, [sp]
bl double_transposed_direct_form_2_MSP430
ldr r3, [r10, #8]
add r5, r5, #1
cmp r3, r5
stm r6!, {r0-r1}
bgt .L1722
.L1708:
ldr r3, .L1724
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1723
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1723:
bl __stack_chk_fail
.L1725:
.align 2
.L1724:
.word .LC70
.word .LANCHOR2
.word .LANCHOR1
.word .LANCHOR1+72
.word .LANCHOR1+880
.size verify_timing_msp_430, .-verify_timing_msp_430
.section .rodata.str1.4
.align 2
.LC71:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_stability.h\000"
.align 2
.LC72:
.ascii "check_stability(_a, ds.a_size)\000"
.section .rodata.cst4
.align 2
.LC73:
.word __stack_chk_guard
.text
.align 2
.global verify_stability
.syntax unified
.arm
.fpu softvfp
.type verify_stability, %function
verify_stability:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #12
ldr r6, .L1735
mov ip, #0
ldr r2, [r6, #872]
add r0, r6, #72
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
mov r4, sp
ldr r3, .L1735+4
mov r1, r4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
str ip, [r6]
bl fxp_double_to_fxp_array
ldr r9, [r6, #872]
sub r3, r4, r9, lsl #3
mov sp, r3
cmp r9, #0
mov r10, sp
ble .L1727
mov r5, r10
ldr r2, [r6, #12]
ldr r3, .L1735+8
add r8, r4, r9, lsl #2
add r3, r3, r2, lsl #3
sub r8, r8, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1728:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r8
stm r5!, {r0-r1}
bne .L1728
.L1727:
mov r1, r9
mov r0, r10
bl check_stability
cmp r0, #0
beq .L1733
ldr r3, .L1735+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1734
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1733:
mov r2, #37
ldr r3, .L1735+12
ldr r1, .L1735+16
ldr r0, .L1735+20
bl __assert_fail
.L1734:
bl __stack_chk_fail
.L1736:
.align 2
.L1735:
.word .LANCHOR1
.word .LC73
.word .LANCHOR0
.word .LANCHOR0+864
.word .LC71
.word .LC72
.size verify_stability, .-verify_stability
.section .rodata.cst4
.align 2
.LC74:
.word __stack_chk_guard
.text
.align 2
.global verify_minimum_phase
.syntax unified
.arm
.fpu softvfp
.type verify_minimum_phase, %function
verify_minimum_phase:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #12
ldr r6, .L1746
mov ip, #0
ldr r2, [r6, #1680]
add r0, r6, #880
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
mov r4, sp
ldr r3, .L1746+4
mov r1, r4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
str ip, [r6]
bl fxp_double_to_fxp_array
ldr r9, [r6, #1680]
sub r3, r4, r9, lsl #3
mov sp, r3
cmp r9, #0
mov r10, sp
ble .L1738
mov r5, r10
ldr r2, [r6, #12]
ldr r3, .L1746+8
add r8, r4, r9, lsl #2
add r3, r3, r2, lsl #3
sub r8, r8, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1739:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r8
stm r5!, {r0-r1}
bne .L1739
.L1738:
mov r1, r9
mov r0, r10
bl check_stability
cmp r0, #0
beq .L1744
ldr r3, .L1746+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1745
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1744:
bl __DSVERIFIER_assert.part.0
.L1745:
bl __stack_chk_fail
.L1747:
.align 2
.L1746:
.word .LANCHOR1
.word .LC74
.word .LANCHOR0
.size verify_minimum_phase, .-verify_minimum_phase
.section .rodata.str1.4
.align 2
.LC75:
.ascii "Verifying stability for closedloop function\000"
.section .rodata.cst4
.align 2
.LC76:
.word __stack_chk_guard
.text
.align 2
.global verify_stability_closedloop_using_dslib
.syntax unified
.arm
.fpu softvfp
.type verify_stability_closedloop_using_dslib, %function
verify_stability_closedloop_using_dslib:
@ args = 0, pretend = 0, frame = 808
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #820
ldr r10, .L1760
ldr r3, .L1760+4
ldr r2, [r10, #1608]
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r4, sp, #8
mov r1, r4
add r0, r10, #808
bl fxp_double_to_fxp_array
ldr r2, [r10, #800]
mov r0, r10
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r5, sp, #8
mov r1, r5
bl fxp_double_to_fxp_array
mov r3, sp
ldr r9, [r10, #1608]
sub r3, r3, r9, lsl #3
cmp r9, #0
mov sp, r3
ble .L1749
ldr r2, .L1760+8
ldr r3, .L1760+12
ldr r2, [r2, #12]
add r9, r4, r9, lsl #2
add r3, r3, r2, lsl #3
add r8, sp, #8
sub r9, r9, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1750:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r9
stm r8!, {r0-r1}
bne .L1750
.L1749:
mov r3, sp
ldr r10, [r10, #800]
sub r3, r3, r10, lsl #3
mov sp, r3
cmp r10, #0
add r6, sp, #8
ble .L1751
ldr r2, .L1760+8
ldr r3, .L1760+12
ldr r2, [r2, #12]
add r7, r5, r10, lsl #2
add r3, r3, r2, lsl #3
sub r7, r7, #4
sub r5, r5, #4
add r9, r3, #296
ldmia r9, {r8-r9}
.L1752:
ldr r0, [r5, #4]!
bl __aeabi_i2d
mov r2, r8
mov r3, r9
bl __aeabi_dmul
cmp r7, r5
stm r6!, {r0-r1}
bne .L1752
.L1751:
ldr r4, .L1760+16
ldr r0, .L1760+20
ldr r5, [r4, #800]
ldr r6, [r4, #1608]
bl puts
add r1, r10, r5
mov r3, r6
sub r1, r1, #1
str r5, [sp, #4]
str r4, [sp]
add r2, r4, #808
sub r0, fp, #844
bl check_stability_closedloop
cmp r0, #0
beq .L1758
ldr r3, .L1760+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1759
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1758:
bl __DSVERIFIER_assert.part.0
.L1759:
bl __stack_chk_fail
.L1761:
.align 2
.L1760:
.word controller
.word .LC76
.word .LANCHOR1
.word .LANCHOR0
.word plant
.word .LC75
.size verify_stability_closedloop_using_dslib, .-verify_stability_closedloop_using_dslib
.section .rodata.cst4
.align 2
.LC77:
.word __stack_chk_guard
.text
.align 2
.global verify_limit_cycle_closed_loop
.syntax unified
.arm
.fpu softvfp
.type verify_limit_cycle_closed_loop, %function
verify_limit_cycle_closed_loop:
@ args = 0, pretend = 0, frame = 1624
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #1632
sub sp, sp, #12
mov ip, #3
ldr r9, .L1803
ldr r2, [r9, #1608]
add r0, r9, #808
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
ldr r3, .L1803+4
add r4, sp, #16
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
ldr r3, .L1803+8
mov r1, r4
str ip, [r3]
bl fxp_double_to_fxp_array
ldr r2, [r9, #800]
mov r0, r9
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r3, sp, #16
mov r1, r3
str r3, [fp, #-1648]
bl fxp_double_to_fxp_array
mov r3, sp
ldr r10, [r9, #1608]
sub r3, r3, r10, lsl #3
cmp r10, #0
mov sp, r3
ble .L1767
ldr r2, .L1803+8
ldr r3, .L1803+12
ldr r2, [r2, #12]
add r8, r4, r10, lsl #2
add r3, r3, r2, lsl #3
add r5, sp, #16
sub r8, r8, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1766:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r8
stm r5!, {r0-r1}
bne .L1766
.L1767:
mov r3, sp
ldr r5, [r9, #800]
sub r3, r3, r5, lsl #3
mov sp, r3
cmp r5, #0
add r4, sp, #16
ble .L1765
ldr r2, .L1803+8
ldr r1, [fp, #-1648]
ldr r3, .L1803+12
ldr r2, [r2, #12]
add r8, r1, r5, lsl #2
add r3, r3, r2, lsl #3
sub r8, r8, #4
sub r9, r1, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1770:
ldr r0, [r9, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r9, r8
stm r4!, {r0-r1}
bne .L1770
.L1765:
mov r0, sp
ldr r3, .L1803+16
ldr r1, .L1803+20
ldr r2, [r3, #8]
ldr r3, [r1, #1608]
sub r0, r0, r2, lsl #3
mov sp, r0
add r10, r10, r3
ldr r3, [r1, #800]
add r1, sp, #16
str r1, [fp, #-1652]
mov r1, sp
sub r2, r1, r2, lsl #3
mov sp, r2
add r5, r5, r3
mov r3, sp
sub r10, r10, #1
sub r3, r3, r10, lsl #3
add r2, sp, #16
mov sp, r3
sub r3, r5, #1
str r2, [fp, #-1656]
str r3, [fp, #-1648]
bl nondet_double
mov r4, r0
mov r5, r1
ldr r3, .L1803+8
mov r2, r4
add r1, r3, #24
ldmia r1, {r0-r1}
mov r3, r5
bl __aeabi_dcmple
cmp r0, #0
add r6, sp, #16
beq .L1769
ldr r1, .L1803+8
mov r2, r4
add r1, r1, #16
ldmia r1, {r0-r1}
mov r3, r5
bl __aeabi_dcmpge
subs r0, r0, #0
movne r0, #1
.L1769:
bl __ESBMC_assume
ldr r3, .L1803+16
ldr r1, [r3, #8]
cmp r1, #0
ble .L1776
mov r0, #0
mov r2, #0
mov r3, #0
ldr lr, [fp, #-1656]
ldr ip, [fp, #-1652]
.L1775:
add r0, r0, #1
cmp r0, r1
stm lr!, {r4-r5}
stm ip!, {r2-r3}
bne .L1775
.L1776:
ldr r3, [fp, #-1648]
cmp r10, r3
movge r3, r10
cmp r10, #0
mov r0, r3
lsl r2, r3, #3
movgt r3, #0
ble .L1801
.L1777:
add r3, r3, #1
cmp r3, r10
stm r6!, {r4-r5}
bne .L1777
sub sp, sp, r2
add r9, sp, #16
sub sp, sp, r2
add r8, sp, #16
.L1786:
mov r7, r9
str r9, [fp, #-1660]
mov r6, #0
mov r9, r0
.L1783:
bl nondet_int
bl __aeabi_i2d
mov r4, r0
mov r5, r1
ldr r3, .L1803+8
stm r7!, {r4-r5}
add r3, r3, #24
ldmia r3, {r2-r3}
bl __aeabi_dcmpge
cmp r0, #0
beq .L1780
ldr r3, .L1803+8
mov r0, r4
add r3, r3, #16
ldmia r3, {r2-r3}
mov r1, r5
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L1780:
add r6, r6, #1
bl __ESBMC_assume
ldmdb r7, {r2-r3}
cmp r6, r9
stm r8!, {r2-r3}
blt .L1783
ldr r3, .L1803+16
ldr r9, [fp, #-1660]
ldr r1, [r3, #8]
.L1779:
cmp r1, #0
ble .L1784
mov r4, #0
sub r8, fp, #1632
ldr r6, [fp, #-1656]
ldr r5, [fp, #-1652]
sub r8, r8, #12
sub r7, fp, #844
.L1785:
ldmia r6!, {r2-r3}
str r10, [sp, #12]
ldr r1, [fp, #-1648]
mov r0, r9
stm sp, {r7, r8}
str r1, [sp, #8]
bl double_transposed_direct_form_2
mov r3, r1
mov r2, r0
ldr r1, .L1803+16
add r4, r4, #1
ldr r1, [r1, #8]
stm r5!, {r2-r3}
cmp r1, r4
bgt .L1785
.L1784:
ldr r0, [fp, #-1652]
bl double_check_persistent_limit_cycle
ldr r3, .L1803+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1802
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1801:
sub sp, sp, r2
add r9, sp, #16
cmp r0, #0
sub sp, sp, r2
add r8, sp, #16
ble .L1779
b .L1786
.L1802:
bl __stack_chk_fail
.L1804:
.align 2
.L1803:
.word controller
.word .LC77
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
.word plant
.size verify_limit_cycle_closed_loop, .-verify_limit_cycle_closed_loop
.section .rodata.cst4
.align 2
.LC78:
.word __stack_chk_guard
.text
.align 2
.global verify_error_closedloop
.syntax unified
.arm
.fpu softvfp
.type verify_error_closedloop, %function
verify_error_closedloop:
@ args = 0, pretend = 0, frame = 3240
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #3248
sub sp, sp, #12
mov ip, #3
ldr r9, .L1845
ldr r10, .L1845+4
ldr r2, [r9, #1608]
add r0, r9, #808
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r4, sp, #16
ldr r3, .L1845+8
mov r1, r4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
str ip, [r10]
bl fxp_double_to_fxp_array
ldr r2, [r9, #800]
mov r0, r9
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r3, sp, #16
mov r1, r3
str r3, [fp, #-3252]
bl fxp_double_to_fxp_array
mov r2, sp
ldr r3, [r9, #1608]
sub r2, r2, r3, lsl #3
cmp r3, #0
mov sp, r2
str r3, [fp, #-3248]
ble .L1810
ldr r1, [fp, #-3248]
ldr r2, .L1845+12
ldr r3, [r10, #12]
add r8, r4, r1, lsl #2
add r3, r2, r3, lsl #3
add r5, sp, #16
sub r8, r8, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1809:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r8
stm r5!, {r0-r1}
bne .L1809
.L1810:
mov r3, sp
ldr r8, [r9, #800]
sub r3, r3, r8, lsl #3
mov sp, r3
cmp r8, #0
add r4, sp, #16
ble .L1808
ldr r2, [fp, #-3252]
ldr r1, .L1845+12
ldr r3, [r10, #12]
add r5, r2, r8, lsl #2
add r3, r1, r3, lsl #3
sub r5, r5, #4
sub r9, r2, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L1813:
ldr r0, [r9, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r9, r5
stm r4!, {r0-r1}
bne .L1813
.L1808:
mov r0, sp
ldr r3, .L1845+16
ldr r1, .L1845+20
ldr r3, [r3, #8]
ldr r2, [r1, #1608]
sub r0, r0, r3, lsl #3
mov sp, r0
add r0, sp, #16
str r0, [fp, #-3252]
mov r0, sp
sub r0, r0, r3, lsl #3
mov sp, r0
add r0, sp, #16
str r0, [fp, #-3276]
ldr r0, [fp, #-3248]
add r2, r0, r2
mov r0, sp
sub r0, r0, r3, lsl #3
mov sp, r0
add r0, sp, #16
str r0, [fp, #-3248]
mov r0, sp
sub r3, r0, r3, lsl #3
mov sp, r3
ldr r3, [r1, #800]
add r1, sp, #16
str r1, [fp, #-3256]
mov r1, sp
sub r2, r2, #1
sub r1, r1, r2, lsl #3
mov sp, r1
add r8, r8, r3
mov r3, sp
sub r3, r3, r2, lsl #3
add r9, sp, #16
mov sp, r3
sub r3, r8, #1
str r2, [fp, #-3260]
str r3, [fp, #-3264]
bl nondet_double
mov r6, r0
mov r7, r1
add r1, r10, #24
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmple
cmp r0, #0
add r8, sp, #16
beq .L1812
add r1, r10, #16
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpge
subs r0, r0, #0
movne r0, #1
.L1812:
bl __ESBMC_assume
ldr r3, .L1845+16
ldr r4, [r3, #8]
cmp r4, #0
ble .L1819
mov r3, #0
mov r0, #0
mov r1, #0
ldr r5, [fp, #-3248]
ldr lr, [fp, #-3256]
ldr ip, [fp, #-3252]
ldr r2, [fp, #-3276]
.L1818:
add r3, r3, #1
cmp r3, r4
stm r5!, {r6-r7}
stm lr!, {r6-r7}
stm ip!, {r0-r1}
stm r2!, {r0-r1}
bne .L1818
.L1819:
ldr r3, [fp, #-3260]
ldr r2, [fp, #-3264]
cmp r2, r3
movlt ip, r3
movge ip, r2
cmp r3, #0
movgt r3, #0
ldrgt r1, [fp, #-3260]
lsl r2, ip, #3
ble .L1842
.L1820:
add r3, r3, #1
cmp r3, r1
stm r9!, {r6-r7}
stm r8!, {r6-r7}
bne .L1820
mov r3, r2
sub sp, sp, r2
add r2, sp, #16
sub sp, sp, r3
add r3, sp, #16
str r2, [fp, #-3268]
str r3, [fp, #-3272]
.L1829:
mov r1, #0
mov r2, #0
mov r3, #0
ldr lr, [fp, #-3268]
ldr r0, [fp, #-3272]
.L1823:
add r1, r1, #1
cmp r1, ip
stm lr!, {r2-r3}
stm r0!, {r2-r3}
blt .L1823
.L1822:
cmp r4, #0
ble .L1824
mov r8, #0
ldr r3, .L1845+12
ldr r9, [fp, #-3276]
str r3, [fp, #-3276]
.L1828:
ldr r1, [fp, #-3248]
ldr r4, [fp, #-3260]
ldmia r1!, {r2-r3}
str r1, [fp, #-3248]
sub r1, fp, #2432
ldr r0, [fp, #-3268]
sub r1, r1, #12
str r4, [sp, #12]
ldr r5, [fp, #-3264]
str r1, [sp, #4]
sub r1, fp, #1632
sub r1, r1, #12
str r5, [sp, #8]
str r1, [sp]
bl double_transposed_direct_form_2
mov r6, r0
mov r7, r1
ldr r1, [fp, #-3252]
ldr ip, [fp, #-3256]
stm r1!, {r6-r7}
ldmia ip!, {r2-r3}
str r1, [fp, #-3252]
sub r1, fp, #3232
sub r1, r1, #12
str ip, [fp, #-3256]
ldr r0, [fp, #-3272]
str r1, [sp, #4]
sub r1, fp, #844
str r4, [sp, #12]
str r5, [sp, #8]
str r1, [sp]
bl double_transposed_direct_form_2
mov r4, r0
mov r5, r1
ldr r3, [r10, #12]
ldr r2, [fp, #-3276]
mov r1, r7
stm r9!, {r4-r5}
mov r0, r6
add r6, r2, r3, lsl #3
bl __aeabi_d2iz
bl __aeabi_i2d
add r3, r6, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
ldr r7, [r10, #56]
ldr r6, [r10, #60]
mov r0, r7
mov r1, r6
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
bne .L1843
.L1825:
bl __DSVERIFIER_assert.part.0
.L1843:
mov r0, r7
mov r2, r4
mov r3, r5
add r1, r6, #-2147483648
bl __aeabi_dcmplt
cmp r0, #0
beq .L1825
ldr r3, .L1845+16
add r8, r8, #1
ldr r3, [r3, #8]
cmp r3, r8
bgt .L1828
.L1824:
ldr r3, .L1845+8
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L1844
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1842:
mov r3, r2
sub sp, sp, r2
add r2, sp, #16
sub sp, sp, r3
add r3, sp, #16
cmp ip, #0
str r2, [fp, #-3268]
str r3, [fp, #-3272]
ble .L1822
b .L1829
.L1844:
bl __stack_chk_fail
.L1846:
.align 2
.L1845:
.word controller
.word .LANCHOR1
.word .LC78
.word .LANCHOR0
.word .LANCHOR2
.word plant
.size verify_error_closedloop, .-verify_error_closedloop
.section .rodata.cst4
.align 2
.LC79:
.word __stack_chk_guard
.text
.align 2
.global ss_system_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_system_quantization_error, %function
ss_system_quantization_error:
@ args = 0, pretend = 0, frame = 1088
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L1965
sub sp, sp, #1088
sub sp, sp, #4
ldr r3, [r3]
str r3, [sp, #1084]
mov r3,#0
bl __aeabi_i2d
ldr r2, .L1965+4
ldr r3, .L1965+8
ldr lr, [r2]
ldr fp, .L1965+12
cmp lr, #0
str r0, [sp, #8]
str r1, [sp, #12]
str r0, [r3, #768]
str r1, [r3, #772]
ldr r4, [fp]
str r3, [sp, #4]
ble .L1848
add r8, sp, #48
sub r5, r8, #8
mov r6, r5
add r9, lr, lr, lsl #2
rsb r7, lr, lr, lsl #29
add r9, r3, r9, lsl #3
lsl r2, lr, #3
add ip, r3, lr, lsl #3
lsl r3, lr, #29
lsl r7, r7, #3
str r2, [sp, #28]
str r3, [sp, #36]
.L1850:
mov r2, r6
add r3, ip, r7
.L1849:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1849
add ip, r3, #32
cmp ip, r9
add r6, r6, #32
bne .L1850
mov r6, #0
lsl r3, r4, #3
ldr ip, .L1965+16
rsb r7, r4, r4, lsl #29
str r3, [sp, #16]
lsl r3, r4, #29
add ip, ip, r4, lsl #3
lsl r7, r7, #3
lsl r9, lr, #5
str r3, [sp, #32]
add r10, r5, #128
.L1851:
cmp r4, #0
addgt r3, ip, r7
addgt r2, r10, r6
ble .L1855
.L1852:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1852
.L1855:
add r6, r6, #32
cmp r6, r9
add ip, ip, #32
bne .L1851
ldr r3, .L1965+20
ldr r7, [r3]
str r3, [sp, #24]
cmp r7, #0
ble .L1865
.L1915:
mov r6, #0
ldr r3, [sp, #36]
ldr ip, .L1965+24
sub r9, r3, lr
ldr r3, [sp, #28]
lsl r9, r9, #3
add ip, ip, r3
add r10, r8, #248
.L1857:
cmp lr, #0
addgt r3, ip, r9
addgt r2, r10, r6, lsl #5
ble .L1860
.L1856:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1856
.L1860:
add r6, r6, #1
cmp r6, r7
add ip, ip, #32
bne .L1857
mov ip, #0
ldr r3, [sp, #32]
ldr r6, .L1965+28
sub r9, r3, r4
ldr r3, [sp, #16]
lsl r9, r9, #3
add r8, r8, #376
add r6, r3, r6
.L1858:
cmp r4, #0
addgt r3, r6, r9
addgt r2, r8, ip, lsl #5
ble .L1864
.L1861:
ldmia r3!, {r0-r1}
cmp r3, r6
stm r2!, {r0-r1}
bne .L1861
.L1864:
add ip, ip, #1
cmp ip, r7
add r6, r6, #32
bne .L1858
cmp lr, #0
lslgt r9, lr, #5
bgt .L1865
cmp r4, #0
bgt .L1914
.L1871:
ldr r3, [sp, #4]
ldr r1, .L1965+8
add r7, r3, r7, lsl #5
.L1876:
add r3, r1, #640
ldmia r3, {r2-r3}
add r1, r1, #32
cmp r1, r7
str r2, [r5, #640]
str r3, [r5, #644]
add r5, r5, #32
bne .L1876
.L1872:
cmp lr, #0
bgt .L1873
.L1878:
bl double_state_space_representation
ldr r3, .L1965+4
str r0, [sp, #16]
str r1, [sp, #20]
ldr lr, [r3]
cmp lr, #0
bgt .L1961
ldr r3, [sp, #24]
ldr r10, [r3]
add r4, sp, #8
ldmia r4, {r3-r4}
cmp r10, #0
str r3, [sp, #808]
str r4, [sp, #812]
ldr r4, [fp]
ble .L1952
lsl r3, lr, #3
str r3, [sp, #8]
lsl r3, lr, #29
add r8, sp, #48
add r5, sp, #40
lsl r7, r4, #3
lsl r6, r4, #29
str r3, [sp, #28]
b .L1913
.L1865:
mov r2, r5
ldr r1, [sp, #4]
ldr r3, .L1965+8
add r9, r9, r1
.L1869:
add r1, r3, #512
ldmia r1, {r0-r1}
add r3, r3, #32
cmp r3, r9
str r0, [r2, #512]
str r1, [r2, #516]
add r2, r2, #32
bne .L1869
cmp r4, #0
ble .L1867
.L1914:
mov r1, r5
add r3, sp, #8
ldmia r3, {r2-r3}
ldr r0, .L1965+8
add r4, r5, r4, lsl #5
.L1868:
str r2, [r1, #768]
str r3, [r1, #772]
add r1, r1, #32
cmp r1, r4
add r0, r0, #32
bne .L1962
.L1867:
cmp r7, #0
bgt .L1871
cmp lr, #0
ble .L1878
.L1873:
ldr r3, [sp, #4]
ldr r0, .L1965+32
ldr r1, .L1965+8
add lr, r3, lr, lsl #5
.L1877:
ldmia r0, {r2-r3}
add r1, r1, #32
str r2, [r1, #480]
str r3, [r1, #484]
cmp r1, lr
add r0, r0, #32
beq .L1878
b .L1877
.L1961:
ldr r3, .L1965+8
lsl r0, lr, #5
mov r2, r3
str r3, [sp, #4]
ldr r3, .L1965+32
str r0, [sp, #32]
add r1, r3, lr, lsl #5
mov ip, r1
.L1879:
add r1, r2, #512
ldmia r1, {r0-r1}
add r3, r3, #32
str r0, [r3, #-32]
str r1, [r3, #-28]
cmp r3, ip
add r2, r2, #32
bne .L1879
add r4, sp, #8
ldmia r4, {r3-r4}
add r8, sp, #48
str r3, [sp, #808]
str r4, [sp, #812]
lsl r3, lr, #3
sub r5, r8, #8
add r7, lr, lr, lsl #2
rsb r6, lr, lr, lsl #29
str r3, [sp, #8]
ldr r4, .L1965+8
lsl r3, lr, #29
add ip, r5, lr, lsl #3
add r7, r5, r7, lsl #3
lsl r6, r6, #3
str r3, [sp, #28]
.L1882:
mov r2, r4
add r3, ip, r6
.L1881:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1881
add ip, r3, #32
cmp ip, r7
add r4, r4, #32
bne .L1882
ldr r4, [fp]
ldr r9, .L1965+16
ldr r3, [sp, #32]
rsb r10, r4, r4, lsl #29
add ip, r5, #128
lsl r10, r10, #3
lsl r7, r4, #3
add ip, ip, r4, lsl #3
lsl r6, r4, #29
add fp, r9, r3
.L1883:
cmp r4, #0
movgt r2, r9
addgt r3, ip, r10
ble .L1887
.L1884:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1884
.L1887:
add r9, r9, #32
cmp r9, fp
add ip, ip, #32
bne .L1883
ldr r3, [sp, #24]
ldr r10, [r3]
cmp r10, #0
ble .L1897
.L1913:
mov r9, #0
ldr r3, [sp, #28]
add ip, r8, #248
sub r8, r3, lr
ldr r3, [sp, #8]
ldr fp, .L1965+24
add ip, ip, r3
lsl r8, r8, #3
.L1889:
cmp lr, #0
addgt r3, ip, r8
addgt r2, fp, r9, lsl #5
ble .L1892
.L1888:
ldmia r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1888
.L1892:
add r9, r9, #1
cmp r9, r10
add ip, ip, #32
bne .L1889
mov ip, #0
sub r6, r6, r4
add r3, r5, #384
ldr r8, .L1965+28
lsl r6, r6, #3
add r7, r3, r7
.L1890:
cmp r4, #0
addgt r3, r7, r6
addgt r2, r8, ip, lsl #5
ble .L1896
.L1893:
ldmia r3!, {r0-r1}
cmp r3, r7
stm r2!, {r0-r1}
bne .L1893
.L1896:
add ip, ip, #1
cmp ip, r10
add r7, r7, #32
bne .L1890
cmp lr, #0
lslgt r3, lr, #5
strgt r3, [sp, #32]
bgt .L1897
cmp r4, #0
ble .L1903
.L1899:
mov r1, r5
ldr r0, .L1965+8
add r4, r5, r4, lsl #5
.L1905:
add r3, r1, #768
ldmia r3, {r2-r3}
add r1, r1, #32
cmp r1, r4
str r2, [r0, #768]
str r3, [r0, #772]
add r0, r0, #32
bne .L1905
.L1900:
cmp r10, #0
bgt .L1903
.L1904:
cmp lr, #0
bgt .L1906
.L1911:
bl fxp_state_space_representation
mov r3, r1
ldr r1, .L1965+4
mov r2, r0
ldr r1, [r1]
cmp r1, #0
bgt .L1963
.L1908:
add r1, sp, #16
ldmia r1, {r0-r1}
bl __aeabi_dsub
ldr r3, .L1965
ldr r2, [r3]
ldr r3, [sp, #1084]
eors r2, r3, r2
mov r3, #0
bne .L1964
add sp, sp, #1088
add sp, sp, #4
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1897:
mov r1, r5
ldr r3, [sp, #32]
ldr r0, .L1965+8
add ip, r3, r5
.L1901:
add r3, r1, #512
ldmia r3, {r2-r3}
add r1, r1, #32
cmp ip, r1
str r2, [r0, #512]
str r3, [r0, #516]
add r0, r0, #32
bne .L1901
cmp r4, #0
ble .L1900
b .L1899
.L1963:
ldr r0, .L1965+36
ldr ip, .L1965+8
add r1, r0, r1, lsl #5
.L1912:
add r5, ip, #512
ldmia r5, {r4-r5}
add r0, r0, #32
str r4, [r0, #-32]
str r5, [r0, #-28]
cmp r1, r0
add ip, ip, #32
beq .L1908
b .L1912
.L1906:
ldr r3, [sp, #4]
ldr r0, .L1965+36
ldr r1, .L1965+8
add lr, r3, lr, lsl #5
.L1910:
ldmia r0, {r2-r3}
add r1, r1, #32
str r2, [r1, #480]
str r3, [r1, #484]
cmp lr, r1
add r0, r0, #32
beq .L1911
b .L1910
.L1903:
ldr r1, .L1965+8
add r10, r5, r10, lsl #5
.L1909:
add r3, r5, #640
ldmia r3, {r2-r3}
add r5, r5, #32
cmp r10, r5
str r2, [r1, #640]
str r3, [r1, #644]
add r1, r1, #32
beq .L1904
b .L1909
.L1848:
ldr r3, .L1965+20
ldr r7, [r3]
str r3, [sp, #24]
cmp r7, #0
ble .L1953
lsl r3, lr, #3
str r3, [sp, #28]
lsl r3, lr, #29
str r3, [sp, #36]
lsl r3, r4, #3
str r3, [sp, #16]
lsl r3, r4, #29
add r8, sp, #48
add r5, sp, #40
str r3, [sp, #32]
b .L1915
.L1962:
add r3, r0, #768
ldmia r3, {r2-r3}
b .L1868
.L1953:
cmp r4, #0
addgt r5, sp, #40
ble .L1872
b .L1914
.L1952:
cmp r4, #0
addgt r5, sp, #40
ble .L1904
b .L1899
.L1964:
bl __stack_chk_fail
.L1966:
.align 2
.L1965:
.word .LC79
.word nStates
.word _controller
.word nInputs
.word _controller+128
.word nOutputs
.word _controller+256
.word _controller+384
.word new_state
.word new_stateFWL
.size ss_system_quantization_error, .-ss_system_quantization_error
.section .rodata.cst4
.align 2
.LC80:
.word __stack_chk_guard
.text
.align 2
.global fxp_ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_quantization_error, %function
fxp_ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 728
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L2022
sub sp, sp, #740
str r0, [sp, #16]
str r1, [sp, #20]
ldr fp, [r3]
ldr r3, .L2022+4
cmp fp, #0
ldr r3, [r3]
str r3, [sp, #732]
mov r3,#0
ldr r3, .L2022+8
ldr r9, [r3]
beq .L2002
mov r5, #0
rsb r10, r9, r9, lsl #29
lsl r10, r10, #3
str r10, [sp, #8]
mov r6, #0
mov r7, #0
mov r10, r5
ldr r8, .L2022+12
add r8, r8, r9, lsl #3
.L1969:
cmp r9, #0
beq .L1974
ldr r3, [sp, #8]
add r4, r8, r3
.L1972:
ldmia r4!, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpeq
cmp r0, #0
moveq r5, #1
cmp r4, r8
bne .L1972
.L1974:
add r10, r10, #1
cmp fp, r10
add r8, r8, #32
bne .L1969
str r10, [sp, #12]
.L1968:
add r8, sp, #24
mov r6, r8
mov r2, #0
mov r3, #0
mov lr, #0
add r10, sp, #344
add ip, sp, #376
add r4, sp, #504
.L1976:
mov r0, r6
sub r1, ip, #32
.L1975:
stm r1!, {r2-r3}
cmp r1, ip
str lr, [r0], #4
bne .L1975
add ip, r1, #32
cmp ip, r4
add r6, r6, #16
bne .L1976
cmp r9, #0
beq .L1981
add r1, sp, #16
ldmia r1, {r0-r1}
mov r3, r10
add r9, r10, r9, lsl #5
.L1980:
stm r3, {r0-r1}
add r3, r3, #32
cmp r3, r9
bne .L1980
.L1981:
mov r3, #0
ldr r2, .L2022+16
str r3, [sp, #88]
ldr r7, [r2]
str r3, [sp, #104]
cmp r7, r3
str r3, [sp, #120]
str r3, [sp, #136]
beq .L1979
add r3, sp, #24
ldr r9, .L2022+20
add r6, r3, r7, lsl #2
.L1982:
ldmia r9!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r8], #4
cmp r8, r6
bne .L1982
.L1979:
add r6, sp, #600
mov lr, r6
mov r0, #0
mov r1, #0
mov ip, r4
add r8, sp, #632
add r4, sp, #472
.L1984:
mov r2, lr
sub r3, ip, #32
.L1983:
stm r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L1983
add ip, r3, #32
cmp ip, r8
add lr, lr, #32
bne .L1984
ldr r3, .L2022+24
cmp r7, #0
movne r9, #1
movne fp, r3
str r3, [sp, #8]
addne r8, sp, #88
beq .L2020
.L1988:
add r1, fp, #512
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
add r3, r8, r9, lsl #4
cmp r7, r9
add fp, fp, #32
str r0, [r3, #-16]
add r9, r9, #1
bne .L1988
.L1989:
add r9, sp, #152
mov r1, r7
str r8, [sp]
add r3, sp, #24
mov r2, #1
ldr r0, [sp, #12]
str r9, [sp, #4]
bl fxp_matrix_multiplication.part.0
ldr r3, .L2022+8
ldr r7, [r3]
cmp r7, #0
addeq r8, sp, #216
beq .L1987
mov fp, #1
add r8, sp, #216
.L1986:
ldmia r10, {r0-r1}
bl __aeabi_d2iz
bl fxp_quantize
bl __aeabi_i2d
bl fxp_double_to_fxp
add r3, r8, fp, lsl #4
cmp fp, r7
add r10, r10, #32
str r0, [r3, #-16]
add fp, fp, #1
bne .L1986
.L1987:
add r1, sp, #280
mov r3, r9
str r1, [sp]
mov r2, r8
mov r0, r7
mov r1, #1
bl fxp_sub_matrix
ldr r3, .L2022+8
ldr r9, [r3]
cmp r9, #0
beq .L1994
mov r7, #1
ldr r2, .L2022+28
ldr r3, .L2022+32
ldr r2, [r2, #12]
ldr r8, .L2022+24
add r3, r3, r2, lsl #3
add fp, r3, #296
ldmia fp, {r10-fp}
.L1993:
add r3, sp, #280
add r3, r3, r7, lsl #4
ldr r0, [r3, #-16]
bl fxp_quantize
bl __aeabi_i2d
mov r2, r10
mov r3, fp
bl __aeabi_dmul
cmp r9, r7
str r0, [r8, #768]
str r1, [r8, #772]
add r7, r7, #1
add r8, r8, #32
bne .L1993
.L1994:
ldr r9, .L2022+36
add r3, sp, #472
ldr r1, .L2022+16
ldr r0, .L2022
str r3, [sp, #4]
str r9, [sp]
mov r2, #1
ldr r1, [r1]
ldr r0, [r0]
sub r3, r9, #256
bl double_matrix_multiplication.part.0
cmp r5, #1
add r10, r9, #256
beq .L1991
.L1992:
ldr r3, .L2022
ldr fp, [r3]
cmp fp, #0
beq .L1999
add r5, sp, #472
ldr r7, .L2022+24
add r8, sp, #600
add fp, r5, fp, lsl #5
.L1998:
ldmia r5, {r0-r1}
ldmia r8, {r2-r3}
bl __aeabi_dadd
add r5, r5, #32
cmp r5, fp
str r0, [r7, #640]
str r1, [r7, #644]
add r8, r8, #32
add r7, r7, #32
bne .L1998
.L1999:
ldr r5, .L2022+16
add r3, sp, #472
ldr r1, [r5]
mov r2, #1
mov r0, r1
str r3, [sp, #4]
str r9, [sp]
ldr r3, .L2022+24
bl double_matrix_multiplication.part.0
add r3, sp, #600
str r3, [sp, #4]
ldr r3, .L2022+8
str r10, [sp]
ldr r1, [r3]
mov r2, #1
ldr r3, .L2022+40
ldr r0, [r5]
bl double_matrix_multiplication.part.0
ldr r7, [r5]
cmp r7, #0
beq .L1997
add r3, sp, #472
ldr r5, .L2022+24
add r7, r3, r7, lsl #5
.L2000:
ldmia r4, {r0-r1}
ldmia r6, {r2-r3}
bl __aeabi_dadd
add r4, r4, #32
cmp r7, r4
str r0, [r5, #512]
str r1, [r5, #516]
add r6, r6, #32
add r5, r5, #32
bne .L2000
.L1997:
ldr r3, [sp, #8]
add r1, r3, #640
ldmia r1, {r0-r1}
ldr r3, .L2022+4
ldr r2, [r3]
ldr r3, [sp, #732]
eors r2, r3, r2
mov r3, #0
bne .L2021
add sp, sp, #740
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L1991:
add r3, sp, #600
ldr r1, .L2022+8
ldr r0, .L2022
str r3, [sp, #4]
str r10, [sp]
mov r2, r5
ldr r1, [r1]
ldr r0, [r0]
sub r3, r9, #128
bl double_matrix_multiplication.part.0
b .L1992
.L2020:
add r8, sp, #88
b .L1989
.L2002:
mov r5, fp
str fp, [sp, #12]
b .L1968
.L2021:
bl __stack_chk_fail
.L2023:
.align 2
.L2022:
.word nOutputs
.word .LC80
.word nInputs
.word _controller_fxp+384
.word nStates
.word _controller_fxp+896
.word _controller_fxp
.word .LANCHOR1
.word .LANCHOR0
.word _controller_fxp+512
.word _controller_fxp+128
.size fxp_ss_closed_loop_quantization_error, .-fxp_ss_closed_loop_quantization_error
.section .rodata.cst4
.align 2
.LC81:
.word __stack_chk_guard
.text
.align 2
.global ss_closed_loop_quantization_error
.syntax unified
.arm
.fpu softvfp
.type ss_closed_loop_quantization_error, %function
ss_closed_loop_quantization_error:
@ args = 0, pretend = 0, frame = 408
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L2063
sub sp, sp, #420
str r0, [sp, #16]
str r1, [sp, #20]
ldr fp, [r3]
ldr r3, .L2063+4
cmp fp, #0
ldr r3, [r3]
str r3, [sp, #412]
mov r3,#0
ldr r3, .L2063+8
moveq r5, fp
ldr r10, [r3]
beq .L2025
mov r5, #0
mov r6, #0
mov r9, r5
mov r7, #0
ldr r8, .L2063+12
rsb r3, r10, r10, lsl #29
lsl r3, r3, #3
add r8, r8, r10, lsl #3
str r3, [sp, #12]
.L2026:
cmp r10, #0
beq .L2031
ldr r3, [sp, #12]
add r4, r8, r3
.L2029:
ldmia r4!, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpeq
cmp r0, #0
moveq r5, #1
cmp r4, r8
bne .L2029
.L2031:
add r9, r9, #1
cmp r9, fp
add r8, r8, #32
bne .L2026
.L2025:
cmp r10, #0
bne .L2032
.L2035:
add r7, sp, #280
mov lr, r7
mov r0, #0
mov r1, #0
add r6, sp, #152
add ip, sp, #184
add r4, sp, #312
.L2033:
mov r2, lr
sub r3, ip, #32
.L2036:
stm r3!, {r0-r1}
cmp r3, ip
stm r2!, {r0-r1}
bne .L2036
add ip, r3, #32
cmp ip, r4
add lr, lr, #32
bne .L2033
add r3, sp, #152
str r3, [sp, #4]
ldr r8, .L2063+16
ldr r3, .L2063+20
mov r0, fp
ldr r1, [r8]
mov r2, #1
str r3, [sp]
add r3, r3, #384
bl double_matrix_multiplication.part.0
ldr r3, .L2063+8
ldr fp, [r3]
ldr r3, .L2063+20
cmp fp, #0
sub r3, r3, #512
addne r4, sp, #24
movne r10, r3
str r3, [sp, #12]
addne r9, sp, #152
addne fp, r4, fp, lsl #5
beq .L2042
.L2041:
ldmia r4, {r0-r1}
ldmia r9, {r2-r3}
bl __aeabi_dsub
add r4, r4, #32
cmp r4, fp
str r0, [r10, #768]
str r1, [r10, #772]
add r9, r9, #32
add r10, r10, #32
bne .L2041
.L2042:
add r3, sp, #152
str r3, [sp, #4]
ldr r3, .L2063+20
ldr r0, .L2063
str r3, [sp]
mov r2, #1
ldr r1, [r8]
ldr r0, [r0]
sub r3, r3, #256
bl double_matrix_multiplication.part.0
cmp r5, #1
ldr r10, .L2063+24
beq .L2039
.L2040:
ldr r3, .L2063
ldr fp, [r3]
cmp fp, #0
beq .L2047
add r4, sp, #152
ldr r5, .L2063+28
add r9, sp, #280
add fp, r4, fp, lsl #5
.L2046:
ldmia r4, {r0-r1}
ldmia r9, {r2-r3}
bl __aeabi_dadd
add r4, r4, #32
cmp r4, fp
str r0, [r5, #640]
str r1, [r5, #644]
add r9, r9, #32
add r5, r5, #32
bne .L2046
.L2047:
add r3, sp, #152
ldr r1, [r8]
str r3, [sp, #4]
ldr r3, .L2063+20
mov r0, r1
mov r2, #1
str r3, [sp]
sub r3, r3, #512
bl double_matrix_multiplication.part.0
add r3, sp, #280
str r3, [sp, #4]
ldr r3, .L2063+8
str r10, [sp]
ldr r1, [r3]
mov r2, #1
ldr r3, .L2063+32
ldr r0, [r8]
bl double_matrix_multiplication.part.0
ldr r5, [r8]
cmp r5, #0
beq .L2045
add r3, sp, #152
ldr r4, .L2063+28
add r5, r3, r5, lsl #5
.L2048:
ldmia r6, {r0-r1}
ldmia r7, {r2-r3}
bl __aeabi_dadd
add r6, r6, #32
cmp r5, r6
str r0, [r4, #512]
str r1, [r4, #516]
add r7, r7, #32
add r4, r4, #32
bne .L2048
.L2045:
ldr r3, [sp, #12]
add r1, r3, #640
ldmia r1, {r0-r1}
ldr r3, .L2063+4
ldr r2, [r3]
ldr r3, [sp, #412]
eors r2, r3, r2
mov r3, #0
bne .L2062
add sp, sp, #420
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2032:
add r3, sp, #24
add r10, r3, r10, lsl #5
add r1, sp, #16
ldmia r1, {r0-r1}
.L2034:
stm r3, {r0-r1}
add r3, r3, #32
cmp r3, r10
beq .L2035
b .L2034
.L2039:
add r3, sp, #280
ldr r1, .L2063+8
ldr r0, .L2063
str r3, [sp, #4]
str r10, [sp]
mov r2, r5
ldr r1, [r1]
ldr r0, [r0]
sub r3, r10, #384
bl double_matrix_multiplication.part.0
b .L2040
.L2062:
bl __stack_chk_fail
.L2064:
.align 2
.L2063:
.word nOutputs
.word .LC81
.word nInputs
.word _controller_double+384
.word nStates
.word _controller_double+512
.word _controller_double+768
.word _controller_double
.word _controller_double+128
.size ss_closed_loop_quantization_error, .-ss_closed_loop_quantization_error
.align 2
.global verify_error_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_error_state_space, %function
verify_error_state_space:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L2079
push {r4, r5, r6, r7, r8, lr}
ldr r3, [r3]
cmp r3, #0
bgt .L2078
.L2066:
mov r2, #1040
ldr r1, .L2079+4
ldr r0, .L2079+8
bl memcpy
mov r2, #1040
ldr r1, .L2079+4
ldr r0, .L2079+12
bl memcpy
mov r3, #0
ldr r4, .L2079+16
add r1, r4, #24
ldmia r1, {r0-r1}
str r3, [r4]
bl fxp_double_to_fxp
mov r6, r0
add r1, r4, #16
ldmia r1, {r0-r1}
bl fxp_double_to_fxp
mov r7, r0
bl nondet_double
mov r4, r0
mov r5, r1
mov r0, r6
bl __aeabi_i2d
mov r2, r4
mov r3, r5
bl __aeabi_dcmple
cmp r0, #0
beq .L2069
mov r0, r7
bl __aeabi_i2d
mov r2, r4
mov r3, r5
bl __aeabi_dcmpge
subs r0, r0, #0
movne r0, #1
.L2069:
bl __ESBMC_assume
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L2078:
ldr ip, .L2079+4
ldr r2, .L2079+20
mov lr, ip
add r4, r2, r3, lsl #5
lsl r3, r3, #5
.L2067:
add r1, lr, #512
ldmia r1, {r0-r1}
add r2, r2, #32
str r0, [r2, #-32]
str r1, [r2, #-28]
cmp r2, r4
add lr, lr, #32
bne .L2067
ldr r2, .L2079+24
add r3, r2, r3
.L2068:
add r1, ip, #512
ldmia r1, {r0-r1}
add r2, r2, #32
str r0, [r2, #-32]
str r1, [r2, #-28]
cmp r3, r2
add ip, ip, #32
beq .L2066
b .L2068
.L2080:
.align 2
.L2079:
.word nStates
.word _controller
.word _controller_fxp
.word _controller_double
.word .LANCHOR1
.word new_state
.word new_stateFWL
.size verify_error_state_space, .-verify_error_state_space
.align 2
.global fxp_ss_closed_loop_safety
.syntax unified
.arm
.fpu softvfp
.type fxp_ss_closed_loop_safety, %function
fxp_ss_closed_loop_safety:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L2082
add r1, r3, #640
ldmia r1, {r0-r1}
bx lr
.L2083:
.align 2
.L2082:
.word _controller
.size fxp_ss_closed_loop_safety, .-fxp_ss_closed_loop_safety
.section .rodata.str1.4
.align 2
.LC82:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_safety_state_space.h\000"
.align 2
.LC83:
.ascii "output_double <= error_limit\000"
.text
.align 2
.global verify_safety_state_space
.syntax unified
.arm
.fpu softvfp
.type verify_safety_state_space, %function
verify_safety_state_space:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L2088
push {r4, r5, r6, lr}
add r1, r3, #640
ldmia r1, {r0-r1}
bl __aeabi_d2iz
bl __aeabi_i2d
ldr r3, .L2088+4
ldr r4, .L2088+8
ldr r3, [r3, #12]
ldr r5, .L2088+12
add r3, r4, r3, lsl #3
add r3, r3, #296
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldmia r5, {r0-r1}
bl __aeabi_dcmpge
cmp r0, #0
beq .L2087
mov r0, #0
pop {r4, r5, r6, pc}
.L2087:
mov r2, #140
ldr r1, .L2088+16
ldr r0, .L2088+20
add r3, r4, #884
bl __assert_fail
.L2089:
.align 2
.L2088:
.word _controller
.word .LANCHOR1
.word .LANCHOR0
.word error_limit
.word .LC82
.word .LC83
.size verify_safety_state_space, .-verify_safety_state_space
.section .rodata.str1.4
.align 2
.LC84:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_controllability.h\000"
.align 2
.LC85:
.ascii "determinant(controllabilityMatrix_double,nStates) !"
.ascii "= 0\000"
.section .rodata.cst4
.align 2
.LC86:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability
.syntax unified
.arm
.fpu softvfp
.type verify_controllability, %function
verify_controllability:
@ args = 0, pretend = 0, frame = 576
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L2178
sub sp, sp, #588
ldr r4, [r3]
ldr r3, .L2178+4
cmp r4, #0
ldr r3, [r3]
str r3, [sp, #580]
mov r3,#0
ldr r3, .L2178+8
ldr r3, [r3]
str r3, [sp, #32]
ble .L2091
mov r5, r3
mul r5, r4, r5
rsb r3, r5, r5, lsl #30
lsl r3, r3, #2
str r3, [sp, #28]
lsl r3, r5, #2
str r3, [sp, #48]
add r3, sp, #64
mov fp, r3
mov r8, #0
add r2, sp, #448
add r7, r3, r5, lsl #2
add r1, sp, #128
lsl r3, r5, #30
str r3, [sp, #52]
str r5, [sp, #20]
str fp, [sp, #56]
mov r3, r8
mov r5, r1
mov fp, r2
add r6, sp, #192
add r10, sp, #256
str r6, [sp, #44]
str r10, [sp, #36]
str r2, [sp, #40]
add r9, sp, #320
str r2, [sp, #60]
str r4, [sp, #24]
.L2092:
ldr r2, [sp, #20]
cmp r2, #0
ble .L2096
mov r4, fp
mov lr, r9
mov ip, r10
mov r0, r6
mov r1, r5
ldr r2, [sp, #28]
str r5, [sp, #12]
add r2, r7, r2
str r6, [sp, #16]
.L2093:
mov r5, #0
mov r6, #0
str r3, [r2], #4
cmp r2, r7
stm r4!, {r5-r6}
str r3, [r1], #4
str r3, [r0], #4
str r3, [ip], #4
str r3, [lr], #4
bne .L2093
ldr r5, [sp, #12]
ldr r6, [sp, #16]
.L2096:
ldr r2, [sp, #24]
add r8, r8, #1
cmp r8, r2
add r5, r5, #16
add r6, r6, #16
add r10, r10, #16
add r9, r9, #16
add fp, fp, #32
add r7, r7, #16
bne .L2092
ldr r4, [sp, #24]
ldr r2, .L2178+12
add r8, r4, r4, lsl #2
rsb r7, r4, r4, lsl #29
ldr r5, [sp, #20]
ldr fp, [sp, #56]
add r6, r2, r4, lsl #3
add r8, r2, r8, lsl #3
lsl r7, r7, #3
.L2098:
mov r10, fp
add r9, r6, r7
.L2097:
ldmia r9!, {r0-r1}
bl fxp_double_to_fxp
cmp r9, r6
str r0, [r10], #4
bne .L2097
add r6, r9, #32
cmp r6, r8
add fp, fp, #16
bne .L2098
ldr fp, [sp, #32]
ldr r7, .L2178+16
rsb r9, fp, fp, lsl #30
add r3, sp, #128
add r8, r7, r4, lsl #5
lsl r9, r9, #2
add r6, r3, fp, lsl #2
str r4, [sp, #12]
.L2099:
cmp fp, #0
movgt r4, r7
addgt r10, r6, r9
ble .L2103
.L2100:
ldmia r4!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r10], #4
cmp r10, r6
bne .L2100
.L2103:
add r7, r7, #32
cmp r7, r8
add r6, r6, #16
bne .L2099
ldr r3, [sp, #32]
ldr r4, [sp, #12]
cmp r3, #1
ble .L2173
cmp r5, #0
ble .L2104
mov r7, #0
mov r1, r4
mov r6, r7
ldr r9, [sp, #44]
ldr r8, [sp, #36]
.L2110:
mov r3, r7
mov r0, r1
add r2, sp, #64
str r8, [sp]
bl fxp_exp_matrix
ldr r2, .L2178+8
ldr r5, .L2178
mov r4, r2
add r3, sp, #320
ldr r1, [r5]
str r3, [sp, #4]
add r3, sp, #128
str r3, [sp]
mov r0, r1
mov r3, r8
ldr r2, [r2]
bl fxp_matrix_multiplication.part.0
ldr lr, [r4]
add r7, r7, #1
cmp lr, #0
ble .L2105
ldr r1, [r5]
add ip, sp, #320
add r0, r9, r6, lsl #2
add r4, lr, r6
.L2106:
cmp r1, #0
movgt r3, #0
ble .L2109
.L2107:
ldr r2, [ip, r3, lsl #4]
str r2, [r0, r3, lsl #4]
add r3, r3, #1
cmp r3, r1
bne .L2107
.L2109:
add r6, r6, #1
cmp r6, r4
add ip, ip, #4
add r0, r0, #4
bne .L2106
mul lr, r1, lr
cmp lr, r6
bgt .L2110
.L2176:
cmp r1, #0
mov r5, lr
mov r4, r1
ble .L2118
lsl r3, lr, #2
str r3, [sp, #48]
lsl r3, lr, #30
str r3, [sp, #52]
.L2104:
mov ip, #0
ldr r3, [sp, #36]
mov r1, ip
mov r0, r3
ldr r2, [sp, #52]
sub lr, r2, r5
ldr r2, [sp, #48]
lsl lr, lr, #2
add r2, r3, r2
.L2113:
cmp r5, #0
addgt r3, r2, lr
ble .L2116
.L2112:
str r1, [r3], #4
cmp r2, r3
bne .L2112
.L2116:
add ip, ip, #1
cmp ip, r4
add r2, r2, #16
bne .L2113
mov ip, #0
.L2114:
cmp r5, #0
addgt r2, sp, #188
movgt r3, #0
addgt r2, r2, ip, lsl #4
ble .L2120
.L2117:
ldr r1, [r2, #4]!
str r1, [r0, r3, lsl #4]
add r3, r3, #1
cmp r3, r5
bne .L2117
.L2120:
add ip, ip, #1
cmp ip, r4
add r0, r0, #4
bne .L2114
.L2118:
ldr r3, [sp, #36]
add r8, sp, #384
str r3, [sp]
mov r1, r5
ldr r3, [sp, #44]
mov r2, r4
mov r0, r4
str r8, [sp, #4]
bl fxp_matrix_multiplication.part.0
ldr r3, .L2178
ldr fp, [r3]
cmp fp, #0
ble .L2126
ldr r2, .L2178+20
add r10, fp, fp, lsl #2
ldr r1, [r2, #12]
rsb r2, fp, fp, lsl #30
lsl r2, r2, #2
add r10, r8, r10, lsl #2
str fp, [sp, #12]
add r8, r8, fp, lsl #2
mov fp, r2
ldr r3, .L2178+24
ldr r9, [sp, #40]
add r3, r3, r1, lsl #3
add r7, r3, #296
ldmia r7, {r6-r7}
.L2125:
mov r5, r9
add r4, r8, fp
.L2124:
ldr r0, [r4], #4
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r8, r4
stm r5!, {r0-r1}
bne .L2124
add r8, r8, #16
cmp r8, r10
add r9, r9, #32
bne .L2125
ldr fp, [sp, #12]
.L2126:
mov r1, fp
ldr r0, [sp, #40]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
bne .L2174
.L2127:
ldr r3, .L2178+4
ldr r2, [r3]
ldr r3, [sp, #580]
eors r2, r3, r2
mov r3, #0
bne .L2175
mov r0, #0
add sp, sp, #588
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2105:
ldr r3, .L2178
ldr r1, [r3]
mul lr, r1, lr
cmp lr, r6
bgt .L2110
b .L2176
.L2173:
mov r6, #0
mov r1, r4
ldr r4, [sp, #36]
add r5, sp, #176
.L2130:
mov r0, r1
mov r3, r6
ldr r7, .L2178
add r2, sp, #64
str r4, [sp]
bl fxp_exp_matrix
add r3, sp, #320
ldr r1, [r7]
ldr r2, .L2178+8
str r3, [sp, #4]
add r3, sp, #128
str r3, [sp]
mov r0, r1
mov r3, r4
ldr r2, [r2]
bl fxp_matrix_multiplication.part.0
ldr r1, [r7]
cmp r1, #0
ble .L2177
mov r3, #1
.L2131:
add r2, sp, #320
add r2, r2, r3, lsl #4
ldr r2, [r2, #-16]
cmp r3, r1
str r2, [r5, r3, lsl #4]
add r3, r3, #1
bne .L2131
add r6, r6, #1
cmp r6, r1
add r5, r5, #4
blt .L2130
cmp r1, #0
mov r4, r1
ble .L2133
ldr r2, .L2178+20
ldr r3, .L2178+24
ldr r2, [r2, #12]
add r10, r1, r1, lsl #2
add r3, r3, r2, lsl #3
ldr r2, [sp, #44]
rsb fp, r1, r1, lsl #30
add r10, r2, r10, lsl #2
lsl fp, fp, #2
mov r4, fp
add r7, r3, #296
ldmia r7, {r6-r7}
mov fp, r10
ldr r10, [sp, #60]
add r9, r2, r1, lsl #2
str r1, [sp, #12]
.L2135:
mov r8, r10
add r5, r9, r4
.L2134:
ldr r0, [r5], #4
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r5, r9
stm r8!, {r0-r1}
bne .L2134
add r9, r9, #16
cmp r9, fp
add r10, r10, #32
bne .L2135
ldr r4, [sp, #12]
b .L2133
.L2177:
mov r4, r1
.L2133:
mov r1, r4
ldr r0, [sp, #40]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L2127
mov r2, #113
ldr r3, .L2178+28
ldr r1, .L2178+32
ldr r0, .L2178+36
bl __assert_fail
.L2091:
ldr r3, [sp, #32]
cmp r3, #1
addle r3, sp, #448
strle r3, [sp, #40]
ble .L2133
add r3, sp, #192
ldr r5, [sp, #32]
str r3, [sp, #44]
add r3, sp, #256
str r3, [sp, #36]
add r3, sp, #448
mul r5, r4, r5
str r3, [sp, #40]
b .L2118
.L2174:
mov r2, #91
ldr r3, .L2178+28
ldr r1, .L2178+32
ldr r0, .L2178+36
bl __assert_fail
.L2175:
bl __stack_chk_fail
.L2179:
.align 2
.L2178:
.word nStates
.word .LC86
.word nInputs
.word _controller
.word _controller+128
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR0+912
.word .LC84
.word .LC85
.size verify_controllability, .-verify_controllability
.section .rodata.str1.4
.align 2
.LC87:
.ascii "determinant(mimo_controllabilityMatrix_double,nStat"
.ascii "es) != 0\000"
.align 2
.LC88:
.ascii "determinant(controllabilityMatrix,nStates) != 0\000"
.section .rodata.cst4
.align 2
.LC89:
.word __stack_chk_guard
.text
.align 2
.global verify_controllability_double
.syntax unified
.arm
.fpu softvfp
.type verify_controllability_double, %function
verify_controllability_double:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L2233
ldr r5, .L2233+4
ldr lr, [r3]
ldr r3, .L2233+8
sub sp, sp, #548
cmp lr, #1
ldr r3, [r3]
str r3, [sp, #540]
mov r3,#0
ldr ip, [r5]
ble .L2230
mul lr, ip, lr
cmp lr, #0
addle r3, sp, #24
addle r7, sp, #152
strle r3, [sp, #16]
ble .L2184
mov r6, #0
mov r1, ip
mov r4, r6
ldr r3, .L2233+12
add r7, sp, #152
str r3, [sp, #20]
add r3, sp, #24
add r8, sp, #280
str r3, [sp, #16]
.L2191:
mov r3, r6
mov r0, r1
ldr r2, .L2233+16
str r7, [sp]
bl double_exp_matrix
ldr r2, .L2233
ldr r3, [sp, #20]
mov r9, r2
ldr r1, [r5]
str r3, [sp]
str r8, [sp, #4]
mov r0, r1
mov r3, r7
ldr r2, [r2]
bl double_matrix_multiplication.part.0
ldr r10, [r9]
ldr r1, [r5]
cmp r10, #0
add r6, r6, #1
ble .L2188
mov lr, #0
ldr r3, [sp, #16]
rsb ip, r1, r1, lsl #27
add fp, r3, r4, lsl #3
lsl ip, ip, #5
add r0, r8, r1, lsl #5
.L2186:
cmp r1, #0
addgt r3, r0, ip
addgt r2, fp, lr, lsl #3
strgt r8, [sp, #12]
ble .L2190
.L2187:
ldmia r3, {r8-r9}
add r3, r3, #32
cmp r3, r0
stm r2, {r8-r9}
add r2, r2, #32
bne .L2187
ldr r8, [sp, #12]
.L2190:
add lr, lr, #1
cmp lr, r10
add r0, r0, #8
bne .L2186
add r4, r10, r4
.L2188:
mul lr, r1, r10
cmp lr, r4
bgt .L2191
mov ip, r1
.L2184:
cmp ip, #0
ble .L2193
mov r4, r7
mov r9, #0
mov r2, #0
mov r3, #0
rsb r6, lr, lr, lsl #29
lsl r6, r6, #3
lsl r8, lr, #3
add r0, r7, lr, lsl #3
.L2195:
cmp lr, #0
addgt r1, r0, r6
ble .L2198
.L2194:
stm r1!, {r2-r3}
cmp r1, r0
bne .L2194
.L2198:
add r9, r9, #1
cmp r9, ip
add r0, r0, #32
bne .L2195
mov r9, #0
ldr r3, [sp, #16]
add r8, r3, r8
.L2196:
cmp lr, #0
movgt r2, r4
addgt r3, r8, r6
ble .L2201
.L2199:
ldmia r3!, {r0-r1}
cmp r8, r3
stm r2, {r0-r1}
add r2, r2, #32
bne .L2199
.L2201:
add r9, r9, #1
cmp r9, ip
add r4, r4, #8
add r8, r8, #32
bne .L2196
.L2193:
add r4, sp, #408
mov r1, lr
mov r2, ip
mov r0, ip
ldr r3, [sp, #16]
str r7, [sp]
str r4, [sp, #4]
bl double_matrix_multiplication.part.0
mov r0, r4
ldr r1, [r5]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
bne .L2231
.L2203:
ldr r3, .L2233+8
ldr r2, [r3]
ldr r3, [sp, #540]
eors r2, r3, r2
mov r3, #0
bne .L2232
mov r0, #0
add sp, sp, #548
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2230:
add r3, sp, #24
cmp ip, #0
str r3, [sp, #16]
ble .L2183
mov r6, r3
mov r4, #0
mov r1, ip
ldr fp, .L2233+12
add r7, sp, #152
sub r10, fp, #128
add r8, sp, #280
.L2206:
mov r0, r1
mov r3, r4
mov r2, r10
str r7, [sp]
bl double_exp_matrix
ldr r1, [r5]
ldr r2, .L2233
str r8, [sp, #4]
str fp, [sp]
mov r0, r1
mov r3, r7
ldr r2, [r2]
bl double_matrix_multiplication.part.0
ldr r1, [r5]
cmp r1, #0
ble .L2229
mov r0, r8
mov ip, r6
add lr, r8, r1, lsl #5
.L2207:
ldmia r0, {r2-r3}
add r0, r0, #32
cmp r0, lr
stm ip, {r2-r3}
add ip, ip, #32
bne .L2207
add r4, r4, #1
cmp r4, r1
add r6, r6, #8
blt .L2206
.L2229:
mov ip, r1
.L2183:
mov r1, ip
ldr r0, [sp, #16]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L2203
mov r2, #163
ldr r3, .L2233+20
ldr r1, .L2233+24
ldr r0, .L2233+28
bl __assert_fail
.L2232:
bl __stack_chk_fail
.L2231:
mov r2, #154
ldr r3, .L2233+20
ldr r1, .L2233+24
ldr r0, .L2233+32
bl __assert_fail
.L2234:
.align 2
.L2233:
.word nInputs
.word nStates
.word .LC89
.word _controller+128
.word _controller
.word .LANCHOR0+936
.word .LC84
.word .LC88
.word .LC87
.size verify_controllability_double, .-verify_controllability_double
.section .rodata.str1.4
.align 2
.LC90:
.ascii "/home/yashchopda/Desktop/dsverifier-v2.0.3-esbmc-v4"
.ascii ".0-cbmc-5.6/bmc/engine/verify_observability.h\000"
.align 2
.LC91:
.ascii "determinant(observabilityMatrix_double,nStates) != "
.ascii "0\000"
.section .rodata.cst4
.align 2
.LC92:
.word __stack_chk_guard
.text
.align 2
.global verify_observability
.syntax unified
.arm
.fpu softvfp
.type verify_observability, %function
verify_observability:
@ args = 0, pretend = 0, frame = 536
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r6, .L2319
ldr r3, .L2319+4
ldr r4, [r6]
sub sp, sp, #548
cmp r4, #0
ldr r3, [r3]
str r3, [sp, #540]
mov r3,#0
ble .L2243
add r5, sp, #24
rsb r2, r4, r4, lsl #30
add r1, sp, #152
add r0, r5, r4, lsl #4
lsl r2, r2, #2
add r7, r1, r4, lsl #2
mov r8, r5
lsl r1, r4, #2
str r4, [sp, #12]
str r5, [sp, #20]
mov r3, #0
mov r4, r0
mov r5, r2
add fp, sp, #88
add r10, sp, #216
add r9, sp, #280
str r1, [sp, #16]
.L2240:
mov lr, r9
mov ip, r10
mov r0, fp
mov r1, r8
add r2, r7, r5
.L2239:
str r3, [r2], #4
cmp r2, r7
str r3, [r1], #4
str r3, [r0], #4
str r3, [ip], #4
str r3, [lr], #4
bne .L2239
add r8, r8, #16
cmp r8, r4
add fp, fp, #16
add r10, r10, #16
add r9, r9, #16
add r7, r2, #16
bne .L2240
ldr r4, [sp, #12]
ldr r3, [sp, #16]
ldr r9, .L2319+8
add fp, r3, r4
rsb r10, r4, r4, lsl #29
ldr r5, [sp, #20]
add fp, r9, fp, lsl #3
lsl r10, r10, #3
add r9, r9, r4, lsl #3
.L2242:
mov r8, r5
add r7, r9, r10
.L2241:
ldmia r7!, {r0-r1}
bl fxp_double_to_fxp
cmp r7, r9
str r0, [r8], #4
bne .L2241
add r9, r9, #32
cmp r9, fp
add r5, r5, #16
bne .L2242
.L2243:
ldr r3, .L2319+12
ldr r3, [r3]
cmp r3, #0
ble .L2237
rsb r10, r4, r4, lsl #30
lsl r2, r10, #2
mov r5, #0
mov r10, r3
add r9, sp, #88
ldr r8, .L2319+16
add r7, r9, r4, lsl #2
str r2, [sp, #12]
str r9, [sp, #16]
.L2238:
cmp r4, #0
ble .L2247
mov fp, r8
ldr r3, [sp, #12]
add r9, r7, r3
.L2244:
ldmia fp!, {r0-r1}
bl fxp_double_to_fxp
str r0, [r9], #4
cmp r9, r7
bne .L2244
.L2247:
add r5, r5, #1
cmp r5, r10
add r8, r8, #32
add r7, r7, #16
bne .L2238
cmp r5, #1
ldr r9, [sp, #16]
ble .L2237
cmp r4, #0
ble .L2251
mov r5, #0
str r9, [sp, #16]
mov r1, r4
mov r9, r5
add r3, sp, #24
str r3, [sp, #12]
add r3, sp, #152
add r7, sp, #216
add r8, sp, #280
str r3, [sp, #20]
.L2258:
mov r3, r5
mov r0, r1
ldr r2, [sp, #12]
str r7, [sp]
bl fxp_exp_matrix
ldr r0, .L2319+12
ldr r2, [r6]
mov r4, r0
stm sp, {r7, r8}
mov r1, r2
ldr r3, [sp, #16]
ldr r0, [r0]
bl fxp_matrix_multiplication.part.0
ldr lr, [r4]
ldr r1, [r6]
cmp lr, #0
add r5, r5, #1
ble .L2255
mov r10, #0
ldr r3, [sp, #20]
rsb r4, r1, r1, lsl #30
add fp, r3, r9, lsl #4
lsl r4, r4, #2
add ip, r8, r1, lsl #2
.L2253:
cmp r1, #0
addgt r3, ip, r4
addgt r2, fp, r10, lsl #4
ble .L2257
.L2254:
ldr r0, [r3], #4
cmp r3, ip
str r0, [r2], #4
bne .L2254
.L2257:
add r10, r10, #1
cmp lr, r10
add ip, ip, #16
bne .L2253
add r9, lr, r9
.L2255:
cmp r1, r5
bgt .L2258
mov r4, r1
cmp r1, #0
mul r1, lr, r4
ble .L2259
mov ip, #0
mov r0, ip
rsb lr, r1, r1, lsl #30
lsl lr, lr, #2
add r2, r7, r1, lsl #2
.L2260:
cmp r1, #0
addgt r3, r2, lr
ble .L2263
.L2261:
str r0, [r3], #4
cmp r2, r3
bne .L2261
.L2263:
add ip, ip, #1
cmp r4, ip
add r2, r2, #16
bne .L2260
.L2259:
cmp r1, #0
ble .L2264
mov ip, r7
mov lr, #0
.L2265:
cmp r4, #0
addgt r2, sp, #148
movgt r3, #0
addgt r2, r2, lr, lsl #4
ble .L2268
.L2266:
ldr r0, [r2, #4]!
str r0, [ip, r3, lsl #4]
add r3, r3, #1
cmp r4, r3
bne .L2266
.L2268:
add lr, lr, #1
cmp lr, r1
add ip, ip, #4
bne .L2265
.L2264:
ldr r3, [sp, #20]
add r8, sp, #344
str r3, [sp]
mov r2, r4
mov r3, r7
mov r0, r4
str r8, [sp, #4]
bl fxp_matrix_multiplication.part.0
ldr fp, [r6]
add r3, sp, #408
cmp fp, #0
str r3, [sp, #12]
ble .L2274
ldr r2, .L2319+20
add r10, fp, fp, lsl #2
ldr r1, [r2, #12]
rsb r2, fp, fp, lsl #30
lsl r2, r2, #2
add r10, r8, r10, lsl #2
str fp, [sp, #16]
add r8, r8, fp, lsl #2
mov fp, r2
mov r9, r3
ldr r3, .L2319+24
add r3, r3, r1, lsl #3
add r7, r3, #296
ldmia r7, {r6-r7}
.L2273:
mov r5, r9
add r4, r8, fp
.L2272:
ldr r0, [r4], #4
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r8, r4
stm r5!, {r0-r1}
bne .L2272
add r8, r8, #16
cmp r8, r10
add r9, r9, #32
bne .L2273
ldr fp, [sp, #16]
.L2274:
mov r1, fp
ldr r0, [sp, #12]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
bne .L2316
.L2275:
ldr r3, .L2319+4
ldr r2, [r3]
ldr r3, [sp, #540]
eors r2, r3, r2
mov r3, #0
bne .L2317
mov r0, #0
add sp, sp, #548
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2237:
cmp r4, #0
ble .L2315
mov r5, #0
mov r1, r4
add r10, sp, #152
add r9, sp, #88
add fp, sp, #24
add r7, sp, #216
add r8, sp, #280
.L2278:
mov r0, r1
mov r3, r5
mov r2, fp
str r7, [sp]
bl fxp_exp_matrix
ldr r2, [r6]
stm sp, {r7, r8}
ldr r0, .L2319+12
mov r1, r2
mov r3, r9
ldr r0, [r0]
bl fxp_matrix_multiplication.part.0
ldr r1, [r6]
cmp r1, #0
ble .L2318
mov r3, r8
mov r2, r10
lsl lr, r1, #2
add ip, r8, r1, lsl #2
.L2279:
ldr r0, [r3], #4
cmp r3, ip
str r0, [r2], #4
bne .L2279
add r5, r5, #1
cmp r5, r1
add r10, r10, #16
blt .L2278
add r3, sp, #408
cmp r1, #0
mov r4, r1
str lr, [sp, #16]
str r3, [sp, #12]
ble .L2250
ldr r2, .L2319+20
ldr r0, [sp, #16]
ldr r1, [r2, #12]
rsb r2, r4, r4, lsl #30
lsl r2, r2, #2
add fp, r0, r4
str r4, [sp, #16]
mov r4, r2
mov r10, r3
ldr r3, .L2319+24
add r3, r3, r1, lsl #3
add r1, sp, #152
add fp, r1, fp, lsl #2
add r9, r1, r0
add r7, r3, #296
ldmia r7, {r6-r7}
.L2282:
mov r8, r10
add r5, r9, r4
.L2281:
ldr r0, [r5], #4
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r5, r9
stm r8!, {r0-r1}
bne .L2281
add r9, r9, #16
cmp r9, fp
add r10, r10, #32
bne .L2282
ldr r4, [sp, #16]
b .L2250
.L2318:
mov r4, r1
.L2315:
add r3, sp, #408
str r3, [sp, #12]
.L2250:
mov r1, r4
ldr r0, [sp, #12]
bl determinant
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L2275
mov r2, #134
ldr r3, .L2319+28
ldr r1, .L2319+32
ldr r0, .L2319+36
bl __assert_fail
.L2251:
add r3, sp, #152
mul r1, r5, r4
add r7, sp, #216
str r3, [sp, #20]
b .L2264
.L2317:
bl __stack_chk_fail
.L2316:
mov r2, #119
ldr r3, .L2319+28
ldr r1, .L2319+32
ldr r0, .L2319+36
bl __assert_fail
.L2320:
.align 2
.L2319:
.word nStates
.word .LC92
.word _controller
.word nOutputs
.word _controller+256
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR0+968
.word .LC90
.word .LC91
.size verify_observability, .-verify_observability
.section .rodata.cst4
.align 2
.LC93:
.word __stack_chk_guard
.text
.align 2
.global resp_mag
.syntax unified
.arm
.fpu softvfp
.type resp_mag, %function
resp_mag:
@ args = 8, pretend = 0, frame = 88
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #92
ldr ip, [fp, #8]
mov r6, #0
lsl ip, ip, #3
add ip, ip, #8
sub sp, sp, ip
mov r5, sp
sub sp, sp, ip
mov r4, sp
sub sp, sp, ip
mov lr, sp
mov r7, #0
sub sp, sp, ip
ldr ip, .L2338
str r1, [fp, #-112]
str r3, [fp, #-120]
str r0, [fp, #-100]
str r2, [fp, #-116]
ldr ip, [ip]
str ip, [fp, #-40]
mov ip,#0
ldr ip, [fp, #4]
add r1, r0, r1, lsl #3
add r3, r2, r3, lsl #3
str r5, [fp, #-84]
str r4, [fp, #-80]
str lr, [fp, #-60]
str sp, [fp, #-56]
str ip, [fp, #-96]
str r1, [fp, #-92]
str r3, [fp, #-88]
.L2327:
ldr r3, [fp, #-112]
mov r4, #0
cmp r3, #1
mov r3, #0
ldr r2, [fp, #-80]
ldr r1, [fp, #-100]
stm r2!, {r3-r4}
ldmia r1, {r3-r4}
str r2, [fp, #-80]
ldr r2, [fp, #-84]
str r3, [fp, #-68]
str r4, [fp, #-64]
stm r2!, {r3-r4}
str r2, [fp, #-84]
ble .L2329
add r10, r1, #8
str r10, [fp, #-52]
.L2323:
mov r2, #6
mov r0, r6
mov r1, r7
bl cosTyl
sub r9, fp, #68
ldmia r9, {r8-r9}
mov r3, r9
mov r2, r8
bl __aeabi_dmul
mov r4, r0
mov r5, r1
mov r2, #6
mov r0, r6
mov r1, r7
str r4, [fp, #-68]
str r5, [fp, #-64]
bl sinTyl
ldr r10, [fp, #-80]
ldr ip, [fp, #-52]
ldmdb r10, {r3-r4}
mov r2, r3
str r3, [fp, #-76]
str r4, [fp, #-72]
mov r3, r4
ldmia ip!, {r4-r5}
str ip, [fp, #-52]
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #68
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r2, r4
mov r3, r5
bl __aeabi_dadd
mov r4, r8
mov r5, r9
mov r8, r0
mov r9, r1
ldr r3, [fp, #-84]
mov r2, #6
stmdb r3, {r8-r9}
mov r0, r6
mov r1, r7
str r8, [fp, #-68]
str r9, [fp, #-64]
bl sinTyl
mov r3, r5
mov r2, r4
bl __aeabi_dmul
mov r2, #6
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl cosTyl
mov r2, r0
mov r3, r1
sub r1, fp, #76
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dadd
ldr r3, [fp, #-92]
ldr r2, [fp, #-52]
stmdb r10, {r0-r1}
cmp r2, r3
bne .L2323
str r0, [fp, #-108]
str r1, [fp, #-104]
.L2322:
ldr r3, [fp, #-120]
mov r4, #0
cmp r3, #1
mov r3, #0
ldr r2, [fp, #-56]
ldr r1, [fp, #-116]
stm r2!, {r3-r4}
ldmia r1, {r8-r9}
ldr r3, [fp, #-60]
str r2, [fp, #-56]
stm r3!, {r8-r9}
str r3, [fp, #-60]
ble .L2330
add r10, r1, #8
.L2325:
mov r2, #6
mov r0, r6
mov r1, r7
bl cosTyl
mov r3, r9
mov r2, r8
bl __aeabi_dmul
mov r4, r0
mov r5, r1
mov r2, #6
mov r0, r6
mov r1, r7
str r4, [fp, #-76]
str r5, [fp, #-72]
bl sinTyl
ldmia r10!, {r4-r5}
ldr r3, [fp, #-56]
ldmdb r3, {r2-r3}
str r2, [fp, #-52]
str r3, [fp, #-48]
bl __aeabi_dmul
mov r2, r0
mov r3, r1
sub r1, fp, #76
ldmia r1, {r0-r1}
bl __aeabi_dsub
mov r3, r5
mov r2, r4
bl __aeabi_dadd
mov r4, r8
mov r5, r9
mov r8, r0
mov r9, r1
ldr lr, [fp, #-60]
mov r2, #6
stmdb lr, {r8-r9}
mov r0, r6
mov r1, r7
bl sinTyl
mov r3, r5
mov r2, r4
bl __aeabi_dmul
mov r2, #6
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl cosTyl
mov r2, r0
mov r3, r1
sub r1, fp, #52
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr lr, [fp, #-88]
ldr ip, [fp, #-56]
cmp lr, r10
stmdb ip, {r2-r3}
bne .L2325
bl __aeabi_dmul
str r0, [fp, #-52]
str r1, [fp, #-48]
.L2324:
sub r3, fp, #68
ldmia r3, {r2-r3}
mov r0, r2
mov r1, r3
bl __aeabi_dmul
sub r3, fp, #108
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r2
mov r1, r3
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
bl __aeabi_d2f
bl sqrt3
bl __aeabi_f2d
ldr r5, [fp, #-96]
mov r2, r8
stm r5, {r0-r1}
mov r3, r9
mov r0, r8
mov r1, r9
bl __aeabi_dmul
sub r3, fp, #52
ldmia r3, {r2-r3}
bl __aeabi_dadd
bl __aeabi_d2f
bl sqrt3
mov r1, #0
mov r4, r0
bl __aeabi_fcmpeq
clz r0, r0
lsr r0, r0, #5
bl __ESBMC_assume
mov r0, r4
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldmia r5!, {r0-r1}
str r5, [fp, #-96]
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
ldr r0, [fp, #8]
stmdb r5, {r2-r3}
bl __aeabi_i2d
mov r2, r0
mov r3, r1
ldr r0, .L2338+4
ldr r1, .L2338+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dadd
ldr r2, .L2338+4
ldr r3, .L2338+8
mov r6, r0
mov r7, r1
bl __aeabi_dcmple
cmp r0, #0
bne .L2327
ldr r3, .L2338
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L2337
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2330:
mov r3, #0
mov r4, #0
str r3, [fp, #-52]
str r4, [fp, #-48]
b .L2324
.L2329:
mov r3, #0
mov r4, #0
str r3, [fp, #-108]
str r4, [fp, #-104]
b .L2322
.L2337:
bl __stack_chk_fail
.L2339:
.align 2
.L2338:
.word .LC93
.word 1413754136
.word 1074340347
.size resp_mag, .-resp_mag
.section .rodata.str1.4
.align 2
.LC94:
.ascii "|----------------Passband Failure-------------|\000"
.align 2
.LC95:
.ascii "|-------------Cutoff Frequency Failure--------|\000"
.align 2
.LC96:
.ascii "|----------------Stopband Failure-------------|\000"
.section .rodata.cst4
.align 2
.LC97:
.word __stack_chk_guard
.text
.align 2
.global verify_magnitude
.syntax unified
.arm
.fpu softvfp
.type verify_magnitude, %function
verify_magnitude:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #36
ldr r9, .L2391
sub sp, sp, #808
ldr r2, [r9, #872]
add r3, sp, #8
str r3, [fp, #-48]
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r6, sp, #8
ldr r3, .L2391+4
mov r1, r6
add r0, r9, #72
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
bl fxp_double_to_fxp_array
mov r2, sp
ldr r3, [r9, #872]
sub r2, r2, r3, lsl #3
cmp r3, #0
mov sp, r2
ble .L2341
ldr r2, .L2391+8
ldr r1, [r9, #12]
add r3, r6, r3, lsl #2
add r2, r2, r1, lsl #3
add r7, sp, #8
sub r8, r3, #4
sub r6, r6, #4
add r5, r2, #296
ldmia r5, {r4-r5}
.L2342:
ldr r0, [r6, #4]!
bl __aeabi_i2d
mov r2, r4
mov r3, r5
bl __aeabi_dmul
cmp r6, r8
stm r7!, {r0-r1}
bne .L2342
.L2341:
ldr r2, [r9, #1680]
ldr r0, .L2391+12
lsl r3, r2, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
add r4, sp, #8
mov r1, r4
bl fxp_double_to_fxp_array
mov r3, sp
ldr r10, [r9, #1680]
sub r3, r3, r10, lsl #3
mov sp, r3
cmp r10, #0
add r5, sp, #8
ble .L2343
ldr r3, .L2391+8
ldr r2, [r9, #12]
add r8, r4, r10, lsl #2
add r3, r3, r2, lsl #3
sub r8, r8, #4
sub r4, r4, #4
add r7, r3, #296
ldmia r7, {r6-r7}
.L2344:
ldr r0, [r4, #4]!
bl __aeabi_i2d
mov r2, r6
mov r3, r7
bl __aeabi_dmul
cmp r4, r8
stm r5!, {r0-r1}
bne .L2344
.L2343:
mov r0, #100
ldr r3, [fp, #-48]
ldr r2, .L2391+16
str r3, [sp]
ldr r4, .L2391+20
ldr r3, [r9, #872]
mov r1, r10
str r0, [sp, #4]
add r0, r2, #808
bl resp_mag
ldr r3, [r4, #24]
cmp r3, #1
beq .L2385
cmp r3, #2
bne .L2356
ldr r5, [fp, #-48]
mov r8, #0
add r3, r5, #800
mov r9, #0
ldr r10, .L2391+24
str r3, [fp, #-48]
b .L2364
.L2378:
ldr r0, [r4, #16] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmpeq
cmp r0, #0
bne .L2386
ldr r0, [r4, #12] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
bne .L2387
.L2359:
mov r0, r8
mov r1, r9
ldr r3, .L2391+28
ldr r2, .L2391+32
bl __aeabi_dadd
ldr r3, [fp, #-48]
add r5, r5, #8
cmp r3, r5
mov r8, r0
mov r9, r1
beq .L2355
.L2364:
ldr r0, [r4, #20] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmpge
cmp r0, #0
beq .L2378
ldmia r5, {r6-r7}
ldr r0, [r4, #4] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
ldr r1, .L2391+36
.L2384:
mov r0, r10
str r2, [fp, #-60]
str r3, [fp, #-56]
bl printf
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
cmp r0, #0
bne .L2359
.L2351:
bl __DSVERIFIER_assert_msg.part.0
.L2386:
ldr r0, [r4, #8] @ float
bl __aeabi_f2d
ldmia r5, {r6-r7}
mov r3, r1
mov r2, r0
ldr r1, .L2391+40
b .L2384
.L2387:
ldr r0, [r4] @ float
bl __aeabi_f2d
ldmia r5, {r6-r7}
mov r2, r0
mov r3, r1
mov r0, r10
ldr r1, .L2391+44
str r2, [fp, #-60]
str r3, [fp, #-56]
bl printf
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
bne .L2359
b .L2351
.L2355:
ldr r3, .L2391+4
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L2388
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L2385:
ldr r5, [fp, #-48]
mov r8, #0
add r3, r5, #800
mov r9, #0
ldr r10, .L2391+24
str r3, [fp, #-48]
b .L2354
.L2376:
ldr r0, [r4, #16] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmpeq
cmp r0, #0
bne .L2389
ldr r0, [r4, #20] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmple
cmp r0, #0
bne .L2390
.L2348:
mov r0, r8
mov r1, r9
ldr r3, .L2391+28
ldr r2, .L2391+32
bl __aeabi_dadd
ldr r3, [fp, #-48]
add r5, r5, #8
cmp r3, r5
mov r8, r0
mov r9, r1
beq .L2355
.L2354:
ldr r0, [r4, #12] @ float
bl __aeabi_f2d
mov r2, r8
mov r3, r9
bl __aeabi_dcmpge
cmp r0, #0
beq .L2376
ldmia r5, {r6-r7}
ldr r0, [r4] @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, r10
ldr r1, .L2391+44
str r2, [fp, #-60]
str r3, [fp, #-56]
bl printf
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
bne .L2348
b .L2351
.L2389:
ldr r0, [r4, #8] @ float
bl __aeabi_f2d
ldmia r5, {r6-r7}
mov r2, r0
mov r3, r1
ldr r1, .L2391+40
.L2382:
mov r0, r10
str r2, [fp, #-60]
str r3, [fp, #-56]
bl printf
sub r3, fp, #60
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
cmp r0, #0
bne .L2348
b .L2351
.L2390:
ldr r0, [r4, #4] @ float
bl __aeabi_f2d
ldmia r5, {r6-r7}
mov r3, r1
mov r2, r0
ldr r1, .L2391+36
b .L2382
.L2356:
bl __DSVERIFIER_assert.part.0
.L2388:
bl __stack_chk_fail
.L2392:
.align 2
.L2391:
.word .LANCHOR1
.word .LC97
.word .LANCHOR0
.word .LANCHOR1+880
.word .LANCHOR1+72
.word filter
.word .LC5
.word 1065646817
.word 1202590843
.word .LC96
.word .LC95
.word .LC94
.size verify_magnitude, .-verify_magnitude
.align 2
.global validation
.syntax unified
.arm
.fpu softvfp
.type validation, %function
validation:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L2401
ldr r2, [r3, #872]
cmp r2, #0
beq .L2394
ldr r3, [r3, #1680]
cmp r3, #0
beq .L2394
mov r2, #5
ldr r3, .L2401+4
str r2, [r3, #8]
bx lr
.L2394:
push {r4, lr}
bl validation.part.0
.L2402:
.align 2
.L2401:
.word .LANCHOR1
.word .LANCHOR2
.size validation, .-validation
.align 2
.global call_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_verification_task, %function
call_verification_task:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
ldr r2, .L2444
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, [r2, #1680]
sub sp, sp, #20
cmp r3, #0
mov r3, #0
str r0, [sp, #12]
str r3, [sp, #8]
ble .L2404
mov r8, #0
mov r9, #0
mov r4, r3
add r5, r2, #2496
.L2414:
ldmia r5!, {r6-r7}
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
beq .L2405
ldr r2, [r5, #-1624]
ldr r3, [r5, #-1620]
mov r0, r6
mov r1, r7
stm sp, {r2-r3}
bl __aeabi_dmul
mov r2, #0
ldr r3, .L2444+4
bl __aeabi_ddiv
mov r2, r8
mov r3, r9
mov fp, r1
mov r10, r0
bl __aeabi_dcmplt
cmp r0, #0
addne fp, fp, #-2147483648
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpeq
subs r0, r0, #0
movne r0, #1
ldr r1, [sp, #8]
ands r2, r0, r1
eor r3, r1, #1
strne r2, [sp, #8]
bne .L2405
ands r0, r0, r3
movne r1, r0
str r1, [sp, #8]
bl nondet_double
mov r6, r0
mov r7, r1
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
str r6, [r5, #-1624]
str r7, [r5, #-1620]
bl __aeabi_dsub
mov r3, r1
mov r2, r0
mov r1, r7
mov r0, r6
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
moveq r0, r3
beq .L2411
ldmia sp, {r2-r3}
mov r0, r10
mov r1, fp
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L2411:
bl __ESBMC_assume
.L2405:
ldr r3, .L2444
add r4, r4, #1
ldr r3, [r3, #1680]
cmp r3, r4
bgt .L2414
.L2404:
ldr r3, .L2444
ldr r3, [r3, #872]
cmp r3, #0
ble .L2415
mov r4, #0
mov r8, #0
mov r9, #0
ldr r5, .L2444+8
.L2425:
ldmia r5!, {r6-r7}
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
beq .L2416
sub r3, r5, #1632
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
stm sp, {r2-r3}
bl __aeabi_dmul
mov r2, #0
ldr r3, .L2444+4
bl __aeabi_ddiv
mov r2, r8
mov r3, r9
mov fp, r1
mov r10, r0
bl __aeabi_dcmplt
cmp r0, #0
addne fp, fp, #-2147483648
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpeq
subs r0, r0, #0
movne r0, #1
ldr r1, [sp, #8]
ands r2, r0, r1
eor r3, r1, #1
strne r2, [sp, #8]
bne .L2416
ands r0, r0, r3
movne r1, r0
str r1, [sp, #8]
bl nondet_double
mov r6, r0
mov r7, r1
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
str r6, [r5, #-1632]
str r7, [r5, #-1628]
bl __aeabi_dsub
mov r3, r1
mov r2, r0
mov r1, r7
mov r0, r6
bl __aeabi_dcmpge
mov r3, r0
cmp r3, #0
moveq r0, r3
beq .L2422
ldmia sp, {r2-r3}
mov r0, r10
mov r1, fp
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L2422:
bl __ESBMC_assume
.L2416:
ldr r3, .L2444
add r4, r4, #1
ldr r3, [r3, #872]
cmp r3, r4
bgt .L2425
.L2415:
ldr r3, [sp, #12]
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
bx r3 @ indirect register sibling call
.L2445:
.align 2
.L2444:
.word .LANCHOR1
.word 1079574528
.word .LANCHOR1+1696
.size call_verification_task, .-call_verification_task
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl initialization
ldr r3, .L2453
ldr r2, [r3, #872]
cmp r2, #0
beq .L2447
ldr r3, [r3, #1680]
cmp r3, #0
beq .L2447
mov r1, #5
mov r2, #1
ldr r3, .L2453+4
ldr r0, .L2453+8
str r1, [r3, #8]
str r2, [r3]
bl call_verification_task
mov r0, #0
pop {r4, pc}
.L2447:
bl validation.part.0
.L2454:
.align 2
.L2453:
.word .LANCHOR1
.word .LANCHOR2
.word verify_overflow
.size main, .-main
.text
.align 2
.global call_closedloop_verification_task
.syntax unified
.arm
.fpu softvfp
.type call_closedloop_verification_task, %function
call_closedloop_verification_task:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r2, .L2496
sub sp, sp, #20
ldr r3, [r2, #1608]
str r0, [sp, #12]
cmp r3, #0
ble .L2478
mov r5, #0
mov r8, #0
mov r9, #0
add r4, r2, #2416
str r5, [sp, #8]
add r4, r4, #8
.L2466:
ldmia r4!, {r6-r7}
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
beq .L2457
ldr r2, [r4, #-1624]
ldr r3, [r4, #-1620]
mov r0, r6
mov r1, r7
stm sp, {r2-r3}
bl __aeabi_dmul
mov r2, #0
ldr r3, .L2496+4
bl __aeabi_ddiv
mov fp, r1
mov r3, r0
mov r1, fp
mov r10, r0
mov r2, r8
mov r0, r3
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
addne fp, fp, #-2147483648
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpeq
subs r0, r0, #0
movne r0, #1
ldr r1, [sp, #8]
ands r2, r0, r1
eor r3, r1, #1
strne r2, [sp, #8]
bne .L2457
ands r0, r0, r3
movne r1, r0
str r1, [sp, #8]
bl nondet_double
mov r6, r0
mov r7, r1
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
str r6, [r4, #-1624]
str r7, [r4, #-1620]
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
beq .L2463
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L2463:
bl __ESBMC_assume
.L2457:
ldr r3, .L2496
add r5, r5, #1
ldr r3, [r3, #1608]
cmp r3, r5
bgt .L2466
.L2456:
ldr r3, .L2496
ldr r3, [r3, #800]
cmp r3, #0
ble .L2467
mov r4, #0
mov r8, #0
mov r9, #0
ldr r5, .L2496+8
.L2477:
ldmia r5!, {r6-r7}
mov r2, r8
mov r3, r9
mov r0, r6
mov r1, r7
bl __aeabi_dcmpgt
cmp r0, #0
beq .L2468
sub r3, r5, #1632
ldmia r3, {r2-r3}
mov r0, r6
mov r1, r7
stm sp, {r2-r3}
bl __aeabi_dmul
mov r2, #0
ldr r3, .L2496+4
bl __aeabi_ddiv
mov fp, r1
mov r3, r0
mov r1, fp
mov r10, r0
mov r2, r8
mov r0, r3
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
addne fp, fp, #-2147483648
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpeq
subs r0, r0, #0
movne r0, #1
ldr r1, [sp, #8]
ands r2, r0, r1
eor r3, r1, #1
strne r2, [sp, #8]
bne .L2468
ands r0, r0, r3
movne r1, r0
str r1, [sp, #8]
bl nondet_double
mov r6, r0
mov r7, r1
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
str r6, [r5, #-1632]
str r7, [r5, #-1628]
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmpge
cmp r0, #0
beq .L2474
ldmia sp, {r0-r1}
mov r2, r10
mov r3, fp
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dcmple
subs r0, r0, #0
movne r0, #1
.L2474:
bl __ESBMC_assume
.L2468:
ldr r3, .L2496
add r4, r4, #1
ldr r3, [r3, #800]
cmp r3, r4
bgt .L2477
.L2467:
ldr r3, [sp, #12]
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, lr}
bx r3 @ indirect register sibling call
.L2478:
mov r3, #0
str r3, [sp, #8]
b .L2456
.L2497:
.align 2
.L2496:
.word plant
.word 1079574528
.word plant+1624
.size call_closedloop_verification_task, .-call_closedloop_verification_task
.global impl
.global ds
.comm plant_cbmc,3224,8
.comm _controller_double,1040,8
.comm _controller_fxp,1040,8
.comm new_stateFWL,128,8
.comm new_state,128,8
.global generic_timer
.global next
.comm _fxp_imask,4,4
.comm _fxp_fmask,4,4
.comm _dbl_min,8,8
.comm _dbl_max,8,8
.comm _fxp_max,4,4
.comm _fxp_min,4,4
.comm _fxp_minus_one,4,4
.comm _fxp_half,4,4
.comm _fxp_one,4,4
.global rounding_mode
.global overflow_mode
.global X_SIZE_VALUE
.section .rodata
.align 3
.set .LANCHOR0,. + 0
.type __PRETTY_FUNCTION__.5216, %object
.size __PRETTY_FUNCTION__.5216, 20
__PRETTY_FUNCTION__.5216:
.ascii "__DSVERIFIER_assert\000"
.type __PRETTY_FUNCTION__.5221, %object
.size __PRETTY_FUNCTION__.5221, 24
__PRETTY_FUNCTION__.5221:
.ascii "__DSVERIFIER_assert_msg\000"
.space 4
.type scale_factor, %object
.size scale_factor, 248
scale_factor:
.word 0
.word 1072693248
.word 0
.word 1073741824
.word 0
.word 1074790400
.word 0
.word 1075838976
.word 0
.word 1076887552
.word 0
.word 1077936128
.word 0
.word 1078984704
.word 0
.word 1080033280
.word 0
.word 1081081856
.word 0
.word 1082130432
.word 0
.word 1083179008
.word 0
.word 1084227584
.word 0
.word 1085276160
.word 0
.word 1086324736
.word 0
.word 1087373312
.word 0
.word 1088421888
.word 0
.word 1089470464
.word 0
.word 1090519040
.word 0
.word 1091567616
.word 0
.word 1092616192
.word 0
.word 1093664768
.word 0
.word 1094713344
.word 0
.word 1095761920
.word 0
.word 1096810496
.word 0
.word 1097859072
.word 0
.word 1098907648
.word 0
.word 1099956224
.word 0
.word 1101004800
.word 0
.word 1102053376
.word 0
.word 1103101952
.word 0
.word 1104150528
.type scale_factor_inv, %object
.size scale_factor_inv, 248
scale_factor_inv:
.word 0
.word 1072693248
.word 0
.word 1071644672
.word 0
.word 1070596096
.word 0
.word 1069547520
.word 0
.word 1068498944
.word 0
.word 1067450368
.word 0
.word 1066401792
.word 0
.word 1065353216
.word 0
.word 1064304640
.word 0
.word 1063256064
.word 0
.word 1062207488
.word 0
.word 1061158912
.word 0
.word 1060110336
.word 0
.word 1059061760
.word 0
.word 1058013184
.word 0
.word 1056964608
.word 147574
.word 1055916032
.word 4294672148
.word 1054867455
.word 442722
.word 1053818880
.word 442722
.word 1052770304
.word 4291130373
.word 1051721727
.word 4291130373
.word 1050673151
.word 4291130373
.word 1049624575
.word 16971005
.word 1048576000
.word 16971005
.word 1047527424
.word 4177793578
.word 1046478847
.word 4177793578
.word 1045430271
.word 243644596
.word 1044381696
.word 3573330668
.word 1043333119
.word 3573330668
.word 1042284543
.word 2057033325
.word 1041235968
.type __PRETTY_FUNCTION__.5564, %object
.size __PRETTY_FUNCTION__.5564, 26
__PRETTY_FUNCTION__.5564:
.ascii "double_check_oscillations\000"
.space 2
.type __PRETTY_FUNCTION__.6126, %object
.size __PRETTY_FUNCTION__.6126, 12
__PRETTY_FUNCTION__.6126:
.ascii "snrVariance\000"
.type __PRETTY_FUNCTION__.6139, %object
.size __PRETTY_FUNCTION__.6139, 9
__PRETTY_FUNCTION__.6139:
.ascii "snrPower\000"
.space 3
.type __PRETTY_FUNCTION__.6149, %object
.size __PRETTY_FUNCTION__.6149, 9
__PRETTY_FUNCTION__.6149:
.ascii "snrPoint\000"
.space 3
.type __PRETTY_FUNCTION__.6181, %object
.size __PRETTY_FUNCTION__.6181, 13
__PRETTY_FUNCTION__.6181:
.ascii "iirIIOutTime\000"
.space 3
.type __PRETTY_FUNCTION__.6199, %object
.size __PRETTY_FUNCTION__.6199, 14
__PRETTY_FUNCTION__.6199:
.ascii "iirIItOutTime\000"
.space 2
.type __PRETTY_FUNCTION__.6217, %object
.size __PRETTY_FUNCTION__.6217, 21
__PRETTY_FUNCTION__.6217:
.ascii "iirIItOutTime_double\000"
.space 3
.type __PRETTY_FUNCTION__.6554, %object
.size __PRETTY_FUNCTION__.6554, 28
__PRETTY_FUNCTION__.6554:
.ascii "double_direct_form_1_MSP430\000"
.type __PRETTY_FUNCTION__.6576, %object
.size __PRETTY_FUNCTION__.6576, 28
__PRETTY_FUNCTION__.6576:
.ascii "double_direct_form_2_MSP430\000"
.type __PRETTY_FUNCTION__.6594, %object
.size __PRETTY_FUNCTION__.6594, 39
__PRETTY_FUNCTION__.6594:
.ascii "double_transposed_direct_form_2_MSP430\000"
.space 1
.type __PRETTY_FUNCTION__.6844, %object
.size __PRETTY_FUNCTION__.6844, 15
__PRETTY_FUNCTION__.6844:
.ascii "initialization\000"
.space 1
.type __PRETTY_FUNCTION__.7103, %object
.size __PRETTY_FUNCTION__.7103, 31
__PRETTY_FUNCTION__.7103:
.ascii "verify_limit_cycle_state_space\000"
.space 1
.type __PRETTY_FUNCTION__.7203, %object
.size __PRETTY_FUNCTION__.7203, 30
__PRETTY_FUNCTION__.7203:
.ascii "verify_zero_input_limit_cycle\000"
.space 2
.type __PRETTY_FUNCTION__.7273, %object
.size __PRETTY_FUNCTION__.7273, 22
__PRETTY_FUNCTION__.7273:
.ascii "verify_generic_timing\000"
.space 2
.type __PRETTY_FUNCTION__.7321, %object
.size __PRETTY_FUNCTION__.7321, 17
__PRETTY_FUNCTION__.7321:
.ascii "verify_stability\000"
.space 3
.type __PRETTY_FUNCTION__.7770, %object
.size __PRETTY_FUNCTION__.7770, 26
__PRETTY_FUNCTION__.7770:
.ascii "verify_safety_state_space\000"
.space 2
.type __PRETTY_FUNCTION__.7825, %object
.size __PRETTY_FUNCTION__.7825, 23
__PRETTY_FUNCTION__.7825:
.ascii "verify_controllability\000"
.space 1
.type __PRETTY_FUNCTION__.7865, %object
.size __PRETTY_FUNCTION__.7865, 30
__PRETTY_FUNCTION__.7865:
.ascii "verify_controllability_double\000"
.space 2
.type __PRETTY_FUNCTION__.7926, %object
.size __PRETTY_FUNCTION__.7926, 21
__PRETTY_FUNCTION__.7926:
.ascii "verify_observability\000"
.data
.align 3
.set .LANCHOR1,. + 0
.type overflow_mode, %object
.size overflow_mode, 4
overflow_mode:
.word 1
.space 4
.type impl, %object
.size impl, 56
impl:
.word 12
.word 4
.word 0
.word 1072693248
.word 0
.word -1074790400
.space 32
.type next, %object
.size next, 4
next:
.word 1
.space 4
.type ds, %object
.size ds, 3224
ds:
.word 0
.word 1072693248
.word 0
.word 0
.word 0
.word -1074790400
.space 776
.word 3
.space 4
.word 0
.word 1084180480
.word 0
.word -1062256640
.word 0
.word 1084176384
.space 776
.word 3
.space 4
.word 3539053052
.word 1062232653
.space 1600
.bss
.align 2
.set .LANCHOR2,. + 0
.type rounding_mode, %object
.size rounding_mode, 4
rounding_mode:
.space 4
.type generic_timer, %object
.size generic_timer, 4
generic_timer:
.space 4
.type X_SIZE_VALUE, %object
.size X_SIZE_VALUE, 4
X_SIZE_VALUE:
.space 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001144.c"
.intel_syntax noprefix
.text
.p2align 4
.type _to_x, @function
_to_x:
.LFB15:
.cfi_startproc
mov r8, rdi
mov eax, esi
mov r9d, edx
mov r11d, ecx
jmp .L3
.p2align 4,,10
.p2align 3
.L9:
mov rdi, rsi
.L3:
xor edx, edx
mov r10d, eax
lea rsi, 1[rdi]
div r9d
cmp edx, 10
sbb ecx, ecx
not ecx
and ecx, 39
lea ecx, 48[rcx+rdx]
mov BYTE PTR -1[rsi], cl
cmp r10d, r9d
jnb .L9
mov rax, rsi
movsx rcx, r11d
sub rax, r8
cmp rax, rcx
jge .L4
.p2align 4,,10
.p2align 3
.L5:
mov rdi, rsi
add rsi, 1
mov rax, rsi
mov BYTE PTR -1[rsi], 48
sub rax, r8
cmp rax, rcx
jl .L5
.L4:
mov BYTE PTR [rsi], 0
cmp r8, rdi
jnb .L1
.p2align 4,,10
.p2align 3
.L6:
movzx edx, BYTE PTR [rdi]
movzx ecx, BYTE PTR [r8]
sub rdi, 1
add r8, 1
mov BYTE PTR 1[rdi], cl
mov BYTE PTR -1[r8], dl
cmp rdi, r8
ja .L6
.L1:
ret
.cfi_endproc
.LFE15:
.size _to_x, .-_to_x
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "-+ #0"
.LC1:
.string "hlLz"
.text
.p2align 4
.globl _prf
.type _prf, @function
_prf:
.LFB25:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 312
.cfi_def_cfa_offset 368
mov QWORD PTR 8[rsp], rdi
movsx edi, BYTE PTR [rdx]
mov QWORD PTR 16[rsp], rsi
mov QWORD PTR 56[rsp], rcx
mov rax, QWORD PTR fs:40
mov QWORD PTR 296[rsp], rax
xor eax, eax
test edi, edi
je .L169
lea r12, 1[rdx]
xor r15d, r15d
lea r14, .L22[rip]
jmp .L153
.p2align 4,,10
.p2align 3
.L275:
xor eax, eax
mov rsi, QWORD PTR 16[rsp]
mov rcx, QWORD PTR 8[rsp]
call rcx
cmp eax, -1
je .L66
add r15d, 1
mov r8, r12
.L18:
movsx edi, BYTE PTR [r8]
lea r12, 1[r8]
test edi, edi
je .L14
.L153:
cmp edi, 37
jne .L275
mov BYTE PTR 67[rsp], 32
mov DWORD PTR 40[rsp], 0
mov DWORD PTR 48[rsp], 0
mov DWORD PTR 68[rsp], 0
mov DWORD PTR 32[rsp], 0
mov DWORD PTR 24[rsp], r15d
mov r15, r12
.p2align 4,,10
.p2align 3
.L16:
movsx ebp, BYTE PTR [r15]
lea rdi, .LC0[rip]
lea r13, 1[r15]
mov esi, ebp
mov DWORD PTR [rsp], ebp
mov ebx, ebp
call strchr@PLT
test rax, rax
je .L276
test bl, bl
je .L257
lea eax, -32[rbx]
cmp al, 16
ja .L19
movzx eax, al
movsx rax, DWORD PTR [r14+rax*4]
add rax, r14
notrack jmp rax
.section .rodata
.align 4
.align 4
.L22:
.long .L25-.L22
.long .L19-.L22
.long .L19-.L22
.long .L24-.L22
.long .L19-.L22
.long .L19-.L22
.long .L19-.L22
.long .L19-.L22
.long .L19-.L22
.long .L19-.L22
.long .L19-.L22
.long .L171-.L22
.long .L19-.L22
.long .L23-.L22
.long .L19-.L22
.long .L19-.L22
.long .L21-.L22
.text
.p2align 4,,10
.p2align 3
.L25:
mov DWORD PTR 40[rsp], 1
.p2align 4,,10
.p2align 3
.L19:
mov r15, r13
jmp .L16
.p2align 4,,10
.p2align 3
.L21:
mov BYTE PTR 67[rsp], bl
mov r15, r13
jmp .L16
.p2align 4,,10
.p2align 3
.L24:
mov DWORD PTR 32[rsp], 1
mov r15, r13
jmp .L16
.p2align 4,,10
.p2align 3
.L257:
mov r15d, DWORD PTR 24[rsp]
.L14:
mov rax, QWORD PTR 296[rsp]
sub rax, QWORD PTR fs:40
jne .L277
add rsp, 312
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r15d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L171:
.cfi_restore_state
mov DWORD PTR 48[rsp], 1
mov r15, r13
jmp .L16
.p2align 4,,10
.p2align 3
.L23:
mov DWORD PTR 68[rsp], 1
mov r15, r13
jmp .L16
.p2align 4,,10
.p2align 3
.L276:
mov r12, r15
mov QWORD PTR 72[rsp], r13
mov r15d, DWORD PTR 24[rsp]
cmp ebp, 42
je .L278
call __ctype_b_loc@PLT
movsx rdx, bpl
xor r9d, r9d
mov rdi, QWORD PTR [rax]
test BYTE PTR 1[rdi+rdx*2], 8
jne .L33
.L32:
cmp DWORD PTR [rsp], 46
mov r12d, -1
je .L279
.L34:
mov esi, DWORD PTR [rsp]
lea rdi, .LC1[rip]
mov DWORD PTR 24[rsp], r9d
call strchr@PLT
mov rsi, QWORD PTR 72[rsp]
mov r9d, DWORD PTR 24[rsp]
test rax, rax
mov r8, rsi
je .L42
movsx eax, BYTE PTR [rsi]
add r8, 1
mov DWORD PTR [rsp], eax
.L42:
mov eax, DWORD PTR [rsp]
cmp eax, 120
ja .L18
lea rcx, .L44[rip]
mov edx, eax
movsx rax, DWORD PTR [rcx+rdx*4]
add rax, rcx
notrack jmp rax
.section .rodata
.align 4
.align 4
.L44:
.long .L14-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L53-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L51-.L44
.long .L18-.L44
.long .L51-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L43-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L52-.L44
.long .L50-.L44
.long .L51-.L44
.long .L51-.L44
.long .L51-.L44
.long .L18-.L44
.long .L50-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L18-.L44
.long .L49-.L44
.long .L48-.L44
.long .L47-.L44
.long .L18-.L44
.long .L18-.L44
.long .L46-.L44
.long .L18-.L44
.long .L45-.L44
.long .L18-.L44
.long .L18-.L44
.long .L43-.L44
.text
.p2align 4,,10
.p2align 3
.L280:
add r13, 1
movsx ebp, al
.L33:
lea eax, [r9+r9*4]
mov rdx, r12
mov r12, r13
lea r9d, -48[rbp+rax*2]
movsx rax, BYTE PTR 0[r13]
test BYTE PTR 1[rdi+rax*2], 8
jne .L280
movsx eax, al
mov DWORD PTR [rsp], eax
lea rax, 2[rdx]
mov QWORD PTR 72[rsp], rax
.L31:
cmp r9d, 201
mov eax, 200
cmovnb r9d, eax
jmp .L32
.p2align 4,,10
.p2align 3
.L278:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L28
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L29:
mov r9d, DWORD PTR [rdx]
test r9d, r9d
jns .L30
mov DWORD PTR 68[rsp], 1
neg r9d
.L30:
movsx eax, BYTE PTR 0[r13]
mov DWORD PTR [rsp], eax
lea rax, 2[r12]
mov QWORD PTR 72[rsp], rax
jmp .L31
.L51:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR 4[rsi]
cmp eax, 175
ja .L68
mov edx, eax
add eax, 16
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR 4[rsi], eax
.L69:
mov rcx, QWORD PTR [rdx]
mov rdx, rcx
mov rsi, rcx
shr rdx, 52
sal rsi, 11
and edx, 2047
btr rsi, 63
cmp edx, 2047
je .L281
movsx rdi, edx
or rdi, rsi
je .L75
bts rsi, 63
sub edx, 1022
mov rdi, rsi
test rcx, rcx
jns .L76
lea rax, 81[rsp]
mov BYTE PTR 80[rsp], 45
mov r13, rax
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
.L77:
xor ebx, ebx
cmp edx, -2
jge .L82
.p2align 4,,10
.p2align 3
.L83:
mov rax, rdi
shr rdi
mov ecx, edx
add edx, 1
and eax, 1
add rdi, rax
mov rax, rdi
shr rax, 32
cmp rax, 858993458
ja .L83
lea rdi, [rdi+rdi*4]
lea edx, 2[rcx]
sub ebx, 1
mov rax, rdi
shr rax, 32
cmp rax, 2147483647
jne .L167
add rdi, rdi
lea edx, 1[rcx]
.L167:
cmp edx, -2
jl .L83
.L82:
test edx, edx
jle .L87
mov r10d, 3435973837
mov esi, 2147483648
.p2align 4,,10
.p2align 3
.L86:
add rdi, 2
sub edx, 1
add ebx, 1
mov rax, rdi
shr rax, 32
imul rax, r10
shr rax, 34
mov rcx, rax
sal rax, 34
sal rcx, 32
add rax, rcx
sub rdi, rax
mov rax, rdi
shr rax, 3
mov eax, eax
imul rax, r10
shr rax, 34
lea r11, 0[0+rax*8]
sal rax, 5
add rax, r11
add rcx, r11
sub edi, eax
imul rdi, r10
shr rdi, 34
add rdi, rcx
.p2align 4,,10
.p2align 3
.L85:
add rdi, rdi
sub edx, 1
mov rax, rdi
shr rax, 32
cmp rax, rsi
jb .L85
test edx, edx
jg .L86
.p2align 4,,10
.p2align 3
.L87:
mov rax, rdi
add edx, 1
shr rdi
and eax, 1
add rdi, rax
cmp edx, 4
jne .L87
test r12d, r12d
js .L180
movzx edx, BYTE PTR 32[rsp]
setg al
and edx, 1
or edx, eax
mov BYTE PTR 72[rsp], dl
.L88:
mov edx, DWORD PTR [rsp]
and edx, -33
cmp edx, 71
jne .L89
mov edx, DWORD PTR 32[rsp]
xor edx, 1
and eax, edx
movzx eax, al
mov DWORD PTR 32[rsp], eax
lea eax, 1[r12]
cmp ebx, -3
jl .L90
cmp ebx, eax
jg .L90
.L91:
mov edx, ebx
add edx, r12d
js .L282
mov DWORD PTR [rsp], 102
movabs rax, 576460752303423488
je .L96
cmp edx, 16
mov eax, 16
cmovle eax, edx
lea esi, -1[rax]
.L95:
movabs rax, 576460752303423488
mov r10d, 3435973837
.p2align 4,,10
.p2align 3
.L97:
add rax, 2
mov rdx, rax
shr rdx, 32
imul rdx, r10
shr rdx, 34
mov rcx, rdx
sal rdx, 34
sal rcx, 32
add rdx, rcx
sub rax, rdx
mov rdx, rax
shr rdx, 3
mov edx, edx
imul rdx, r10
shr rdx, 34
lea r11, 0[0+rdx*8]
sal rdx, 5
add rdx, r11
add rcx, r11
sub eax, edx
imul rax, r10
shr rax, 34
lea rdx, [rax+rcx]
and eax, 1
shr rdx
add rax, rdx
sub esi, 1
jnb .L97
.L96:
add rdi, rax
mov rax, rdi
shr rax, 32
test eax, 4026531840
jne .L162
.L98:
cmp DWORD PTR [rsp], 102
je .L163
lea rsi, [rdi+rdi*4]
lea rdx, 1[r13]
add rsi, rsi
mov rax, rsi
shr rax, 60
add eax, 48
cmp eax, 48
mov BYTE PTR 0[r13], al
setne al
movzx eax, al
sub ebx, eax
cmp BYTE PTR 72[rsp], 0
je .L111
mov BYTE PTR 1[r13], 46
lea rdx, 2[r13]
test r12d, r12d
je .L111
movabs rcx, 1152921504606846975
lea r10d, 2[r12]
mov edi, 15
and rsi, rcx
add r10, r13
mov rcx, rdx
.p2align 4,,10
.p2align 3
.L113:
add rcx, 1
mov eax, 48
test edi, edi
jle .L112
lea rax, [rsi+rsi*4]
sub edi, 1
movabs rsi, 1152921504606846975
add rax, rax
and rsi, rax
shr rax, 60
add eax, 48
.L112:
mov BYTE PTR -1[rcx], al
cmp rcx, r10
jne .L113
mov r12d, r12d
add rdx, r12
.L111:
mov ebp, DWORD PTR 32[rsp]
test ebp, ebp
jne .L115
.L114:
mov ecx, DWORD PTR [rsp]
mov eax, ecx
and eax, -33
cmp eax, 69
jne .L116
mov BYTE PTR [rdx], cl
mov eax, 43
test ebx, ebx
jns .L117
neg ebx
mov eax, 45
.L117:
mov BYTE PTR 1[rdx], al
mov eax, ebx
add rdx, 5
imul rax, rax, 1374389535
shr rax, 37
lea ecx, 48[rax]
imul eax, eax, 100
mov BYTE PTR -3[rdx], cl
mov ecx, 3435973837
sub ebx, eax
mov eax, ebx
imul rax, rcx
shr rax, 35
lea ecx, 48[rax]
lea eax, [rax+rax*4]
add eax, eax
mov BYTE PTR -2[rdx], cl
sub ebx, eax
lea eax, 48[rbx]
mov BYTE PTR -1[rdx], al
.L116:
mov BYTE PTR [rdx], 0
mov eax, DWORD PTR 48[rsp]
sub rdx, QWORD PTR 24[rsp]
or eax, DWORD PTR 40[rsp]
mov ebx, edx
jne .L118
cmp BYTE PTR 80[rsp], 45
je .L118
cmp edx, 200
jg .L66
.L166:
mov DWORD PTR 32[rsp], 0
.L67:
cmp r9d, ebx
jle .L192
lea rsi, 80[rsp]
lea eax, 1[rbx]
mov QWORD PTR 24[rsp], rsi
.L56:
mov esi, DWORD PTR 68[rsp]
test esi, esi
je .L150
.L158:
lea edx, -1[r9]
mov eax, 1
movsx rdi, ebx
mov DWORD PTR [rsp], r9d
sub edx, ebx
mov esi, 32
mov QWORD PTR 32[rsp], r8
add rdx, 1
cmp r9d, ebx
cmovle rdx, rax
add rdi, QWORD PTR 24[rsp]
call memset@PLT
movsx r9, DWORD PTR [rsp]
mov r8, QWORD PTR 32[rsp]
.L149:
test r9d, r9d
je .L18
lea rcx, 80[rsp]
movzx eax, BYTE PTR 80[rsp]
mov QWORD PTR 24[rsp], rcx
.L57:
mov rbp, QWORD PTR 24[rsp]
mov QWORD PTR [rsp], r8
movsx edi, al
mov r12, QWORD PTR 8[rsp]
mov r13, QWORD PTR 16[rsp]
lea rbx, 0[rbp+r9]
jmp .L152
.p2align 4,,10
.p2align 3
.L283:
add rbp, 1
mov eax, ebp
sub eax, DWORD PTR 24[rsp]
add eax, r15d
cmp rbp, rbx
je .L194
movsx edi, BYTE PTR 0[rbp]
.L152:
xor eax, eax
mov rsi, r13
call r12
cmp eax, -1
jne .L283
.L66:
mov r15d, -1
jmp .L14
.p2align 4,,10
.p2align 3
.L279:
mov rbx, QWORD PTR 72[rsp]
movsx rbp, BYTE PTR [rbx]
cmp bpl, 42
jne .L284
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L37
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L38:
mov rax, QWORD PTR 72[rsp]
mov r12d, DWORD PTR [rdx]
movsx edx, BYTE PTR 1[rax]
lea rcx, 2[rax]
.L39:
cmp r12d, 201
mov eax, -1
mov QWORD PTR 72[rsp], rcx
mov DWORD PTR [rsp], edx
cmovge r12d, eax
jmp .L34
.L28:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L29
.L284:
mov DWORD PTR [rsp], r9d
xor r12d, r12d
call __ctype_b_loc@PLT
mov r9d, DWORD PTR [rsp]
mov rsi, QWORD PTR [rax]
jmp .L36
.p2align 4,,10
.p2align 3
.L40:
lea eax, [r12+r12*4]
movsx rbp, BYTE PTR 1[rbx]
mov rbx, rcx
lea r12d, -48[rdx+rax*2]
.L36:
lea rcx, 1[rbx]
movsx edx, bpl
test BYTE PTR 1[rsi+rbp*2], 8
jne .L40
jmp .L39
.L185:
mov rdx, rcx
.L104:
mov ecx, DWORD PTR 32[rsp]
test ecx, ecx
je .L116
mov DWORD PTR [rsp], 102
.p2align 4,,10
.p2align 3
.L115:
mov rcx, rdx
movzx eax, BYTE PTR -1[rdx]
sub rdx, 1
cmp al, 48
je .L115
cmp al, 46
cmovne rdx, rcx
jmp .L114
.L43:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L140
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L141:
mov r10d, DWORD PTR 32[rsp]
mov esi, DWORD PTR [rdx]
test r10d, r10d
je .L142
mov edi, 30768
mov ecx, r12d
mov edx, 16
mov QWORD PTR 40[rsp], r8
mov WORD PTR 80[rsp], di
lea rdi, 82[rsp]
mov DWORD PTR 24[rsp], r9d
call _to_x
cmp DWORD PTR [rsp], 88
mov r9d, DWORD PTR 24[rsp]
mov r8, QWORD PTR 40[rsp]
mov ebx, eax
je .L285
.L265:
mov DWORD PTR 32[rsp], 2
add ebx, 2
.L147:
cmp r12d, -1
je .L286
cmp ebx, 200
jg .L66
.L267:
mov BYTE PTR 67[rsp], 32
jmp .L67
.L50:
mov rcx, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rcx]
cmp eax, 47
ja .L58
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rcx]
mov DWORD PTR [rcx], eax
.L59:
mov esi, DWORD PTR [rdx]
test esi, esi
js .L287
mov eax, DWORD PTR 48[rsp]
test eax, eax
je .L62
mov BYTE PTR 80[rsp], 43
.L63:
mov QWORD PTR 24[rsp], r8
mov DWORD PTR [rsp], r9d
.L264:
lea rbx, 81[rsp]
mov ecx, r12d
mov edx, 10
mov rdi, rbx
lea rbp, 80[rsp]
call _to_x
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 24[rsp]
mov DWORD PTR 32[rsp], 1
add ebx, eax
sub ebx, ebp
jmp .L147
.L52:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L54
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L55:
mov edx, DWORD PTR [rdx]
mov BYTE PTR 81[rsp], 0
mov BYTE PTR 80[rsp], dl
mov eax, edx
cmp r9d, 1
jg .L175
lea rcx, 80[rsp]
mov r9d, 1
mov QWORD PTR 24[rsp], rcx
jmp .L57
.L46:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L131
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L132:
mov rsi, QWORD PTR [rdx]
xor edx, edx
jmp .L134
.p2align 4,,10
.p2align 3
.L289:
add rdx, 1
cmp rdx, 200
je .L288
.L134:
cmp BYTE PTR [rsi+rdx], 0
mov ebx, edx
jne .L289
cmp edx, r12d
cmova ebx, r12d
.L136:
test ebx, ebx
je .L18
movsx rdx, ebx
.L165:
lea rdi, 80[rsp]
mov ecx, 201
mov QWORD PTR 32[rsp], r8
mov DWORD PTR [rsp], r9d
mov QWORD PTR 24[rsp], rdi
call __memcpy_chk@PLT
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 32[rsp]
.L125:
cmp r9d, ebx
jg .L160
movzx eax, BYTE PTR 80[rsp]
movsx r9, ebx
jmp .L57
.L45:
mov rcx, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rcx]
cmp eax, 47
ja .L137
mov esi, eax
add eax, 8
add rsi, QWORD PTR 16[rcx]
mov DWORD PTR [rcx], eax
.L138:
mov esi, DWORD PTR [rsi]
lea rdi, 80[rsp]
mov ecx, r12d
mov edx, 10
mov QWORD PTR 24[rsp], r8
mov DWORD PTR [rsp], r9d
call _to_x
cmp r12d, -1
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 24[rsp]
mov ebx, eax
je .L272
.L127:
cmp ebx, 200
jg .L66
mov DWORD PTR 32[rsp], 0
jmp .L267
.L47:
mov rcx, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rcx]
cmp eax, 47
ja .L128
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rcx]
mov DWORD PTR [rcx], eax
.L129:
mov esi, DWORD PTR [rdx]
lea rdi, 82[rsp]
mov ecx, 8
mov DWORD PTR [rsp], r9d
mov r11d, 30768
mov edx, 16
mov QWORD PTR 24[rsp], r8
mov WORD PTR 80[rsp], r11w
call _to_x
cmp r12d, -1
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 24[rsp]
lea ebx, 2[rax]
jne .L127
.L272:
cmp ebx, 200
jle .L166
jmp .L66
.p2align 4,,10
.p2align 3
.L48:
mov rsi, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rsi]
cmp eax, 47
ja .L122
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rsi]
mov DWORD PTR [rsi], eax
.L123:
mov ebx, DWORD PTR 32[rsp]
mov esi, DWORD PTR [rdx]
test ebx, ebx
je .L189
mov BYTE PTR 80[rsp], 48
mov ebx, 1
lea rdi, 81[rsp]
test esi, esi
je .L290
.L124:
mov ecx, r12d
mov edx, 8
mov QWORD PTR 24[rsp], r8
mov DWORD PTR [rsp], r9d
call _to_x
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 24[rsp]
add ebx, eax
cmp r12d, -1
jne .L127
jmp .L272
.L49:
mov rcx, QWORD PTR 56[rsp]
mov eax, DWORD PTR [rcx]
cmp eax, 47
ja .L120
mov edx, eax
add eax, 8
add rdx, QWORD PTR 16[rcx]
mov DWORD PTR [rcx], eax
.L121:
mov rax, QWORD PTR [rdx]
mov DWORD PTR [rax], r15d
jmp .L18
.L53:
xor eax, eax
mov QWORD PTR [rsp], r8
mov rsi, QWORD PTR 16[rsp]
mov edi, 37
mov rcx, QWORD PTR 8[rsp]
call rcx
cmp eax, -1
je .L66
mov r8, QWORD PTR [rsp]
add r15d, 1
jmp .L18
.L194:
mov r8, QWORD PTR [rsp]
mov r15d, eax
jmp .L18
.L37:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L38
.L169:
xor r15d, r15d
jmp .L14
.L286:
cmp ebx, 200
jle .L67
jmp .L66
.p2align 4,,10
.p2align 3
.L192:
movsx r9, ebx
jmp .L149
.L281:
test rsi, rsi
jne .L71
sar rcx, 63
mov BYTE PTR 83[rsp], 70
mov eax, 20041
mov ebx, 4
and ecx, 2
mov WORD PTR 81[rsp], ax
lea rax, 84[rsp]
add ecx, 43
mov BYTE PTR 80[rsp], cl
.L73:
mov BYTE PTR [rax], 0
mov eax, DWORD PTR 48[rsp]
or eax, DWORD PTR 40[rsp]
mov DWORD PTR 32[rsp], eax
jne .L67
cmp BYTE PTR 80[rsp], 45
jne .L166
.L118:
cmp ebx, 200
jg .L66
mov DWORD PTR 32[rsp], 1
jmp .L67
.L122:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L123
.L120:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L121
.L142:
lea rdi, 80[rsp]
mov ecx, r12d
mov edx, 16
mov QWORD PTR 48[rsp], r8
mov DWORD PTR 40[rsp], r9d
mov QWORD PTR 24[rsp], rdi
call _to_x
cmp DWORD PTR [rsp], 88
mov r9d, DWORD PTR 40[rsp]
mov r8, QWORD PTR 48[rsp]
mov ebx, eax
jne .L147
movzx eax, BYTE PTR 80[rsp]
xor esi, esi
test al, al
je .L147
.L164:
mov rdx, QWORD PTR 24[rsp]
.L146:
lea ecx, -97[rax]
cmp cl, 25
ja .L145
sub eax, 32
mov BYTE PTR [rdx], al
.L145:
movzx eax, BYTE PTR 1[rdx]
add rdx, 1
test al, al
jne .L146
add ebx, esi
mov esi, DWORD PTR 32[rsp]
mov eax, 2
test esi, esi
cmove eax, esi
mov DWORD PTR 32[rsp], eax
jmp .L147
.L140:
mov rsi, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rsi]
lea rax, 8[rdx]
mov QWORD PTR 8[rsi], rax
jmp .L141
.L58:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L59
.L131:
mov rcx, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rcx]
lea rax, 8[rdx]
mov QWORD PTR 8[rcx], rax
jmp .L132
.L128:
mov rsi, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rsi]
lea rax, 8[rdx]
mov QWORD PTR 8[rsi], rax
jmp .L129
.L137:
mov rcx, QWORD PTR 56[rsp]
mov rsi, QWORD PTR 8[rcx]
lea rax, 8[rsi]
mov QWORD PTR 8[rcx], rax
jmp .L138
.L175:
lea rcx, 80[rsp]
mov eax, 2
mov ebx, 1
mov DWORD PTR 32[rsp], 0
mov QWORD PTR 24[rsp], rcx
jmp .L56
.L54:
mov rsi, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rsi]
lea rax, 8[rdx]
mov QWORD PTR 8[rsi], rax
jmp .L55
.L68:
mov rsi, QWORD PTR 56[rsp]
mov rdx, QWORD PTR 8[rsi]
lea rax, 8[rdx]
mov QWORD PTR 8[rsi], rax
jmp .L69
.L150:
mov ebp, r9d
mov rsi, QWORD PTR 24[rsp]
movsx rdx, eax
mov QWORD PTR 40[rsp], r8
sub ebp, ebx
mov DWORD PTR [rsp], r9d
movsx rdi, ebp
add rdi, rsi
call memmove@PLT
cmp BYTE PTR 67[rsp], 32
movsx r9, DWORD PTR [rsp]
mov r8, QWORD PTR 40[rsp]
je .L193
add ebp, DWORD PTR 32[rsp]
.L151:
cmp DWORD PTR 32[rsp], ebp
jge .L149
.L157:
movsx rdi, DWORD PTR 32[rsp]
lea edx, -1[rbp]
movsx esi, BYTE PTR 67[rsp]
mov QWORD PTR 40[rsp], r8
mov DWORD PTR [rsp], r9d
sub edx, edi
add rdi, QWORD PTR 24[rsp]
add rdx, 1
call memset@PLT
movsx r9, DWORD PTR [rsp]
mov r8, QWORD PTR 40[rsp]
jmp .L149
.L287:
mov eax, esi
mov QWORD PTR 24[rsp], r8
neg eax
cmp esi, -2147483648
mov esi, -2147483648
mov DWORD PTR [rsp], r9d
mov BYTE PTR 80[rsp], 45
cmovne esi, eax
jmp .L264
.L89:
cmp DWORD PTR [rsp], 102
je .L182
mov DWORD PTR 32[rsp], 0
lea eax, 1[r12]
.L92:
cmp eax, 16
mov edx, 16
cmovg eax, edx
lea esi, -1[rax]
jmp .L95
.L75:
mov r13d, DWORD PTR 48[rsp]
test r13d, r13d
je .L78
lea rax, 81[rsp]
mov BYTE PTR 80[rsp], 43
xor ebx, ebx
xor edx, edx
mov r13, rax
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
jmp .L87
.L180:
mov BYTE PTR 72[rsp], 1
mov eax, 1
mov r12d, 6
jmp .L88
.L189:
xor ebx, ebx
lea rdi, 80[rsp]
jmp .L124
.L90:
cmp DWORD PTR [rsp], 103
mov ebp, 69
mov edx, 101
cmovne edx, ebp
mov DWORD PTR [rsp], edx
jmp .L92
.L62:
mov eax, DWORD PTR 40[rsp]
test eax, eax
je .L64
mov BYTE PTR 80[rsp], 32
jmp .L63
.L163:
test ebx, ebx
jle .L100
movsx rdx, ebx
mov rsi, r13
mov eax, 16
add rdx, r13
.L102:
add rsi, 1
mov ecx, 48
test eax, eax
jle .L101
lea rcx, [rdi+rdi*4]
sub eax, 1
movabs rdi, 1152921504606846975
add rcx, rcx
and rdi, rcx
shr rcx, 60
add ecx, 48
.L101:
mov BYTE PTR -1[rsi], cl
cmp rsi, rdx
jne .L102
xor ebx, ebx
.L103:
cmp BYTE PTR 72[rsp], 0
je .L104
mov BYTE PTR [rdx], 46
lea rcx, 1[rdx]
test r12d, r12d
je .L185
lea esi, 1[r12]
add rdx, rsi
jmp .L108
.p2align 4,,10
.p2align 3
.L105:
mov esi, 48
test eax, eax
jle .L107
lea rsi, [rdi+rdi*4]
sub eax, 1
movabs rdi, 1152921504606846975
add rsi, rsi
and rdi, rsi
shr rsi, 60
add esi, 48
.L107:
mov BYTE PTR -1[rcx], sil
.L106:
cmp rdx, rcx
je .L104
.L108:
add rcx, 1
test ebx, ebx
je .L105
mov BYTE PTR -1[rcx], 48
add ebx, 1
jmp .L106
.L282:
movabs rax, 576460752303423488
add rdi, rax
mov rax, rdi
shr rax, 32
test eax, 4026531840
je .L163
mov DWORD PTR [rsp], 102
.L162:
add rdi, 2
mov ecx, 3435973837
add ebx, 1
mov rax, rdi
shr rax, 32
imul rax, rcx
shr rax, 34
mov rsi, rax
sal rax, 34
sal rsi, 32
add rax, rsi
sub rdi, rax
mov rax, rdi
shr rax, 3
mov eax, eax
imul rax, rcx
shr rax, 34
lea rdx, 0[0+rax*8]
sal rax, 5
add rax, rdx
add rsi, rdx
mov edx, edi
sub edx, eax
mov rax, rdx
imul rax, rcx
shr rax, 34
lea rdx, [rax+rsi]
and eax, 1
shr rdx
mov rdi, rdx
add rdi, rax
jmp .L98
.L160:
mov DWORD PTR 32[rsp], 0
lea eax, 1[rbx]
jmp .L56
.L290:
mov BYTE PTR 81[rsp], 0
cmp r12d, -1
je .L191
cmp r9d, 1
jg .L126
lea rsi, 80[rsp]
movsx r9, DWORD PTR 32[rsp]
mov eax, 48
mov QWORD PTR 24[rsp], rsi
jmp .L57
.L78:
mov eax, DWORD PTR 40[rsp]
test eax, eax
je .L198
lea rax, 81[rsp]
mov BYTE PTR 80[rsp], 32
xor ebx, ebx
xor edx, edx
mov r13, rax
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
jmp .L87
.L288:
mov ebx, 200
cmp r12d, 199
ja .L165
mov ebx, r12d
jmp .L136
.L64:
lea rdi, 80[rsp]
mov ecx, r12d
mov edx, 10
mov QWORD PTR 24[rsp], r8
mov DWORD PTR [rsp], r9d
call _to_x
mov r9d, DWORD PTR [rsp]
mov r8, QWORD PTR 24[rsp]
mov DWORD PTR 32[rsp], 0
mov ebx, eax
jmp .L147
.L193:
mov DWORD PTR 32[rsp], 0
jmp .L151
.L182:
mov DWORD PTR 32[rsp], 0
jmp .L91
.L285:
movzx eax, BYTE PTR 80[rsp]
lea rcx, 80[rsp]
mov esi, 2
mov QWORD PTR 24[rsp], rcx
test al, al
jne .L164
jmp .L265
.L100:
mov BYTE PTR 0[r13], 48
lea rdx, 1[r13]
mov eax, 16
jmp .L103
.L71:
mov eax, 24910
mov BYTE PTR 82[rsp], 78
mov ebx, 3
mov WORD PTR 80[rsp], ax
lea rax, 83[rsp]
jmp .L73
.L126:
mov ebx, DWORD PTR 68[rsp]
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
test ebx, ebx
jne .L158
lea ebp, -1[r9]
mov DWORD PTR 32[rsp], 0
movsx rax, ebp
mov BYTE PTR 67[rsp], 32
mov WORD PTR 80[rsp+rax], 48
jmp .L157
.L191:
lea rax, 80[rsp]
mov ebx, DWORD PTR 32[rsp]
mov QWORD PTR 24[rsp], rax
jmp .L125
.L198:
lea rax, 80[rsp]
xor ebx, ebx
xor edx, edx
mov QWORD PTR 24[rsp], rax
mov r13, rax
jmp .L87
.L277:
call __stack_chk_fail@PLT
.L76:
cmp DWORD PTR 48[rsp], 0
je .L80
lea rax, 81[rsp]
mov BYTE PTR 80[rsp], 43
mov r13, rax
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
jmp .L77
.L80:
cmp DWORD PTR 40[rsp], 0
je .L178
lea rax, 81[rsp]
mov BYTE PTR 80[rsp], 32
mov r13, rax
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
jmp .L77
.L178:
lea rax, 80[rsp]
mov QWORD PTR 24[rsp], rax
mov r13, rax
jmp .L77
.cfi_endproc
.LFE25:
.size _prf, .-_prf
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001144.c"
.text
.global __aeabi_uidivmod
.align 2
.syntax unified
.arm
.fpu softvfp
.type _to_x, %function
_to_x:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r5, r0
mov r7, r1
mov r8, r2
mov r6, r3
mov r4, r0
b .L3
.L10:
mov r4, ip
.L3:
mov r0, r7
mov r1, r8
bl __aeabi_uidivmod
cmp r1, #9
movhi r3, #39
movls r3, #0
mov ip, r4
and r1, r1, #255
add r1, r1, #48
add r3, r3, r1
cmp r7, r8
strb r3, [ip], #1
mov r7, r0
bcs .L10
sub r0, ip, r5
cmp r6, r0
ble .L4
mov r3, #48
.L5:
mov r4, ip
strb r3, [ip], #1
sub r0, ip, r5
cmp r6, r0
bgt .L5
.L4:
mov r3, #0
cmp r5, r4
strb r3, [ip]
popcs {r4, r5, r6, r7, r8, pc}
mov r3, r4
.L7:
ldrb r2, [r3] @ zero_extendqisi2
ldrb r1, [r5] @ zero_extendqisi2
strb r1, [r3], #-1
strb r2, [r5], #1
cmp r3, r5
bhi .L7
pop {r4, r5, r6, r7, r8, pc}
.size _to_x, .-_to_x
.align 2
.syntax unified
.arm
.fpu softvfp
.type _atoi, %function
_atoi:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r4, r0
bl __ctype_b_loc
ldr r1, [r4]
ldr r5, [r0]
sub r1, r1, #1
mov r0, #0
b .L16
.L17:
sub r0, r3, #48
.L16:
mov lr, r1
ldrb r3, [r1], #1 @ zero_extendqisi2
add r2, r0, r0, lsl #2
lsl ip, r3, #1
ldrh ip, [r5, ip]
add r3, r3, r2, lsl #1
tst ip, #2048
bne .L17
str lr, [r4]
pop {r4, r5, r6, pc}
.size _atoi, .-_atoi
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "-+ #0\000"
.align 2
.LC1:
.ascii "hlLz\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.global _prf
.syntax unified
.arm
.fpu softvfp
.type _prf, %function
_prf:
@ args = 0, pretend = 0, frame = 336
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, r0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add r0, r2, #1
sub sp, sp, #340
str r0, [sp, #124]
ldrb r0, [r2] @ zero_extendqisi2
str r3, [sp, #20]
ldr r3, .L284
str ip, [sp, #4]
cmp r0, #0
ldr r3, [r3]
str r3, [sp, #332]
mov r3,#0
beq .L154
mov r10, r1
mov r9, #0
ldr r8, .L284+4
b .L138
.L21:
mov r1, r10
ldr r3, [sp, #4]
blx r3
cmn r0, #1
beq .L62
.L259:
add r9, r9, #1
.L24:
ldr r3, [sp, #124]
add r2, r3, #1
str r2, [sp, #124]
ldrb r0, [r3] @ zero_extendqisi2
cmp r0, #0
beq .L19
.L138:
cmp r0, #37
bne .L21
mov r2, #0
mov r3, r2
ldr r5, [sp, #124]
mov fp, r2
str r2, [sp, #16]
str r2, [sp, #8]
mov r2, #32
str r6, [sp, #24]
str r7, [sp, #28]
mov r7, r5
mov r5, r3
str r2, [sp, #12]
str r10, [sp, #32]
.L22:
add r10, r7, #1
str r10, [sp, #124]
ldrb r4, [r10, #-1] @ zero_extendqisi2
mov r0, r8
mov r1, r4
bl strchr
cmp r0, #0
beq .L267
cmp r4, #0
beq .L19
sub r3, r4, #32
and r1, r3, #255
cmp r1, #16
bhi .L25
cmp r3, #16
ldrls pc, [pc, r3, asl #2]
b .L25
.L28:
.word .L31
.word .L25
.word .L25
.word .L30
.word .L25
.word .L25
.word .L25
.word .L25
.word .L25
.word .L25
.word .L25
.word .L155
.word .L25
.word .L29
.word .L25
.word .L25
.word .L27
.L29:
mov fp, #1
.L25:
mov r7, r10
b .L22
.L155:
mov r5, #1
b .L25
.L31:
mov r3, #1
str r3, [sp, #16]
b .L25
.L30:
mov r3, #1
str r3, [sp, #8]
b .L25
.L27:
str r4, [sp, #12]
b .L25
.L285:
.align 2
.L284:
.word .LC2
.word .LC0
.word 2047
.L51:
ldr r3, [sp, #20]
add r3, r3, #7
bic r3, r3, #7
mov r1, r3
ldr ip, [r3, #4]
ldr r2, [r1], #8
ldr r3, .L284+8
lsl lr, ip, #11
orr lr, lr, r2, lsr #21
lsl r5, r2, #11
mov r0, r2
bics r2, r3, ip, lsr #20
bic r2, lr, #-2147483648
str r1, [sp, #48]
str r5, [sp, #56]
mov r1, ip
str r2, [sp, #60]
and ip, r3, ip, lsr #20
beq .L268
ldr r3, [sp, #56]
ldr lr, [sp, #60]
orr r6, ip, r3
asr r3, ip, #31
orr r7, r3, lr
orrs r3, r6, r7
mov r2, ip
beq .L69
cmp r0, #0
sbcs r3, r1, #0
sub r3, ip, #1020
ldr r6, [sp, #56]
orr r7, lr, #-2147483648
sub r3, r3, #2
bge .L70
mov r2, #45
.L254:
add r1, sp, #129
strb r2, [sp, #128]
add r2, sp, #128
str r1, [sp, #52]
str r2, [sp, #44]
.L71:
mov r2, #0
cmn r3, #2
movlt fp, r2
str r2, [sp, #20]
strlt r4, [sp, #72]
bge .L76
.L77:
lsr r2, r6, #1
orr r2, r2, r7, lsl #31
and lr, r6, #1
lsr r5, r7, #1
adds r6, lr, r2
adc r7, fp, r5
adr r5, .L286
ldmia r5, {r4-r5}
cmp fp, r5
cmpeq r7, r4
mov r1, r3
add r3, r3, #1
bcs .L77
mov r5, #0
mvn r4, #-2147483648
lsl r0, r7, #2
lsl ip, r6, #2
ldr r3, [sp, #20]
orr r0, r0, r6, lsr #30
adds r6, ip, r6
adc r7, r0, r7
cmp fp, r5
sub r3, r3, #1
cmpeq r7, r4
str r3, [sp, #20]
add r3, r1, #2
bne .L152
adds r6, r6, r6
adc r7, r7, r7
add r3, r1, #1
.L152:
cmn r3, #2
blt .L77
ldr r4, [sp, #72]
.L76:
cmp r3, #0
ble .L73
mov ip, r4
mov r1, r3
ldr r0, [sp, #20]
.L80:
mov r2, #0
adds r3, r6, #2
adc lr, r7, r2
ldr r7, .L286+12
adds fp, r2, r2
umull r6, r7, lr, r7
lsr r7, r7, #2
lsl r6, r7, #2
adc r6, r6, r7
subs r3, r3, fp
sbc r6, lr, r6
lsr lr, r3, #3
orr lr, lr, r6, lsl #29
ldr r6, .L286+12
sub r1, r1, #1
umull fp, r6, lr, r6
lsr lr, r6, #2
lsl lr, lr, #3
adds r4, lr, r2
lsr r6, r6, #31
lsl r2, lr, #2
adc r5, r6, r7
adds lr, r2, lr
ldr r2, .L286+12
subs r3, r3, lr
umull lr, r2, r3, r2
mov lr, ip
lsr r3, r2, #2
adds r6, r4, r3
adc r7, r5, #0
add r0, r0, #1
.L79:
mov r3, #0
mov ip, #0
mvn fp, #-2147483648
adds r6, r6, r6
adc r7, r7, r7
cmp r3, ip
cmpeq r7, fp
sub r1, r1, #1
bls .L79
cmp r1, r3
mov ip, lr
bgt .L80
str r4, [sp, #80]
str r5, [sp, #84]
mov r3, r1
mov r4, lr
str r0, [sp, #20]
.L73:
mov lr, #0
.L81:
lsr r2, r6, #1
orr r2, r2, r7, lsl #31
and r0, r6, #1
adds r6, r0, r2
add r3, r3, #1
lsr ip, r7, #1
adc r7, lr, ip
cmp r3, #4
mov r2, lr
bne .L81
ldr r3, [sp, #32]
cmp r3, #0
blt .L163
movgt r2, #1
movle r2, #0
ldr r3, [sp, #8]
and r3, r3, #1
orrgt r3, r3, #1
str r3, [sp, #76]
.L82:
bic r3, r4, #32
cmp r3, #71
bne .L83
ldr r3, [sp, #8]
ldr r1, [sp, #20]
eor r3, r3, #1
and r3, r3, r2
str r3, [sp, #72]
ldr r3, [sp, #32]
cmn r1, #3
add r3, r3, #1
blt .L84
cmp r1, r3
bgt .L84
.L85:
ldr r2, [sp, #32]
ldr r3, [sp, #20]
add r3, r3, r2
ldr r2, [sp, #52]
cmp r3, #0
add r2, r2, #1
str r2, [sp, #120]
str r2, [sp, #8]
blt .L269
beq .L166
cmp r3, #16
movge r3, #16
mov r4, #102
sub ip, r3, #1
.L89:
mov r1, #134217728
mov lr, r4
mov r3, #0
mov r4, r1
str r6, [sp, #96]
str r7, [sp, #100]
.L91:
mov r2, #0
adds r3, r3, #2
ldr r5, .L286+12
adc r4, r4, r2
umull r6, r5, r4, r5
lsr r5, r5, #2
adds r7, r2, r2
lsl fp, r5, #2
adc fp, fp, r5
subs r3, r3, r7
sbc fp, r4, fp
ldr r6, .L286+12
lsr r4, r3, #3
orr r4, r4, fp, lsl #29
umull r7, r6, r4, r6
lsr fp, r6, #2
lsl fp, fp, #3
lsr r4, r6, #31
adds r0, fp, r2
lsl r7, fp, #2
adc r1, r4, r5
ldr r4, .L286+12
adds fp, r7, fp
subs r3, r3, fp
umull r5, r4, r3, r4
lsr r3, r4, #2
adds r5, r0, r3
adc r6, r1, #0
lsr r3, r5, #1
and r4, r5, #1
orr r3, r3, r6, lsl #31
adds r3, r4, r3
sub ip, ip, #1
lsr r4, r6, #1
adc r4, r2, r4
cmn ip, #1
bne .L91
str r0, [sp, #88]
str r1, [sp, #92]
add r7, sp, #96
ldmia r7, {r6-r7}
mov r1, r4
mov r4, lr
.L90:
adds r3, r6, r3
adc r1, r7, r1
and r2, r1, #-268435456
str r2, [sp, #64]
mov r2, #0
str r2, [sp, #68]
add ip, sp, #64
ldmia ip, {fp-ip}
orrs r2, fp, ip
beq .L92
.L147:
mov r2, #0
mov lr, r2
adds r3, r3, #2
ldr r0, .L286+12
adc r1, r1, r2
umull r2, r0, r1, r0
lsr r0, r0, #2
lsl r2, r0, #2
adds ip, lr, lr
adc r2, r2, r0
subs ip, r3, ip
sbc r3, r1, r2
lsr r2, ip, #3
orr r2, r2, r3, lsl #29
ldr r3, .L286+12
umull r1, r3, r2, r3
mov r2, r3
lsr r3, r3, #2
lsl r3, r3, #3
adds r1, r3, lr
lsr r2, r2, #31
adc r2, r2, r0
str r1, [sp, #104]
lsl r1, r3, #2
adds r3, r1, r3
str r2, [sp, #108]
ldr r2, .L286+12
subs r3, ip, r3
umull r1, r2, r3, r2
add ip, sp, #104
ldmia ip, {fp-ip}
lsr r3, r2, #2
adds fp, fp, r3
adc ip, ip, #0
ldr r0, [sp, #20]
lsr r3, fp, #1
and r2, fp, #1
orr r3, r3, ip, lsl #31
adds r3, r2, r3
add r0, r0, #1
lsr r2, ip, #1
str r0, [sp, #20]
adc r1, lr, r2
b .L287
.L288:
.align 3
.L286:
.word 858993459
.word 0
.word 1374389535
.word -858993459
.word .LC2
.word .LC1
.word 30768
.word 17998
.word 24910
.L287:
.L92:
cmp r4, #102
beq .L148
lsl r0, r1, #2
lsl r2, r3, #2
adds r2, r2, r3
orr r0, r0, r3, lsr #30
adc r3, r0, r1
adds r1, r2, r2
adc r3, r3, r3
lsr r2, r3, #28
add r2, r2, #48
ldr r0, [sp, #52]
cmp r2, #48
strb r2, [r0]
ldrne r2, [sp, #20]
subne r2, r2, #1
strne r2, [sp, #20]
ldr r2, [sp, #76]
cmp r2, #0
beq .L105
mov r2, #46
ldr ip, [sp, #52]
ldr r0, [sp, #32]
strb r2, [ip, #1]
cmp r0, #0
add r2, ip, #2
str r2, [sp, #8]
beq .L105
ldr ip, [sp, #120]
bic r3, r3, #-268435456
add fp, ip, r0
mov lr, #15
mov r0, r3
.L107:
cmp lr, #0
movle r2, #48
ble .L106
lsl r3, r0, #2
lsl r2, r1, #2
adds r2, r2, r1
orr r3, r3, r1, lsr #30
adc r3, r3, r0
adds r2, r2, r2
adc r3, r3, r3
lsr r0, r3, #28
mov r1, r2
sub lr, lr, #1
add r2, r0, #48
bic r0, r3, #-268435456
.L106:
strb r2, [ip, #1]!
cmp fp, ip
bne .L107
ldr r3, [sp, #8]
ldr r2, [sp, #32]
add r3, r3, r2
str r3, [sp, #8]
.L105:
ldr r3, [sp, #72]
cmp r3, #0
beq .L108
.L256:
ldr r1, [sp, #8]
.L109:
mov r2, r1
ldrb r3, [r1, #-1]! @ zero_extendqisi2
cmp r3, #48
beq .L109
cmp r3, #46
movne r1, r2
str r1, [sp, #8]
.L108:
bic r3, r4, #32
cmp r3, #69
bne .L110
ldr r3, [sp, #20]
ldr r2, [sp, #8]
cmp r3, #0
rsblt r3, r3, #0
strlt r3, [sp, #20]
strb r4, [r2]
ldr r2, [sp, #20]
movlt r1, #45
mov r0, r2
movge r1, #43
ldr r3, .L286+8
umull ip, r0, r3, r0
lsr r0, r0, #5
add r3, r0, r0, lsl #2
add r3, r3, r3, lsl #2
sub r3, r2, r3, lsl #2
ldr r2, .L286+12
add r0, r0, #48
umull ip, r2, r3, r2
lsr r2, r2, #3
add ip, r2, r2, lsl #2
sub r3, r3, ip, lsl #1
ldr ip, [sp, #8]
add r3, r3, #48
add r2, r2, #48
strb r3, [ip, #4]
add r3, ip, #5
strb r1, [ip, #1]
strb r0, [ip, #2]
strb r2, [ip, #3]
str r3, [sp, #8]
.L110:
mov r3, #0
ldr r2, [sp, #40]
ldr r1, [sp, #16]
orrs r2, r2, r1
ldr r2, [sp, #8]
ldr r1, [sp, #44]
strb r3, [r2]
sub r4, r2, r1
bne .L112
ldrb r3, [sp, #128] @ zero_extendqisi2
cmp r3, #45
beq .L112
.L244:
cmp r4, #200
bgt .L62
.L151:
mov r3, #0
str r3, [sp, #8]
.L63:
ldr r3, [sp, #24]
cmp r3, r4
ldr r3, [sp, #48]
strle r4, [sp, #24]
str r3, [sp, #20]
ble .L132
add r3, sp, #128
add r2, r4, #1
str r3, [sp, #44]
.L54:
ldr r3, [sp, #36]
cmp r3, #0
beq .L270
.L143:
mov r2, #32
ldr r3, [sp, #44]
ldr r1, [sp, #24]
add r3, r3, r4
.L134:
add r4, r4, #1
cmp r1, r4
strb r2, [r3], #1
bgt .L134
.L132:
ldr r3, [sp, #24]
cmp r3, #0
beq .L24
add r3, sp, #128
ldrb r0, [sp, #128] @ zero_extendqisi2
str r3, [sp, #44]
.L55:
ldr r3, [sp, #44]
ldr r2, [sp, #24]
sub fp, r9, r3
add r5, r3, r2
ldr r9, [sp, #4]
add r4, sp, #129
b .L137
.L271:
cmp r4, r5
add r3, fp, r4
beq .L176
ldrb r0, [r4], #1 @ zero_extendqisi2
.L137:
mov r1, r10
blx r9
cmn r0, #1
bne .L271
.L62:
mvn r9, #0
.L19:
ldr r3, .L286+16
ldr r2, [r3]
ldr r3, [sp, #332]
eors r2, r3, r2
mov r3, #0
bne .L272
mov r0, r9
add sp, sp, #340
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L267:
cmp r4, #42
str r5, [sp, #40]
ldr r10, [sp, #32]
mov r5, r7
add r7, sp, #24
ldmia r7, {r6-r7}
str fp, [sp, #36]
beq .L273
bl __ctype_b_loc
ldr r2, [r0]
lsl r3, r4, #1
ldrh r3, [r2, r3]
ands r0, r3, #2048
streq r0, [sp, #24]
bne .L274
.L36:
cmp r4, #46
mvnne r3, #0
strne r3, [sp, #32]
beq .L275
.L37:
mov r1, r4
ldr r0, .L286+20
bl strchr
cmp r0, #0
ldrne r3, [sp, #124]
addne r2, r3, #1
strne r2, [sp, #124]
ldrbne r4, [r3] @ zero_extendqisi2
cmp r4, #120
ldrls pc, [pc, r4, asl #2]
b .L42
.L44:
.word .L19
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L53
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L51
.word .L42
.word .L51
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L43
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L42
.word .L52
.word .L50
.word .L51
.word .L51
.word .L51
.word .L42
.word .L50
.word .L42
.word .L42
.word .L42
.word .L42
.word .L49
.word .L48
.word .L47
.word .L42
.word .L42
.word .L46
.word .L42
.word .L45
.word .L42
.word .L42
.word .L43
.L273:
ldr r2, [sp, #20]
ldr r3, [r2], #4
cmp r3, #0
movlt r1, #1
strlt r1, [sp, #36]
add r1, r5, #2
str r1, [sp, #124]
str r3, [sp, #24]
ldrb r4, [r5, #1] @ zero_extendqisi2
rsblt r3, r3, #0
strlt r3, [sp, #24]
str r2, [sp, #20]
.L35:
ldr r3, [sp, #24]
cmp r3, #201
movcs r3, #200
str r3, [sp, #24]
b .L36
.L275:
ldr r2, [sp, #124]
add r3, r2, #1
str r3, [sp, #124]
ldrb r2, [r2] @ zero_extendqisi2
cmp r2, #42
bne .L38
ldr r2, [sp, #20]
ldr r1, [r2], #4
str r1, [sp, #32]
str r2, [sp, #20]
.L39:
ldr r1, [sp, #32]
add r2, r3, #1
cmp r1, #201
str r2, [sp, #124]
movlt r2, r1
mvnge r2, #0
ldrb r4, [r3] @ zero_extendqisi2
str r2, [sp, #32]
b .L37
.L274:
add r0, sp, #124
bl _atoi
ldr r3, [sp, #124]
str r0, [sp, #24]
add r2, r3, #1
str r2, [sp, #124]
ldrb r4, [r3] @ zero_extendqisi2
b .L35
.L42:
cmp r4, #200
ble .L24
b .L62
.L43:
ldr r3, [sp, #20]
ldr r2, [sp, #8]
ldr r1, [r3], #4
cmp r2, #0
str r3, [sp, #48]
beq .L124
ldr ip, .L286+24
ldr r3, [sp, #32]
mov r2, #16
add r0, sp, #130
strh ip, [sp, #128] @ movhi
bl _to_x
cmp r4, #88
movne r3, #2
mov r4, r0
strne r3, [sp, #8]
addne r4, r0, #2
beq .L276
.L129:
ldr r3, [sp, #32]
cmn r3, #1
beq .L277
cmp r4, #200
bgt .L62
.L258:
mov r3, #32
str r3, [sp, #12]
b .L63
.L50:
ldr r3, [sp, #20]
ldr r1, [r3], #4
cmp r1, #0
str r3, [sp, #48]
blt .L278
ldr r3, [sp, #40]
cmp r3, #0
movne r3, #43
strbne r3, [sp, #128]
bne .L57
ldr r3, [sp, #16]
cmp r3, #0
movne r3, #32
strbne r3, [sp, #128]
bne .L57
ldr r3, [sp, #32]
mov r2, #10
add r0, sp, #128
bl _to_x
ldr r3, [sp, #16]
mov r4, r0
str r3, [sp, #8]
b .L129
.L45:
ldr r2, [sp, #20]
ldr r4, [sp, #32]
ldr r1, [r2], #4
mov r3, r4
str r2, [sp, #48]
add r0, sp, #128
mov r2, #10
bl _to_x
cmn r4, #1
mov r4, r0
beq .L244
.L117:
cmp r4, #200
bgt .L62
mov r3, #0
str r3, [sp, #8]
b .L258
.L46:
ldr r3, [sp, #20]
mov r4, #0
ldr r1, [r3], #4
str r3, [sp, #48]
sub r3, r1, #1
b .L120
.L280:
add r4, r4, #1
cmp r4, #200
beq .L279
.L120:
ldrb r2, [r3, #1]! @ zero_extendqisi2
cmp r2, #0
bne .L280
ldr r3, [sp, #32]
cmp r4, r3
movcs r4, r3
.L122:
cmp r4, #0
bne .L150
ldr r3, [sp, #48]
str r3, [sp, #20]
b .L24
.L47:
ldr r3, [sp, #20]
ldr ip, .L286+24
mov r2, r3
ldr r1, [r2], #4
mov r3, #8
str r2, [sp, #48]
add r0, sp, #130
mov r2, #16
strh ip, [sp, #128] @ movhi
bl _to_x
ldr r3, [sp, #32]
add r4, r0, #2
cmn r3, #1
bne .L117
b .L244
.L48:
ldr r3, [sp, #20]
ldr r2, [sp, #8]
ldr r1, [r3], #4
cmp r2, #0
str r3, [sp, #48]
beq .L172
mov r0, #48
cmp r1, #0
strb r0, [sp, #128]
addne r0, sp, #129
beq .L281
.L114:
ldr r4, [sp, #32]
mov r2, #8
mov r3, r4
bl _to_x
ldr r3, [sp, #8]
cmn r4, #1
add r4, r0, r3
bne .L117
b .L244
.L53:
mov r1, r10
mov r0, #37
ldr r3, [sp, #4]
blx r3
cmn r0, #1
bne .L259
b .L62
.L49:
ldr r3, [sp, #20]
ldr r2, [r3], #4
str r9, [r2]
str r3, [sp, #20]
b .L24
.L52:
mov r2, #0
ldr r3, [sp, #20]
ldr r1, [sp, #24]
ldr r0, [r3], #4
cmp r1, #1
and r0, r0, #255
strb r0, [sp, #128]
strb r2, [sp, #129]
str r3, [sp, #20]
bgt .L158
mov r3, #1
str r3, [sp, #24]
add r3, sp, #128
str r3, [sp, #44]
b .L55
.L38:
add r0, sp, #124
bl _atoi
ldr r3, [sp, #124]
str r0, [sp, #32]
b .L39
.L176:
mov r9, r3
b .L24
.L278:
mov r3, #45
cmp r1, #-2147483648
strb r3, [sp, #128]
rsbne r1, r1, #0
.L57:
mov r2, #10
ldr r3, [sp, #32]
add r0, sp, #129
bl _to_x
add r2, sp, #129
add r3, sp, #128
add r4, r2, r0
sub r4, r4, r3
mov r3, #1
str r3, [sp, #8]
b .L129
.L154:
mov r9, r0
b .L19
.L277:
cmp r4, #200
ble .L63
b .L62
.L268:
add r4, sp, #56
ldmia r4, {r3-r4}
orrs r3, r3, r4
bne .L65
cmp r0, #0
sbcs r3, r1, #0
mov r2, #73
movlt r1, #45
movge r1, #43
mov r4, #4
ldr r3, .L286+28
strb r1, [sp, #128]
strh r3, [sp, #130] @ movhi
strb r2, [sp, #129]
add r3, sp, #132
.L67:
mov r2, #0
ldr r1, [sp, #40]
ldr r0, [sp, #16]
strb r2, [r3]
orrs r1, r1, r0
str r1, [sp, #8]
bne .L63
ldrb r3, [sp, #128] @ zero_extendqisi2
cmp r3, #45
bne .L151
.L112:
cmp r4, #200
bgt .L62
mov r3, #1
str r3, [sp, #8]
b .L63
.L124:
add r3, sp, #128
mov r0, r3
str r3, [sp, #44]
mov r2, #16
ldr r3, [sp, #32]
bl _to_x
cmp r4, #88
mov r4, r0
bne .L129
ldrb r3, [sp, #128] @ zero_extendqisi2
cmp r3, #0
beq .L129
.L149:
ldr r2, [sp, #44]
.L128:
sub r1, r3, #97
cmp r1, #25
subls r3, r3, #32
strbls r3, [r2]
ldrb r3, [r2, #1]! @ zero_extendqisi2
cmp r3, #0
bne .L128
ldr r3, [sp, #8]
cmp r3, #0
movne r3, #2
str r3, [sp, #8]
b .L129
.L158:
add r3, sp, #128
str r2, [sp, #8]
mov r4, #1
mov r2, #2
str r3, [sp, #44]
b .L54
.L270:
ldr r3, [sp, #24]
sub r4, r3, r4
ldr r3, [sp, #44]
add r0, r3, r4
mov r1, r3
bl memmove
ldr r3, [sp, #12]
cmp r3, #32
ldreq r3, [sp, #36]
ldrne r3, [sp, #8]
streq r3, [sp, #8]
addne r4, r4, r3
ldr r3, [sp, #8]
cmp r3, r4
bge .L132
.L142:
ldr r2, [sp, #44]
ldr r3, [sp, #8]
add r4, r2, r4
add r3, r2, r3
ldr r2, [sp, #12]
.L136:
strb r2, [r3], #1
cmp r4, r3
bne .L136
b .L132
.L150:
add r3, sp, #128
mov r0, r3
str r3, [sp, #44]
mov r2, r4
mov r3, #201
bl __memcpy_chk
.L116:
ldr r3, [sp, #24]
cmp r3, r4
bgt .L145
ldr r3, [sp, #48]
ldrb r0, [sp, #128] @ zero_extendqisi2
str r4, [sp, #24]
str r3, [sp, #20]
b .L55
.L83:
cmp r4, #102
beq .L165
mov r2, #0
ldr r3, [sp, #32]
str r2, [sp, #72]
add r3, r3, #1
.L86:
cmp r3, #16
movge r3, #16
ldr r2, [sp, #52]
sub ip, r3, #1
add r2, r2, #1
str r2, [sp, #120]
str r2, [sp, #8]
b .L89
.L69:
ldr r3, [sp, #40]
cmp r3, #0
movne r3, #43
movne r2, #0
bne .L255
ldr r3, [sp, #16]
cmp r3, #0
beq .L180
mov r3, #32
ldr r2, [sp, #40]
.L255:
str r2, [sp, #20]
strb r3, [sp, #128]
mov r3, r2
add r2, sp, #129
str r2, [sp, #52]
add r2, sp, #128
str r2, [sp, #44]
b .L73
.L172:
add r0, sp, #128
b .L114
.L163:
mov r2, #1
mov r3, #6
str r2, [sp, #76]
str r3, [sp, #32]
b .L82
.L84:
cmp r4, #103
movne r4, #69
moveq r4, #101
b .L86
.L148:
ldr r2, [sp, #20]
cmp r2, #0
ble .L94
mov lr, #16
ldr r0, [sp, #52]
sub ip, r0, #1
add r4, ip, r2
.L96:
cmp lr, #0
movle r0, #48
ble .L95
lsl r0, r1, #2
lsl r2, r3, #2
orr r0, r0, r3, lsr #30
adds r3, r2, r3
adc r2, r0, r1
adds r3, r3, r3
adc r2, r2, r2
lsr r0, r2, #28
sub lr, lr, #1
add r0, r0, #48
bic r1, r2, #-268435456
.L95:
strb r0, [ip, #1]!
cmp ip, r4
bne .L96
ldr r0, [sp, #20]
ldr r2, [sp, #52]
add r2, r2, r0
str r2, [sp, #8]
mov r2, #0
str r2, [sp, #20]
.L97:
ldr r2, [sp, #76]
cmp r2, #0
beq .L98
ldr ip, [sp, #8]
mov r2, #46
mov fp, ip
ldr r0, [sp, #32]
strb r2, [fp], #1
cmp r0, #0
beq .L168
add r0, r0, #1
add r4, ip, r0
mov r2, fp
mov r5, r1
ldr ip, [sp, #20]
b .L102
.L99:
cmp lr, #0
movle r0, #48
ble .L101
lsl r1, r5, #2
lsl r0, r3, #2
orr r1, r1, r3, lsr #30
adds r3, r0, r3
adc r1, r1, r5
adds r3, r3, r3
adc r1, r1, r1
lsr r0, r1, #28
sub lr, lr, #1
add r0, r0, #48
bic r5, r1, #-268435456
.L101:
strb r0, [r2, #-1]
.L100:
cmp r4, r2
beq .L282
.L102:
cmp ip, #0
add r2, r2, #1
beq .L99
mov r1, #48
add ip, ip, #1
strb r1, [r2, #-1]
b .L100
.L168:
str fp, [sp, #8]
.L98:
ldr r3, [sp, #72]
cmp r3, #0
beq .L110
mov r4, #102
b .L256
.L145:
ldr r3, [sp, #48]
add r2, r4, #1
str r3, [sp, #20]
mov r3, #0
str r3, [sp, #8]
b .L54
.L281:
ldr r3, [sp, #32]
strb r1, [sp, #129]
cmn r3, #1
addeq r3, sp, #128
moveq r4, r2
streq r3, [sp, #44]
beq .L116
ldr r3, [sp, #24]
cmp r3, #1
bgt .L131
ldr r3, [sp, #8]
str r3, [sp, #24]
ldr r3, [sp, #48]
str r3, [sp, #20]
add r3, sp, #128
str r3, [sp, #44]
b .L55
.L279:
ldr r3, [sp, #32]
cmp r3, #199
bhi .L150
ldr r4, [sp, #32]
b .L122
.L276:
ldrb r3, [sp, #128] @ zero_extendqisi2
add r4, r4, #2
cmp r3, #0
beq .L248
add r2, sp, #128
str r2, [sp, #44]
b .L149
.L282:
ldr r3, [sp, #32]
str ip, [sp, #20]
add r3, fp, r3
str r3, [sp, #8]
b .L98
.L165:
mov r3, #0
str r3, [sp, #72]
b .L85
.L94:
mov r2, #48
ldr r0, [sp, #52]
mov lr, #16
strb r2, [r0]
b .L97
.L65:
mov r2, #78
ldr r3, .L286+32
mov r4, #3
strh r3, [sp, #128] @ movhi
strb r2, [sp, #130]
add r3, sp, #131
b .L67
.L269:
adds r3, r6, #0
adc r1, r7, #134217728
and r2, r1, #-268435456
str r2, [sp, #112]
mov r2, #0
str r2, [sp, #116]
add r5, sp, #112
ldmia r5, {r4-r5}
orrs r2, r4, r5
beq .L148
mov r4, #102
b .L147
.L166:
mov r4, #102
mov r3, #0
mov r1, #134217728
b .L90
.L131:
ldr r3, [sp, #36]
cmp r3, #0
beq .L283
ldr r3, [sp, #48]
ldr r4, [sp, #36]
str r3, [sp, #20]
add r3, sp, #128
str r3, [sp, #44]
b .L143
.L272:
bl __stack_chk_fail
.L283:
ldr r3, [sp, #24]
mov r2, #2
sub r4, r3, #1
add r3, sp, #128
mov r1, r3
str r3, [sp, #44]
add r0, r3, r4
ldr r3, [sp, #48]
str r3, [sp, #20]
ldr r3, [sp, #36]
str r3, [sp, #8]
bl memmove
mov r3, #32
str r3, [sp, #12]
b .L142
.L248:
mov r3, #2
str r3, [sp, #8]
b .L129
.L180:
add r3, sp, #128
str r3, [sp, #44]
str r3, [sp, #52]
ldr r3, [sp, #16]
str r3, [sp, #20]
b .L73
.L70:
ldr r2, [sp, #40]
cmp r2, #0
movne r2, #43
bne .L254
ldr r2, [sp, #16]
cmp r2, #0
movne r2, #32
bne .L254
.L161:
add r2, sp, #128
str r2, [sp, #44]
str r2, [sp, #52]
b .L71
.size _prf, .-_prf
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001156.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Here are your %d random values:\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%3d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor edi, edi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 32
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov rbx, rsp
lea rbp, 20[rsp]
call time@PLT
mov r12, rbx
mov rdi, rax
call srand@PLT
.L2:
call rand@PLT
add r12, 4
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1717986919
sar ecx, 31
sar rdx, 34
sub edx, ecx
lea edx, [rdx+rdx*4]
add edx, edx
sub eax, edx
add eax, 1
mov DWORD PTR -4[r12], eax
cmp r12, rbp
jne .L2
mov edx, 5
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea r12, .LC1[rip]
.L3:
mov edx, DWORD PTR [rbx]
mov rsi, r12
mov edi, 1
xor eax, eax
add rbx, 4
call __printf_chk@PLT
cmp rbx, rbp
jne .L3
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L9
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001156.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Here are your %d random values:\012\000"
.align 2
.LC1:
.ascii "%3d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
sub sp, sp, #28
mov r4, sp
ldr r3, .L10
mov r0, #0
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
bl time
bl srand
mov r7, r4
ldr r6, .L10+4
add r5, sp, #20
.L2:
bl rand
smull r3, r2, r6, r0
asr r3, r0, #31
rsb r3, r3, r2, asr #2
add r3, r3, r3, lsl #2
sub r0, r0, r3, lsl #1
add r0, r0, #1
str r0, [r7], #4
cmp r7, r5
bne .L2
mov r2, #5
mov r0, #1
ldr r1, .L10+8
bl __printf_chk
ldr r6, .L10+12
.L3:
ldr r2, [r4], #4
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L3
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, pc}
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC2
.word 1717986919
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100117.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "input : "
.LC1:
.string "output : "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
pxor xmm0, xmm0
mov edi, 1
lea rsi, .LC0[rip]
sub rsp, 112
.cfi_def_cfa_offset 128
mov rax, QWORD PTR fs:40
mov QWORD PTR 104[rsp], rax
xor eax, eax
mov rbp, rsp
movups XMMWORD PTR [rsp], xmm0
movups XMMWORD PTR 16[rsp], xmm0
movups XMMWORD PTR 32[rsp], xmm0
movups XMMWORD PTR 48[rsp], xmm0
movups XMMWORD PTR 64[rsp], xmm0
movups XMMWORD PTR 80[rsp], xmm0
mov DWORD PTR 96[rsp], 0
call __printf_chk@PLT
mov rdi, rbp
xor eax, eax
call gets@PLT
mov edi, 1
xor eax, eax
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov rdi, rbp
call puts@PLT
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 112
.cfi_remember_state
.cfi_def_cfa_offset 16
xor eax, eax
pop rbp
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100117.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "input : \000"
.align 2
.LC1:
.ascii "output : \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, #0
sub sp, sp, #104
ldr r3, .L6
mov r2, #96
mov r1, r4
add r0, sp, #4
ldr r3, [r3]
str r3, [sp, #100]
mov r3,#0
str r4, [sp]
bl memset
ldr r1, .L6+4
mov r0, #1
bl __printf_chk
mov r0, sp
bl gets
ldr r1, .L6+8
mov r0, #1
bl __printf_chk
mov r0, sp
bl puts
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #100]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, r4
add sp, sp, #104
@ sp needed
pop {r4, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100118.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 264
.cfi_def_cfa_offset 320
movss xmm0, DWORD PTR x_1[rip]
movss DWORD PTR 56[rsp], xmm0
movss xmm0, DWORD PTR x_4[rip]
movss DWORD PTR 80[rsp], xmm0
movss xmm0, DWORD PTR x_6[rip]
movss DWORD PTR 88[rsp], xmm0
movss xmm0, DWORD PTR x_7[rip]
movss DWORD PTR 108[rsp], xmm0
movss xmm0, DWORD PTR x_8[rip]
movss DWORD PTR 104[rsp], xmm0
movss xmm0, DWORD PTR x_10[rip]
movss DWORD PTR 92[rsp], xmm0
movss xmm0, DWORD PTR x_12[rip]
movss DWORD PTR 64[rsp], xmm0
movss xmm0, DWORD PTR x_13[rip]
movss DWORD PTR 44[rsp], xmm0
movss xmm0, DWORD PTR x_14[rip]
movss DWORD PTR 68[rsp], xmm0
movss xmm0, DWORD PTR x_19[rip]
movss DWORD PTR 116[rsp], xmm0
movss xmm0, DWORD PTR x_5[rip]
movss DWORD PTR 120[rsp], xmm0
movss xmm0, DWORD PTR x_9[rip]
movss DWORD PTR 100[rsp], xmm0
movss xmm0, DWORD PTR x_15[rip]
movss DWORD PTR 124[rsp], xmm0
movss xmm0, DWORD PTR x_3[rip]
movss DWORD PTR 60[rsp], xmm0
movss xmm0, DWORD PTR x_11[rip]
movss DWORD PTR 84[rsp], xmm0
movss xmm0, DWORD PTR x_16[rip]
movss DWORD PTR 72[rsp], xmm0
movss xmm0, DWORD PTR x_18[rip]
movss DWORD PTR 224[rsp], xmm0
movss xmm0, DWORD PTR x_0[rip]
movss DWORD PTR 76[rsp], xmm0
movss xmm0, DWORD PTR x_2[rip]
movss DWORD PTR 96[rsp], xmm0
movss xmm0, DWORD PTR x_17[rip]
movss DWORD PTR 112[rsp], xmm0
jmp .L502
.p2align 4,,10
.p2align 3
.L1005:
comisd xmm13, xmm4
ja .L539
comisd xmm15, xmm7
jbe .L837
movss xmm1, DWORD PTR .LC25[rip]
addss xmm1, DWORD PTR 64[rsp]
movd r14d, xmm1
.p2align 4,,10
.p2align 3
.L41:
movsd xmm8, QWORD PTR .LC19[rip]
movsd xmm3, QWORD PTR .LC19[rip]
pxor xmm1, xmm1
movsd xmm11, QWORD PTR .LC5[rip]
addsd xmm11, QWORD PTR -104[rsp]
cvtss2sd xmm1, DWORD PTR 60[rsp]
addsd xmm3, QWORD PTR -40[rsp]
addsd xmm8, xmm1
movsd xmm14, QWORD PTR .LC3[rip]
addsd xmm14, QWORD PTR -80[rsp]
movsd xmm7, QWORD PTR .LC16[rip]
movapd xmm9, xmm11
maxsd xmm9, QWORD PTR 48[rsp]
movsd xmm13, QWORD PTR .LC0[rip]
movapd xmm12, xmm3
addsd xmm7, QWORD PTR -96[rsp]
movsd xmm10, QWORD PTR .LC2[rip]
maxsd xmm12, xmm8
movapd xmm5, xmm14
maxsd xmm5, xmm9
movsd QWORD PTR -56[rsp], xmm7
movapd xmm6, xmm12
maxsd xmm6, xmm5
movq rax, xmm6
pxor xmm6, xmm6
cvtss2sd xmm6, DWORD PTR 84[rsp]
addsd xmm13, xmm6
movsd QWORD PTR -88[rsp], xmm6
pxor xmm6, xmm6
cvtss2sd xmm6, DWORD PTR 72[rsp]
addsd xmm10, xmm6
movsd QWORD PTR -64[rsp], xmm6
pxor xmm6, xmm6
cvtss2sd xmm6, DWORD PTR 224[rsp]
movsd QWORD PTR -8[rsp], xmm6
movapd xmm4, xmm13
movq r10, xmm10
movapd xmm10, xmm6
maxsd xmm4, xmm7
movsd xmm6, QWORD PTR .LC2[rip]
movsd xmm7, QWORD PTR .LC20[rip]
addsd xmm7, QWORD PTR -72[rsp]
addsd xmm6, xmm10
movq xmm10, r10
maxsd xmm10, xmm6
movsd QWORD PTR -48[rsp], xmm6
movapd xmm6, xmm7
maxsd xmm6, xmm10
comisd xmm4, xmm6
ja .L59
movq xmm4, rax
comisd xmm4, xmm6
ja .L537
comisd xmm7, xmm10
jbe .L845
movss xmm6, DWORD PTR .LC27[rip]
addss xmm6, DWORD PTR 68[rsp]
movd r15d, xmm6
.p2align 4,,10
.p2align 3
.L66:
movsd xmm13, QWORD PTR .LC28[rip]
pxor xmm6, xmm6
movsd xmm11, QWORD PTR .LC20[rip]
addsd xmm11, QWORD PTR -104[rsp]
cvtss2sd xmm6, DWORD PTR 76[rsp]
movsd QWORD PTR -56[rsp], xmm6
movsd xmm8, QWORD PTR .LC29[rip]
addsd xmm13, xmm6
addsd xmm8, QWORD PTR 8[rsp]
movsd xmm6, QWORD PTR .LC1[rip]
movsd xmm10, QWORD PTR .LC3[rip]
addsd xmm6, QWORD PTR -16[rsp]
movapd xmm9, xmm11
addsd xmm10, QWORD PTR -8[rsp]
movsd xmm14, QWORD PTR .LC14[rip]
movapd xmm12, xmm13
movapd xmm5, xmm8
addsd xmm14, QWORD PTR -64[rsp]
maxsd xmm9, xmm6
maxsd xmm12, xmm3
movsd QWORD PTR 192[rsp], xmm10
maxsd xmm5, xmm9
movapd xmm7, xmm12
maxsd xmm7, xmm5
movq rax, xmm7
movsd xmm7, QWORD PTR .LC30[rip]
addsd xmm7, QWORD PTR -96[rsp]
movq rdx, xmm7
movsd xmm7, QWORD PTR .LC14[rip]
addsd xmm7, QWORD PTR -72[rsp]
movq xmm4, rdx
maxsd xmm4, xmm7
movsd QWORD PTR 16[rsp], xmm7
movsd xmm7, QWORD PTR .LC18[rip]
addsd xmm7, QWORD PTR -120[rsp]
maxsd xmm10, xmm7
movsd QWORD PTR -48[rsp], xmm7
movapd xmm7, xmm14
maxsd xmm7, xmm10
comisd xmm4, xmm7
ja .L84
movq xmm4, rax
comisd xmm4, xmm7
ja .L535
comisd xmm14, xmm10
jbe .L853
movss xmm7, DWORD PTR .LC21[rip]
addss xmm7, DWORD PTR 72[rsp]
movd ebp, xmm7
.p2align 4,,10
.p2align 3
.L91:
movsd xmm14, QWORD PTR .LC29[rip]
pxor xmm7, xmm7
movsd xmm4, QWORD PTR .LC34[rip]
cvtss2sd xmm7, DWORD PTR 96[rsp]
movsd QWORD PTR [rsp], xmm7
movsd xmm13, QWORD PTR .LC6[rip]
addsd xmm13, QWORD PTR -80[rsp]
addsd xmm14, xmm7
addsd xmm4, xmm1
movsd xmm5, QWORD PTR .LC2[rip]
movsd xmm7, QWORD PTR .LC14[rip]
addsd xmm5, QWORD PTR -32[rsp]
addsd xmm7, QWORD PTR -88[rsp]
movsd xmm10, QWORD PTR .LC0[rip]
movapd xmm11, xmm13
movapd xmm9, xmm14
movsd QWORD PTR -48[rsp], xmm4
maxsd xmm9, xmm4
maxsd xmm11, xmm5
movsd xmm4, QWORD PTR .LC18[rip]
movsd QWORD PTR 128[rsp], xmm5
addsd xmm4, QWORD PTR -112[rsp]
addsd xmm10, xmm2
movsd QWORD PTR 32[rsp], xmm7
movapd xmm5, xmm4
movq rdi, xmm4
movapd xmm4, xmm9
maxsd xmm5, xmm11
movapd xmm12, xmm10
maxsd xmm4, xmm5
movq rax, xmm4
movsd xmm4, QWORD PTR .LC17[rip]
addsd xmm4, QWORD PTR -104[rsp]
movsd QWORD PTR 152[rsp], xmm4
maxsd xmm4, xmm7
movsd xmm7, QWORD PTR .LC2[rip]
addsd xmm7, QWORD PTR -120[rsp]
movsd QWORD PTR 136[rsp], xmm7
maxsd xmm12, xmm7
movapd xmm7, xmm15
maxsd xmm7, xmm12
comisd xmm4, xmm7
ja .L109
movq xmm4, rax
comisd xmm4, xmm7
ja .L533
comisd xmm15, xmm12
jbe .L861
movss xmm7, DWORD PTR .LC25[rip]
addss xmm7, DWORD PTR 64[rsp]
movd r12d, xmm7
.p2align 4,,10
.p2align 3
.L116:
movsd xmm11, QWORD PTR .LC4[rip]
pxor xmm12, xmm12
movsd xmm5, QWORD PTR .LC30[rip]
movsd xmm7, QWORD PTR .LC4[rip]
addsd xmm5, QWORD PTR -80[rsp]
cvtss2sd xmm12, DWORD PTR 112[rsp]
movapd xmm10, xmm12
addsd xmm7, QWORD PTR -88[rsp]
addsd xmm11, xmm1
movsd xmm13, QWORD PTR .LC30[rip]
movsd QWORD PTR -48[rsp], xmm12
addsd xmm13, QWORD PTR -56[rsp]
movsd xmm4, QWORD PTR .LC36[rip]
movsd QWORD PTR 160[rsp], xmm5
addsd xmm4, QWORD PTR -40[rsp]
movsd xmm15, QWORD PTR .LC29[rip]
maxsd xmm5, xmm7
movapd xmm9, xmm11
movsd QWORD PTR 136[rsp], xmm7
addsd xmm15, QWORD PTR -96[rsp]
movsd xmm12, QWORD PTR .LC28[rip]
movapd xmm14, xmm13
maxsd xmm14, xmm4
maxsd xmm9, xmm5
movsd QWORD PTR 32[rsp], xmm5
addsd xmm12, xmm10
movsd xmm5, QWORD PTR .LC37[rip]
movsd xmm10, QWORD PTR .LC0[rip]
addsd xmm10, QWORD PTR -120[rsp]
movapd xmm7, xmm14
addsd xmm5, xmm0
movsd QWORD PTR 200[rsp], xmm12
maxsd xmm7, xmm9
movsd QWORD PTR 208[rsp], xmm10
maxsd xmm12, xmm10
movsd QWORD PTR 128[rsp], xmm5
movq rax, xmm7
movapd xmm7, xmm5
movapd xmm5, xmm15
maxsd xmm5, xmm7
movsd xmm7, QWORD PTR .LC16[rip]
addsd xmm7, xmm2
movapd xmm10, xmm7
maxsd xmm10, xmm12
comisd xmm5, xmm10
ja .L134
movq xmm5, rax
comisd xmm5, xmm10
ja .L531
comisd xmm7, xmm12
jbe .L869
movss xmm7, DWORD PTR .LC23[rip]
addss xmm7, DWORD PTR 124[rsp]
movd r13d, xmm7
.p2align 4,,10
.p2align 3
.L141:
movsd xmm7, QWORD PTR .LC16[rip]
addsd xmm7, QWORD PTR -16[rsp]
movsd xmm11, QWORD PTR .LC15[rip]
addsd xmm11, QWORD PTR -88[rsp]
movsd xmm5, QWORD PTR .LC17[rip]
movsd xmm14, QWORD PTR .LC14[rip]
movapd xmm13, xmm7
addsd xmm14, QWORD PTR -80[rsp]
movsd xmm12, QWORD PTR .LC19[rip]
maxsd xmm13, xmm11
addsd xmm5, xmm1
movsd QWORD PTR 168[rsp], xmm11
movsd xmm11, QWORD PTR .LC30[rip]
addsd xmm11, QWORD PTR -64[rsp]
addsd xmm12, QWORD PTR -8[rsp]
movapd xmm10, xmm14
movsd QWORD PTR 136[rsp], xmm5
maxsd xmm10, xmm13
maxsd xmm5, xmm8
movsd QWORD PTR 32[rsp], xmm11
movsd QWORD PTR 176[rsp], xmm13
movsd xmm13, QWORD PTR .LC1[rip]
addsd xmm13, QWORD PTR -48[rsp]
movapd xmm15, xmm5
maxsd xmm5, xmm10
movq rax, xmm5
movsd xmm5, QWORD PTR .LC16[rip]
addsd xmm5, xmm0
movapd xmm9, xmm5
movq rcx, xmm5
movapd xmm5, xmm12
maxsd xmm9, xmm11
movsd xmm11, QWORD PTR .LC37[rip]
addsd xmm11, QWORD PTR -120[rsp]
movsd QWORD PTR 216[rsp], xmm11
maxsd xmm5, xmm11
movapd xmm11, xmm13
movsd QWORD PTR 184[rsp], xmm5
maxsd xmm11, xmm5
movq xmm5, rax
comisd xmm9, xmm11
ja .L159
comisd xmm5, xmm11
ja .L529
comisd xmm13, QWORD PTR 184[rsp]
jbe .L877
movss xmm5, DWORD PTR .LC8[rip]
addss xmm5, DWORD PTR 112[rsp]
movss DWORD PTR 228[rsp], xmm5
.p2align 4,,10
.p2align 3
.L166:
movsd xmm5, QWORD PTR .LC0[rip]
addsd xmm5, QWORD PTR [rsp]
movapd xmm11, xmm3
movsd xmm14, QWORD PTR .LC17[rip]
addsd xmm14, QWORD PTR -112[rsp]
movsd xmm15, QWORD PTR .LC30[rip]
movsd xmm12, QWORD PTR .LC34[rip]
maxsd xmm11, xmm5
addsd xmm12, QWORD PTR -64[rsp]
movsd QWORD PTR 184[rsp], xmm5
movsd xmm5, QWORD PTR .LC2[rip]
addsd xmm5, QWORD PTR -104[rsp]
addsd xmm15, xmm1
movapd xmm8, xmm14
movapd xmm10, xmm12
maxsd xmm8, xmm5
movapd xmm9, xmm15
movsd QWORD PTR 232[rsp], xmm5
movapd xmm5, xmm11
movsd QWORD PTR 216[rsp], xmm8
maxsd xmm9, xmm8
movapd xmm8, xmm6
maxsd xmm5, xmm9
movq r8, xmm5
movsd xmm5, QWORD PTR .LC36[rip]
addsd xmm5, QWORD PTR -88[rsp]
movsd QWORD PTR 176[rsp], xmm5
maxsd xmm8, xmm5
movsd xmm5, QWORD PTR .LC17[rip]
addsd xmm5, QWORD PTR -48[rsp]
movq rax, xmm5
movsd xmm5, QWORD PTR .LC36[rip]
addsd xmm5, QWORD PTR -120[rsp]
movq xmm13, rax
maxsd xmm13, xmm5
maxsd xmm10, xmm13
comisd xmm8, xmm10
ja .L184
movq xmm6, r8
comisd xmm6, xmm10
ja .L527
comisd xmm12, xmm13
jbe .L885
movss xmm3, DWORD PTR .LC35[rip]
addss xmm3, DWORD PTR 72[rsp]
movss DWORD PTR 232[rsp], xmm3
.p2align 4,,10
.p2align 3
.L191:
movsd xmm5, QWORD PTR .LC20[rip]
addsd xmm5, QWORD PTR -24[rsp]
movsd xmm3, QWORD PTR .LC29[rip]
movsd xmm14, QWORD PTR 48[rsp]
addsd xmm3, QWORD PTR -56[rsp]
movsd xmm6, QWORD PTR .LC19[rip]
maxsd xmm14, xmm5
addsd xmm6, QWORD PTR -104[rsp]
movsd QWORD PTR 248[rsp], xmm5
movsd xmm11, QWORD PTR .LC14[rip]
movsd xmm12, QWORD PTR .LC17[rip]
addsd xmm12, QWORD PTR -72[rsp]
movapd xmm15, xmm3
addsd xmm11, xmm2
movsd QWORD PTR 184[rsp], xmm6
maxsd xmm15, xmm4
maxsd xmm6, xmm14
movsd QWORD PTR 240[rsp], xmm14
movapd xmm10, xmm12
movsd xmm14, QWORD PTR .LC14[rip]
addsd xmm14, QWORD PTR -96[rsp]
movapd xmm13, xmm11
movapd xmm5, xmm15
movapd xmm9, xmm6
maxsd xmm5, xmm6
movsd xmm6, QWORD PTR .LC20[rip]
movapd xmm8, xmm14
addsd xmm6, xmm0
movsd QWORD PTR 216[rsp], xmm6
maxsd xmm8, xmm6
movsd xmm6, QWORD PTR .LC17[rip]
addsd xmm6, QWORD PTR -120[rsp]
maxsd xmm13, xmm6
maxsd xmm10, xmm13
comisd xmm8, xmm10
ja .L209
comisd xmm5, xmm10
ja .L525
comisd xmm12, xmm13
jbe .L893
movss xmm4, DWORD PTR .LC24[rip]
addss xmm4, DWORD PTR 68[rsp]
movss DWORD PTR 240[rsp], xmm4
.p2align 4,,10
.p2align 3
.L216:
movsd xmm15, QWORD PTR .LC34[rip]
addsd xmm15, QWORD PTR -32[rsp]
movsd xmm10, QWORD PTR .LC3[rip]
addsd xmm10, QWORD PTR -112[rsp]
movsd xmm11, QWORD PTR .LC17[rip]
addsd xmm11, QWORD PTR -64[rsp]
movsd xmm13, QWORD PTR .LC37[rip]
movapd xmm4, xmm15
maxsd xmm4, QWORD PTR 152[rsp]
movsd QWORD PTR 216[rsp], xmm15
movapd xmm8, xmm10
addsd xmm13, QWORD PTR -40[rsp]
movsd xmm14, QWORD PTR .LC34[rip]
movapd xmm9, xmm11
addsd xmm14, QWORD PTR [rsp]
movsd QWORD PTR 248[rsp], xmm4
maxsd xmm8, xmm4
movsd xmm4, QWORD PTR .LC18[rip]
movapd xmm12, xmm13
addsd xmm4, xmm2
maxsd xmm12, xmm14
movapd xmm5, xmm4
movsd QWORD PTR 48[rsp], xmm4
movapd xmm4, xmm7
movapd xmm15, xmm12
maxsd xmm4, xmm5
movq xmm5, rax
maxsd xmm15, xmm8
maxsd xmm5, QWORD PTR 208[rsp]
maxsd xmm9, xmm5
comisd xmm4, xmm9
ja .L234
comisd xmm15, xmm9
ja .L523
comisd xmm11, xmm5
jbe .L901
movss xmm7, DWORD PTR .LC24[rip]
addss xmm7, DWORD PTR 72[rsp]
movss DWORD PTR 152[rsp], xmm7
.p2align 4,,10
.p2align 3
.L241:
movsd xmm10, QWORD PTR .LC1[rip]
addsd xmm10, QWORD PTR -24[rsp]
movq xmm8, r10
movsd xmm4, QWORD PTR .LC19[rip]
addsd xmm4, QWORD PTR -88[rsp]
movsd xmm13, QWORD PTR .LC16[rip]
addsd xmm13, QWORD PTR -56[rsp]
movapd xmm7, xmm10
addsd xmm2, QWORD PTR .LC15[rip]
movsd xmm9, QWORD PTR .LC4[rip]
maxsd xmm7, xmm4
addsd xmm9, QWORD PTR -112[rsp]
movsd QWORD PTR 256[rsp], xmm4
movsd xmm12, QWORD PTR .LC4[rip]
movapd xmm11, xmm13
addsd xmm12, QWORD PTR -96[rsp]
maxsd xmm11, QWORD PTR 136[rsp]
movsd QWORD PTR 248[rsp], xmm7
movapd xmm4, xmm7
movapd xmm7, xmm9
maxsd xmm7, xmm4
movapd xmm4, xmm11
maxsd xmm4, xmm7
movq r8, xmm4
movsd xmm4, QWORD PTR .LC5[rip]
addsd xmm4, xmm0
movsd QWORD PTR 208[rsp], xmm4
movapd xmm5, xmm4
movapd xmm4, xmm12
maxsd xmm4, xmm5
movsd xmm5, QWORD PTR .LC18[rip]
addsd xmm5, QWORD PTR -48[rsp]
maxsd xmm8, xmm5
movapd xmm15, xmm5
movapd xmm5, xmm8
movapd xmm8, xmm2
maxsd xmm8, xmm5
comisd xmm4, xmm8
ja .L259
movq xmm4, r8
comisd xmm4, xmm8
ja .L521
comisd xmm2, xmm5
jbe .L909
movss xmm2, DWORD PTR .LC22[rip]
addss xmm2, DWORD PTR 124[rsp]
movss DWORD PTR 136[rsp], xmm2
.p2align 4,,10
.p2align 3
.L266:
movsd xmm2, QWORD PTR .LC0[rip]
addsd xmm2, QWORD PTR -112[rsp]
movsd xmm13, QWORD PTR .LC30[rip]
addsd xmm13, QWORD PTR [rsp]
movsd xmm7, QWORD PTR .LC19[rip]
addsd xmm7, QWORD PTR -96[rsp]
movsd xmm11, QWORD PTR .LC18[rip]
movapd xmm15, xmm2
addsd xmm11, QWORD PTR -24[rsp]
movsd xmm8, QWORD PTR .LC18[rip]
movapd xmm12, xmm13
addsd xmm8, QWORD PTR -8[rsp]
maxsd xmm12, xmm2
movapd xmm4, xmm7
movsd xmm2, QWORD PTR .LC34[rip]
movsd xmm9, QWORD PTR .LC30[rip]
addsd xmm9, QWORD PTR -48[rsp]
addsd xmm2, xmm0
movapd xmm10, xmm8
maxsd xmm10, xmm6
movsd QWORD PTR 256[rsp], xmm2
maxsd xmm4, xmm2
movsd QWORD PTR 248[rsp], xmm4
movapd xmm2, xmm4
movapd xmm4, xmm11
maxsd xmm4, xmm2
movapd xmm2, xmm12
maxsd xmm2, xmm4
movq r8, xmm2
movsd xmm2, QWORD PTR .LC20[rip]
addsd xmm2, QWORD PTR -64[rsp]
movsd QWORD PTR 208[rsp], xmm2
movapd xmm5, xmm2
movsd xmm2, QWORD PTR 16[rsp]
maxsd xmm2, xmm5
movapd xmm5, xmm9
maxsd xmm5, xmm10
comisd xmm2, xmm5
ja .L284
movq xmm2, r8
comisd xmm2, xmm5
ja .L519
comisd xmm9, xmm10
jbe .L917
movss xmm2, DWORD PTR .LC33[rip]
addss xmm2, DWORD PTR 112[rsp]
movss DWORD PTR 208[rsp], xmm2
.p2align 4,,10
.p2align 3
.L291:
movsd xmm7, QWORD PTR .LC18[rip]
movapd xmm12, xmm3
movsd xmm11, QWORD PTR .LC29[rip]
movq xmm4, rdi
addsd xmm11, QWORD PTR -80[rsp]
movsd xmm5, QWORD PTR .LC37[rip]
addsd xmm7, xmm1
addsd xmm5, QWORD PTR -8[rsp]
movsd xmm10, QWORD PTR .LC15[rip]
addsd xmm10, QWORD PTR -48[rsp]
movsd xmm6, QWORD PTR .LC36[rip]
movapd xmm8, xmm11
addsd xmm6, QWORD PTR -72[rsp]
maxsd xmm8, QWORD PTR 184[rsp]
maxsd xmm12, xmm7
movapd xmm15, xmm5
movsd xmm13, QWORD PTR .LC17[rip]
movapd xmm9, xmm10
maxsd xmm4, xmm8
addsd xmm13, xmm0
movapd xmm2, xmm12
maxsd xmm9, xmm5
movsd xmm5, QWORD PTR 32[rsp]
maxsd xmm2, xmm4
maxsd xmm5, xmm9
movq r8, xmm2
movapd xmm2, xmm13
maxsd xmm2, xmm6
comisd xmm2, xmm5
ja .L309
movq xmm2, r8
comisd xmm2, xmm5
ja .L517
movsd xmm2, QWORD PTR 32[rsp]
comisd xmm2, xmm9
jbe .L925
movss xmm2, DWORD PTR .LC33[rip]
addss xmm2, DWORD PTR 72[rsp]
movd edi, xmm2
.p2align 4,,10
.p2align 3
.L316:
movsd xmm10, QWORD PTR .LC3[rip]
movsd xmm3, QWORD PTR .LC30[rip]
movq xmm7, r9
addsd xmm3, QWORD PTR -32[rsp]
movsd xmm6, QWORD PTR .LC15[rip]
movsd xmm9, QWORD PTR .LC36[rip]
addsd xmm9, QWORD PTR -56[rsp]
addsd xmm10, xmm1
addsd xmm6, QWORD PTR -40[rsp]
movsd xmm5, QWORD PTR .LC2[rip]
movsd QWORD PTR 184[rsp], xmm3
maxsd xmm7, xmm3
movsd xmm13, QWORD PTR .LC15[rip]
addsd xmm13, QWORD PTR -104[rsp]
movapd xmm12, xmm9
movapd xmm3, xmm10
addsd xmm5, xmm0
maxsd xmm12, xmm6
maxsd xmm3, xmm7
movapd xmm8, xmm5
maxsd xmm8, QWORD PTR 192[rsp]
movapd xmm2, xmm12
maxsd xmm2, xmm3
movq r8, xmm2
movsd xmm2, QWORD PTR .LC3[rip]
addsd xmm2, QWORD PTR -24[rsp]
movapd xmm4, xmm2
movapd xmm15, xmm2
movapd xmm2, xmm13
maxsd xmm2, xmm4
movsd xmm4, QWORD PTR 168[rsp]
maxsd xmm4, xmm8
comisd xmm2, xmm4
ja .L334
movq xmm2, r8
comisd xmm2, xmm4
ja .L515
movsd xmm2, QWORD PTR 168[rsp]
comisd xmm2, xmm8
jbe .L933
movss xmm3, DWORD PTR .LC22[rip]
addss xmm3, DWORD PTR 84[rsp]
movd r8d, xmm3
.p2align 4,,10
.p2align 3
.L341:
movsd xmm9, QWORD PTR .LC5[rip]
movq xmm12, rsi
movapd xmm4, xmm10
addsd xmm9, QWORD PTR -112[rsp]
movsd xmm2, QWORD PTR .LC14[rip]
addsd xmm2, QWORD PTR [rsp]
movsd xmm13, QWORD PTR .LC20[rip]
addsd xmm13, QWORD PTR -32[rsp]
movapd xmm7, xmm9
movsd xmm5, QWORD PTR .LC37[rip]
maxsd xmm7, QWORD PTR 144[rsp]
maxsd xmm12, xmm2
addsd xmm5, QWORD PTR -48[rsp]
movsd xmm8, QWORD PTR 32[rsp]
maxsd xmm4, xmm7
movapd xmm3, xmm12
maxsd xmm8, xmm5
movapd xmm15, xmm5
maxsd xmm3, xmm4
movq r9, xmm3
movsd xmm3, QWORD PTR .LC37[rip]
addsd xmm3, QWORD PTR -16[rsp]
movapd xmm6, xmm3
movsd QWORD PTR [rsp], xmm3
movapd xmm3, xmm13
maxsd xmm3, xmm6
movsd xmm6, QWORD PTR .LC3[rip]
addsd xmm6, xmm0
movapd xmm5, xmm6
maxsd xmm5, xmm8
comisd xmm3, xmm5
ja .L359
movq xmm3, r9
comisd xmm3, xmm5
ja .L513
comisd xmm6, xmm8
jbe .L941
movss xmm3, DWORD PTR .LC10[rip]
addss xmm3, DWORD PTR 44[rsp]
movd r9d, xmm3
.p2align 4,,10
.p2align 3
.L366:
movsd xmm3, QWORD PTR .LC20[rip]
addsd xmm3, QWORD PTR -16[rsp]
addsd xmm1, QWORD PTR .LC28[rip]
movsd xmm6, QWORD PTR .LC15[rip]
movsd xmm12, QWORD PTR .LC14[rip]
addsd xmm12, QWORD PTR -32[rsp]
movsd xmm10, QWORD PTR .LC34[rip]
addsd xmm10, QWORD PTR -56[rsp]
movsd QWORD PTR [rsp], xmm3
movsd xmm9, QWORD PTR .LC37[rip]
addsd xmm6, QWORD PTR -112[rsp]
movapd xmm4, xmm12
addsd xmm9, QWORD PTR -88[rsp]
movsd xmm13, QWORD PTR .LC36[rip]
maxsd xmm4, xmm3
movapd xmm7, xmm10
addsd xmm13, QWORD PTR -64[rsp]
movsd xmm8, QWORD PTR .LC18[rip]
maxsd xmm7, xmm1
addsd xmm8, QWORD PTR -72[rsp]
movapd xmm3, xmm4
movsd QWORD PTR -32[rsp], xmm4
movapd xmm4, xmm6
movapd xmm15, xmm13
maxsd xmm4, xmm3
movapd xmm3, xmm7
maxsd xmm3, xmm4
movq rsi, xmm3
movsd xmm3, QWORD PTR .LC29[rip]
addsd xmm3, xmm0
movapd xmm5, xmm3
movsd QWORD PTR -112[rsp], xmm3
movapd xmm3, xmm9
maxsd xmm3, xmm5
movsd xmm5, QWORD PTR .LC4[rip]
addsd xmm5, QWORD PTR -120[rsp]
maxsd xmm15, xmm5
movsd QWORD PTR 32[rsp], xmm5
movapd xmm5, xmm8
maxsd xmm5, xmm15
comisd xmm3, xmm5
ja .L384
movq xmm3, rsi
comisd xmm3, xmm5
ja .L511
comisd xmm8, xmm15
jbe .L949
movss xmm3, DWORD PTR .LC25[rip]
addss xmm3, DWORD PTR 68[rsp]
movd r10d, xmm3
.p2align 4,,10
.p2align 3
.L391:
movsd xmm7, QWORD PTR .LC28[rip]
addsd xmm7, QWORD PTR -80[rsp]
movapd xmm4, xmm1
movsd xmm6, QWORD PTR .LC17[rip]
addsd xmm6, QWORD PTR -56[rsp]
movsd xmm10, QWORD PTR .LC30[rip]
addsd xmm10, QWORD PTR -24[rsp]
movsd xmm8, QWORD PTR .LC19[rip]
movapd xmm3, xmm7
maxsd xmm3, QWORD PTR 216[rsp]
movapd xmm9, xmm6
addsd xmm8, QWORD PTR -64[rsp]
maxsd xmm9, xmm14
movapd xmm15, xmm10
maxsd xmm4, xmm3
movsd QWORD PTR [rsp], xmm3
movapd xmm5, xmm8
maxsd xmm5, QWORD PTR 200[rsp]
movapd xmm3, xmm9
maxsd xmm3, xmm4
movsd QWORD PTR -112[rsp], xmm3
movsd xmm3, QWORD PTR .LC3[rip]
addsd xmm3, QWORD PTR -88[rsp]
maxsd xmm15, xmm3
movsd QWORD PTR -32[rsp], xmm3
movapd xmm3, xmm15
movapd xmm15, xmm5
movq xmm5, rcx
maxsd xmm5, xmm15
comisd xmm3, xmm5
ja .L409
movsd xmm3, QWORD PTR -112[rsp]
comisd xmm3, xmm5
ja .L509
movq xmm1, rcx
comisd xmm1, xmm15
jbe .L957
movss xmm1, DWORD PTR .LC23[rip]
addss xmm1, DWORD PTR 44[rsp]
movd r11d, xmm1
.p2align 4,,10
.p2align 3
.L416:
movsd xmm6, QWORD PTR .LC15[rip]
addsd xmm6, QWORD PTR -120[rsp]
movsd xmm1, QWORD PTR .LC6[rip]
addsd xmm1, QWORD PTR -16[rsp]
movsd xmm8, QWORD PTR .LC34[rip]
addsd xmm8, QWORD PTR -80[rsp]
movapd xmm4, xmm6
movsd QWORD PTR -80[rsp], xmm6
movsd xmm15, QWORD PTR .LC19[rip]
movq xmm6, rax
addsd xmm15, QWORD PTR -72[rsp]
maxsd xmm6, xmm4
movsd xmm10, QWORD PTR .LC37[rip]
movsd QWORD PTR -112[rsp], xmm1
addsd xmm0, QWORD PTR .LC6[rip]
movapd xmm5, xmm8
addsd xmm10, QWORD PTR -56[rsp]
movsd xmm14, QWORD PTR .LC14[rip]
maxsd xmm5, xmm1
movsd xmm1, QWORD PTR 24[rsp]
addsd xmm14, QWORD PTR 8[rsp]
movapd xmm4, xmm15
maxsd xmm1, xmm0
maxsd xmm4, xmm6
movapd xmm9, xmm10
maxsd xmm9, xmm2
movapd xmm3, xmm14
maxsd xmm3, xmm5
comisd xmm1, xmm4
movapd xmm7, xmm9
maxsd xmm7, xmm3
ja .L434
comisd xmm7, xmm4
ja .L507
comisd xmm15, xmm6
jbe .L965
movss xmm15, DWORD PTR .LC26[rip]
addss xmm15, DWORD PTR 68[rsp]
.p2align 4,,10
.p2align 3
.L441:
movsd xmm5, QWORD PTR 48[rsp]
movq xmm0, rdx
movsd xmm6, QWORD PTR .LC4[rip]
movapd xmm1, xmm12
addsd xmm6, QWORD PTR -8[rsp]
movsd xmm4, QWORD PTR .LC29[rip]
movsd xmm10, QWORD PTR .LC37[rip]
addsd xmm10, QWORD PTR -104[rsp]
movsd xmm9, QWORD PTR .LC6[rip]
addsd xmm9, QWORD PTR -72[rsp]
addsd xmm4, QWORD PTR -88[rsp]
maxsd xmm5, xmm6
movsd xmm8, QWORD PTR .LC30[rip]
addsd xmm8, QWORD PTR 8[rsp]
movapd xmm3, xmm10
maxsd xmm0, QWORD PTR 128[rsp]
movapd xmm2, xmm9
maxsd xmm3, xmm4
maxsd xmm2, xmm5
movapd xmm7, xmm8
maxsd xmm7, xmm11
maxsd xmm1, xmm3
comisd xmm0, xmm2
movapd xmm14, xmm7
maxsd xmm14, xmm1
ja .L459
comisd xmm14, xmm2
ja .L505
comisd xmm9, xmm5
jbe .L973
movss xmm0, DWORD PTR .LC13[rip]
addss xmm0, DWORD PTR 68[rsp]
movss DWORD PTR 224[rsp], xmm0
.p2align 4,,10
.p2align 3
.L466:
movsd xmm10, QWORD PTR .LC34[rip]
addsd xmm10, QWORD PTR -48[rsp]
movapd xmm2, xmm13
movapd xmm1, xmm12
movsd xmm5, QWORD PTR .LC30[rip]
addsd xmm5, QWORD PTR -120[rsp]
movsd xmm9, QWORD PTR .LC1[rip]
addsd xmm9, QWORD PTR -96[rsp]
movapd xmm4, xmm10
movsd xmm7, QWORD PTR .LC16[rip]
addsd xmm7, QWORD PTR -40[rsp]
maxsd xmm4, xmm5
movsd xmm3, QWORD PTR 24[rsp]
maxsd xmm3, QWORD PTR 176[rsp]
movapd xmm0, xmm9
maxsd xmm0, QWORD PTR 16[rsp]
movapd xmm6, xmm7
maxsd xmm6, QWORD PTR 160[rsp]
maxsd xmm2, xmm4
maxsd xmm1, xmm3
movapd xmm8, xmm6
comisd xmm0, xmm2
maxsd xmm8, xmm1
ja .L484
comisd xmm8, xmm2
ja .L503
comisd xmm13, xmm4
jbe .L981
movss xmm0, DWORD PTR .LC38[rip]
addss xmm0, DWORD PTR 72[rsp]
movss DWORD PTR 116[rsp], xmm0
.p2align 4,,10
.p2align 3
.L491:
movss xmm0, DWORD PTR 208[rsp]
mov DWORD PTR 96[rsp], r15d
movss xmm1, DWORD PTR 228[rsp]
mov DWORD PTR 76[rsp], ebx
movss DWORD PTR 84[rsp], xmm0
movss xmm0, DWORD PTR 152[rsp]
mov DWORD PTR 72[rsp], r11d
movss DWORD PTR 100[rsp], xmm0
movss xmm0, DWORD PTR 136[rsp]
mov DWORD PTR 60[rsp], ebp
movss DWORD PTR 92[rsp], xmm0
movss xmm0, DWORD PTR 240[rsp]
mov DWORD PTR 124[rsp], r10d
movss DWORD PTR 104[rsp], xmm0
movss xmm0, DWORD PTR 232[rsp]
mov DWORD PTR 120[rsp], r13d
mov DWORD PTR 68[rsp], r9d
mov DWORD PTR 44[rsp], r8d
mov DWORD PTR 64[rsp], edi
mov DWORD PTR 80[rsp], r12d
mov DWORD PTR 56[rsp], r14d
movss DWORD PTR 112[rsp], xmm15
movss DWORD PTR 108[rsp], xmm0
movss DWORD PTR 88[rsp], xmm1
.L502:
movsd xmm5, QWORD PTR .LC1[rip]
pxor xmm0, xmm0
movsd xmm12, QWORD PTR .LC0[rip]
pxor xmm1, xmm1
cvtss2sd xmm0, DWORD PTR 56[rsp]
movsd QWORD PTR -40[rsp], xmm0
pxor xmm3, xmm3
movsd xmm14, QWORD PTR .LC3[rip]
addsd xmm12, xmm0
pxor xmm0, xmm0
cvtss2sd xmm1, DWORD PTR 88[rsp]
movsd xmm2, QWORD PTR .LC1[rip]
cvtss2sd xmm0, DWORD PTR 80[rsp]
addsd xmm5, xmm0
movsd QWORD PTR -112[rsp], xmm0
movsd xmm0, QWORD PTR .LC2[rip]
movsd QWORD PTR -80[rsp], xmm1
cvtss2sd xmm3, DWORD PTR 68[rsp]
movsd xmm15, QWORD PTR .LC5[rip]
movsd xmm11, QWORD PTR .LC4[rip]
addsd xmm0, xmm1
pxor xmm1, xmm1
movapd xmm10, xmm12
movsd xmm9, QWORD PTR .LC6[rip]
cvtss2sd xmm1, DWORD PTR 108[rsp]
addsd xmm14, xmm1
movsd QWORD PTR -32[rsp], xmm1
pxor xmm1, xmm1
cvtss2sd xmm1, DWORD PTR 104[rsp]
addsd xmm2, xmm1
maxsd xmm10, xmm5
movsd xmm4, QWORD PTR .LC3[rip]
movsd QWORD PTR 144[rsp], xmm0
addsd xmm15, xmm3
movsd xmm13, QWORD PTR .LC0[rip]
movapd xmm6, xmm14
movsd QWORD PTR -72[rsp], xmm3
pxor xmm3, xmm3
maxsd xmm6, xmm2
movapd xmm8, xmm10
movsd QWORD PTR -88[rsp], xmm2
cvtss2sd xmm3, DWORD PTR 116[rsp]
addsd xmm9, xmm3
movapd xmm7, xmm15
movsd QWORD PTR -104[rsp], xmm1
movsd QWORD PTR -120[rsp], xmm3
maxsd xmm0, xmm6
maxsd xmm7, xmm9
maxsd xmm8, xmm0
movapd xmm2, xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 92[rsp]
addsd xmm11, xmm0
movsd QWORD PTR -24[rsp], xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 64[rsp]
addsd xmm4, xmm0
movsd QWORD PTR -96[rsp], xmm0
pxor xmm0, xmm0
cvtss2sd xmm0, DWORD PTR 44[rsp]
addsd xmm13, xmm0
movapd xmm1, xmm11
maxsd xmm1, xmm4
movapd xmm3, xmm13
maxsd xmm3, xmm7
comisd xmm1, xmm3
ja .L9
comisd xmm8, xmm3
ja .L541
comisd xmm13, xmm7
jbe .L829
movss xmm1, DWORD PTR .LC7[rip]
addss xmm1, DWORD PTR 44[rsp]
movd ebx, xmm1
.p2align 4,,10
.p2align 3
.L16:
movsd xmm1, QWORD PTR .LC2[rip]
addsd xmm1, QWORD PTR -40[rsp]
pxor xmm6, xmm6
pxor xmm2, xmm2
cvtss2sd xmm6, DWORD PTR 120[rsp]
cvtss2sd xmm2, DWORD PTR 100[rsp]
movsd QWORD PTR -16[rsp], xmm2
movsd xmm12, QWORD PTR .LC19[rip]
movsd xmm9, QWORD PTR .LC20[rip]
movsd QWORD PTR 8[rsp], xmm6
movsd xmm11, QWORD PTR .LC16[rip]
movapd xmm10, xmm1
movq rsi, xmm1
movsd xmm1, QWORD PTR .LC15[rip]
addsd xmm12, xmm0
addsd xmm11, QWORD PTR -32[rsp]
movsd xmm5, QWORD PTR .LC14[rip]
addsd xmm1, xmm6
addsd xmm5, QWORD PTR -112[rsp]
movsd xmm15, QWORD PTR .LC18[rip]
movapd xmm7, xmm12
addsd xmm15, QWORD PTR -96[rsp]
movsd xmm8, QWORD PTR .LC6[rip]
addsd xmm8, QWORD PTR -104[rsp]
movapd xmm6, xmm11
movapd xmm3, xmm1
movq r9, xmm1
maxsd xmm10, xmm5
movsd xmm1, QWORD PTR .LC5[rip]
movapd xmm4, xmm15
addsd xmm1, xmm2
movsd xmm2, QWORD PTR .LC17[rip]
addsd xmm2, QWORD PTR -24[rsp]
maxsd xmm6, xmm8
movapd xmm13, xmm10
movsd QWORD PTR 48[rsp], xmm1
maxsd xmm1, xmm2
movsd QWORD PTR 24[rsp], xmm2
pxor xmm2, xmm2
maxsd xmm3, xmm6
cvtss2sd xmm2, DWORD PTR 124[rsp]
addsd xmm9, xmm2
maxsd xmm13, xmm3
maxsd xmm7, xmm9
maxsd xmm4, xmm7
comisd xmm1, xmm4
jbe .L1005
comisd xmm13, xmm1
ja .L539
movsd xmm1, QWORD PTR 48[rsp]
comisd xmm1, QWORD PTR 24[rsp]
jbe .L836
movss xmm1, DWORD PTR .LC12[rip]
addss xmm1, DWORD PTR 100[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L541:
comisd xmm10, xmm2
jbe .L824
comisd xmm12, xmm5
jbe .L825
movss xmm1, DWORD PTR .LC7[rip]
addss xmm1, DWORD PTR 56[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L9:
comisd xmm8, xmm1
ja .L541
comisd xmm11, xmm4
jbe .L828
movss xmm1, DWORD PTR .LC11[rip]
addss xmm1, DWORD PTR 92[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L503:
comisd xmm6, xmm1
jbe .L976
comisd xmm7, QWORD PTR 160[rsp]
jbe .L977
movss xmm0, DWORD PTR .LC23[rip]
addss xmm0, DWORD PTR 56[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L505:
comisd xmm7, xmm1
jbe .L968
comisd xmm8, xmm11
jbe .L969
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, DWORD PTR 120[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L459:
comisd xmm14, xmm0
ja .L505
movq xmm0, rdx
comisd xmm0, QWORD PTR 128[rsp]
jbe .L972
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, DWORD PTR 64[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L484:
comisd xmm8, xmm0
ja .L503
comisd xmm9, QWORD PTR 16[rsp]
jbe .L980
movss xmm0, DWORD PTR .LC8[rip]
addss xmm0, DWORD PTR 64[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L507:
comisd xmm9, xmm3
jbe .L960
comisd xmm10, xmm2
jbe .L961
movss xmm15, DWORD PTR .LC39[rip]
addss xmm15, DWORD PTR 76[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L434:
comisd xmm7, xmm1
ja .L507
movsd xmm1, QWORD PTR 24[rsp]
comisd xmm1, xmm0
jbe .L964
movss xmm15, DWORD PTR .LC24[rip]
addss xmm15, DWORD PTR 92[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L513:
comisd xmm12, xmm4
jbe .L936
movq xmm3, rsi
comisd xmm3, xmm2
jbe .L937
movss xmm3, DWORD PTR .LC9[rip]
addss xmm3, DWORD PTR 56[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L511:
comisd xmm7, xmm4
jbe .L944
comisd xmm10, xmm1
jbe .L945
movss xmm3, DWORD PTR .LC35[rip]
addss xmm3, DWORD PTR 76[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L334:
movq xmm4, r8
comisd xmm4, xmm2
ja .L515
comisd xmm13, xmm15
jbe .L932
movss xmm2, DWORD PTR .LC22[rip]
addss xmm2, DWORD PTR 104[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L519:
comisd xmm12, xmm4
jbe .L912
comisd xmm13, xmm15
jbe .L913
movss xmm2, DWORD PTR .LC33[rip]
addss xmm2, DWORD PTR 96[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L509:
comisd xmm9, xmm4
jbe .L952
comisd xmm6, xmm14
jbe .L953
movss xmm1, DWORD PTR .LC24[rip]
addss xmm1, DWORD PTR 76[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L409:
movsd xmm5, QWORD PTR -112[rsp]
comisd xmm5, xmm3
ja .L509
comisd xmm10, QWORD PTR -32[rsp]
jbe .L956
movss xmm1, DWORD PTR .LC33[rip]
addss xmm1, DWORD PTR 92[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L529:
comisd xmm15, xmm10
jbe .L872
movsd xmm5, QWORD PTR 136[rsp]
comisd xmm5, xmm8
jbe .L873
movss xmm5, DWORD PTR .LC24[rip]
addss xmm5, DWORD PTR 60[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L515:
comisd xmm12, xmm3
jbe .L928
comisd xmm9, xmm6
jbe .L929
movss xmm2, DWORD PTR .LC38[rip]
addss xmm2, DWORD PTR 76[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L234:
comisd xmm15, xmm4
ja .L523
comisd xmm7, QWORD PTR 48[rsp]
jbe .L900
movss xmm7, DWORD PTR .LC23[rip]
addss xmm7, DWORD PTR 100[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L384:
movq xmm5, rsi
comisd xmm5, xmm3
ja .L511
comisd xmm9, QWORD PTR -112[rsp]
jbe .L948
movss xmm3, DWORD PTR .LC39[rip]
addss xmm3, DWORD PTR 84[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L535:
comisd xmm12, xmm5
jbe .L848
comisd xmm13, xmm3
jbe .L849
movss xmm7, DWORD PTR .LC31[rip]
addss xmm7, DWORD PTR 76[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L517:
comisd xmm12, xmm4
jbe .L920
comisd xmm3, xmm7
jbe .L921
movss xmm2, DWORD PTR .LC32[rip]
addss xmm2, DWORD PTR 76[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L309:
movq xmm5, r8
comisd xmm5, xmm2
ja .L517
comisd xmm13, xmm6
jbe .L924
movss xmm2, DWORD PTR .LC24[rip]
addss xmm2, DWORD PTR 44[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L521:
comisd xmm11, xmm7
jbe .L904
comisd xmm13, QWORD PTR 136[rsp]
jbe .L905
movss xmm2, DWORD PTR .LC23[rip]
addss xmm2, DWORD PTR 76[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L359:
movq xmm6, r9
comisd xmm6, xmm3
ja .L513
comisd xmm13, QWORD PTR [rsp]
jbe .L940
movss xmm3, DWORD PTR .LC27[rip]
addss xmm3, DWORD PTR 108[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L134:
movq xmm7, rax
comisd xmm7, xmm5
ja .L531
comisd xmm15, QWORD PTR 128[rsp]
jbe .L868
movss xmm7, DWORD PTR .LC32[rip]
addss xmm7, DWORD PTR 64[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L527:
comisd xmm11, xmm9
jbe .L880
comisd xmm3, QWORD PTR 184[rsp]
jbe .L881
movss xmm3, DWORD PTR .LC26[rip]
addss xmm3, DWORD PTR 56[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L537:
comisd xmm12, xmm5
jbe .L840
comisd xmm3, xmm8
movss xmm6, DWORD PTR .LC26[rip]
jbe .L841
addss xmm6, DWORD PTR 56[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L59:
movq xmm6, rax
comisd xmm6, xmm4
ja .L537
comisd xmm13, QWORD PTR -56[rsp]
jbe .L844
movss xmm6, DWORD PTR .LC7[rip]
addss xmm6, DWORD PTR 84[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L284:
movq xmm6, r8
comisd xmm6, xmm2
ja .L519
movsd xmm2, QWORD PTR 16[rsp]
comisd xmm2, QWORD PTR 208[rsp]
jbe .L916
movss xmm2, DWORD PTR .LC21[rip]
addss xmm2, DWORD PTR 68[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L531:
comisd xmm14, xmm9
jbe .L864
comisd xmm13, xmm4
jbe .L865
movss xmm7, DWORD PTR .LC33[rip]
addss xmm7, DWORD PTR 76[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L525:
comisd xmm15, xmm9
jbe .L888
comisd xmm3, xmm4
jbe .L889
movss xmm4, DWORD PTR .LC32[rip]
addss xmm4, DWORD PTR 76[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L209:
comisd xmm5, xmm8
ja .L525
comisd xmm14, QWORD PTR 216[rsp]
jbe .L892
movss xmm4, DWORD PTR .LC21[rip]
addss xmm4, DWORD PTR 64[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L84:
movq xmm7, rax
comisd xmm7, xmm4
ja .L535
movq xmm7, rdx
comisd xmm7, QWORD PTR 16[rsp]
jbe .L852
movss xmm7, DWORD PTR .LC33[rip]
addss xmm7, DWORD PTR 64[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L523:
comisd xmm12, xmm8
jbe .L896
comisd xmm13, xmm14
jbe .L897
movss xmm7, DWORD PTR .LC39[rip]
addss xmm7, DWORD PTR 56[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L533:
comisd xmm9, xmm5
jbe .L856
comisd xmm14, QWORD PTR -48[rsp]
jbe .L857
movss xmm7, DWORD PTR .LC32[rip]
addss xmm7, DWORD PTR 96[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L109:
movq xmm7, rax
comisd xmm7, xmm4
ja .L533
movsd xmm7, QWORD PTR 152[rsp]
comisd xmm7, QWORD PTR 32[rsp]
jbe .L860
movss xmm7, DWORD PTR .LC24[rip]
addss xmm7, DWORD PTR 104[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L184:
movq xmm5, r8
comisd xmm5, xmm8
ja .L527
comisd xmm6, QWORD PTR 176[rsp]
jbe .L884
movss xmm3, DWORD PTR .LC8[rip]
addss xmm3, DWORD PTR 100[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L539:
comisd xmm10, xmm3
jbe .L832
movq xmm1, rsi
comisd xmm1, xmm5
jbe .L833
movss xmm1, DWORD PTR .LC9[rip]
addss xmm1, DWORD PTR 56[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L259:
movq xmm2, r8
comisd xmm2, xmm4
ja .L521
comisd xmm12, QWORD PTR 208[rsp]
jbe .L908
movss xmm2, DWORD PTR .LC11[rip]
addss xmm2, DWORD PTR 64[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L159:
comisd xmm5, xmm9
ja .L529
movq xmm5, rcx
comisd xmm5, QWORD PTR 32[rsp]
jbe .L876
movss xmm5, DWORD PTR .LC23[rip]
addss xmm5, DWORD PTR 44[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L856:
movq xmm7, rdi
comisd xmm7, xmm11
jbe .L858
movss xmm7, DWORD PTR .LC25[rip]
addss xmm7, DWORD PTR 80[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L888:
movsd xmm4, QWORD PTR 184[rsp]
comisd xmm4, QWORD PTR 240[rsp]
jbe .L890
movss xmm4, DWORD PTR .LC26[rip]
addss xmm4, DWORD PTR 104[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L840:
comisd xmm14, xmm9
jbe .L842
movss xmm6, DWORD PTR .LC10[rip]
addss xmm6, DWORD PTR 88[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L952:
comisd xmm1, QWORD PTR [rsp]
jbe .L954
movss xmm1, DWORD PTR .LC31[rip]
addss xmm1, DWORD PTR 60[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L920:
movq xmm2, rdi
comisd xmm2, xmm8
jbe .L922
movss xmm2, DWORD PTR .LC25[rip]
addss xmm2, DWORD PTR 80[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L976:
comisd xmm12, xmm3
jbe .L978
movss xmm0, DWORD PTR .LC21[rip]
addss xmm0, DWORD PTR 108[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L928:
comisd xmm10, xmm7
jbe .L930
movss xmm2, DWORD PTR .LC10[rip]
addss xmm2, DWORD PTR 60[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L960:
comisd xmm14, xmm5
jbe .L962
movss xmm15, DWORD PTR .LC21[rip]
addss xmm15, DWORD PTR 120[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L880:
comisd xmm15, QWORD PTR 216[rsp]
jbe .L882
movss xmm3, DWORD PTR .LC33[rip]
addss xmm3, DWORD PTR 60[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L824:
movsd xmm1, QWORD PTR 144[rsp]
comisd xmm1, xmm6
jbe .L826
movss xmm1, DWORD PTR .LC9[rip]
addss xmm1, DWORD PTR 88[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L832:
movq xmm1, r9
comisd xmm1, xmm6
jbe .L834
movss xmm1, DWORD PTR .LC22[rip]
addss xmm1, DWORD PTR 120[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L944:
comisd xmm6, QWORD PTR -32[rsp]
jbe .L946
movss xmm3, DWORD PTR .LC22[rip]
addss xmm3, DWORD PTR 80[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L896:
comisd xmm10, QWORD PTR 248[rsp]
jbe .L898
movss xmm7, DWORD PTR .LC10[rip]
addss xmm7, DWORD PTR 80[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L968:
comisd xmm12, xmm3
jbe .L970
movss xmm0, DWORD PTR .LC21[rip]
addss xmm0, DWORD PTR 108[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L864:
comisd xmm11, QWORD PTR 32[rsp]
jbe .L866
movss xmm7, DWORD PTR .LC11[rip]
addss xmm7, DWORD PTR 60[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L936:
comisd xmm10, xmm7
jbe .L938
movss xmm3, DWORD PTR .LC10[rip]
addss xmm3, DWORD PTR 60[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L872:
comisd xmm14, QWORD PTR 176[rsp]
jbe .L874
movss xmm5, DWORD PTR .LC21[rip]
addss xmm5, DWORD PTR 88[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L912:
comisd xmm11, QWORD PTR 248[rsp]
jbe .L914
movss xmm2, DWORD PTR .LC25[rip]
addss xmm2, DWORD PTR 92[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L848:
comisd xmm8, xmm9
jbe .L850
movss xmm7, DWORD PTR .LC32[rip]
addss xmm7, DWORD PTR 120[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L904:
comisd xmm9, QWORD PTR 248[rsp]
jbe .L906
movss xmm2, DWORD PTR .LC11[rip]
addss xmm2, DWORD PTR 80[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L924:
movss xmm2, DWORD PTR .LC38[rip]
addss xmm2, DWORD PTR 68[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L906:
comisd xmm10, QWORD PTR 256[rsp]
jbe .L907
movss xmm2, DWORD PTR .LC8[rip]
addss xmm2, DWORD PTR 92[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L857:
movss xmm7, DWORD PTR .LC35[rip]
addss xmm7, DWORD PTR 60[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L876:
movss xmm5, DWORD PTR .LC33[rip]
addss xmm5, DWORD PTR 72[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L889:
movss xmm4, DWORD PTR .LC38[rip]
addss xmm4, DWORD PTR 56[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L858:
comisd xmm13, QWORD PTR 128[rsp]
jbe .L859
movss xmm7, DWORD PTR .LC13[rip]
addss xmm7, DWORD PTR 88[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L841:
addss xmm6, DWORD PTR 60[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L890:
movsd xmm4, QWORD PTR 48[rsp]
comisd xmm4, QWORD PTR 248[rsp]
jbe .L891
movss xmm4, DWORD PTR .LC12[rip]
addss xmm4, DWORD PTR 100[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L925:
comisd xmm10, xmm15
jbe .L926
movss xmm2, DWORD PTR .LC22[rip]
addss xmm2, DWORD PTR 112[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L893:
comisd xmm11, xmm6
jbe .L894
movss xmm4, DWORD PTR .LC21[rip]
addss xmm4, DWORD PTR 124[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L953:
movss xmm1, DWORD PTR .LC35[rip]
addss xmm1, DWORD PTR 96[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L921:
movss xmm2, DWORD PTR .LC25[rip]
addss xmm2, DWORD PTR 60[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L954:
comisd xmm7, QWORD PTR 216[rsp]
jbe .L955
movss xmm1, DWORD PTR .LC31[rip]
addss xmm1, DWORD PTR 88[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L964:
movss xmm15, DWORD PTR .LC13[rip]
addss xmm15, DWORD PTR 44[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L933:
comisd xmm5, QWORD PTR 192[rsp]
jbe .L934
movss xmm2, DWORD PTR .LC9[rip]
addss xmm2, DWORD PTR 44[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L842:
comisd xmm11, QWORD PTR 48[rsp]
movss xmm6, DWORD PTR .LC12[rip]
jbe .L843
addss xmm6, DWORD PTR 104[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L853:
movsd xmm7, QWORD PTR 192[rsp]
comisd xmm7, QWORD PTR -48[rsp]
jbe .L854
movss xmm7, DWORD PTR .LC10[rip]
addss xmm7, DWORD PTR 224[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L981:
comisd xmm10, xmm5
jbe .L982
movss xmm0, DWORD PTR .LC35[rip]
addss xmm0, DWORD PTR 112[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L917:
comisd xmm8, xmm6
jbe .L918
movss xmm2, DWORD PTR .LC25[rip]
addss xmm2, DWORD PTR 224[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L941:
movsd xmm3, QWORD PTR 32[rsp]
comisd xmm3, xmm15
jbe .L942
movss xmm3, DWORD PTR .LC33[rip]
addss xmm3, DWORD PTR 72[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L869:
movsd xmm7, QWORD PTR 200[rsp]
comisd xmm7, QWORD PTR 208[rsp]
jbe .L870
movss xmm7, DWORD PTR .LC31[rip]
addss xmm7, DWORD PTR 112[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L829:
comisd xmm15, xmm9
jbe .L830
movss xmm1, DWORD PTR .LC12[rip]
addss xmm1, DWORD PTR 68[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L885:
movq xmm3, rax
comisd xmm3, xmm5
jbe .L886
movss xmm3, DWORD PTR .LC24[rip]
addss xmm3, DWORD PTR 112[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L945:
movss xmm3, DWORD PTR .LC31[rip]
addss xmm3, DWORD PTR 60[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L837:
comisd xmm12, xmm9
jbe .L838
movss xmm1, DWORD PTR .LC26[rip]
addss xmm1, DWORD PTR 44[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L884:
movss xmm3, DWORD PTR .LC38[rip]
addss xmm3, DWORD PTR 84[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L965:
movq xmm0, rax
comisd xmm0, QWORD PTR -80[rsp]
jbe .L966
movss xmm15, DWORD PTR .LC24[rip]
addss xmm15, DWORD PTR 112[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L980:
movss xmm0, DWORD PTR .LC21[rip]
addss xmm0, DWORD PTR 68[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L977:
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, DWORD PTR 88[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L922:
comisd xmm11, QWORD PTR 184[rsp]
jbe .L923
movss xmm2, DWORD PTR .LC32[rip]
addss xmm2, DWORD PTR 88[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L973:
movsd xmm0, QWORD PTR 48[rsp]
comisd xmm0, xmm6
jbe .L974
movss xmm0, DWORD PTR .LC25[rip]
addss xmm0, DWORD PTR 124[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L901:
movq xmm7, rax
comisd xmm7, QWORD PTR 208[rsp]
jbe .L902
movss xmm4, DWORD PTR .LC24[rip]
addss xmm4, DWORD PTR 112[rsp]
movss DWORD PTR 152[rsp], xmm4
jmp .L241
.p2align 4,,10
.p2align 3
.L961:
movss xmm15, DWORD PTR .LC21[rip]
addss xmm15, DWORD PTR 96[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L861:
comisd xmm10, QWORD PTR 136[rsp]
jbe .L862
movss xmm7, DWORD PTR .LC7[rip]
addss xmm7, DWORD PTR 124[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L940:
movss xmm3, DWORD PTR .LC39[rip]
addss xmm3, DWORD PTR 100[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L957:
comisd xmm8, QWORD PTR 200[rsp]
jbe .L958
movss xmm1, DWORD PTR .LC26[rip]
addss xmm1, DWORD PTR 72[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L949:
comisd xmm13, QWORD PTR 32[rsp]
jbe .L950
movss xmm3, DWORD PTR .LC38[rip]
addss xmm3, DWORD PTR 72[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L969:
movss xmm0, DWORD PTR .LC32[rip]
addss xmm0, DWORD PTR 88[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L929:
movss xmm2, DWORD PTR .LC22[rip]
addss xmm2, DWORD PTR 56[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L978:
movsd xmm0, QWORD PTR 24[rsp]
comisd xmm0, QWORD PTR 176[rsp]
jbe .L979
movss xmm0, DWORD PTR .LC24[rip]
addss xmm0, DWORD PTR 92[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L865:
movss xmm7, DWORD PTR .LC38[rip]
addss xmm7, DWORD PTR 56[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L970:
comisd xmm10, xmm4
jbe .L971
movss xmm0, DWORD PTR .LC39[rip]
addss xmm0, DWORD PTR 104[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L877:
comisd xmm12, QWORD PTR 216[rsp]
jbe .L878
movss xmm5, DWORD PTR .LC26[rip]
addss xmm5, DWORD PTR 224[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L868:
movss xmm7, DWORD PTR .LC39[rip]
addss xmm7, DWORD PTR 44[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L860:
movss xmm7, DWORD PTR .LC21[rip]
addss xmm7, DWORD PTR 84[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L909:
movq xmm2, r10
comisd xmm2, xmm15
jbe .L910
movss xmm2, DWORD PTR .LC9[rip]
addss xmm2, DWORD PTR 72[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L844:
movss xmm6, DWORD PTR .LC23[rip]
addss xmm6, DWORD PTR 64[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L833:
movss xmm1, DWORD PTR .LC21[rip]
addss xmm1, DWORD PTR 80[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L826:
comisd xmm14, QWORD PTR -88[rsp]
jbe .L827
movss xmm1, DWORD PTR .LC10[rip]
addss xmm1, DWORD PTR 108[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L852:
movss xmm7, DWORD PTR .LC21[rip]
addss xmm7, DWORD PTR 68[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L932:
movss xmm2, DWORD PTR .LC10[rip]
addss xmm2, DWORD PTR 92[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L845:
movq xmm6, r10
comisd xmm6, QWORD PTR -48[rsp]
movss xmm6, DWORD PTR .LC9[rip]
jbe .L846
addss xmm6, DWORD PTR 72[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L892:
movss xmm4, DWORD PTR .LC27[rip]
addss xmm4, DWORD PTR 44[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L956:
movss xmm1, DWORD PTR .LC10[rip]
addss xmm1, DWORD PTR 84[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L908:
movss xmm2, DWORD PTR .LC12[rip]
addss xmm2, DWORD PTR 44[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L916:
movss xmm2, DWORD PTR .LC27[rip]
addss xmm2, DWORD PTR 72[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L897:
movss xmm7, DWORD PTR .LC35[rip]
addss xmm7, DWORD PTR 96[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L946:
comisd xmm12, QWORD PTR [rsp]
jbe .L947
movss xmm3, DWORD PTR .LC21[rip]
addss xmm3, DWORD PTR 108[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L881:
movss xmm3, DWORD PTR .LC7[rip]
addss xmm3, DWORD PTR 96[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L948:
movss xmm3, DWORD PTR .LC32[rip]
addss xmm3, DWORD PTR 44[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L962:
comisd xmm8, QWORD PTR -112[rsp]
jbe .L963
movss xmm15, DWORD PTR .LC35[rip]
addss xmm15, DWORD PTR 88[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L873:
movss xmm5, DWORD PTR .LC32[rip]
addss xmm5, DWORD PTR 120[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L828:
movss xmm1, DWORD PTR .LC10[rip]
addss xmm1, DWORD PTR 64[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L972:
movss xmm0, DWORD PTR .LC39[rip]
addss xmm0, DWORD PTR 44[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L825:
movss xmm1, DWORD PTR .LC8[rip]
addss xmm1, DWORD PTR 80[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L882:
comisd xmm14, QWORD PTR 232[rsp]
jbe .L883
movss xmm3, DWORD PTR .LC24[rip]
addss xmm3, DWORD PTR 80[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L836:
movss xmm1, DWORD PTR .LC24[rip]
addss xmm1, DWORD PTR 92[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L898:
movsd xmm7, QWORD PTR 216[rsp]
comisd xmm7, QWORD PTR 152[rsp]
jbe .L899
movss xmm7, DWORD PTR .LC35[rip]
addss xmm7, DWORD PTR 108[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L937:
movss xmm3, DWORD PTR .LC21[rip]
addss xmm3, DWORD PTR 96[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L849:
movss xmm7, DWORD PTR .LC26[rip]
addss xmm7, DWORD PTR 56[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L914:
comisd xmm7, QWORD PTR 256[rsp]
jbe .L915
movss xmm2, DWORD PTR .LC26[rip]
addss xmm2, DWORD PTR 64[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L834:
comisd xmm11, xmm8
jbe .L835
movss xmm1, DWORD PTR .LC23[rip]
addss xmm1, DWORD PTR 108[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L905:
movss xmm2, DWORD PTR .LC24[rip]
addss xmm2, DWORD PTR 60[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L913:
movss xmm2, DWORD PTR .LC7[rip]
addss xmm2, DWORD PTR 80[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L874:
comisd xmm7, QWORD PTR 168[rsp]
jbe .L875
movss xmm5, DWORD PTR .LC23[rip]
addss xmm5, DWORD PTR 100[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L930:
movq xmm2, r9
comisd xmm2, QWORD PTR 184[rsp]
jbe .L931
movss xmm2, DWORD PTR .LC22[rip]
addss xmm2, DWORD PTR 120[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L938:
comisd xmm9, QWORD PTR 144[rsp]
jbe .L939
movss xmm3, DWORD PTR .LC12[rip]
addss xmm3, DWORD PTR 80[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L900:
movss xmm7, DWORD PTR .LC25[rip]
addss xmm7, DWORD PTR 124[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L850:
comisd xmm11, xmm6
jbe .L851
movss xmm7, DWORD PTR .LC27[rip]
addss xmm7, DWORD PTR 104[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L866:
movsd xmm7, QWORD PTR 160[rsp]
comisd xmm7, QWORD PTR 136[rsp]
jbe .L867
movss xmm7, DWORD PTR .LC33[rip]
addss xmm7, DWORD PTR 88[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L835:
movss xmm1, DWORD PTR .LC13[rip]
addss xmm1, DWORD PTR 104[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L867:
movss xmm7, DWORD PTR .LC11[rip]
addss xmm7, DWORD PTR 84[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L963:
movss xmm15, DWORD PTR .LC13[rip]
addss xmm15, DWORD PTR 100[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L931:
movss xmm2, DWORD PTR .LC33[rip]
addss xmm2, DWORD PTR 108[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L907:
movss xmm2, DWORD PTR .LC26[rip]
addss xmm2, DWORD PTR 84[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L859:
movss xmm7, DWORD PTR .LC9[rip]
addss xmm7, DWORD PTR 108[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L926:
movss xmm2, DWORD PTR .LC39[rip]
addss xmm2, DWORD PTR 224[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L955:
movss xmm1, DWORD PTR .LC35[rip]
addss xmm1, DWORD PTR 108[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L966:
movss xmm15, DWORD PTR .LC22[rip]
addss xmm15, DWORD PTR 116[rsp]
jmp .L441
.p2align 4,,10
.p2align 3
.L862:
movss xmm7, DWORD PTR .LC9[rip]
addss xmm7, DWORD PTR 116[rsp]
movd r12d, xmm7
jmp .L116
.p2align 4,,10
.p2align 3
.L891:
movss xmm4, DWORD PTR .LC27[rip]
addss xmm4, DWORD PTR 92[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L838:
movss xmm1, DWORD PTR .LC27[rip]
addss xmm1, DWORD PTR 124[rsp]
movd r14d, xmm1
jmp .L41
.p2align 4,,10
.p2align 3
.L942:
movss xmm3, DWORD PTR .LC39[rip]
addss xmm3, DWORD PTR 112[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L843:
addss xmm6, DWORD PTR 100[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L982:
movss xmm0, DWORD PTR .LC33[rip]
addss xmm0, DWORD PTR 116[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L846:
addss xmm6, DWORD PTR 224[rsp]
movd r15d, xmm6
jmp .L66
.p2align 4,,10
.p2align 3
.L974:
movss xmm0, DWORD PTR .LC11[rip]
addss xmm0, DWORD PTR 224[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L827:
movss xmm1, DWORD PTR .LC8[rip]
addss xmm1, DWORD PTR 104[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L971:
movss xmm0, DWORD PTR .LC32[rip]
addss xmm0, DWORD PTR 84[rsp]
movss DWORD PTR 224[rsp], xmm0
jmp .L466
.p2align 4,,10
.p2align 3
.L910:
movss xmm2, DWORD PTR .LC25[rip]
addss xmm2, DWORD PTR 112[rsp]
movss DWORD PTR 136[rsp], xmm2
jmp .L266
.p2align 4,,10
.p2align 3
.L958:
movss xmm1, DWORD PTR .LC31[rip]
addss xmm1, DWORD PTR 112[rsp]
movd r11d, xmm1
jmp .L416
.p2align 4,,10
.p2align 3
.L979:
movss xmm0, DWORD PTR .LC38[rip]
addss xmm0, DWORD PTR 84[rsp]
movss DWORD PTR 116[rsp], xmm0
jmp .L491
.p2align 4,,10
.p2align 3
.L830:
movss xmm1, DWORD PTR .LC13[rip]
addss xmm1, DWORD PTR 116[rsp]
movd ebx, xmm1
jmp .L16
.p2align 4,,10
.p2align 3
.L878:
movss xmm5, DWORD PTR .LC39[rip]
addss xmm5, DWORD PTR 116[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L923:
movss xmm2, DWORD PTR .LC26[rip]
addss xmm2, DWORD PTR 104[rsp]
movd edi, xmm2
jmp .L316
.p2align 4,,10
.p2align 3
.L950:
movss xmm3, DWORD PTR .LC11[rip]
addss xmm3, DWORD PTR 116[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L894:
movss xmm4, DWORD PTR .LC24[rip]
addss xmm4, DWORD PTR 116[rsp]
movss DWORD PTR 240[rsp], xmm4
jmp .L216
.p2align 4,,10
.p2align 3
.L934:
movss xmm2, DWORD PTR .LC10[rip]
addss xmm2, DWORD PTR 224[rsp]
movd r8d, xmm2
jmp .L341
.p2align 4,,10
.p2align 3
.L947:
movss xmm3, DWORD PTR .LC27[rip]
addss xmm3, DWORD PTR 100[rsp]
movd r10d, xmm3
jmp .L391
.p2align 4,,10
.p2align 3
.L854:
movss xmm7, DWORD PTR .LC25[rip]
addss xmm7, DWORD PTR 116[rsp]
movd ebp, xmm7
jmp .L91
.p2align 4,,10
.p2align 3
.L870:
movss xmm7, DWORD PTR .LC7[rip]
addss xmm7, DWORD PTR 116[rsp]
movd r13d, xmm7
jmp .L141
.p2align 4,,10
.p2align 3
.L883:
movss xmm3, DWORD PTR .LC9[rip]
addss xmm3, DWORD PTR 104[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L886:
movss xmm3, DWORD PTR .LC38[rip]
addss xmm3, DWORD PTR 116[rsp]
movss DWORD PTR 232[rsp], xmm3
jmp .L191
.p2align 4,,10
.p2align 3
.L915:
movss xmm2, DWORD PTR .LC35[rip]
addss xmm2, DWORD PTR 44[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L902:
movss xmm7, DWORD PTR .LC7[rip]
addss xmm7, DWORD PTR 116[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L875:
movss xmm5, DWORD PTR .LC22[rip]
addss xmm5, DWORD PTR 84[rsp]
movss DWORD PTR 228[rsp], xmm5
jmp .L166
.p2align 4,,10
.p2align 3
.L918:
movss xmm2, DWORD PTR .LC24[rip]
addss xmm2, DWORD PTR 116[rsp]
movss DWORD PTR 208[rsp], xmm2
jmp .L291
.p2align 4,,10
.p2align 3
.L939:
movss xmm3, DWORD PTR .LC9[rip]
addss xmm3, DWORD PTR 88[rsp]
movd r9d, xmm3
jmp .L366
.p2align 4,,10
.p2align 3
.L899:
movss xmm7, DWORD PTR .LC24[rip]
addss xmm7, DWORD PTR 104[rsp]
movss DWORD PTR 152[rsp], xmm7
jmp .L241
.p2align 4,,10
.p2align 3
.L851:
movss xmm7, DWORD PTR .LC8[rip]
addss xmm7, DWORD PTR 100[rsp]
movd ebp, xmm7
jmp .L91
.cfi_endproc
.LFE0:
.size main, .-main
.globl x_19
.bss
.align 4
.type x_19, @object
.size x_19, 4
x_19:
.zero 4
.globl x_18
.align 4
.type x_18, @object
.size x_18, 4
x_18:
.zero 4
.globl x_17
.align 4
.type x_17, @object
.size x_17, 4
x_17:
.zero 4
.globl x_16
.align 4
.type x_16, @object
.size x_16, 4
x_16:
.zero 4
.globl x_15
.align 4
.type x_15, @object
.size x_15, 4
x_15:
.zero 4
.globl x_14
.align 4
.type x_14, @object
.size x_14, 4
x_14:
.zero 4
.globl x_13
.align 4
.type x_13, @object
.size x_13, 4
x_13:
.zero 4
.globl x_12
.align 4
.type x_12, @object
.size x_12, 4
x_12:
.zero 4
.globl x_11
.align 4
.type x_11, @object
.size x_11, 4
x_11:
.zero 4
.globl x_10
.align 4
.type x_10, @object
.size x_10, 4
x_10:
.zero 4
.globl x_9
.align 4
.type x_9, @object
.size x_9, 4
x_9:
.zero 4
.globl x_8
.align 4
.type x_8, @object
.size x_8, 4
x_8:
.zero 4
.globl x_7
.align 4
.type x_7, @object
.size x_7, 4
x_7:
.zero 4
.globl x_6
.align 4
.type x_6, @object
.size x_6, 4
x_6:
.zero 4
.globl x_5
.align 4
.type x_5, @object
.size x_5, 4
x_5:
.zero 4
.globl x_4
.align 4
.type x_4, @object
.size x_4, 4
x_4:
.zero 4
.globl x_3
.align 4
.type x_3, @object
.size x_3, 4
x_3:
.zero 4
.globl x_2
.align 4
.type x_2, @object
.size x_2, 4
x_2:
.zero 4
.globl x_1
.align 4
.type x_1, @object
.size x_1, 4
x_1:
.zero 4
.globl x_0
.align 4
.type x_0, @object
.size x_0, 4
x_0:
.zero 4
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1076953088
.align 8
.LC1:
.long 0
.long 1072693248
.align 8
.LC2:
.long 0
.long 1075838976
.align 8
.LC3:
.long 0
.long 1074790400
.align 8
.LC4:
.long 0
.long 1074266112
.align 8
.LC5:
.long 0
.long 1076494336
.align 8
.LC6:
.long 0
.long 1077018624
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC7:
.long 1099431936
.align 4
.LC8:
.long 1065353216
.align 4
.LC9:
.long 1090519040
.align 4
.LC10:
.long 1082130432
.align 4
.LC11:
.long 1077936128
.align 4
.LC12:
.long 1095761920
.align 4
.LC13:
.long 1099956224
.section .rodata.cst8
.align 8
.LC14:
.long 0
.long 1076756480
.align 8
.LC15:
.long 0
.long 1077084160
.align 8
.LC16:
.long 0
.long 1076101120
.align 8
.LC17:
.long 0
.long 1075052544
.align 8
.LC18:
.long 0
.long 1077149696
.align 8
.LC19:
.long 0
.long 1075576832
.align 8
.LC20:
.long 0
.long 1076887552
.section .rodata.cst4
.align 4
.LC21:
.long 1097859072
.align 4
.LC22:
.long 1100480512
.align 4
.LC23:
.long 1092616192
.align 4
.LC24:
.long 1084227584
.align 4
.LC25:
.long 1101004800
.align 4
.LC26:
.long 1088421888
.align 4
.LC27:
.long 1098907648
.section .rodata.cst8
.align 8
.LC28:
.long 0
.long 1076363264
.align 8
.LC29:
.long 0
.long 1075970048
.align 8
.LC30:
.long 0
.long 1076232192
.section .rodata.cst4
.align 4
.LC31:
.long 1094713344
.align 4
.LC32:
.long 1091567616
.align 4
.LC33:
.long 1093664768
.section .rodata.cst8
.align 8
.LC34:
.long 0
.long 1076625408
.section .rodata.cst4
.align 4
.LC35:
.long 1096810496
.section .rodata.cst8
.align 8
.LC36:
.long 0
.long 1075314688
.align 8
.LC37:
.long 0
.long 1073741824
.section .rodata.cst4
.align 4
.LC38:
.long 1086324736
.align 4
.LC39:
.long 1073741824
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100118.c"
.text
.global __aeabi_f2d
.global __aeabi_dadd
.global __aeabi_dcmpgt
.global __aeabi_d2f
.global __aeabi_dcmplt
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 408
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L215
ldr r5, .L215+4
ldr r3, [r3] @ float
sub sp, sp, #412
str r3, [sp, #104] @ float
ldr r6, .L215+8
ldr r3, [r5] @ float
ldr r7, .L215+12
str r3, [sp, #160] @ float
ldr r3, [r6] @ float
ldr r8, .L215+16
str r3, [sp, #152] @ float
ldr r3, [r7] @ float
ldr r9, .L215+20
str r3, [sp, #8] @ float
ldr r3, [r8] @ float
ldr r10, .L215+24
str r3, [sp, #340] @ float
ldr r3, [r9] @ float
ldr fp, .L215+28
str r3, [sp, #280] @ float
ldr r3, [r10] @ float
ldr r4, .L215+32
str r3, [sp, #208] @ float
ldr r3, [fp] @ float
ldr lr, .L215+36
str r3, [sp, #332] @ float
ldr r3, .L215+40
ldr ip, .L215+44
ldr r3, [r3] @ float
ldr r0, .L215+48
str r3, [sp, #200] @ float
ldr r1, .L215+52
ldr r2, .L215+56
ldr r3, .L215+60
ldr r4, [r4] @ float
ldr lr, [lr] @ float
ldr ip, [ip] @ float
ldr r0, [r0] @ float
ldr r1, [r1] @ float
ldr r2, [r2] @ float
ldr r3, [r3] @ float
str r4, [sp, #328] @ float
str lr, [sp, #336] @ float
str ip, [sp, #344] @ float
str r0, [sp, #348] @ float
str r1, [sp, #144] @ float
str r2, [sp, #176] @ float
str r3, [sp, #72] @ float
ldr r3, .L215+64
ldr r3, [r3] @ float
str r3, [sp, #80] @ float
ldr r3, .L215+68
ldr r3, [r3] @ float
str r3, [sp, #96] @ float
ldr r3, .L215+72
ldr r3, [r3] @ float
str r3, [sp, #232] @ float
ldr r3, .L215+76
ldr r3, [r3] @ float
str r3, [sp, #240] @ float
.L182:
ldr r0, [sp, #328] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+116
str r4, [sp, #112]
str r5, [sp, #116]
bl __aeabi_dadd
mov r8, r0
ldr r0, [sp, #336] @ float
mov r9, r1
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+104
str r4, [sp, #16]
str r5, [sp, #20]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r9
mov r3, r5
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #344] @ float
moveq r8, r4
moveq r9, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+88
str r4, [sp, #48]
str r5, [sp, #52]
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [sp, #348] @ float
str r2, [sp, #304]
str r3, [sp, #308]
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+96
str r4, [sp, #120]
str r5, [sp, #124]
bl __aeabi_dadd
mov r4, r0
ldr r0, [sp, #144] @ float
mov r5, r1
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L215+104
str r6, [sp, #24]
str r7, [sp, #28]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
add r7, sp, #304
ldmia r7, {r6-r7}
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r6
movne r5, r7
mov r2, r4
mov r3, r5
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #176] @ float
moveq r8, r4
moveq r9, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+108
str r4, [sp, #128]
str r5, [sp, #132]
bl __aeabi_dadd
mov r10, r0
ldr r0, [sp, #104] @ float
mov fp, r1
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+96
str r4, [sp, #32]
str r5, [sp, #36]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #160] @ float
moveq r10, r4
moveq fp, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+116
stm sp, {r4-r5}
bl __aeabi_dadd
mov r4, r0
ldr r0, [sp, #152] @ float
mov r5, r1
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L215+112
str r6, [sp, #56]
str r7, [sp, #60]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
ldr r0, [sp, #8] @ float
str r6, [sp, #40]
str r7, [sp, #44]
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L215+80
str r6, [sp, #8]
str r7, [sp, #12]
bl __aeabi_dadd
mov r2, r0
mov r3, r1
add r1, sp, #40
ldmia r1, {r0-r1}
mov r6, r2
mov r7, r3
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #40]
streq r7, [sp, #44]
.L7:
add r3, sp, #40
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
cmp r0, #0
addeq r5, sp, #40
ldmiaeq r5, {r4-r5}
.L8:
mov r1, fp
mov r2, r4
mov r3, r5
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r2, r10
mov r3, fp
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
moveq r8, r10
moveq r9, fp
mov r0, r8
mov r1, r9
bl __aeabi_d2f
mov ip, r0
add r1, sp, #112
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+88
str ip, [sp, #400] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #16
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+92
str r4, [sp, #152]
str r5, [sp, #156]
bl __aeabi_dadd
mov r10, r0
mov fp, r1
mov r2, r10
mov r3, fp
mov r1, r5
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #340] @ float
movne r10, r4
movne fp, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+152
str r4, [sp, #256]
str r5, [sp, #260]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #120
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+100
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
ldr r3, .L215+80
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
add r7, sp, #160
ldmia r7, {r6-r7}
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r6
movne r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #280] @ float
moveq r10, r4
moveq fp, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+112
str r4, [sp, #168]
str r5, [sp, #172]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #128
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+144
str r4, [sp, #136]
str r5, [sp, #140]
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r4
mov r1, r5
mov r2, r8
mov r3, r9
str r8, [sp, #224]
str r9, [sp, #228]
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #136
ldmiane r9, {r8-r9}
.L15:
add r1, sp, #32
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+136
bl __aeabi_dadd
mov r4, r0
mov r5, r1
ldmia sp, {r0-r1}
mov r2, #0
ldr r3, .L215+120
str r4, [sp, #88]
str r5, [sp, #92]
bl __aeabi_dadd
mov r4, r0
ldr r0, [sp, #208] @ float
mov r5, r1
bl __aeabi_f2d
mov r6, r0
mov r7, r1
mov r2, #0
ldr r3, .L215+128
str r6, [sp, #176]
str r7, [sp, #180]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
add r7, sp, #88
ldmia r7, {r6-r7}
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r6
movne r5, r7
mov r1, r9
mov r2, r4
mov r3, r5
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
moveq r8, r4
moveq r9, r5
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r8
moveq fp, r9
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #112
ldmia r1, {r0-r1}
ldr r3, .L215+120
mov r2, #0
str ip, [sp, #328] @ float
bl __aeabi_dadd
mov r2, r0
mov r7, r1
mov r6, r2
ldr r0, [sp, #332] @ float
str r6, [sp, #104]
str r7, [sp, #108]
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+120
str r4, [sp, #64]
str r5, [sp, #68]
bl __aeabi_dadd
mov r10, r0
mov fp, r1
mov r2, r10
mov r3, fp
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+96
add r1, sp, #48
ldmia r1, {r0-r1}
movne r10, r6
movne fp, r7
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
ldr r3, .L215+112
bl __aeabi_dadd
add r9, sp, #136
ldmia r9, {r8-r9}
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmplt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
ldr r0, [sp, #200] @ float
moveq r10, r4
moveq fp, r5
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+116
str r4, [sp, #40]
str r5, [sp, #44]
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
ldr r3, .L215+100
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+128
add r1, sp, #56
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r6, r0
ldr r0, [sp, #72] @ float
mov r7, r1
bl __aeabi_f2d
mov r8, r0
mov r9, r1
mov r2, #0
ldr r3, .L215+88
str r8, [sp, #72]
str r9, [sp, #76]
bl __aeabi_dadd
mov r2, r0
mov r3, r1
ldr r0, [sp, #80] @ float
str r2, [sp, #200]
str r3, [sp, #204]
bl __aeabi_f2d
mov r8, r0
mov r9, r1
mov r2, #0
ldr r3, .L215+88
str r8, [sp, #184]
str r9, [sp, #188]
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #200
ldmiane r9, {r8-r9}
.L25:
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov r3, r0
ldr r0, [sp, #96] @ float
str r3, [sp, #404] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+84
str r4, [sp, #80]
str r5, [sp, #84]
bl __aeabi_dadd
add r5, sp, #104
ldmia r5, {r4-r5}
mov r10, r0
mov fp, r1
mov r2, r10
mov r3, fp
mov r1, r5
mov r0, r4
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
ldr r3, .L215+140
add r1, sp, #256
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+128
str r4, [sp, #96]
str r5, [sp, #100]
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #168
ldmia r1, {r0-r1}
ldr r3, .L215+104
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
str r6, [sp, #216]
str r7, [sp, #220]
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
add r7, sp, #96
ldmia r7, {r6-r7}
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r6
movne r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+132
add r1, sp, #32
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+92
str r4, [sp, #192]
str r5, [sp, #196]
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r4
mov r1, r5
mov r2, r8
mov r3, r9
str r8, [sp, #312]
str r9, [sp, #316]
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #192
ldmiane r9, {r8-r9}
.L33:
add r1, sp, #72
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+92
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+96
mov r4, r0
mov r5, r1
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+136
str r6, [sp, #264]
str r7, [sp, #268]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #264
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
addne r7, sp, #264
ldmiane r7, {r6-r7}
.L34:
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r1, r9
mov r2, r4
mov r3, r5
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
moveq r8, r4
moveq r9, r5
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r8
moveq fp, r9
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov r3, r0
ldr r0, [sp, #232] @ float
str r3, [sp, #332] @ float
bl __aeabi_f2d
mov r4, r0
mov r5, r1
mov r2, #0
ldr r3, .L215+140
str r4, [sp, #208]
str r5, [sp, #212]
bl __aeabi_dadd
mov r2, #0
mov r10, r0
mov fp, r1
add r1, sp, #64
ldmia r1, {r0-r1}
ldr r3, .L215+124
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r0, r10
mov r1, fp
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+136
add r1, sp, #16
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #48
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+80
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #120
ldmia r1, {r0-r1}
ldr r3, .L215+88
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
add r7, sp, #232
ldmia r7, {r6-r7}
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r6
movne r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+144
add r1, sp, #24
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #40
ldmia r1, {r0-r1}
mov r6, r4
mov r7, r5
mov r2, #0
ldr r3, .L215+92
str r6, [sp, #280]
str r7, [sp, #284]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r7
mov r3, r5
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+116
add r1, sp, #176
ldmia r1, {r0-r1}
movne r4, r6
movne r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
ldr r3, .L215+88
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
add r1, sp, #88
ldmia r1, {r0-r1}
moveq r7, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #88]
streq r7, [sp, #92]
.L44:
add r7, sp, #88
ldmia r7, {r6-r7}
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+132
str ip, [sp, #336] @ float
bl __aeabi_dadd
mov r2, #0
mov r10, r0
mov fp, r1
add r1, sp, #112
ldmia r1, {r0-r1}
ldr r3, .L215+148
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r0, r10
mov r1, fp
mov r2, r4
mov r3, r5
str r4, [sp, #144]
str r5, [sp, #148]
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+108
add r1, sp, #64
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #48
ldmia r1, {r0-r1}
ldr r3, .L215+132
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #40
ldmia r1, {r0-r1}
mov r8, r6
mov r9, r7
mov r2, #0
ldr r3, .L215+108
str r8, [sp, #352]
str r9, [sp, #356]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r8
movne r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+140
add r1, sp, #32
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
ldmia sp, {r0-r1}
mov r3, #1073741824
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
str r6, [sp, #360]
str r7, [sp, #364]
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+100
add r1, sp, #176
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r6, r0
ldr r0, [sp, #240] @ float
mov r7, r1
bl __aeabi_f2d
mov r8, r0
mov r9, r1
mov r2, #0
ldr r3, .L215+84
str r8, [sp, #88]
str r9, [sp, #92]
bl __aeabi_dadd
mov r8, r0
b .L216
.L217:
.align 2
.L215:
.word x_12
.word x_13
.word x_14
.word x_19
.word x_5
.word x_9
.word x_15
.word x_3
.word x_1
.word x_4
.word x_11
.word x_6
.word x_7
.word x_8
.word x_10
.word x_16
.word x_18
.word x_0
.word x_2
.word x_17
.word 1077018624
.word 1076363264
.word 1075838976
.word 1076756480
.word 1074790400
.word 1076101120
.word 1072693248
.word 1074266112
.word 1076494336
.word 1076953088
.word 1075576832
.word 1076625408
.word 1076887552
.word 1076232192
.word 1077149696
.word 1075970048
.word 1075052544
.word 1075314688
.word 1077084160
.L216:
mov r9, r1
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+116
str r8, [sp, #320]
str r9, [sp, #324]
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
mov r8, r2
mov r9, r3
str r2, [sp, #288]
str r3, [sp, #292]
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #320
ldmiane r9, {r8-r9}
.L52:
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r0, r4
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #64
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+144
str ip, [sp, #340] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #96
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #368]
str r5, [sp, #372]
bl __aeabi_dcmplt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #96]
strne r4, [sp, #100]
.L56:
add r1, sp, #48
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+92
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #168
ldmia r1, {r0-r1}
ldr r3, .L215+100
bl __aeabi_dadd
mov r2, #0
mov r10, r0
mov fp, r1
add r1, sp, #40
ldmia r1, {r0-r1}
ldr r3, .L215+152
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, fp
mov r0, r10
str r6, [sp, #296]
str r7, [sp, #300]
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r10
movne r7, fp
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #96
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #96]
streq r5, [sp, #100]
.L59:
ldmia sp, {r0-r1}
mov r2, #0
ldr r3, .L215+100
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #72
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+132
str r4, [sp, #272]
str r5, [sp, #276]
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r4
mov r1, r5
mov r2, r8
mov r3, r9
str r8, [sp, #240]
str r9, [sp, #244]
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #272
ldmiane r9, {r8-r9}
.L60:
add r1, sp, #88
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+104
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+120
mov r4, r0
mov r5, r1
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
mov r3, #1073741824
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
str r2, [sp, #248]
str r3, [sp, #252]
bl __aeabi_dcmpgt
cmp r0, #0
addeq r7, sp, #248
ldmiaeq r7, {r6-r7}
.L61:
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r1, r9
mov r2, r4
mov r3, r5
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
moveq r8, r4
add r1, sp, #96
ldmia r1, {r0-r1}
moveq r9, r5
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #96]
streq r9, [sp, #100]
.L64:
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov ip, r0
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+116
str ip, [sp, #344] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #104
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #104]
streq r5, [sp, #108]
.L65:
add r1, sp, #64
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+132
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #16
ldmia r1, {r0-r1}
ldr r3, .L215+144
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #24
ldmia r1, {r0-r1}
ldr r3, .L215+88
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #104
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #104]
streq r5, [sp, #108]
.L68:
add r1, sp, #40
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+148
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #376]
str r5, [sp, #380]
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #216]
streq r4, [sp, #220]
.L69:
add r1, sp, #72
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+124
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #88
ldmia r1, {r0-r1}
ldr r3, .L215+144
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
mov r8, r6
mov r9, r7
mov r2, #0
ldr r3, .L215+148
str r8, [sp, #248]
str r9, [sp, #252]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r8
movne r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #216
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #216]
streq r5, [sp, #220]
.L72:
add r5, sp, #216
ldmia r5, {r4-r5}
add r1, sp, #104
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #104]
streq r4, [sp, #108]
.L73:
add r1, sp, #104
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+140
str ip, [sp, #348] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #96]
str r5, [sp, #100]
bl __aeabi_dcmplt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #144]
strne r4, [sp, #148]
.L74:
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+120
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #128
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+128
str r4, [sp, #104]
str r5, [sp, #108]
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #136]
streq r5, [sp, #140]
.L75:
add r5, sp, #104
ldmia r5, {r4-r5}
add r3, sp, #136
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dcmpgt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #136]
strne r4, [sp, #140]
.L76:
add r5, sp, #136
ldmia r5, {r4-r5}
add r1, sp, #144
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #144]
streq r4, [sp, #148]
.L77:
add r1, sp, #32
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+92
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
ldmia sp, {r0-r1}
ldr r3, .L215+128
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+144
add r1, sp, #56
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+92
mov r6, r0
mov r7, r1
add r1, sp, #176
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r8, r0
mov r9, r1
add r1, sp, #8
ldmia r1, {r0-r1}
ldr r3, .L215+144
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
str r2, [sp, #216]
str r3, [sp, #220]
bl __aeabi_dcmpgt
cmp r0, #0
addeq r9, sp, #216
ldmiaeq r9, {r8-r9}
.L79:
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #144
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #144]
streq r5, [sp, #148]
.L82:
add r1, sp, #144
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov ip, r0
add r1, sp, #112
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #1073741824
str ip, [sp, #144] @ float
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #208
ldmia r1, {r0-r1}
ldr r3, .L215+124
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
str r6, [sp, #384]
str r7, [sp, #388]
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+96
add r1, sp, #16
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+124
mov r6, r0
mov r7, r1
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #280
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
str r8, [sp, #392]
str r9, [sp, #396]
bl __aeabi_dcmplt
cmp r0, #0
movne r2, r8
movne r3, r9
strne r2, [sp, #280]
strne r3, [sp, #284]
.L84:
add r9, sp, #280
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r2, r6
mov r3, r7
mov r1, r5
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+136
add r1, sp, #176
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, fp
mov r3, r7
mov r0, r10
str r6, [sp, #136]
str r7, [sp, #140]
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+144
add r1, sp, #72
ldmia r1, {r0-r1}
moveq r10, r6
moveq fp, r7
bl __aeabi_dadd
add r9, sp, #248
ldmia r9, {r8-r9}
mov r6, r0
mov r7, r1
add r1, sp, #288
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
strne r8, [sp, #288]
strne r9, [sp, #292]
.L88:
add r9, sp, #288
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, fp
mov r2, r6
mov r3, r7
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r6
moveq fp, r7
mov r2, r10
mov r3, fp
mov r1, r5
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r10
moveq r5, fp
mov r0, r4
mov r1, r5
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+100
str ip, [sp, #280] @ float
bl __aeabi_dadd
add r5, sp, #368
ldmia r5, {r4-r5}
mov r10, r0
mov fp, r1
mov r2, r10
mov r3, fp
mov r1, r5
mov r0, r4
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
ldr r3, .L215+108
add r1, sp, #16
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #128
ldmia r1, {r0-r1}
ldr r3, .L215+104
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #40
ldmia r1, {r0-r1}
ldr r3, .L215+120
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+108
add r1, sp, #32
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
ldmia sp, {r0-r1}
ldr r3, .L215+112
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+152
add r1, sp, #176
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+136
mov r6, r0
mov r7, r1
add r1, sp, #88
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #200
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #200]
streq r9, [sp, #204]
.L97:
add r9, sp, #200
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+132
str ip, [sp, #176] @ float
bl __aeabi_dadd
mov r2, #0
mov r10, r0
mov fp, r1
add r1, sp, #16
ldmia r1, {r0-r1}
ldr r3, .L215+116
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r0, r10
mov r1, fp
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+136
add r1, sp, #128
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
ldr r3, .L215+120
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
ldmia sp, {r0-r1}
ldr r3, .L215+124
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+128
add r1, sp, #72
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
add r7, sp, #312
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r7
mov r3, r5
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+132
add r1, sp, #88
ldmia r1, {r0-r1}
movne r4, r6
movne r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L215+136
mov r6, r0
mov r7, r1
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #216
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
addeq r9, sp, #216
ldmiaeq r9, {r8-r9}
.L106:
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r0, r4
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #64
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+136
str ip, [sp, #200] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #96
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #96]
streq r5, [sp, #100]
.L110:
add r1, sp, #48
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L215+140
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #104
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #216]
str r5, [sp, #220]
bl __aeabi_dcmplt
cmp r0, #0
movne r3, r4
movne r4, r5
strne r3, [sp, #104]
strne r4, [sp, #108]
.L111:
add r5, sp, #104
ldmia r5, {r4-r5}
add r1, sp, #232
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #232]
streq r4, [sp, #236]
.L112:
add r5, sp, #232
ldmia r5, {r4-r5}
add r1, sp, #96
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #96]
streq r4, [sp, #100]
.L113:
ldmia sp, {r0-r1}
mov r2, #0
ldr r3, .L215+144
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
ldr r3, .L215+148
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r0, r4
mov r1, r5
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L215+152
add r1, sp, #88
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #184
ldmia r1, {r0-r1}
mov r3, #1073741824
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
add r9, sp, #240
ldmia r9, {r8-r9}
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r8
movne r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #96
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #96]
streq r5, [sp, #100]
.L118:
add r1, sp, #96
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218
str ip, [sp, #104] @ float
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #112
ldmia r1, {r0-r1}
ldr r3, .L218+4
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+8
add r1, sp, #64
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L218+12
mov r10, r0
mov fp, r1
add r1, sp, #120
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #160]
streq r7, [sp, #164]
.L120:
add r3, sp, #160
ldmia r3, {r2-r3}
mov r0, r10
mov r1, fp
bl __aeabi_dcmpgt
cmp r0, #0
strne r10, [sp, #160]
strne fp, [sp, #164]
.L121:
add r7, sp, #160
ldmia r7, {r6-r7}
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+4
add r1, sp, #24
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #128
ldmia r1, {r0-r1}
ldr r3, .L218+8
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r2, r8
mov r1, r7
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+16
ldmia sp, {r0-r1}
moveq r6, r8
moveq r7, r9
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #264
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmplt
cmp r0, #0
addeq r9, sp, #264
ldmiaeq r9, {r8-r9}
.L124:
add r1, sp, #296
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #296]
streq r9, [sp, #300]
.L125:
add r9, sp, #296
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r0, r4
mov r1, r5
bl __aeabi_d2f
mov ip, r0
add r1, sp, #208
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+20
str ip, [sp, #160] @ float
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #152
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
str r4, [sp, #232]
str r5, [sp, #236]
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #152]
streq r4, [sp, #156]
.L128:
add r1, sp, #16
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+24
bl __aeabi_dadd
add r7, sp, #304
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmplt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r1, fp
mov r2, r4
mov r3, r5
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
add r1, sp, #152
ldmia r1, {r0-r1}
moveq fp, r5
mov r2, r10
mov r3, fp
bl __aeabi_dcmpgt
cmp r0, #0
streq r10, [sp, #152]
streq fp, [sp, #156]
.L131:
add r1, sp, #120
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+28
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #168
ldmia r1, {r0-r1}
mov r3, #1073741824
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+8
ldmia sp, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r3, #1073741824
mov r6, r0
mov r7, r1
add r1, sp, #88
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #240
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #240]
streq r9, [sp, #244]
.L133:
add r9, sp, #240
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #152
ldmia r1, {r0-r1}
moveq r5, r7
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
streq r4, [sp, #152]
streq r5, [sp, #156]
.L136:
add r1, sp, #152
ldmia r1, {r0-r1}
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+32
str ip, [sp, #152] @ float
bl __aeabi_dadd
mov r2, #0
mov r10, r0
mov fp, r1
add r1, sp, #64
ldmia r1, {r0-r1}
ldr r3, .L218+36
bl __aeabi_dadd
mov r4, r0
mov r5, r1
mov r0, r10
mov r1, fp
mov r2, r4
mov r3, r5
str r4, [sp, #96]
str r5, [sp, #100]
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+4
add r1, sp, #16
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #120
ldmia r1, {r0-r1}
ldr r3, .L218+20
bl __aeabi_dadd
mov r6, r0
mov r7, r1
add r1, sp, #168
ldmia r1, {r0-r1}
mov r8, r6
mov r9, r7
mov r2, #0
ldr r3, .L218+28
str r8, [sp, #64]
str r9, [sp, #68]
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r8
movne r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
mov r3, #1073741824
add r1, sp, #40
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
ldmia sp, {r0-r1}
ldr r3, .L218+40
bl __aeabi_dadd
mov r6, r0
mov r7, r1
mov r2, r6
mov r1, r5
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+44
add r1, sp, #56
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L218
mov r6, r0
mov r7, r1
add r1, sp, #72
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+48
str r8, [sp, #16]
str r9, [sp, #20]
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #16
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
addne r9, sp, #16
ldmiane r9, {r8-r9}
.L142:
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+52
str ip, [sp, #208] @ float
bl __aeabi_dadd
add r7, sp, #384
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r7
mov r3, r5
mov r0, r6
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
ldr r3, .L218+36
add r1, sp, #48
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
add r9, sp, #392
ldmia r9, {r8-r9}
mov r6, r0
mov r7, r1
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmplt
cmp r0, #0
moveq r6, r8
add r1, sp, #96
ldmia r1, {r0-r1}
moveq r7, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #96]
streq r7, [sp, #100]
.L148:
add r7, sp, #96
ldmia r7, {r6-r7}
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+12
add r1, sp, #128
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #40
ldmia r1, {r0-r1}
ldr r3, .L218+8
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r2, r8
mov r1, r7
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+56
add r1, sp, #72
ldmia r1, {r0-r1}
moveq r6, r8
moveq r7, r9
bl __aeabi_dadd
add fp, sp, #320
ldmia fp, {r10-fp}
mov r8, r0
mov r9, r1
mov r2, r8
mov r3, r9
mov r1, fp
mov r0, r10
bl __aeabi_dcmplt
cmp r0, #0
moveq r8, r10
add r1, sp, #272
ldmia r1, {r0-r1}
moveq r9, fp
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #272]
streq r9, [sp, #276]
.L152:
add r9, sp, #272
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r2, r6
mov r3, r7
mov r1, r5
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r0, r4
mov r1, r5
bl __aeabi_d2f
mov ip, r0
add r1, sp, #80
ldmia r1, {r0-r1}
mov r2, #0
mov r3, #1073741824
str ip, [sp, #72] @ float
bl __aeabi_dadd
add r5, sp, #232
ldmia r5, {r4-r5}
mov r10, r0
mov fp, r1
mov r2, r10
mov r3, fp
mov r1, r5
mov r0, r4
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
ldr r3, .L218+20
add r1, sp, #256
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
mov r2, #0
mov r4, r0
mov r5, r1
add r1, sp, #48
ldmia r1, {r0-r1}
ldr r3, .L218+32
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #168
ldmia r1, {r0-r1}
ldr r3, .L218+60
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+60
ldmia sp, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
add r7, sp, #224
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r7
mov r3, r5
mov r0, r6
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+56
add r1, sp, #56
ldmia r1, {r0-r1}
movne r4, r6
movne r5, r7
bl __aeabi_dadd
mov r2, #0
ldr r3, .L218+4
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #248
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #248]
streq r9, [sp, #252]
.L160:
add r9, sp, #248
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r2, r4
mov r3, r5
mov r1, fp
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
mov ip, r0
add r1, sp, #256
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+12
str ip, [sp, #240] @ float
bl __aeabi_dadd
add r7, sp, #216
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r3, r5
mov r1, r7
mov r0, r6
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
mov r3, #1073741824
add r1, sp, #24
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #40
ldmia r1, {r0-r1}
ldr r3, .L218+40
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
moveq r7, r9
add r9, sp, #64
ldmia r9, {r8-r9}
mov r2, r6
mov r3, r7
mov r1, r9
mov r0, r8
bl __aeabi_dcmpgt
cmp r0, #0
movne r6, r8
movne r7, r9
mov r2, r6
mov r3, r7
mov r1, r5
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
add r1, sp, #192
ldmia r1, {r0-r1}
moveq r5, r7
add r7, sp, #360
ldmia r7, {r6-r7}
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
moveq r2, r6
moveq r3, r7
streq r2, [sp, #192]
streq r3, [sp, #196]
.L168:
add r1, sp, #56
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+60
bl __aeabi_dadd
mov r2, #0
ldr r3, .L218+48
mov r6, r0
mov r7, r1
add r1, sp, #184
ldmia r1, {r0-r1}
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #136
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
streq r8, [sp, #136]
streq r9, [sp, #140]
.L169:
add r9, sp, #136
ldmia r9, {r8-r9}
mov r1, r7
mov r2, r8
mov r3, r9
mov r0, r6
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
add r1, sp, #192
ldmia r1, {r0-r1}
moveq r7, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #192]
streq r7, [sp, #196]
.L171:
add r7, sp, #192
ldmia r7, {r6-r7}
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r0, r4
mov r1, r5
bl __aeabi_d2f
mov ip, r0
add r1, sp, #112
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L218+64
str ip, [sp, #80] @ float
bl __aeabi_dadd
add r5, sp, #352
ldmia r5, {r4-r5}
mov r10, r0
mov fp, r1
mov r2, r10
mov r1, r5
mov r3, fp
mov r0, r4
bl __aeabi_dcmplt
cmp r0, #0
moveq r10, r4
add r1, sp, #224
ldmia r1, {r0-r1}
moveq fp, r5
add r5, sp, #376
ldmia r5, {r4-r5}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #224]
streq r4, [sp, #228]
.L174:
add r5, sp, #224
ldmia r5, {r4-r5}
add r1, sp, #64
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpgt
cmp r0, #0
moveq r3, r4
moveq r4, r5
streq r3, [sp, #64]
streq r4, [sp, #68]
.L175:
add r5, sp, #64
ldmia r5, {r4-r5}
mov r1, fp
mov r2, r4
mov r3, r5
mov r0, r10
bl __aeabi_dcmpgt
mov r2, #0
cmp r0, #0
ldr r3, .L218+68
add r1, sp, #32
ldmia r1, {r0-r1}
moveq r10, r4
moveq fp, r5
bl __aeabi_dadd
add r7, sp, #312
ldmia r7, {r6-r7}
mov r4, r0
mov r5, r1
mov r2, r4
mov r1, r7
mov r3, r5
mov r0, r6
bl __aeabi_dcmplt
mov r2, #0
cmp r0, #0
ldr r3, .L218+32
add r1, sp, #88
ldmia r1, {r0-r1}
moveq r4, r6
moveq r5, r7
bl __aeabi_dadd
mov r2, #0
mov r6, r0
mov r7, r1
add r1, sp, #8
ldmia r1, {r0-r1}
ldr r3, .L218+12
bl __aeabi_dadd
mov r8, r0
mov r9, r1
mov r0, r6
mov r1, r7
mov r2, r8
mov r3, r9
bl __aeabi_dcmpgt
cmp r0, #0
moveq r6, r8
add r1, sp, #16
ldmia r1, {r0-r1}
moveq r7, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpgt
cmp r0, #0
streq r6, [sp, #16]
streq r7, [sp, #20]
.L179:
add r7, sp, #16
ldmia r7, {r6-r7}
mov r1, r5
mov r2, r6
mov r3, r7
mov r0, r4
bl __aeabi_dcmpgt
cmp r0, #0
moveq r4, r6
moveq r5, r7
mov r1, fp
mov r3, r5
mov r2, r4
mov r0, r10
bl __aeabi_dcmpgt
cmp r0, #0
moveq r10, r4
moveq fp, r5
mov r0, r10
mov r1, fp
bl __aeabi_d2f
ldr r3, [sp, #404] @ float
str r0, [sp, #8] @ float
str r3, [sp, #232] @ float
ldr r3, [sp, #400] @ float
str r3, [sp, #96] @ float
b .L182
.L219:
.align 2
.L218:
.word 1075314688
.word 1077084160
.word 1074790400
.word 1076232192
.word 1075838976
.word 1076756480
.word 1076494336
.word 1076887552
.word 1076625408
.word 1076363264
.word 1075970048
.word 1077149696
.word 1074266112
.word 1075052544
.word 1075576832
.word 1077018624
.word 1076101120
.word 1072693248
.size main, .-main
.comm x_19,4,4
.comm x_18,4,4
.comm x_17,4,4
.comm x_16,4,4
.comm x_15,4,4
.comm x_14,4,4
.comm x_13,4,4
.comm x_12,4,4
.comm x_11,4,4
.comm x_10,4,4
.comm x_9,4,4
.comm x_8,4,4
.comm x_7,4,4
.comm x_6,4,4
.comm x_5,4,4
.comm x_4,4,4
.comm x_3,4,4
.comm x_2,4,4
.comm x_1,4,4
.comm x_0,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100119.c"
.intel_syntax noprefix
.text
.p2align 4
.globl f1
.type f1, @function
f1:
.LFB50:
.cfi_startproc
endbr64
test edx, edx
jle .L4
sub edx, 1
shr edx
lea rax, 8[rsi+rdx*8]
jmp .L3
.p2align 4,,10
.p2align 3
.L8:
add rsi, 8
cmp rsi, rax
je .L4
.L3:
cmp DWORD PTR [rsi], edi
jne .L8
xor eax, eax
ret
.p2align 4,,10
.p2align 3
.L4:
mov eax, 1
ret
.cfi_endproc
.LFE50:
.size f1, .-f1
.p2align 4
.globl f2
.type f2, @function
f2:
.LFB51:
.cfi_startproc
endbr64
test edx, edx
jle .L10
xor eax, eax
jmp .L12
.p2align 4,,10
.p2align 3
.L11:
add rax, 2
cmp edx, eax
jle .L10
.L12:
mov ecx, eax
cmp DWORD PTR [rsi+rax*4], edi
jne .L11
add ecx, 1
movsx rcx, ecx
mov eax, DWORD PTR [rsi+rcx*4]
ret
.p2align 4,,10
.p2align 3
.L10:
ret
.cfi_endproc
.LFE51:
.size f2, .-f2
.p2align 4
.globl maxsum
.type maxsum, @function
maxsum:
.LFB52:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
.cfi_offset 15, -24
mov r15, rdi
push r14
.cfi_offset 14, -32
mov r14d, esi
push r13
push r12
push rbx
sub rsp, 72
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movsx rax, esi
mov rdx, rsp
lea rax, 15[0+rax*4]
mov rcx, rax
and rax, -4096
sub rdx, rax
and rcx, -16
cmp rsp, rdx
je .L16
.L57:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L57
.L16:
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L58
.L17:
lea r13, 3[rsp]
lea r12d, [r14+r14]
mov rsi, rsp
mov rax, r13
movsx rdx, r12d
and r13, -4
shr rax, 2
lea rcx, 15[0+rdx*4]
mov QWORD PTR -104[rbp], rax
mov rax, rcx
and rcx, -4096
sub rsi, rcx
and rax, -16
cmp rsp, rsi
je .L19
.L59:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rsi
jne .L59
.L19:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L60
.L20:
mov rbx, rsp
test r12d, r12d
jle .L21
sal rdx, 2
mov esi, 255
mov rdi, rbx
call memset@PLT
.L21:
test r14d, r14d
jle .L22
mov eax, r14d
xor esi, esi
mov rdi, r13
mov QWORD PTR -72[rbp], rax
sal rax, 2
mov rdx, rax
mov QWORD PTR -96[rbp], rax
call memset@PLT
lea eax, -1[r12]
mov DWORD PTR -80[rbp], 0
xor ecx, ecx
shr eax
add eax, 1
lea r8, [rbx+rax*8]
.p2align 4,,10
.p2align 3
.L23:
xor edx, edx
jmp .L35
.p2align 4,,10
.p2align 3
.L24:
add rdx, 1
cmp rdx, QWORD PTR -72[rbp]
je .L61
.L35:
movsx rsi, ecx
mov r11d, edx
lea r10, 0[0+rdx*4]
mov rax, QWORD PTR [r15+rsi*8]
mov edi, DWORD PTR [rax+rdx*4]
cmp edi, DWORD PTR 0[r13+rsi*4]
jle .L24
test r12d, r12d
jle .L25
mov rax, rbx
mov r9d, edx
jmp .L27
.p2align 4,,10
.p2align 3
.L62:
add rax, 8
cmp r8, rax
je .L25
.L27:
cmp edx, DWORD PTR [rax]
jne .L62
xor eax, eax
jmp .L26
.p2align 4,,10
.p2align 3
.L28:
add rax, 2
cmp r12d, eax
jle .L29
.L26:
mov r11d, eax
cmp r9d, DWORD PTR [rbx+rax*4]
jne .L28
add r11d, 1
movsx r11, r11d
mov eax, DWORD PTR [rbx+r11*4]
mov DWORD PTR -76[rbp], eax
.L29:
movsx rax, DWORD PTR -76[rbp]
mov rax, QWORD PTR [r15+rax*8]
cmp edi, DWORD PTR [rax+r10]
jle .L24
mov DWORD PTR 0[r13+rsi*4], edi
xor eax, eax
jmp .L32
.p2align 4,,10
.p2align 3
.L30:
add rax, 2
cmp r14d, eax
jle .L31
.L32:
mov esi, eax
cmp DWORD PTR [rbx+rax*4], ecx
jne .L30
add esi, 1
movsx rsi, esi
mov eax, DWORD PTR [rbx+rsi*4]
mov DWORD PTR -84[rbp], eax
.L31:
movsx rax, DWORD PTR -84[rbp]
mov DWORD PTR [rbx+rax*4], ecx
xor eax, eax
jmp .L34
.p2align 4,,10
.p2align 3
.L33:
add rax, 2
cmp r14d, eax
jle .L63
.L34:
mov esi, eax
cmp DWORD PTR [rbx+rax*4], ecx
jne .L33
add esi, 1
add rdx, 1
movsx rsi, esi
mov ecx, DWORD PTR [rbx+rsi*4]
mov DWORD PTR -88[rbp], ecx
cmp rdx, QWORD PTR -72[rbp]
jne .L35
.p2align 4,,10
.p2align 3
.L61:
add ecx, 1
cmp r14d, ecx
jg .L23
mov rax, QWORD PTR -104[rbp]
mov rsi, QWORD PTR -96[rbp]
mov edx, DWORD PTR 4[0+rax*4]
add rsi, r13
mov rax, r13
.p2align 4,,10
.p2align 3
.L37:
mov ecx, DWORD PTR [rax]
cmp edx, ecx
cmovg edx, ecx
add rax, 4
cmp rsi, rax
jne .L37
xor eax, eax
.p2align 4,,10
.p2align 3
.L38:
add eax, DWORD PTR 0[r13]
add r13, 4
cmp rsi, r13
jne .L38
.L39:
sub eax, edx
mov rdi, QWORD PTR -56[rbp]
sub rdi, QWORD PTR fs:40
jne .L64
lea rsp, -40[rbp]
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L58:
.cfi_restore_state
or QWORD PTR -8[rsp+rcx], 0
jmp .L17
.p2align 4,,10
.p2align 3
.L25:
movsx rax, DWORD PTR -80[rbp]
mov DWORD PTR 0[r13+rsi*4], edi
mov DWORD PTR [rbx+rax*4], r11d
mov rdi, rax
lea eax, 1[rax]
cdqe
add edi, 2
mov DWORD PTR [rbx+rax*4], ecx
mov DWORD PTR -80[rbp], edi
jmp .L24
.p2align 4,,10
.p2align 3
.L63:
mov ecx, DWORD PTR -88[rbp]
jmp .L24
.L22:
mov rax, QWORD PTR -104[rbp]
mov edx, DWORD PTR 4[0+rax*4]
xor eax, eax
jmp .L39
.L60:
or QWORD PTR -8[rsp+rax], 0
jmp .L20
.L64:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE52:
.size maxsum, .-maxsum
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "\n"
.LC2:
.string "%s"
.LC3:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB53:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea rdi, .LC0[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 88
.cfi_def_cfa_offset 144
mov rax, QWORD PTR fs:40
mov QWORD PTR 72[rsp], rax
xor eax, eax
lea rsi, 68[rsp]
call __isoc99_scanf@PLT
movsx rbp, DWORD PTR 68[rsp]
lea r13, 0[0+rbp*8]
mov r12, rbp
mov rdi, r13
call malloc@PLT
mov rdi, r13
mov QWORD PTR 48[rsp], rax
call malloc@PLT
mov QWORD PTR 56[rsp], rax
test ebp, ebp
jle .L90
mov QWORD PTR 40[rsp], rax
mov ebx, r12d
sal rbp, 2
mov r13, rax
lea r12, [rax+rbx*8]
sal rbx, 2
.p2align 4,,10
.p2align 3
.L68:
mov rdi, rbp
call malloc@PLT
mov QWORD PTR 0[r13], rax
lea rdx, [rax+rbx]
.p2align 4,,10
.p2align 3
.L67:
mov DWORD PTR [rax], 0
add rax, 4
cmp rdx, rax
jne .L67
add r13, 8
cmp r12, r13
jne .L68
mov r13, QWORD PTR 48[rsp]
xor ebx, ebx
lea rbp, .LC1[rip]
.p2align 4,,10
.p2align 3
.L69:
mov esi, 1
mov edi, 16
call calloc@PLT
mov rdi, rbp
mov QWORD PTR 0[r13+rbx*8], rax
mov r12, rax
xor eax, eax
add rbx, 1
call __isoc99_scanf@PLT
mov rsi, r12
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR 68[rsp]
mov r12d, eax
cmp eax, ebx
jg .L69
test eax, eax
jle .L90
mov QWORD PTR 16[rsp], 0
.p2align 4,,10
.p2align 3
.L70:
mov rbx, QWORD PTR 48[rsp]
mov rdx, QWORD PTR 16[rsp]
mov QWORD PTR 8[rsp], 0
mov r15, QWORD PTR [rbx+rdx*8]
jmp .L72
.p2align 4,,10
.p2align 3
.L80:
add QWORD PTR 8[rsp], 1
mov rdx, QWORD PTR 8[rsp]
mov r12d, eax
cmp eax, edx
jle .L103
.L72:
mov edi, DWORD PTR 16[rsp]
cmp DWORD PTR 8[rsp], edi
je .L80
mov esi, 16
mov rdi, r15
call strnlen@PLT
mov rdx, QWORD PTR 8[rsp]
mov rbx, QWORD PTR 48[rsp]
lea r8d, -1[rax]
mov r13, QWORD PTR [rbx+rdx*8]
lea r14, 0[0+rdx*4]
mov r12d, r8d
.p2align 4,,10
.p2align 3
.L74:
movsx rsi, r8d
mov rcx, rax
sub rcx, rsi
movzx ecx, BYTE PTR [r15+rcx]
cmp cl, BYTE PTR 0[r13]
je .L104
test cl, cl
je .L105
mov r8d, r12d
sub r12d, 1
jmp .L74
.p2align 4,,10
.p2align 3
.L104:
mov rbx, r13
lea edi, [r8+r13]
mov DWORD PTR 28[rsp], r12d
lea rbp, 0[r13+rsi]
mov QWORD PTR 32[rsp], r13
mov r12, QWORD PTR 40[rsp]
mov r13, r15
mov r15, rbx
mov ebx, edi
jmp .L76
.p2align 4,,10
.p2align 3
.L79:
movzx esi, BYTE PTR [r15]
mov rcx, QWORD PTR [r12]
add r15, 1
add rcx, r14
cmp sil, al
jne .L77
add DWORD PTR [rcx], 1
mov esi, 16
mov rdi, r13
call strnlen@PLT
.L76:
mov rcx, r15
add rax, r13
mov r8d, ebx
sub rcx, rbp
sub r8d, r15d
movzx eax, BYTE PTR [rax+rcx]
test al, al
jne .L79
mov eax, DWORD PTR 68[rsp]
mov r15, r13
jmp .L80
.p2align 4,,10
.p2align 3
.L77:
mov DWORD PTR [rcx], 0
mov r15, r13
mov esi, 16
mov r12d, DWORD PTR 28[rsp]
mov rdi, r15
mov DWORD PTR 28[rsp], r8d
mov r13, QWORD PTR 32[rsp]
call strnlen@PLT
mov r8d, DWORD PTR 28[rsp]
jmp .L74
.p2align 4,,10
.p2align 3
.L105:
mov eax, DWORD PTR 68[rsp]
jmp .L80
.p2align 4,,10
.p2align 3
.L103:
add QWORD PTR 16[rsp], 1
mov rbx, QWORD PTR 16[rsp]
add QWORD PTR 40[rsp], 8
cmp eax, ebx
jg .L70
test eax, eax
jle .L90
mov rdi, QWORD PTR 48[rsp]
lea eax, -1[rax]
xor ebp, ebp
mov rbx, rdi
lea r13, 8[rdi+rax*8]
.p2align 4,,10
.p2align 3
.L84:
mov rdi, QWORD PTR [rbx]
mov esi, 16
add rbx, 8
call strnlen@PLT
add ebp, eax
cmp rbx, r13
jne .L84
.L83:
mov rdi, QWORD PTR 56[rsp]
mov esi, r12d
call maxsum
mov edx, ebp
mov edi, 1
lea rsi, .LC3[rip]
sub edx, eax
mov eax, 60
cmp edx, 59
cmove edx, eax
xor eax, eax
xor ebx, ebx
call __printf_chk@PLT
mov eax, DWORD PTR 68[rsp]
test eax, eax
jle .L87
mov rbp, QWORD PTR 48[rsp]
mov r12, QWORD PTR 56[rsp]
.p2align 4,,10
.p2align 3
.L86:
mov rdi, QWORD PTR 0[rbp+rbx*8]
call free@PLT
mov rdi, QWORD PTR [r12+rbx*8]
add rbx, 1
call free@PLT
cmp DWORD PTR 68[rsp], ebx
jg .L86
.L87:
mov rdi, QWORD PTR 48[rsp]
call free@PLT
mov rdi, QWORD PTR 56[rsp]
call free@PLT
mov rax, QWORD PTR 72[rsp]
sub rax, QWORD PTR fs:40
jne .L106
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L90:
.cfi_restore_state
xor ebp, ebp
jmp .L83
.L106:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE53:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100119.c"
.text
.align 2
.global f1
.syntax unified
.arm
.fpu softvfp
.type f1, %function
f1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r2, #0
ble .L4
mov r3, #0
b .L3
.L8:
cmp r2, r3
ble .L4
.L3:
ldr ip, [r1, r3, lsl #2]
add r3, r3, #2
cmp ip, r0
bne .L8
mov r0, #0
bx lr
.L4:
mov r0, #1
bx lr
.size f1, .-f1
.align 2
.global f2
.syntax unified
.arm
.fpu softvfp
.type f2, %function
f2:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r2, #0
bxle lr
mov r3, #0
b .L12
.L11:
add r3, r3, #2
cmp r2, r3
bxle lr
.L12:
ldr ip, [r1, r3, lsl #2]
cmp ip, r0
bne .L11
add r3, r3, #1
ldr r0, [r1, r3, lsl #2]
bx lr
.size f2, .-f2
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global maxsum
.syntax unified
.arm
.fpu softvfp
.type maxsum, %function
maxsum:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
lsl r3, r1, #2
add r3, r3, #7
add fp, sp, #32
bic r3, r3, #7
sub sp, sp, #36
sub sp, sp, r3
mov r7, sp
sub r3, r7, r1, lsl #3
mov sp, r3
lsl r4, r1, #1
ldr r3, .L54
cmp r4, #0
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
mov lr, sp
ble .L15
mov r3, #0
mvn ip, #0
sub r2, lr, #4
.L16:
add r3, r3, #1
cmp r4, r3
str ip, [r2, #4]!
bne .L16
.L15:
cmp r1, #0
ble .L17
mov r10, #0
mov r2, r10
sub r3, r7, #4
str r3, [fp, #-60]
.L18:
mov r6, r10
add r10, r10, #1
cmp r1, r10
str r2, [r3, #4]!
bne .L18
mov r1, #0
mov r5, r10
mov ip, r1
.L19:
mov r3, #0
b .L31
.L20:
cmp r6, r3
add r3, r3, #1
beq .L49
.L31:
ldr r8, [r0, ip, lsl #2]
ldr r2, [r7, ip, lsl #2]
ldr r8, [r8, r3, lsl #2]
lsl r9, ip, #2
cmp r8, r2
lsl r10, r3, #2
ble .L20
cmp r4, #0
ble .L21
mov r2, #0
str r10, [fp, #-48]
b .L23
.L50:
add r2, r2, #2
cmp r4, r2
ble .L21
.L23:
ldr r10, [lr, r2, lsl #2]
cmp r10, r3
bne .L50
ldr r10, [fp, #-48]
mov r2, #0
str r1, [fp, #-48]
b .L22
.L24:
add r2, r2, #2
cmp r4, r2
ble .L51
.L22:
ldr r1, [lr, r2, lsl #2]
cmp r1, r3
bne .L24
add r2, r2, #1
ldr r2, [lr, r2, lsl #2]
ldr r1, [fp, #-48]
str r2, [fp, #-52]
.L25:
ldr r2, [fp, #-52]
ldr r2, [r0, r2, lsl #2]
ldr r2, [r2, r10]
cmp r8, r2
ble .L20
mov r2, #0
str r8, [r7, r9]
b .L28
.L26:
add r2, r2, #2
cmp r5, r2
ble .L27
.L28:
ldr r8, [lr, r2, lsl #2]
cmp r8, ip
bne .L26
add r2, r2, #1
ldr r2, [lr, r2, lsl #2]
str r2, [fp, #-56]
.L27:
ldr r8, [fp, #-56]
mov r2, #0
str ip, [lr, r8, lsl #2]
b .L30
.L29:
add r2, r2, #2
cmp r5, r2
ble .L52
.L30:
ldr r8, [lr, r2, lsl #2]
cmp r8, ip
bne .L29
add r2, r2, #1
ldr ip, [lr, r2, lsl #2]
cmp r6, r3
str ip, [fp, #-64]
add r3, r3, #1
bne .L31
.L49:
cmp ip, r6
add ip, ip, #1
blt .L19
mov r1, #0
ldr r2, [r7, #4]
ldr ip, [fp, #-60]
.L33:
ldr r0, [ip, #4]!
cmp r2, r0
movge r2, r0
cmp r6, r1
add r1, r1, #1
bne .L33
mov r3, #0
mov r1, r3
ldr r0, [fp, #-60]
.L34:
ldr ip, [r0, #4]!
cmp r6, r3
mov lr, r3
add r1, r1, ip
add r3, r3, #1
bne .L34
.L35:
ldr r3, .L54
sub r0, r1, r2
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L53
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L21:
add r2, lr, r1, lsl #2
str r3, [lr, r1, lsl #2]
str r8, [r7, r9]
str ip, [r2, #4]
add r1, r1, #2
b .L20
.L51:
ldr r1, [fp, #-48]
b .L25
.L52:
ldr ip, [fp, #-64]
b .L20
.L17:
mov r1, #0
ldr r2, [r7, #4]
b .L35
.L53:
bl __stack_chk_fail
.L55:
.align 2
.L54:
.word .LC0
.size maxsum, .-maxsum
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "\012\000"
.align 2
.LC3:
.ascii "%s\000"
.align 2
.LC4:
.ascii "%d\012\000"
.section .rodata.cst4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L103
sub sp, sp, #36
add r1, sp, #24
ldr r0, .L103+4
ldr r3, [r3]
str r3, [sp, #28]
mov r3,#0
bl __isoc99_scanf
ldr r0, [sp, #24]
lsl r0, r0, #2
bl malloc
ldr r3, [sp, #24]
str r0, [sp, #8]
lsl r0, r3, #2
bl malloc
ldr r9, [sp, #24]
str r0, [sp, #12]
cmp r9, #0
ble .L65
mov r5, #0
mov r3, r0
mov r4, r5
lsl r0, r9, #2
sub r6, r3, #4
.L60:
bl malloc
ldr r9, [sp, #24]
mov r3, r0
cmp r9, #0
str r0, [r6, #4]!
ble .L65
lsl r0, r9, #2
sub r2, r0, #4
add r2, r3, r2
sub r3, r3, #4
.L61:
str r4, [r3, #4]!
cmp r2, r3
bne .L61
add r5, r5, #1
cmp r5, r9
blt .L60
cmp r9, #0
ble .L65
mov r4, #0
ldr r3, [sp, #8]
ldr r7, .L103+8
sub r5, r3, #4
ldr r6, .L103+12
str r5, [sp, #20]
str r5, [sp, #16]
.L64:
mov r0, #16
bl malloc
mov ip, #0
mov r8, r0
str r0, [r5, #4]!
sub r3, r0, #1
add r2, r0, #15
.L63:
strb ip, [r3, #1]!
cmp r2, r3
bne .L63
mov r0, r7
bl __isoc99_scanf
mov r1, r8
mov r0, r6
bl __isoc99_scanf
ldr r9, [sp, #24]
add r4, r4, #1
cmp r9, r4
bgt .L64
cmp r9, #0
ble .L65
mov r3, #0
ldr r8, [sp, #12]
str r3, [sp, #4]
.L66:
ldmib sp, {r2, r3}
mov r7, #0
ldr fp, [r3, r2, lsl #2]
b .L68
.L101:
add r7, r7, #1
cmp r9, r7
ble .L100
.L68:
ldr r3, [sp, #4]
cmp r3, r7
beq .L101
mov r1, #16
mov r0, fp
bl strnlen
sub r4, r0, #1
mov r1, r0
mov r6, r4
ldr r3, [sp, #8]
lsl r5, r7, #2
ldr r9, [r3, r7, lsl #2]
ldrb ip, [r9] @ zero_extendqisi2
.L70:
sub r0, r1, r4
ldrb r3, [fp, r0] @ zero_extendqisi2
cmp ip, r3
subeq r10, r9, #1
beq .L72
cmp r3, #0
beq .L99
mov r4, r6
sub r6, r6, #1
b .L70
.L65:
mov r4, #0
.L79:
mov r1, r9
ldr r0, [sp, #12]
bl maxsum
sub r2, r4, r0
cmp r2, #59
moveq r2, #60
mov r0, #1
ldr r1, .L103+16
bl __printf_chk
ldr r3, [sp, #24]
cmp r3, #0
ble .L84
mov r4, #0
ldr r3, [sp, #8]
sub r6, r3, #4
ldr r3, [sp, #12]
sub r5, r3, #4
.L83:
ldr r0, [r6, #4]!
bl free
ldr r0, [r5, #4]!
bl free
ldr r3, [sp, #24]
add r4, r4, #1
cmp r3, r4
bgt .L83
.L84:
ldr r0, [sp, #8]
bl free
ldr r0, [sp, #12]
bl free
ldr r3, .L103
ldr r2, [r3]
ldr r3, [sp, #28]
eors r2, r3, r2
mov r3, #0
bne .L102
mov r0, #0
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L102:
bl __stack_chk_fail
.L75:
ldrb r1, [r10, #1]! @ zero_extendqisi2
ldr r3, [r8]
cmp r1, r2
add r2, r3, r5
bne .L73
ldr r2, [r3, r5]
mov r1, #16
add r2, r2, #1
mov r0, fp
str r2, [r3, r5]
bl strnlen
sub r4, r4, #1
sub r0, r0, r4
.L72:
ldrb r2, [fp, r0] @ zero_extendqisi2
cmp r2, #0
bne .L75
.L99:
ldr r9, [sp, #24]
add r7, r7, #1
cmp r9, r7
bgt .L68
.L100:
ldr r3, [sp, #4]
add r8, r8, #4
add r3, r3, #1
cmp r9, r3
str r3, [sp, #4]
bgt .L66
cmp r9, #0
mov r4, #0
ble .L79
ldr r3, [sp, #20]
ldr r6, [sp, #16]
add r5, r3, r9, lsl #2
.L80:
ldr r0, [r6, #4]!
mov r1, #16
bl strnlen
cmp r5, r6
add r4, r4, r0
bne .L80
b .L79
.L73:
mov r3, #0
mov r1, #16
mov r0, fp
str r3, [r2]
bl strnlen
ldrb ip, [r9] @ zero_extendqisi2
mov r1, r0
b .L70
.L104:
.align 2
.L103:
.word .LC5
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "10012.c"
.intel_syntax noprefix
.text
.p2align 4
.globl printf
.type printf, @function
printf:
.LFB35:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 104
.cfi_def_cfa_offset 160
mov QWORD PTR 56[rsp], rsi
mov QWORD PTR 64[rsp], rdx
mov QWORD PTR 72[rsp], rcx
mov QWORD PTR 80[rsp], r8
mov QWORD PTR 88[rsp], r9
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
lea rax, 160[rsp]
mov DWORD PTR 16[rsp], 8
mov QWORD PTR 24[rsp], rax
lea rax, 48[rsp]
mov QWORD PTR 32[rsp], rax
movzx eax, BYTE PTR [rdi]
test al, al
je .L40
mov rbx, rdi
xor r12d, r12d
mov r14d, 2147483647
.p2align 4,,10
.p2align 3
.L37:
mov r13d, r14d
sub r13d, r12d
movsx rdx, r13d
cmp al, 37
jne .L3
movzx eax, BYTE PTR 1[rbx]
cmp al, 37
je .L94
cmp al, 99
je .L95
cmp al, 115
je .L96
cmp al, 100
je .L97
mov rdi, rbx
mov QWORD PTR [rsp], rdx
call strlen@PLT
mov rdx, QWORD PTR [rsp]
mov r13, rax
cmp rdx, rax
jb .L9
test rax, rax
je .L35
mov rbp, rbx
add rbx, rax
jmp .L36
.p2align 4,,10
.p2align 3
.L98:
add rbp, 1
cmp rbx, rbp
je .L35
.L36:
movzx edi, BYTE PTR 0[rbp]
mov rsi, QWORD PTR stdout[rip]
call putc@PLT
cmp eax, -1
jne .L98
.p2align 4,,10
.p2align 3
.L9:
mov r12d, -1
.L1:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L99
add rsp, 104
.cfi_remember_state
.cfi_def_cfa_offset 56
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L94:
.cfi_restore_state
add rbx, 1
.L3:
movzx eax, BYTE PTR 1[rbx]
cmp al, 37
je .L5
test al, al
je .L5
mov ebp, 1
.p2align 4,,10
.p2align 3
.L6:
add rbp, 1
movzx eax, BYTE PTR [rbx+rbp]
lea r15, [rbx+rbp]
test al, al
je .L8
cmp al, 37
jne .L6
.L8:
cmp rdx, rbp
jb .L9
test rbp, rbp
je .L41
.L10:
xor r13d, r13d
jmp .L12
.p2align 4,,10
.p2align 3
.L101:
add r13, 1
cmp rbp, r13
jbe .L100
.L12:
movzx edi, BYTE PTR [rbx+r13]
mov rsi, QWORD PTR stdout[rip]
call putc@PLT
cmp eax, -1
jne .L101
jmp .L9
.p2align 4,,10
.p2align 3
.L100:
movzx eax, BYTE PTR [r15]
mov rbx, r15
.L11:
add r12d, ebp
.L31:
test al, al
jne .L37
jmp .L1
.p2align 4,,10
.p2align 3
.L35:
movzx eax, BYTE PTR [rbx]
add r12d, r13d
jmp .L31
.p2align 4,,10
.p2align 3
.L95:
mov eax, DWORD PTR 16[rsp]
lea rbp, 2[rbx]
cmp eax, 47
ja .L14
mov edx, eax
add eax, 8
add rdx, QWORD PTR 32[rsp]
mov DWORD PTR 16[rsp], eax
.L15:
mov edi, DWORD PTR [rdx]
test r13d, r13d
je .L9
mov rsi, QWORD PTR stdout[rip]
movzx edi, dil
call putc@PLT
cmp eax, -1
je .L9
movzx eax, BYTE PTR 2[rbx]
add r12d, 1
mov rbx, rbp
jmp .L31
.p2align 4,,10
.p2align 3
.L96:
lea rax, 2[rbx]
mov QWORD PTR 8[rsp], rax
mov eax, DWORD PTR 16[rsp]
cmp eax, 47
ja .L21
mov ecx, eax
add eax, 8
add rcx, QWORD PTR 32[rsp]
mov DWORD PTR 16[rsp], eax
.L22:
mov r13, QWORD PTR [rcx]
mov QWORD PTR [rsp], rdx
mov rdi, r13
call strlen@PLT
mov rdx, QWORD PTR [rsp]
mov r15, rax
cmp rdx, rax
jb .L9
test rax, rax
je .L23
lea rbp, 0[r13+rax]
jmp .L24
.p2align 4,,10
.p2align 3
.L102:
add r13, 1
cmp rbp, r13
je .L23
.L24:
movzx edi, BYTE PTR 0[r13]
mov rsi, QWORD PTR stdout[rip]
call putc@PLT
cmp eax, -1
jne .L102
jmp .L9
.p2align 4,,10
.p2align 3
.L23:
add r12d, r15d
.L92:
movzx eax, BYTE PTR 2[rbx]
mov rbx, QWORD PTR 8[rsp]
jmp .L31
.p2align 4,,10
.p2align 3
.L14:
mov rdx, QWORD PTR 24[rsp]
lea rax, 8[rdx]
mov QWORD PTR 24[rsp], rax
jmp .L15
.p2align 4,,10
.p2align 3
.L5:
test r13d, r13d
je .L9
lea r15, 1[rbx]
mov ebp, 1
jmp .L10
.p2align 4,,10
.p2align 3
.L21:
mov rcx, QWORD PTR 24[rsp]
lea rax, 8[rcx]
mov QWORD PTR 24[rsp], rax
jmp .L22
.L97:
lea rax, 2[rbx]
mov QWORD PTR 8[rsp], rax
mov eax, DWORD PTR 16[rsp]
cmp eax, 47
ja .L26
mov edx, eax
add eax, 8
add rdx, QWORD PTR 32[rsp]
mov DWORD PTR 16[rsp], eax
.L27:
mov edx, DWORD PTR [rdx]
mov DWORD PTR [rsp], edx
test edx, edx
je .L92
xor r15d, r15d
.p2align 4,,10
.p2align 3
.L29:
movsx rax, edx
mov ecx, edx
add r15d, 1
imul rax, rax, 1717986919
sar ecx, 31
sar rax, 34
sub eax, ecx
mov edx, eax
jne .L29
mov ebp, r15d
.p2align 4,,10
.p2align 3
.L30:
mov eax, 1
mov ecx, 1
cmp ebp, 1
je .L103
.p2align 4,,10
.p2align 3
.L32:
lea edx, [rcx+rcx*4]
add eax, 1
lea ecx, [rdx+rdx]
cmp eax, ebp
jne .L32
mov eax, DWORD PTR [rsp]
cdq
idiv ecx
mov DWORD PTR [rsp], edx
.L34:
sub ebp, 1
lea edi, 48[rax]
test r13d, r13d
je .L9
mov rsi, QWORD PTR stdout[rip]
movzx edi, dil
call putc@PLT
cmp eax, -1
je .L9
lea eax, [r15+r12]
sub eax, ebp
mov edx, eax
test ebp, ebp
jne .L30
movzx eax, BYTE PTR 2[rbx]
mov r12d, edx
mov rbx, QWORD PTR 8[rsp]
jmp .L31
.L103:
mov eax, DWORD PTR [rsp]
mov DWORD PTR [rsp], 0
jmp .L34
.L41:
mov rbx, r15
jmp .L11
.L26:
mov rdx, QWORD PTR 24[rsp]
lea rax, 8[rdx]
mov QWORD PTR 24[rsp], rax
jmp .L27
.L40:
xor r12d, r12d
jmp .L1
.L99:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE35:
.size printf, .-printf
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "10012.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type print, %function
print:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
beq .L11
sub r1, r1, #1
push {r4, r5, r6, lr}
ldr r6, .L17
add r5, r0, r1
sub r4, r0, #1
b .L4
.L16:
cmp r4, r5
beq .L15
.L4:
ldr r1, [r6]
ldrb r0, [r4, #1]! @ zero_extendqisi2
bl putc
cmn r0, #1
bne .L16
mov r0, #0
pop {r4, r5, r6, pc}
.L15:
mov r0, #1
pop {r4, r5, r6, pc}
.L11:
mov r0, #1
bx lr
.L18:
.align 2
.L17:
.word stdout
.size print, .-print
.global __aeabi_idivmod
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC0:
.word __stack_chk_guard
.text
.align 2
.global printf
.syntax unified
.arm
.fpu softvfp
.type printf, %function
printf:
@ args = 4, pretend = 16, frame = 16
@ frame_needed = 0, uses_anonymous_args = 1
push {r0, r1, r2, r3}
push {r4, r5, r6, r7, r8, r9, r10, lr}
sub sp, sp, #16
ldr r7, [sp, #48]
ldr r1, .L80
ldrb r3, [r7] @ zero_extendqisi2
add r2, sp, #52
cmp r3, #0
ldr r1, [r1]
str r1, [sp, #12]
mov r1,#0
str r2, [sp, #8]
beq .L41
mov r5, #0
ldr r6, .L80+4
b .L39
.L77:
cmp r3, #37
beq .L73
cmp r3, #99
beq .L74
cmp r3, #115
beq .L75
cmp r3, #100
beq .L76
mov r0, r7
bl strlen
cmp r8, r0
mov r4, r0
bcc .L37
mov r1, r0
mov r0, r7
bl print
cmp r0, #0
beq .L37
add r5, r5, r4
add r7, r7, r4
.L29:
ldrb r3, [r7] @ zero_extendqisi2
cmp r3, #0
beq .L19
.L39:
mvn r8, #-2147483648
cmp r3, #37
sub r8, r8, r5
ldrb r3, [r7, #1] @ zero_extendqisi2
beq .L77
cmp r3, #0
cmpne r3, #37
mov r4, #1
beq .L23
.L79:
add r3, r7, #2
.L24:
mov r9, r3
ldrb r2, [r3], #1 @ zero_extendqisi2
add r4, r4, #1
cmp r2, #0
cmpne r2, #37
bne .L24
cmp r8, r4
bcc .L37
.L26:
mov r0, r7
mov r1, r4
bl print
cmp r0, #0
beq .L37
mov r7, r9
ldrb r3, [r7] @ zero_extendqisi2
add r5, r5, r4
cmp r3, #0
bne .L39
.L19:
ldr r3, .L80
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L78
mov r0, r5
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, lr}
add sp, sp, #16
bx lr
.L73:
ldrb r3, [r7, #2] @ zero_extendqisi2
mov r4, #1
cmp r3, #0
cmpne r3, #37
add r7, r7, #1
bne .L79
.L23:
cmp r8, r4
add r9, r7, r4
bcs .L26
.L37:
mvn r5, #0
b .L19
.L74:
ldr r3, [sp, #8]
cmp r8, #0
ldr r2, [r3]
add r3, r3, #4
add r7, r7, #2
strb r2, [sp, #7]
str r3, [sp, #8]
beq .L37
mov r1, #1
add r0, sp, #7
bl print
cmp r0, #0
beq .L37
add r5, r5, #1
b .L29
.L75:
ldr r3, [sp, #8]
add r7, r7, #2
ldr r9, [r3]
add r3, r3, #4
mov r0, r9
str r3, [sp, #8]
bl strlen
cmp r8, r0
mov r4, r0
bcc .L37
mov r0, r9
mov r1, r4
bl print
cmp r0, #0
beq .L37
add r5, r5, r4
b .L29
.L76:
ldr r3, [sp, #8]
add r7, r7, #2
ldr r10, [r3]
add r3, r3, #4
cmp r10, #0
str r3, [sp, #8]
beq .L29
mov r3, r10
mov r4, #0
.L34:
smull r1, r2, r6, r3
asr r3, r3, #31
rsbs r3, r3, r2, asr #2
add r4, r4, #1
bne .L34
mov r9, r4
.L35:
cmp r9, #1
moveq r0, r10
moveq r10, #0
beq .L38
mov r3, #1
mov r1, r3
.L36:
add r3, r3, #1
add r1, r1, r1, lsl #2
cmp r3, r9
lsl r1, r1, #1
bne .L36
mov r0, r10
bl __aeabi_idivmod
mov r10, r1
.L38:
add r0, r0, #48
cmp r8, #0
strb r0, [sp, #7]
sub r9, r9, #1
beq .L37
mov r1, #1
add r0, sp, #7
bl print
cmp r0, #0
beq .L37
add r3, r5, r4
cmp r9, #0
sub r3, r3, r9
bne .L35
mov r5, r3
b .L29
.L41:
mov r5, r3
b .L19
.L78:
bl __stack_chk_fail
.L81:
.align 2
.L80:
.word .LC0
.word 1717986919
.size printf, .-printf
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100120.c"
.intel_syntax noprefix
.text
.p2align 4
.globl send_current_packet
.type send_current_packet, @function
send_current_packet:
.LFB65:
.cfi_startproc
endbr64
mov edx, DWORD PTR ts_payload[rip]
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
cmp edx, 184
je .L13
cmp edx, 183
jne .L4
movzx ebx, BYTE PTR ts_packet[rip+186]
mov DWORD PTR ts_payload[rip], 182
call send_current_packet
movzx eax, WORD PTR pid[rip]
mov DWORD PTR ts_payload[rip], 1
mov BYTE PTR ts_packet[rip+4], bl
mov WORD PTR ts_packet[rip+1], ax
movzx eax, BYTE PTR ts_continuity_counter[rip]
mov edx, eax
add eax, 1
and eax, 15
or edx, 48
mov BYTE PTR ts_continuity_counter[rip], al
mov BYTE PTR ts_packet[rip+3], dl
mov edx, 1
.L5:
lea rax, ts_packet[rip+187]
lea ecx, -1[rdx]
movsx rdi, edx
lea rsi, -1[rax]
sub rsi, rcx
.p2align 4,,10
.p2align 3
.L8:
movzx ecx, BYTE PTR -184[rax+rdi]
sub rax, 1
mov BYTE PTR 1[rax], cl
cmp rsi, rax
jne .L8
.L9:
mov eax, -73
mov BYTE PTR ts_packet[rip+5], 0
sub eax, edx
mov BYTE PTR ts_packet[rip+4], al
mov eax, 188
sub eax, edx
cmp eax, 6
jle .L7
mov r8d, 182
mov esi, 255
lea rdi, ts_packet[rip+6]
sub r8d, edx
mov rdx, r8
call memset@PLT
jmp .L7
.p2align 4,,10
.p2align 3
.L13:
movzx eax, BYTE PTR ts_continuity_counter[rip]
mov edx, eax
add eax, 1
or edx, 16
and eax, 15
mov BYTE PTR ts_packet[rip+3], dl
mov BYTE PTR ts_continuity_counter[rip], al
.L7:
mov edx, 188
lea rsi, ts_packet[rip]
mov edi, 1
call write@PLT
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
mov DWORD PTR ts_payload[rip], 0
ret
.L4:
.cfi_restore_state
movzx eax, BYTE PTR ts_continuity_counter[rip]
mov ecx, eax
add eax, 1
or ecx, 48
and eax, 15
mov BYTE PTR ts_packet[rip+3], cl
mov BYTE PTR ts_continuity_counter[rip], al
test edx, edx
jle .L9
jmp .L5
.cfi_endproc
.LFE65:
.size send_current_packet, .-send_current_packet
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Usage: 'pesdata2ts file.pes pid > file.ts', where pid is bounded from 1 to 8191\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "rb"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB66:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov edx, 8192
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 8
.cfi_def_cfa_offset 48
mov WORD PTR pid[rip], dx
cmp edi, 2
jle .L17
mov rdi, QWORD PTR 8[rsi]
mov rbp, rsi
lea rsi, .LC1[rip]
call fopen@PLT
mov rdi, QWORD PTR 16[rbp]
mov edx, 10
xor esi, esi
mov rbx, rax
call strtol@PLT
mov WORD PTR pid[rip], ax
cmp ax, 8191
ja .L17
test rbx, rbx
je .L17
movzx edi, ax
xor eax, eax
call htons@PLT
mov rcx, rbx
mov edx, 4
mov esi, 1
mov WORD PTR ts_packet[rip+1], ax
lea rdi, look_ahead_buffer[rip]
mov WORD PTR pid[rip], ax
or eax, 64
mov DWORD PTR ts_payload[rip], 0
mov BYTE PTR look_ahead_size[rip], 0
mov BYTE PTR ts_continuity_counter[rip], 0
mov BYTE PTR ts_packet[rip], 71
mov BYTE PTR ts_packet[rip+1], al
call fread@PLT
mov BYTE PTR look_ahead_size[rip], al
mov r12d, eax
test eax, eax
je .L25
.p2align 4,,10
.p2align 3
.L27:
lea r13, look_ahead_buffer[rip]
lea rbp, ts_packet[rip]
.L35:
cmp al, 3
jbe .L30
cmp al, 4
je .L39
.L20:
test al, al
jne .L40
test r12d, r12d
je .L29
.L30:
movzx eax, al
mov rcx, rbx
mov edx, 1
mov esi, 1
lea rdi, [rax+r13]
call fread@PLT
mov r12d, eax
add al, BYTE PTR look_ahead_size[rip]
mov BYTE PTR look_ahead_size[rip], al
cmp al, 4
jne .L20
.L39:
movzx edi, BYTE PTR 0[r13]
movzx esi, BYTE PTR look_ahead_buffer[rip+1]
mov edx, edi
or dl, sil
jne .L21
cmp BYTE PTR look_ahead_buffer[rip+2], 1
je .L41
.L32:
xor esi, esi
xor edi, edi
.L21:
mov edx, DWORD PTR ts_payload[rip]
sub eax, 1
mov BYTE PTR 0[r13], sil
mov BYTE PTR look_ahead_size[rip], al
lea ecx, 4[rdx]
add edx, 1
movsx rcx, ecx
mov DWORD PTR ts_payload[rip], edx
mov BYTE PTR 0[rbp+rcx], dil
movzx ecx, BYTE PTR look_ahead_buffer[rip+2]
mov BYTE PTR look_ahead_buffer[rip+1], cl
movzx ecx, BYTE PTR look_ahead_buffer[rip+3]
mov BYTE PTR look_ahead_buffer[rip+2], cl
cmp edx, 184
je .L42
.L24:
test r12d, r12d
jne .L35
test al, al
je .L29
.L25:
xor r12d, r12d
test al, al
jne .L27
.L28:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
mov rcx, QWORD PTR stderr[rip]
mov edx, 80
mov esi, 1
lea rdi, .LC0[rip]
call fwrite@PLT
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
mov eax, 2
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L29:
.cfi_restore_state
mov eax, DWORD PTR ts_payload[rip]
test eax, eax
je .L28
call send_current_packet
movzx eax, BYTE PTR look_ahead_size[rip]
jmp .L25
.L42:
call send_current_packet
movzx eax, WORD PTR pid[rip]
mov WORD PTR ts_packet[rip+1], ax
movzx eax, BYTE PTR look_ahead_size[rip]
jmp .L24
.L41:
cmp BYTE PTR look_ahead_buffer[rip+3], -67
jne .L32
cmp DWORD PTR ts_payload[rip], 0
jne .L43
.L22:
movzx eax, WORD PTR pid[rip]
mov WORD PTR ts_packet[rip+1], ax
or eax, 64
mov BYTE PTR ts_packet[rip+1], al
movzx eax, BYTE PTR look_ahead_size[rip]
jmp .L20
.L43:
call send_current_packet
jmp .L22
.L40:
movzx edi, BYTE PTR 0[r13]
movzx esi, BYTE PTR look_ahead_buffer[rip+1]
jmp .L21
.cfi_endproc
.LFE66:
.size main, .-main
.globl look_ahead_size
.bss
.type look_ahead_size, @object
.size look_ahead_size, 1
look_ahead_size:
.zero 1
.globl look_ahead_buffer
.type look_ahead_buffer, @object
.size look_ahead_buffer, 4
look_ahead_buffer:
.zero 4
.globl ts_packet
.align 32
.type ts_packet, @object
.size ts_packet, 188
ts_packet:
.zero 188
.globl ts_continuity_counter
.type ts_continuity_counter, @object
.size ts_continuity_counter, 1
ts_continuity_counter:
.zero 1
.globl pid
.align 2
.type pid, @object
.size pid, 2
pid:
.zero 2
.globl ts_payload
.align 4
.type ts_payload, @object
.size ts_payload, 4
ts_payload:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100120.c"
.text
.align 2
.global send_current_packet
.syntax unified
.arm
.fpu softvfp
.type send_current_packet, %function
send_current_packet:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r5, .L16
ldr r1, [r5]
cmp r1, #184
beq .L15
cmp r1, #183
bne .L4
mov r3, #182
ldr r4, .L16+4
str r3, [r5]
ldrb r6, [r4, #186] @ zero_extendqisi2
bl send_current_packet
mov r2, #2
ldr r1, .L16+8
add r0, r4, #1
bl memcpy
mov r1, #1
ldr r0, .L16+12
strb r6, [r4, #4]
ldrb r3, [r0] @ zero_extendqisi2
str r1, [r5]
add r2, r3, r1
and r2, r2, #15
orr r3, r3, #48
strb r3, [r4, #3]
strb r2, [r0]
.L5:
ldr r2, .L16+16
add r3, r1, #4
sub ip, r2, #183
add r3, r4, r3
.L8:
ldrb r0, [r3, #-1]! @ zero_extendqisi2
cmp r3, ip
strb r0, [r2], #-1
bne .L8
.L9:
mvn r3, #72
mov r2, #0
rsb r0, r1, #188
cmp r0, #6
sub r1, r3, r1
strb r1, [r4, #4]
strb r2, [r4, #5]
ble .L7
mvn r2, #0
ldr r3, .L16+20
add r4, r4, r0
.L10:
strb r2, [r3], #1
cmp r4, r3
bne .L10
.L7:
mov r2, #188
mov r0, #1
ldr r1, .L16+4
bl write
mov r3, #0
str r3, [r5]
pop {r4, r5, r6, pc}
.L15:
ldr r0, .L16+12
ldr r1, .L16+4
ldrb r3, [r0] @ zero_extendqisi2
add r2, r3, #1
and r2, r2, #15
orr r3, r3, #16
strb r2, [r0]
mov r2, #188
mov r0, #1
strb r3, [r1, #3]
bl write
mov r3, #0
str r3, [r5]
pop {r4, r5, r6, pc}
.L4:
ldr r0, .L16+12
ldr r4, .L16+4
ldrb r3, [r0] @ zero_extendqisi2
cmp r1, #0
add r2, r3, #1
and r2, r2, #15
orr r3, r3, #48
strb r2, [r0]
strb r3, [r4, #3]
ble .L9
b .L5
.L17:
.align 2
.L16:
.word ts_payload
.word ts_packet
.word pid
.word ts_continuity_counter
.word ts_packet+187
.word ts_packet+6
.size send_current_packet, .-send_current_packet
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Usage: 'pesdata2ts file.pes pid > file.ts', where p"
.ascii "id is bounded from 1 to 8191\012\000"
.align 2
.LC1:
.ascii "rb\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r3, #8192
ldr r9, .L51
cmp r0, #2
strh r3, [r9] @ movhi
ble .L21
mov r4, r1
ldr r1, .L51+4
ldr r0, [r4, #4]
bl fopen
mov r2, #10
mov r6, r0
mov r1, #0
ldr r0, [r4, #8]
bl strtol
lsl r3, r0, #16
lsr r3, r3, #16
cmp r6, #0
cmpne r3, #8192
strh r3, [r9] @ movhi
movcs r4, #1
movcc r4, #0
bcs .L21
mov r0, r3
bl htons
mov r1, #71
ldr r8, .L51+8
lsl r3, r0, #16
strh r0, [r9] @ movhi
ldr r5, .L51+12
ldr ip, .L51+16
lsr r3, r3, #24
orr r0, r0, #64
ldr r7, .L51+20
strb r3, [r8, #2]
strb r0, [r8, #1]
mov r3, r6
strb r1, [r8]
mov r2, #4
mov r1, #1
ldr r0, .L51+24
str r4, [r7]
strb r4, [r5]
strb r4, [ip]
bl fread
and r3, r0, #255
cmp r0, #0
mov r9, r0
strb r3, [r5]
beq .L29
.L31:
ldr r4, .L51+24
.L41:
cmp r3, #3
bls .L34
cmp r3, #4
beq .L46
.L24:
cmp r3, #0
bne .L47
cmp r9, #0
beq .L33
.L34:
mov r2, #1
add r0, r4, r3
mov r1, r2
mov r3, r6
bl fread
ldrb r3, [r5] @ zero_extendqisi2
mov r9, r0
add r3, r3, r0
and r3, r3, #255
cmp r3, #4
strb r3, [r5]
bne .L24
.L46:
ldrb ip, [r4] @ zero_extendqisi2
ldrb r2, [r4, #1] @ zero_extendqisi2
ldrb r10, [r4, #2] @ zero_extendqisi2
orrs r0, ip, r2
ldrb fp, [r4, #3] @ zero_extendqisi2
ldr r1, [r7]
bne .L25
cmp r10, #1
beq .L48
.L36:
mov r2, r0
mov ip, r0
.L25:
add lr, r1, #1
sub r3, r3, #1
and r3, r3, #255
add r1, r8, r1
cmp lr, #184
strb r3, [r5]
strb r2, [r4]
strb r10, [r4, #1]
strb fp, [r4, #2]
str lr, [r7]
strb ip, [r1, #4]
beq .L49
.L28:
cmp r9, #0
bne .L41
cmp r3, #0
beq .L33
.L29:
cmp r3, #0
mov r9, #0
bne .L31
b .L32
.L21:
ldr r3, .L51+28
mov r2, #80
mov r1, #1
ldr r3, [r3]
ldr r0, .L51+32
bl fwrite
mov r0, #2
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L33:
ldr r3, [r7]
cmp r3, #0
bne .L30
.L32:
mov r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L30:
bl send_current_packet
ldrb r3, [r5] @ zero_extendqisi2
b .L29
.L49:
bl send_current_packet
mov r2, #2
ldr r1, .L51
ldr r0, .L51+36
bl memcpy
ldrb r3, [r5] @ zero_extendqisi2
b .L28
.L48:
cmp fp, #189
bne .L36
cmp r1, #0
bne .L50
.L26:
mov r2, #2
ldr r1, .L51
ldr r0, .L51+36
bl memcpy
ldrb r2, [r8, #1] @ zero_extendqisi2
ldrb r3, [r5] @ zero_extendqisi2
orr r2, r2, #64
strb r2, [r8, #1]
b .L24
.L50:
bl send_current_packet
b .L26
.L47:
ldrb ip, [r4] @ zero_extendqisi2
ldrb r2, [r4, #1] @ zero_extendqisi2
ldrb r10, [r4, #2] @ zero_extendqisi2
ldrb fp, [r4, #3] @ zero_extendqisi2
ldr r1, [r7]
b .L25
.L52:
.align 2
.L51:
.word pid
.word .LC1
.word ts_packet
.word look_ahead_size
.word ts_continuity_counter
.word ts_payload
.word look_ahead_buffer
.word stderr
.word .LC0
.word ts_packet+1
.size main, .-main
.comm look_ahead_size,1,1
.comm look_ahead_buffer,4,4
.comm ts_packet,188,4
.comm ts_continuity_counter,1,1
.comm pid,2,2
.comm ts_payload,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001207.c"
.intel_syntax noprefix
.text
.p2align 4
.globl test
.type test, @function
test:
.LFB0:
.cfi_startproc
endbr64
mov eax, 12
ret
.cfi_endproc
.LFE0:
.size test, .-test
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001207.c"
.text
.align 2
.global test
.syntax unified
.arm
.fpu softvfp
.type test, %function
test:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #12
bx lr
.size test, .-test
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001208.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
mov eax, 1
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001208.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #1
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100121.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d %d %d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC1:
.string "Original inputs: a:%-4d b:%-4d c:%-4d\n"
.align 8
.LC2:
.string "Rearranged inputs: a:%-4d b:%-4d c:%-4d\n\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rdi, .LC0[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 40
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea r12, 20[rsp]
lea rbp, 16[rsp]
lea rbx, 12[rsp]
mov rdx, rbp
mov rcx, r12
mov rsi, rbx
call __isoc99_scanf@PLT
mov edx, DWORD PTR 12[rsp]
cmp edx, -1
je .L2
lea r13, .LC1[rip]
.p2align 4,,10
.p2align 3
.L3:
mov r8d, DWORD PTR 20[rsp]
mov ecx, DWORD PTR 16[rsp]
mov rsi, r13
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov eax, DWORD PTR 16[rsp]
mov edx, DWORD PTR 20[rsp]
lea rsi, .LC2[rip]
mov r8d, DWORD PTR 12[rsp]
mov edi, 1
lea ecx, [rax+rax]
xor eax, eax
mov DWORD PTR 12[rsp], edx
mov DWORD PTR 20[rsp], r8d
mov DWORD PTR 16[rsp], ecx
call __printf_chk@PLT
mov rdx, rbp
mov rcx, r12
mov rsi, rbx
lea rdi, .LC0[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edx, DWORD PTR 12[rsp]
cmp edx, -1
jne .L3
.L2:
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.text
.p2align 4
.globl swapIncre
.type swapIncre, @function
swapIncre:
.LFB24:
.cfi_startproc
endbr64
mov eax, DWORD PTR [rdi]
mov ecx, DWORD PTR [rdx]
mov DWORD PTR [rdi], ecx
mov DWORD PTR [rdx], eax
sal DWORD PTR [rsi]
ret
.cfi_endproc
.LFE24:
.size swapIncre, .-swapIncre
.p2align 4
.globl swap
.type swap, @function
swap:
.LFB25:
.cfi_startproc
endbr64
mov eax, DWORD PTR [rdi]
mov ecx, DWORD PTR [rdx]
mov DWORD PTR [rdi], ecx
mov DWORD PTR [rdx], eax
ret
.cfi_endproc
.LFE25:
.size swap, .-swap
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100121.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d %d %d\000"
.align 2
.LC1:
.ascii "Original inputs: a:%-4d b:%-4d c:%-4d\012\000"
.align 2
.LC2:
.ascii "Rearranged inputs: a:%-4d b:%-4d c:%-4d\012\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr ip, .L12
sub sp, sp, #24
add r2, sp, #12
ldr r0, .L12+4
add r3, sp, #16
add r1, sp, #8
ldr ip, [ip]
str ip, [sp, #20]
mov ip,#0
bl __isoc99_scanf
ldr r2, [sp, #8]
cmn r2, #1
beq .L2
ldr r6, .L12+8
ldr r5, .L12+12
ldr r4, .L12+4
.L3:
ldr r3, [sp, #16]
mov r1, r6
str r3, [sp]
mov r0, #1
ldr r3, [sp, #12]
bl __printf_chk
ldr ip, [sp, #8]
ldr r3, [sp, #12]
ldr r2, [sp, #16]
lsl r3, r3, #1
mov r1, r5
str ip, [sp]
mov r0, #1
str r3, [sp, #12]
str ip, [sp, #16]
str r2, [sp, #8]
bl __printf_chk
add r2, sp, #12
mov r0, r4
add r3, sp, #16
add r1, sp, #8
bl __isoc99_scanf
ldr r2, [sp, #8]
cmn r2, #1
bne .L3
.L2:
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L11
mov r0, #0
add sp, sp, #24
@ sp needed
pop {r4, r5, r6, pc}
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.text
.align 2
.global swapIncre
.syntax unified
.arm
.fpu softvfp
.type swapIncre, %function
swapIncre:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, [r0]
ldr ip, [r2]
str ip, [r0]
str r3, [r2]
ldr r3, [r1]
lsl r3, r3, #1
str r3, [r1]
bx lr
.size swapIncre, .-swapIncre
.align 2
.global swap
.syntax unified
.arm
.fpu softvfp
.type swap, %function
swap:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, [r0]
ldr r1, [r2]
str r1, [r0]
str r3, [r2]
bx lr
.size swap, .-swap
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001218.c"
.intel_syntax noprefix
.text
.p2align 4
.globl fibo
.type fibo, @function
fibo:
.LFB23:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov eax, 1
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov DWORD PTR 4[rsp], 0
cmp edi, 2
jle .L1
lea r11d, -2[rdi]
mov r10d, r11d
.L5:
mov DWORD PTR 8[rsp], 0
lea r11d, -2[r10]
cmp r10d, 2
jbe .L58
mov DWORD PTR 12[rsp], r10d
.L9:
mov DWORD PTR [rsp], 0
lea ecx, -2[r11]
cmp r11d, 2
jbe .L59
.L13:
lea esi, -2[rcx]
xor r10d, r10d
cmp ecx, 2
jbe .L60
.L17:
lea r12d, -2[rsi]
xor r15d, r15d
cmp esi, 2
jbe .L61
.L21:
lea ebp, -2[r12]
xor r13d, r13d
cmp r12d, 2
jbe .L62
.L25:
lea r8d, -4[rbp]
xor edx, edx
cmp ebp, 2
jbe .L63
.p2align 4,,10
.p2align 3
.L28:
lea eax, 2[r8]
mov ebx, r8d
xor r14d, r14d
cmp eax, 2
jbe .L64
.L27:
lea edi, -2[rbx]
xor r9d, r9d
cmp ebx, 2
jle .L65
.p2align 4,,10
.p2align 3
.L33:
mov DWORD PTR 44[rsp], r8d
mov DWORD PTR 40[rsp], esi
mov DWORD PTR 36[rsp], ecx
mov DWORD PTR 32[rsp], r11d
mov DWORD PTR 28[rsp], r10d
mov DWORD PTR 24[rsp], r9d
mov DWORD PTR 20[rsp], edx
mov DWORD PTR 16[rsp], edi
call fibo
mov r9d, DWORD PTR 24[rsp]
mov edi, DWORD PTR 16[rsp]
mov edx, DWORD PTR 20[rsp]
mov r10d, DWORD PTR 28[rsp]
add r9d, eax
sub edi, 1
mov r11d, DWORD PTR 32[rsp]
mov ecx, DWORD PTR 36[rsp]
mov esi, DWORD PTR 40[rsp]
mov r8d, DWORD PTR 44[rsp]
jne .L33
sub ebx, 1
lea r14d, 1[r9+r14]
xor r9d, r9d
lea edi, -2[rbx]
cmp ebx, 2
jg .L33
.L65:
lea eax, 1[r14]
sub ebx, 1
jne .L66
add r14d, 2
sub r8d, 1
add edx, r14d
cmp r8d, -2
jne .L28
lea r13d, 1[rdx+r13]
sub ebp, 1
.L71:
lea r8d, -4[rbp]
xor edx, edx
cmp ebp, 2
ja .L28
.L63:
lea eax, 1[r13]
cmp ebp, 1
jne .L67
sub r12d, 1
lea r15d, 2[r13+r15]
xor r13d, r13d
lea ebp, -2[r12]
cmp r12d, 2
ja .L25
.L62:
lea eax, 1[r15]
cmp r12d, 1
jne .L68
sub esi, 1
lea r10d, 2[r15+r10]
xor r15d, r15d
lea r12d, -2[rsi]
cmp esi, 2
ja .L21
.L61:
lea eax, 1[r10]
cmp esi, 1
jne .L69
mov eax, DWORD PTR [rsp]
sub ecx, 1
lea esi, -2[rcx]
lea eax, 2[r10+rax]
xor r10d, r10d
mov DWORD PTR [rsp], eax
cmp ecx, 2
ja .L17
.L60:
mov eax, DWORD PTR [rsp]
add eax, 1
cmp ecx, 1
jne .L70
mov eax, DWORD PTR 8[rsp]
mov edi, DWORD PTR [rsp]
sub r11d, 1
lea eax, 2[rax+rdi]
.L14:
mov DWORD PTR 8[rsp], eax
jmp .L9
.p2align 4,,10
.p2align 3
.L64:
mov r14d, 1
sub r8d, 1
add edx, r14d
cmp r8d, -2
jne .L28
lea r13d, 1[rdx+r13]
sub ebp, 1
jmp .L71
.L59:
mov eax, DWORD PTR 8[rsp]
add eax, 1
cmp r11d, 1
jne .L72
mov r10d, DWORD PTR 12[rsp]
mov eax, DWORD PTR 4[rsp]
mov edi, DWORD PTR 8[rsp]
sub r10d, 1
lea eax, 2[rax+rdi]
.L10:
mov DWORD PTR 4[rsp], eax
jmp .L5
.L58:
mov eax, DWORD PTR 4[rsp]
add eax, 1
cmp r10d, 1
jne .L73
mov eax, DWORD PTR 4[rsp]
add eax, 2
.L1:
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L67:
.cfi_restore_state
mov r13d, eax
mov ebp, 1
jmp .L25
.L73:
mov r10d, 1
jmp .L10
.L72:
mov r11d, 1
jmp .L14
.L70:
mov DWORD PTR [rsp], eax
mov ecx, 1
jmp .L13
.L69:
mov r10d, eax
mov esi, 1
jmp .L17
.L68:
mov r15d, eax
mov r12d, 1
jmp .L21
.L66:
mov r14d, eax
jmp .L27
.cfi_endproc
.LFE23:
.size fibo, .-fibo
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
call __isoc99_scanf@PLT
mov edi, DWORD PTR 4[rsp]
call fibo
lea rsi, .LC0[rip]
mov edi, 1
mov edx, eax
xor eax, eax
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L77
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L77:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001218.c"
.text
.align 2
.global fibo
.syntax unified
.arm
.fpu softvfp
.type fibo, %function
fibo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #2
ble .L10
push {r4, r5, r6, lr}
mov r5, #0
sub r4, r0, #2
.L3:
mov r0, r4
bl fibo
subs r4, r4, #1
add r5, r5, r0
bne .L3
add r0, r5, #1
pop {r4, r5, r6, pc}
.L10:
mov r0, #1
bx lr
.size fibo, .-fibo
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L22
sub sp, sp, #12
mov r1, sp
ldr r0, .L22+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __isoc99_scanf
ldr r3, [sp]
mov r2, #0
cmp r3, #2
subgt r3, r3, #2
ble .L13
.L14:
mov r0, r3
bl fibo
subs r3, r3, #1
add r2, r2, r0
bne .L14
.L13:
add r2, r2, #1
mov r0, #1
ldr r1, .L22+4
bl __printf_chk
ldr r3, .L22
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L21
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L21:
bl __stack_chk_fail
.L23:
.align 2
.L22:
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100122.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Usage %s <inputValues.txt> <outputValues.txt> <numThreads>\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "r"
.LC2:
.string "w"
.section .rodata.str1.8
.align 8
.LC3:
.string "Failed to open at least one file.\n"
.text
.p2align 4
.globl getArgs
.type getArgs, @function
getArgs:
.LFB40:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov rbx, rsi
cmp edi, 3
jle .L8
mov rdi, QWORD PTR 8[rsi]
lea rsi, .LC1[rip]
call fopen@PLT
mov rdi, QWORD PTR 16[rbx]
lea rsi, .LC2[rip]
mov QWORD PTR in[rip], rax
call fopen@PLT
cmp QWORD PTR in[rip], 0
mov QWORD PTR out[rip], rax
je .L5
test rax, rax
je .L5
mov rdi, QWORD PTR 24[rbx]
mov edx, 10
xor esi, esi
call strtol@PLT
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
mov DWORD PTR P[rip], eax
ret
.L5:
.cfi_restore_state
mov rcx, QWORD PTR stdout[rip]
mov edx, 34
mov esi, 1
lea rdi, .LC3[rip]
call fwrite@PLT
mov edi, 1
call exit@PLT
.L8:
mov rdx, QWORD PTR [rsi]
mov edi, 1
xor eax, eax
lea rsi, .LC0[rip]
call __printf_chk@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE40:
.size getArgs, .-getArgs
.section .rodata.str1.1
.LC4:
.string "%d"
.LC5:
.string "Failed to read N.\n"
.LC6:
.string "calloc failed!"
.LC7:
.string "%lf"
.section .rodata.str1.8
.align 8
.LC9:
.string "Failed to read the %dth value from input file\n"
.text
.p2align 4
.globl init
.type init, @function
init:
.LFB41:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea rdx, N[rip]
lea rsi, .LC4[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 16
.cfi_def_cfa_offset 48
mov rdi, QWORD PTR in[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __isoc99_fscanf@PLT
cmp eax, 1
jne .L19
movsx r12, DWORD PTR N[rip]
mov esi, 16
mov rdi, r12
call calloc@PLT
mov esi, 16
mov rdi, r12
mov QWORD PTR buffer[rip], rax
mov rbx, rax
call calloc@PLT
mov QWORD PTR answer[rip], rax
test rax, rax
je .L11
test rbx, rbx
je .L11
test r12d, r12d
jle .L9
xor ebx, ebx
mov r12, rsp
lea rbp, .LC7[rip]
.p2align 4,,10
.p2align 3
.L12:
mov rdi, QWORD PTR in[rip]
mov rdx, r12
mov rsi, rbp
xor eax, eax
call __isoc99_fscanf@PLT
pxor xmm0, xmm0
addsd xmm0, QWORD PTR [rsp]
mov r8d, eax
mov rax, rbx
sal rax, 4
add rax, QWORD PTR buffer[rip]
mov QWORD PTR 8[rax], 0x000000000
movsd QWORD PTR [rax], xmm0
cmp r8d, 1
jne .L20
add rbx, 1
cmp DWORD PTR N[rip], ebx
jg .L12
.L9:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L21
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L20:
.cfi_restore_state
mov rdi, QWORD PTR stdout[rip]
mov ecx, ebx
mov esi, 1
xor eax, eax
lea rdx, .LC9[rip]
call __fprintf_chk@PLT
mov edi, 1
call exit@PLT
.L11:
mov edi, 1
lea rsi, .LC6[rip]
xor eax, eax
call __printf_chk@PLT
mov edi, 1
call exit@PLT
.L19:
mov rcx, QWORD PTR stdout[rip]
mov edx, 18
mov esi, 1
lea rdi, .LC5[rip]
call fwrite@PLT
mov edi, 1
call exit@PLT
.L21:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE41:
.size init, .-init
.p2align 4
.globl fft
.type fft, @function
fft:
.LFB42:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
movsx r15, edx
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
mov ebp, DWORD PTR N[rip]
cmp ebp, r15d
jle .L22
lea ebx, [r15+r15]
mov r13, rdi
mov r12, rsi
cmp ebp, ebx
jg .L30
test ebp, ebp
jle .L22
.L32:
movsd xmm0, QWORD PTR PI[rip]
movsx rax, ebx
sal r15, 4
xor r14d, r14d
movsd xmm3, QWORD PTR .LC10[rip]
sal rax, 4
mov QWORD PTR 16[rsp], rax
mulsd xmm3, xmm0
xorpd xmm0, XMMWORD PTR .LC11[rip]
movsd QWORD PTR 8[rsp], xmm0
movsd QWORD PTR [rsp], xmm3
pxor xmm3, xmm3
cvtsi2sd xmm3, ebp
movsd QWORD PTR 24[rsp], xmm3
.p2align 4,,10
.p2align 3
.L27:
pxor xmm1, xmm1
movsd xmm0, QWORD PTR [rsp]
movsd xmm7, QWORD PTR 24[rsp]
cvtsi2sd xmm1, r14d
mulsd xmm0, xmm1
mulsd xmm1, QWORD PTR 8[rsp]
divsd xmm0, xmm7
divsd xmm1, xmm7
call cexp@PLT
movsd xmm2, QWORD PTR [r12+r15]
movsd xmm3, QWORD PTR 8[r12+r15]
movapd xmm5, xmm0
movapd xmm4, xmm3
movapd xmm0, xmm2
movapd xmm6, xmm2
mulsd xmm4, xmm1
mulsd xmm0, xmm5
mulsd xmm6, xmm1
subsd xmm0, xmm4
movapd xmm4, xmm3
mulsd xmm4, xmm5
addsd xmm4, xmm6
ucomisd xmm0, xmm4
jp .L31
.L26:
mov eax, r14d
movsd xmm1, QWORD PTR 8[r12]
movsd xmm2, QWORD PTR [r12]
lea edx, [r14+rbp]
shr eax, 31
add eax, r14d
addsd xmm1, xmm4
addsd xmm2, xmm0
add r14d, ebx
sar eax
cdqe
sal rax, 4
add rax, r13
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
mov eax, edx
movsd xmm1, QWORD PTR 8[r12]
movsd xmm2, QWORD PTR [r12]
shr eax, 31
add r12, QWORD PTR 16[rsp]
add eax, edx
subsd xmm1, xmm4
subsd xmm2, xmm0
sar eax
cdqe
sal rax, 4
add rax, r13
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
cmp r14d, ebp
jl .L27
.L22:
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L30:
.cfi_restore_state
mov rsi, rdi
mov edx, ebx
mov rdi, r12
call fft
movsx rdi, r15d
mov edx, ebx
sal rdi, 4
lea rsi, 0[r13+rdi]
add rdi, r12
call fft
mov ebp, DWORD PTR N[rip]
test ebp, ebp
jg .L32
jmp .L22
.L31:
movapd xmm0, xmm5
call __muldc3@PLT
movapd xmm4, xmm1
jmp .L26
.cfi_endproc
.LFE42:
.size fft, .-fft
.p2align 4
.globl threadFunction1
.type threadFunction1, @function
threadFunction1:
.LFB43:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov rsi, QWORD PTR answer[rip]
mov rdi, QWORD PTR buffer[rip]
mov edx, 1
call fft
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE43:
.size threadFunction1, .-threadFunction1
.p2align 4
.globl threadFunction2
.type threadFunction2, @function
threadFunction2:
.LFB44:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 40
.cfi_def_cfa_offset 80
mov ebp, DWORD PTR [rdi]
test ebp, ebp
je .L46
cmp ebp, 1
je .L47
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
.L44:
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L46:
.cfi_restore_state
mov rsi, QWORD PTR buffer[rip]
mov rdi, QWORD PTR answer[rip]
mov edx, 2
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
mov r12d, DWORD PTR N[rip]
test r12d, r12d
jle .L44
movsd xmm0, QWORD PTR PI[rip]
movsd xmm3, QWORD PTR .LC10[rip]
mov r13, QWORD PTR buffer[rip]
mov rbx, QWORD PTR answer[rip]
mulsd xmm3, xmm0
xorpd xmm0, XMMWORD PTR .LC11[rip]
movsd QWORD PTR 16[rsp], xmm0
movsd QWORD PTR 8[rsp], xmm3
pxor xmm3, xmm3
cvtsi2sd xmm3, r12d
movsd QWORD PTR 24[rsp], xmm3
.p2align 4,,10
.p2align 3
.L41:
pxor xmm1, xmm1
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm7, QWORD PTR 24[rsp]
cvtsi2sd xmm1, ebp
mulsd xmm0, xmm1
mulsd xmm1, QWORD PTR 16[rsp]
divsd xmm0, xmm7
divsd xmm1, xmm7
call cexp@PLT
movsd xmm2, QWORD PTR 16[rbx]
movsd xmm3, QWORD PTR 24[rbx]
movapd xmm5, xmm0
movapd xmm4, xmm1
movapd xmm6, xmm1
mulsd xmm4, xmm3
movapd xmm0, xmm2
mulsd xmm0, xmm5
mulsd xmm6, xmm2
subsd xmm0, xmm4
movapd xmm4, xmm5
mulsd xmm4, xmm3
addsd xmm4, xmm6
ucomisd xmm0, xmm4
jp .L48
.L40:
movsd xmm1, QWORD PTR 8[rbx]
movsd xmm2, QWORD PTR [rbx]
mov eax, ebp
add rbx, 32
sar eax
addsd xmm1, xmm4
addsd xmm2, xmm0
cdqe
sal rax, 4
add rax, r13
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
lea eax, 0[rbp+r12]
movsd xmm1, QWORD PTR -24[rbx]
add ebp, 2
movsd xmm2, QWORD PTR -32[rbx]
sar eax
subsd xmm1, xmm4
cdqe
subsd xmm2, xmm0
sal rax, 4
add rax, r13
movsd QWORD PTR 8[rax], xmm1
movsd QWORD PTR [rax], xmm2
cmp ebp, r12d
jl .L41
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L47:
.cfi_restore_state
mov rax, QWORD PTR buffer[rip]
mov edx, 2
lea rsi, 16[rax]
mov rax, QWORD PTR answer[rip]
lea rdi, 16[rax]
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L48:
.cfi_restore_state
movapd xmm0, xmm5
call __muldc3@PLT
movapd xmm4, xmm1
jmp .L40
.cfi_endproc
.LFE44:
.size threadFunction2, .-threadFunction2
.p2align 4
.globl threadFunction4
.type threadFunction4, @function
threadFunction4:
.LFB45:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 40
.cfi_def_cfa_offset 80
mov ebp, DWORD PTR [rdi]
test ebp, ebp
je .L78
cmp ebp, 1
je .L53
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
cmp ebp, 2
je .L79
cmp ebp, 3
jne .L80
mov rax, QWORD PTR answer[rip]
mov edx, 4
lea rsi, 48[rax]
mov rax, QWORD PTR buffer[rip]
lea rdi, 48[rax]
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
.p2align 4,,10
.p2align 3
.L57:
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
mov r12d, DWORD PTR N[rip]
test r12d, r12d
jle .L75
movsd xmm0, QWORD PTR PI[rip]
pxor xmm6, xmm6
xor ebp, ebp
movsd xmm3, QWORD PTR .LC10[rip]
cvtsi2sd xmm6, r12d
mov r13, QWORD PTR buffer[rip]
mov rbx, QWORD PTR answer[rip]
mulsd xmm3, xmm0
xorpd xmm0, XMMWORD PTR .LC11[rip]
movsd QWORD PTR 16[rsp], xmm0
movsd QWORD PTR 24[rsp], xmm6
movsd QWORD PTR 8[rsp], xmm3
.p2align 4,,10
.p2align 3
.L65:
pxor xmm1, xmm1
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm7, QWORD PTR 24[rsp]
cvtsi2sd xmm1, ebp
mulsd xmm0, xmm1
mulsd xmm1, QWORD PTR 16[rsp]
divsd xmm0, xmm7
divsd xmm1, xmm7
call cexp@PLT
movsd xmm2, QWORD PTR 16[rbx]
movsd xmm3, QWORD PTR 24[rbx]
movapd xmm4, xmm1
movapd xmm5, xmm0
movapd xmm6, xmm1
mulsd xmm4, xmm3
mulsd xmm0, xmm2
mulsd xmm6, xmm2
subsd xmm0, xmm4
movapd xmm4, xmm5
mulsd xmm4, xmm3
addsd xmm4, xmm6
ucomisd xmm0, xmm4
jp .L81
.L64:
movsd xmm1, QWORD PTR 8[rbx]
movsd xmm2, QWORD PTR [rbx]
mov eax, ebp
add rbx, 32
sar eax
addsd xmm1, xmm4
addsd xmm2, xmm0
cdqe
sal rax, 4
add rax, r13
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
lea eax, 0[rbp+r12]
movsd xmm1, QWORD PTR -24[rbx]
add ebp, 2
movsd xmm2, QWORD PTR -32[rbx]
sar eax
subsd xmm1, xmm4
cdqe
subsd xmm2, xmm0
sal rax, 4
add rax, r13
movsd QWORD PTR 8[rax], xmm1
movsd QWORD PTR [rax], xmm2
cmp r12d, ebp
jg .L65
.L75:
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L78:
.cfi_restore_state
mov rsi, QWORD PTR answer[rip]
mov rdi, QWORD PTR buffer[rip]
mov edx, 4
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
mov r12d, DWORD PTR N[rip]
test r12d, r12d
jle .L57
movsd xmm0, QWORD PTR PI[rip]
movsd xmm5, QWORD PTR .LC10[rip]
mov r13, QWORD PTR answer[rip]
mov rbx, QWORD PTR buffer[rip]
mulsd xmm5, xmm0
xorpd xmm0, XMMWORD PTR .LC11[rip]
movsd QWORD PTR 16[rsp], xmm0
movsd QWORD PTR 8[rsp], xmm5
pxor xmm5, xmm5
cvtsi2sd xmm5, r12d
movsd QWORD PTR 24[rsp], xmm5
.p2align 4,,10
.p2align 3
.L60:
pxor xmm1, xmm1
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm3, QWORD PTR 24[rsp]
cvtsi2sd xmm1, ebp
mulsd xmm0, xmm1
mulsd xmm1, QWORD PTR 16[rsp]
divsd xmm0, xmm3
divsd xmm1, xmm3
call cexp@PLT
movsd xmm2, QWORD PTR 32[rbx]
movsd xmm3, QWORD PTR 40[rbx]
movapd xmm4, xmm1
movapd xmm5, xmm0
movapd xmm6, xmm1
mulsd xmm4, xmm3
mulsd xmm0, xmm2
mulsd xmm6, xmm2
subsd xmm0, xmm4
movapd xmm4, xmm5
mulsd xmm4, xmm3
addsd xmm4, xmm6
ucomisd xmm0, xmm4
jp .L82
.L59:
movsd xmm1, QWORD PTR 8[rbx]
movsd xmm2, QWORD PTR [rbx]
mov eax, ebp
add rbx, 64
sar eax
addsd xmm1, xmm4
addsd xmm2, xmm0
cdqe
sal rax, 4
add rax, r13
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
lea eax, 0[rbp+r12]
movsd xmm1, QWORD PTR -56[rbx]
add ebp, 4
movsd xmm2, QWORD PTR -64[rbx]
sar eax
subsd xmm1, xmm4
cdqe
subsd xmm2, xmm0
sal rax, 4
add rax, r13
movsd QWORD PTR 8[rax], xmm1
movsd QWORD PTR [rax], xmm2
cmp r12d, ebp
jg .L60
jmp .L57
.p2align 4,,10
.p2align 3
.L53:
mov rax, QWORD PTR answer[rip]
mov edx, 4
lea rsi, 32[rax]
mov rax, QWORD PTR buffer[rip]
lea rdi, 32[rax]
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
.L58:
mov rax, QWORD PTR buffer[rip]
mov r13d, DWORD PTR N[rip]
lea rbx, 16[rax]
mov rax, QWORD PTR answer[rip]
lea r12, 16[rax]
test r13d, r13d
jle .L57
movsd xmm0, QWORD PTR PI[rip]
movsd xmm3, QWORD PTR .LC10[rip]
pxor xmm7, xmm7
xor ebp, ebp
cvtsi2sd xmm7, r13d
mulsd xmm3, xmm0
xorpd xmm0, XMMWORD PTR .LC11[rip]
movsd QWORD PTR 16[rsp], xmm0
movsd QWORD PTR 24[rsp], xmm7
movsd QWORD PTR 8[rsp], xmm3
.p2align 4,,10
.p2align 3
.L62:
pxor xmm1, xmm1
movsd xmm0, QWORD PTR 8[rsp]
movsd xmm7, QWORD PTR 24[rsp]
cvtsi2sd xmm1, ebp
mulsd xmm0, xmm1
mulsd xmm1, QWORD PTR 16[rsp]
divsd xmm0, xmm7
divsd xmm1, xmm7
call cexp@PLT
movsd xmm2, QWORD PTR 32[rbx]
movsd xmm3, QWORD PTR 40[rbx]
movapd xmm4, xmm1
movapd xmm5, xmm0
mulsd xmm4, xmm3
movapd xmm6, xmm3
mulsd xmm0, xmm2
mulsd xmm6, xmm5
subsd xmm0, xmm4
movapd xmm4, xmm1
mulsd xmm4, xmm2
addsd xmm4, xmm6
ucomisd xmm4, xmm0
jp .L83
.L61:
movsd xmm1, QWORD PTR 8[rbx]
movsd xmm2, QWORD PTR [rbx]
mov eax, ebp
add rbx, 64
sar eax
addsd xmm1, xmm4
addsd xmm2, xmm0
cdqe
sal rax, 4
add rax, r12
movsd QWORD PTR [rax], xmm2
movsd QWORD PTR 8[rax], xmm1
lea eax, 0[rbp+r13]
movsd xmm1, QWORD PTR -56[rbx]
add ebp, 4
movsd xmm2, QWORD PTR -64[rbx]
sar eax
subsd xmm1, xmm4
cdqe
subsd xmm2, xmm0
sal rax, 4
add rax, r12
movsd QWORD PTR 8[rax], xmm1
movsd QWORD PTR [rax], xmm2
cmp ebp, r13d
jl .L62
jmp .L57
.p2align 4,,10
.p2align 3
.L79:
mov rax, QWORD PTR answer[rip]
mov edx, 4
lea rsi, 16[rax]
mov rax, QWORD PTR buffer[rip]
lea rdi, 16[rax]
call fft
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
jmp .L57
.L81:
movapd xmm0, xmm5
call __muldc3@PLT
movapd xmm4, xmm1
jmp .L64
.L82:
movapd xmm0, xmm5
call __muldc3@PLT
movapd xmm4, xmm1
jmp .L59
.L83:
movapd xmm0, xmm5
call __muldc3@PLT
movapd xmm4, xmm1
jmp .L61
.L80:
lea rdi, barrier[rip]
call pthread_barrier_wait@PLT
sub ebp, 1
je .L58
jmp .L57
.cfi_endproc
.LFE45:
.size threadFunction4, .-threadFunction4
.section .rodata.str1.1
.LC12:
.string "%d\n"
.LC13:
.string "%lf %lf\n"
.text
.p2align 4
.globl print
.type print, @function
print:
.LFB46:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdx, .LC12[rip]
mov esi, 1
xor eax, eax
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 8
.cfi_def_cfa_offset 32
mov ecx, DWORD PTR N[rip]
mov rdi, QWORD PTR out[rip]
call __fprintf_chk@PLT
mov eax, DWORD PTR N[rip]
test eax, eax
jle .L84
xor ebx, ebx
lea rbp, .LC13[rip]
.p2align 4,,10
.p2align 3
.L86:
mov rax, rbx
mov rdi, QWORD PTR out[rip]
mov rdx, rbp
add rbx, 1
sal rax, 4
add rax, QWORD PTR buffer[rip]
mov esi, 1
movsd xmm1, QWORD PTR 8[rax]
movsd xmm0, QWORD PTR [rax]
mov eax, 2
call __fprintf_chk@PLT
cmp DWORD PTR N[rip], ebx
jg .L86
.L84:
add rsp, 8
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE46:
.size print, .-print
.p2align 4
.globl destroy
.type destroy, @function
destroy:
.LFB47:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov rdi, QWORD PTR buffer[rip]
call free@PLT
mov rdi, QWORD PTR answer[rip]
add rsp, 8
.cfi_def_cfa_offset 8
jmp free@PLT
.cfi_endproc
.LFE47:
.size destroy, .-destroy
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB48:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 24
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
call getArgs
xor eax, eax
call init
mov edx, DWORD PTR P[rip]
xor esi, esi
lea rdi, barrier[rip]
call pthread_barrier_init@PLT
movsx rsi, DWORD PTR N[rip]
test esi, esi
jle .L99
mov rcx, QWORD PTR buffer[rip]
mov rdx, QWORD PTR answer[rip]
sal rsi, 4
xor eax, eax
.p2align 4,,10
.p2align 3
.L98:
movsd xmm1, QWORD PTR [rcx+rax]
movsd xmm0, QWORD PTR 8[rcx+rax]
movsd QWORD PTR [rdx+rax], xmm1
movsd QWORD PTR 8[rdx+rax], xmm0
add rax, 16
cmp rax, rsi
jne .L98
.L99:
movsx rcx, DWORD PTR P[rip]
mov rdi, rsp
lea rax, 15[0+rcx*4]
mov rdx, rcx
mov rsi, rax
and rax, -4096
sub rdi, rax
and rsi, -16
cmp rsp, rdi
je .L94
.L127:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdi
jne .L127
.L94:
and esi, 4095
sub rsp, rsi
test rsi, rsi
jne .L128
.L95:
mov rbx, rsp
xor eax, eax
test edx, edx
jle .L106
.p2align 4,,10
.p2align 3
.L100:
mov DWORD PTR [rbx+rax*4], eax
add rax, 1
cmp rax, rcx
jne .L100
lea rax, 15[0+rax*8]
mov rsi, rsp
mov rcx, rax
and rax, -4096
and rcx, -16
sub rsi, rax
.L109:
cmp rsp, rsi
je .L110
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
jmp .L109
.p2align 4,,10
.p2align 3
.L132:
test edx, edx
jle .L106
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L107:
mov rdi, QWORD PTR [r12+rbx*8]
xor esi, esi
add rbx, 1
call pthread_join@PLT
cmp DWORD PTR P[rip], ebx
jg .L107
.L106:
xor eax, eax
call print
cmp DWORD PTR P[rip], 1
je .L108
lea rdi, barrier[rip]
call pthread_barrier_destroy@PLT
.L108:
xor eax, eax
call destroy
mov rdi, QWORD PTR in[rip]
call fclose@PLT
mov rdi, QWORD PTR out[rip]
call fclose@PLT
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L129
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L110:
.cfi_restore_state
and ecx, 4095
sub rsp, rcx
test rcx, rcx
jne .L130
.L111:
mov r12, rsp
xor r13d, r13d
lea r14, threadFunction2[rip]
mov r15, r12
jmp .L105
.p2align 4,,10
.p2align 3
.L133:
cmp edx, 1
je .L131
.L104:
add r13d, 1
add r15, 8
add rbx, 4
cmp edx, r13d
jle .L132
.L105:
cmp edx, 2
je .L102
cmp edx, 4
jne .L133
lea rdx, threadFunction4[rip]
mov rcx, rbx
xor esi, esi
mov rdi, r15
call pthread_create@PLT
mov edx, DWORD PTR P[rip]
jmp .L104
.p2align 4,,10
.p2align 3
.L102:
mov rdx, r14
mov rcx, rbx
xor esi, esi
mov rdi, r15
call pthread_create@PLT
mov edx, DWORD PTR P[rip]
jmp .L104
.p2align 4,,10
.p2align 3
.L131:
lea rdx, threadFunction1[rip]
mov rcx, rbx
xor esi, esi
mov rdi, r15
call pthread_create@PLT
mov edx, DWORD PTR P[rip]
jmp .L104
.L128:
or QWORD PTR -8[rsp+rsi], 0
jmp .L95
.L130:
or QWORD PTR -8[rsp+rcx], 0
jmp .L111
.L129:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE48:
.size main, .-main
.globl barrier
.bss
.align 32
.type barrier, @object
.size barrier, 32
barrier:
.zero 32
.globl out
.align 8
.type out, @object
.size out, 8
out:
.zero 8
.globl in
.align 8
.type in, @object
.size in, 8
in:
.zero 8
.globl buffer
.align 8
.type buffer, @object
.size buffer, 8
buffer:
.zero 8
.globl answer
.align 8
.type answer, @object
.size answer, 8
answer:
.zero 8
.globl P
.align 4
.type P, @object
.size P, 4
P:
.zero 4
.globl N
.align 4
.type N, @object
.size N, 4
N:
.zero 4
.globl PI
.data
.align 8
.type PI, @object
.size PI, 8
PI:
.long 1413754136
.long 1074340347
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC10:
.long 0
.long -2147483648
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC11:
.long 0
.long -2147483648
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100122.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Usage %s <inputValues.txt> <outputValues.txt> <numT"
.ascii "hreads>\012\000"
.align 2
.LC1:
.ascii "r\000"
.align 2
.LC2:
.ascii "w\000"
.align 2
.LC3:
.ascii "Failed to open at least one file.\012\000"
.text
.align 2
.global getArgs
.syntax unified
.arm
.fpu softvfp
.type getArgs, %function
getArgs:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #3
push {r4, r5, r6, lr}
mov r4, r1
ble .L6
ldr r1, .L8
ldr r0, [r4, #4]
bl fopen
mov r3, r0
ldr r5, .L8+4
ldr r1, .L8+8
ldr r0, [r4, #8]
str r3, [r5]
bl fopen
clz r3, r0
ldr r1, [r5]
lsr r3, r3, #5
cmp r1, #0
movne r1, r3
moveq r1, #1
ldr r3, .L8+12
cmp r1, #0
str r0, [r3]
bne .L7
mov r2, #10
ldr r0, [r4, #12]
bl strtol
ldr r3, .L8+16
str r0, [r3]
pop {r4, r5, r6, pc}
.L7:
ldr r3, .L8+20
mov r2, #34
mov r1, #1
ldr r3, [r3]
ldr r0, .L8+24
bl fwrite
mov r0, #1
bl exit
.L6:
ldr r2, [r1]
mov r0, #1
ldr r1, .L8+28
bl __printf_chk
mov r0, #1
bl exit
.L9:
.align 2
.L8:
.word .LC1
.word in
.word .LC2
.word out
.word P
.word stdout
.word .LC3
.word .LC0
.size getArgs, .-getArgs
.section .rodata.str1.4
.align 2
.LC4:
.ascii "%d\000"
.align 2
.LC5:
.ascii "Failed to read N.\012\000"
.align 2
.LC6:
.ascii "calloc failed!\000"
.align 2
.LC7:
.ascii "%lf\000"
.global __aeabi_dadd
.align 2
.LC8:
.ascii "Failed to read the %dth value from input file\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC9:
.word __stack_chk_guard
.text
.align 2
.global init
.syntax unified
.arm
.fpu softvfp
.type init, %function
init:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L23
ldr r9, .L23+4
ldr r0, [r3]
ldr r3, .L23+8
sub sp, sp, #20
mov r2, r9
ldr r1, .L23+12
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __isoc99_fscanf
cmp r0, #1
bne .L20
ldr r7, [r9]
mov r1, #16
mov r6, r0
mov r0, r7
bl calloc
mov r4, r0
ldr r10, .L23+16
mov r0, r7
mov r1, #16
str r4, [r10]
bl calloc
clz r5, r0
cmp r4, #0
lsr r5, r5, #5
moveq r5, #1
ldr r2, .L23+20
cmp r5, #0
str r0, [r2]
bne .L12
cmp r7, #0
ble .L10
mov r6, #0
mov r7, #0
ldr fp, .L23+24
.L13:
ldr r3, .L23
mov r2, sp
mov r1, fp
ldr r0, [r3]
bl __isoc99_fscanf
mov r2, r6
mov r8, r0
ldmia sp, {r0-r1}
mov r3, r7
bl __aeabi_dadd
ldr r4, [r10]
cmp r8, #1
add r4, r4, r5, lsl #4
str r6, [r4, #8]
str r7, [r4, #12]
stm r4, {r0-r1}
bne .L21
ldr r3, [r9]
add r5, r5, #1
cmp r5, r3
blt .L13
.L10:
ldr r3, .L23+8
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L22
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L21:
ldr r2, .L23+28
mov r3, r5
ldr r0, [r2]
mov r1, #1
ldr r2, .L23+32
bl __fprintf_chk
mov r0, #1
bl exit
.L12:
mov r0, r6
ldr r1, .L23+36
bl __printf_chk
mov r0, r6
bl exit
.L20:
ldr r3, .L23+28
mov r2, #18
mov r1, #1
ldr r3, [r3]
ldr r0, .L23+40
bl fwrite
mov r0, #1
bl exit
.L22:
bl __stack_chk_fail
.L24:
.align 2
.L23:
.word in
.word N
.word .LC9
.word .LC4
.word buffer
.word answer
.word .LC7
.word stdout
.word .LC8
.word .LC6
.word .LC5
.size init, .-init
.global __aeabi_dmul
.global __aeabi_i2d
.global __aeabi_ddiv
.global __aeabi_dsub
.global __aeabi_dcmpun
.section .rodata.cst4
.align 2
.LC10:
.word __stack_chk_guard
.text
.align 2
.global fft
.syntax unified
.arm
.fpu softvfp
.type fft, %function
fft:
@ args = 0, pretend = 0, frame = 96
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r5, .L40
sub sp, sp, #124
ldr r3, [r5]
mov r4, r2
cmp r3, r2
ldr r2, .L40+4
str r0, [sp, #64]
str r3, [sp, #68]
ldr r2, [r2]
str r2, [sp, #116]
mov r2,#0
ble .L25
cmp r3, r4, lsl #1
lsl r3, r4, #1
mov r6, r1
str r3, [sp, #80]
bgt .L36
ldr r7, [sp, #68]
cmp r7, #0
ble .L25
.L39:
ldr ip, .L40+8
mov r2, #0
ldr r1, [ip]
ldr r5, [ip, #4]
mov r3, #-2147483648
mov r0, r1
str r1, [sp, #92]
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r7
str r2, [sp, #72]
str r3, [sp, #76]
bl __aeabi_i2d
mov r9, r6
mov fp, #0
add r3, r5, #-2147483648
str r3, [sp, #88]
ldr r3, [sp, #80]
str r0, [sp, #40]
str r1, [sp, #44]
lsl r3, r3, #4
add r10, r6, r4, lsl #4
str r3, [sp, #84]
.L31:
mov r0, fp
bl __aeabi_i2d
mov r4, r0
mov r5, r1
add r1, sp, #72
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r3, sp, #40
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r4
mov r6, r0
mov r7, r1
mov r3, r5
ldr r0, [sp, #92]
ldr r1, [sp, #88]
bl __aeabi_dmul
add r3, sp, #40
ldmia r3, {r2-r3}
bl __aeabi_ddiv
mov r2, r6
mov r3, r7
stm sp, {r0, r1}
add r0, sp, #96
bl cexp
add r7, sp, #96
ldmia r7, {r6-r7}
add r3, r10, #8
ldmia r3, {r2-r3}
ldmia r10, {r0-r1}
add r5, sp, #104
ldmia r5, {r4-r5}
str r2, [sp, #32]
str r3, [sp, #36]
mov r2, r6
mov r3, r7
str r0, [sp, #56]
str r1, [sp, #60]
bl __aeabi_dmul
mov r2, r4
mov r3, r5
str r4, [sp, #48]
str r5, [sp, #52]
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
mov r2, r6
mov r3, r7
str r4, [sp, #24]
str r5, [sp, #28]
bl __aeabi_dmul
add r3, sp, #48
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpun
cmp r0, #0
bne .L37
.L29:
add r3, r9, #8
ldmia r3, {r2-r3}
ldr ip, [sp, #64]
add r8, fp, fp, lsr #31
mov r0, r4
mov r1, r5
asr r8, r8, #1
add r8, ip, r8, lsl #4
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
ldmia r9, {r0-r1}
bl __aeabi_dadd
str r6, [r8, #8]
str r7, [r8, #12]
ldr r7, [sp, #68]
stm r8, {r0-r1}
add r6, fp, r7
ldr ip, [sp, #64]
add r6, r6, r6, lsr #31
add r1, r9, #8
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
asr r6, r6, #1
add r6, ip, r6, lsl #4
bl __aeabi_dsub
add r3, sp, #24
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
ldmia r9, {r0-r1}
bl __aeabi_dsub
ldr r3, [sp, #80]
stm r6, {r0-r1}
add fp, fp, r3
ldr r3, [sp, #84]
cmp fp, r7
str r4, [r6, #8]
str r5, [r6, #12]
add r10, r10, r3
add r9, r9, r3
blt .L31
.L25:
ldr r3, .L40+4
ldr r2, [r3]
ldr r3, [sp, #116]
eors r2, r3, r2
mov r3, #0
bne .L38
add sp, sp, #124
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L36:
mov r8, r3
mov r7, r0
mov r2, r3
mov r1, r0
mov r0, r6
bl fft
add r1, r7, r4, lsl #4
mov r2, r8
add r0, r6, r4, lsl #4
bl fft
ldr r3, [r5]
str r3, [sp, #68]
ldr r7, [sp, #68]
cmp r7, #0
bgt .L39
b .L25
.L37:
add r4, sp, #32
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #16]
str r4, [sp, #20]
add r4, sp, #56
ldmia r4, {r3-r4}
add r0, sp, #96
str r3, [sp, #8]
str r4, [sp, #12]
add r4, sp, #48
ldmia r4, {r3-r4}
stm sp, {r3-r4}
mov r3, r7
bl __muldc3
add r4, sp, #96
ldmia r4, {r3-r4}
str r3, [sp, #24]
str r4, [sp, #28]
add r5, sp, #104
ldmia r5, {r4-r5}
b .L29
.L38:
bl __stack_chk_fail
.L41:
.align 2
.L40:
.word N
.word .LC10
.word .LANCHOR0
.size fft, .-fft
.align 2
.global threadFunction1
.syntax unified
.arm
.fpu softvfp
.type threadFunction1, %function
threadFunction1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L44
ldr r2, .L44+4
ldr r0, [r3]
ldr r1, [r2]
push {r4, lr}
mov r2, #1
bl fft
mov r0, #0
pop {r4, pc}
.L45:
.align 2
.L44:
.word buffer
.word answer
.size threadFunction1, .-threadFunction1
.section .rodata.cst4
.align 2
.LC11:
.word __stack_chk_guard
.text
.align 2
.global threadFunction2
.syntax unified
.arm
.fpu softvfp
.type threadFunction2, %function
threadFunction2:
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r10, [r0]
ldr r3, .L64
sub sp, sp, #116
cmp r10, #0
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
beq .L60
cmp r10, #1
beq .L61
ldr r0, .L64+4
bl pthread_barrier_wait
.L49:
ldr r3, .L64
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L62
mov r0, #0
add sp, sp, #116
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L60:
ldr r6, .L64+8
ldr r5, .L64+12
mov r2, #2
ldr r1, [r6]
ldr r0, [r5]
bl fft
ldr r0, .L64+4
bl pthread_barrier_wait
ldr r3, .L64+16
ldr r3, [r3]
cmp r3, #0
str r3, [sp, #56]
ble .L49
ldr ip, .L64+20
mov r2, #0
ldr r1, [ip]
ldr r4, [ip, #4]
mov r3, #-2147483648
mov r0, r1
str r1, [sp, #72]
mov r1, r4
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldr r0, [sp, #56]
str r2, [sp, #48]
str r3, [sp, #52]
bl __aeabi_i2d
ldr r3, [r6]
str r0, [sp, #64]
str r1, [sp, #68]
str r3, [sp, #60]
ldr fp, [r5]
add r3, r4, #-2147483648
str r3, [sp, #76]
.L53:
mov r0, r10
bl __aeabi_i2d
mov r4, r0
mov r5, r1
add r1, sp, #48
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r9, sp, #64
ldmia r9, {r8-r9}
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
ldr r2, [sp, #72]
mov r6, r0
mov r7, r1
ldr r3, [sp, #76]
mov r0, r4
mov r1, r5
bl __aeabi_dmul
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r6
mov r3, r7
stm sp, {r0, r1}
add r0, sp, #88
bl cexp
add r9, fp, #16
ldmia r9, {r8-r9}
add r7, sp, #88
ldmia r7, {r6-r7}
add r4, sp, #96
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #32]
str r4, [sp, #36]
add r5, fp, #24
ldmia r5, {r4-r5}
mov r3, r7
mov r0, r8
mov r1, r9
str r8, [sp, #80]
str r9, [sp, #84]
bl __aeabi_dmul
mov r2, r4
mov r3, r5
str r4, [sp, #40]
str r5, [sp, #44]
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
add r3, sp, #32
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r8
mov r1, r9
str r4, [sp, #24]
str r5, [sp, #28]
bl __aeabi_dmul
add r3, sp, #40
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r8, r0
mov r9, r1
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dcmpun
cmp r0, #0
bne .L63
.L51:
add r3, fp, #8
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
ldmia fp, {r0-r1}
bl __aeabi_dadd
ldr r5, [sp, #60]
asr r4, r10, #1
add r4, r5, r4, lsl #4
str r6, [r4, #8]
str r7, [r4, #12]
stm r4, {r0-r1}
add r1, fp, #8
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
bl __aeabi_dsub
add r3, sp, #24
ldmia r3, {r2-r3}
ldr r7, [sp, #56]
mov r4, r0
add r6, r10, r7
asr r6, r6, #1
add r6, r5, r6, lsl #4
mov r5, r1
ldmia fp, {r0-r1}
bl __aeabi_dsub
add r10, r10, #2
cmp r10, r7
stm r6, {r0-r1}
str r4, [r6, #8]
str r5, [r6, #12]
add fp, fp, #32
blt .L53
b .L49
.L61:
ldr r3, .L64+12
ldr r2, .L64+8
ldr r0, [r3]
ldr r1, [r2]
add r0, r0, #16
mov r2, #2
add r1, r1, #16
bl fft
ldr r0, .L64+4
bl pthread_barrier_wait
b .L49
.L63:
add r4, sp, #40
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #16]
str r4, [sp, #20]
add r4, sp, #80
ldmia r4, {r3-r4}
add r0, sp, #88
str r3, [sp, #8]
str r4, [sp, #12]
add r4, sp, #32
ldmia r4, {r3-r4}
stm sp, {r3-r4}
mov r3, r7
bl __muldc3
add r4, sp, #88
ldmia r4, {r3-r4}
add r9, sp, #96
ldmia r9, {r8-r9}
str r3, [sp, #24]
str r4, [sp, #28]
b .L51
.L62:
bl __stack_chk_fail
.L65:
.align 2
.L64:
.word .LC11
.word barrier
.word buffer
.word answer
.word N
.word .LANCHOR0
.size threadFunction2, .-threadFunction2
.section .rodata.cst4
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global threadFunction4
.syntax unified
.arm
.fpu softvfp
.type threadFunction4, %function
threadFunction4:
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr fp, [r0]
ldr r3, .L110
sub sp, sp, #132
cmp fp, #0
ldr r3, [r3]
str r3, [sp, #124]
mov r3,#0
beq .L103
cmp fp, #1
beq .L70
ldr r0, .L110+4
bl pthread_barrier_wait
cmp fp, #2
beq .L104
cmp fp, #3
bne .L105
ldr r2, .L110+8
ldr r3, .L110+12
ldr r1, [r2]
ldr r0, [r3]
add r1, r1, #48
add r0, r0, #48
.L101:
mov r2, #4
bl fft
ldr r0, .L110+4
bl pthread_barrier_wait
.L102:
ldr r3, .L110+16
str r3, [sp, #100]
.L74:
ldr r0, .L110+4
bl pthread_barrier_wait
ldr r3, [sp, #100]
ldr r3, [r3]
cmp r3, #0
str r3, [sp, #80]
ble .L86
ldr ip, .L110+20
mov r2, #0
ldr r1, [ip]
ldr r4, [ip, #4]
mov r3, #-2147483648
mov r0, r1
str r1, [sp, #96]
mov r1, r4
bl __aeabi_dmul
mov r6, r0
mov r7, r1
ldr r3, .L110+12
ldr r0, [sp, #80]
ldr r3, [r3]
str r6, [sp, #56]
str r7, [sp, #60]
str r3, [sp, #64]
bl __aeabi_i2d
mov r10, #0
ldr r3, .L110+8
str r0, [sp, #72]
str r1, [sp, #76]
ldr fp, [r3]
add r2, r4, #-2147483648
add r3, sp, #104
str r2, [sp, #84]
str r3, [sp, #44]
.L85:
mov r0, r10
bl __aeabi_i2d
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r9, sp, #72
ldmia r9, {r8-r9}
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r4
mov r6, r0
mov r7, r1
mov r3, r5
ldr r0, [sp, #96]
ldr r1, [sp, #84]
bl __aeabi_dmul
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r6
mov r3, r7
stm sp, {r0, r1}
ldr r0, [sp, #44]
bl cexp
add r7, sp, #104
ldmia r7, {r6-r7}
add r9, fp, #16
ldmia r9, {r8-r9}
add r4, sp, #112
ldmia r4, {r3-r4}
mov r0, r6
str r3, [sp, #32]
str r4, [sp, #36]
add r3, fp, #24
ldmia r3, {r2-r3}
mov r1, r7
mov r4, r2
mov r5, r3
mov r2, r8
mov r3, r9
bl __aeabi_dmul
mov r2, r4
mov r3, r5
str r4, [sp, #48]
str r5, [sp, #52]
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
add r3, sp, #48
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
str r4, [sp, #24]
str r5, [sp, #28]
bl __aeabi_dmul
mov r2, r8
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
mov r3, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpun
cmp r0, #0
bne .L106
.L83:
add r3, fp, #8
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
ldmia fp, {r0-r1}
bl __aeabi_dadd
ldr r9, [sp, #64]
asr r8, r10, #1
add r8, r9, r8, lsl #4
str r6, [r8, #8]
str r7, [r8, #12]
stm r8, {r0-r1}
add r1, fp, #8
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dsub
add r3, sp, #24
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
ldmia fp, {r0-r1}
bl __aeabi_dsub
ldr r7, [sp, #80]
add fp, fp, #32
add r6, r10, r7
asr r6, r6, #1
add r10, r10, #2
add r6, r9, r6, lsl #4
cmp r7, r10
stm r6, {r0-r1}
str r4, [r6, #8]
str r5, [r6, #12]
bgt .L85
.L86:
ldr r3, .L110
ldr r2, [r3]
ldr r3, [sp, #124]
eors r2, r3, r2
mov r3, #0
bne .L107
mov r0, #0
add sp, sp, #132
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L103:
ldr r6, .L110+8
ldr r4, .L110+12
mov r2, #4
ldr r1, [r6]
ldr r0, [r4]
bl fft
ldr r3, .L110+16
ldr r0, .L110+4
mov r5, r3
str r3, [sp, #100]
bl pthread_barrier_wait
ldr r0, .L110+4
bl pthread_barrier_wait
ldr r3, [r5]
cmp r3, #0
str r3, [sp, #80]
ble .L74
ldr ip, .L110+20
mov r2, #0
ldr r1, [ip]
ldr r5, [ip, #4]
mov r3, #-2147483648
add ip, sp, #104
mov r0, r1
str r1, [sp, #96]
mov r1, r5
str ip, [sp, #44]
bl __aeabi_dmul
mov r2, r0
mov r3, r1
ldr r0, [sp, #80]
str r2, [sp, #56]
str r3, [sp, #60]
bl __aeabi_i2d
ldr r3, [r6]
str r0, [sp, #72]
str r1, [sp, #76]
str r3, [sp, #64]
ldr r10, [r4]
add r3, r5, #-2147483648
str r3, [sp, #84]
.L78:
mov r0, fp
bl __aeabi_i2d
mov r4, r0
mov r5, r1
add r1, sp, #56
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r9, sp, #72
ldmia r9, {r8-r9}
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r4
mov r6, r0
mov r7, r1
mov r3, r5
ldr r0, [sp, #96]
ldr r1, [sp, #84]
bl __aeabi_dmul
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r6
mov r3, r7
stm sp, {r0, r1}
ldr r0, [sp, #44]
bl cexp
add r7, sp, #104
ldmia r7, {r6-r7}
add r9, r10, #32
ldmia r9, {r8-r9}
add r4, sp, #112
ldmia r4, {r3-r4}
mov r0, r6
str r3, [sp, #32]
str r4, [sp, #36]
add r3, r10, #40
ldmia r3, {r2-r3}
mov r1, r7
mov r4, r2
mov r5, r3
mov r2, r8
mov r3, r9
bl __aeabi_dmul
mov r2, r4
mov r3, r5
str r4, [sp, #48]
str r5, [sp, #52]
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
add r3, sp, #48
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
mov r0, r6
mov r1, r7
str r4, [sp, #24]
str r5, [sp, #28]
bl __aeabi_dmul
mov r2, r8
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
mov r3, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
mov r4, r0
mov r5, r1
add r1, sp, #24
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dcmpun
cmp r0, #0
bne .L108
.L76:
add r3, r10, #8
ldmia r3, {r2-r3}
mov r0, r4
mov r1, r5
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
ldmia r10, {r0-r1}
bl __aeabi_dadd
ldr r9, [sp, #64]
asr r8, fp, #1
add r8, r9, r8, lsl #4
str r6, [r8, #8]
str r7, [r8, #12]
stm r8, {r0-r1}
mov r2, r4
add r1, r10, #8
ldmia r1, {r0-r1}
mov r3, r5
bl __aeabi_dsub
add r3, sp, #24
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
ldmia r10, {r0-r1}
bl __aeabi_dsub
ldr r7, [sp, #80]
add r10, r10, #64
add r6, fp, r7
asr r6, r6, #1
add fp, fp, #4
add r6, r9, r6, lsl #4
cmp r7, fp
stm r6, {r0-r1}
str r4, [r6, #8]
str r5, [r6, #12]
bgt .L78
b .L74
.L70:
ldr r5, .L110+8
ldr r4, .L110+12
ldr r1, [r5]
ldr r0, [r4]
mov r2, #4
add r1, r1, #32
add r0, r0, #32
bl fft
ldr r0, .L110+4
bl pthread_barrier_wait
ldr r0, .L110+4
bl pthread_barrier_wait
.L75:
ldr r2, .L110+16
ldr r3, [r5]
ldr r5, [r2]
add r3, r3, #16
cmp r5, #0
ldr lr, [r4]
str r2, [sp, #100]
str r5, [sp, #56]
str r3, [sp, #80]
ble .L74
ldr ip, .L110+20
mov r2, #0
ldr r1, [ip]
ldr r4, [ip, #4]
mov r3, #-2147483648
mov r0, r1
str r1, [sp, #96]
mov r1, r4
mov r10, lr
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r5
str r2, [sp, #64]
str r3, [sp, #68]
bl __aeabi_i2d
mov fp, #0
add r3, r4, #-2147483648
str r0, [sp, #72]
str r1, [sp, #76]
str r3, [sp, #84]
add r3, sp, #104
str r3, [sp, #44]
.L81:
mov r0, fp
bl __aeabi_i2d
mov r4, r0
mov r5, r1
add r1, sp, #64
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r9, sp, #72
ldmia r9, {r8-r9}
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r4
mov r6, r0
mov r7, r1
mov r3, r5
ldr r0, [sp, #96]
ldr r1, [sp, #84]
bl __aeabi_dmul
mov r2, r8
mov r3, r9
bl __aeabi_ddiv
mov r2, r6
mov r3, r7
stm sp, {r0, r1}
ldr r0, [sp, #44]
bl cexp
add r9, r10, #48
ldmia r9, {r8-r9}
add r7, sp, #104
ldmia r7, {r6-r7}
add r4, sp, #112
ldmia r4, {r3-r4}
mov r2, r8
str r3, [sp, #32]
str r4, [sp, #36]
add r5, r10, #56
ldmia r5, {r4-r5}
mov r3, r9
mov r0, r6
mov r1, r7
str r8, [sp, #88]
str r9, [sp, #92]
bl __aeabi_dmul
mov r2, r4
mov r3, r5
str r4, [sp, #48]
str r5, [sp, #52]
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dsub
mov r4, r0
mov r5, r1
add r1, sp, #32
ldmia r1, {r0-r1}
mov r2, r8
mov r3, r9
str r4, [sp, #24]
str r5, [sp, #28]
bl __aeabi_dmul
mov r2, r6
mov r3, r7
mov r4, r0
mov r5, r1
add r1, sp, #48
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r0, r4
mov r1, r5
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r8, r0
mov r9, r1
bl __aeabi_dcmpun
cmp r0, #0
bne .L109
.L79:
add r3, r10, #24
ldmia r3, {r2-r3}
mov r0, r8
mov r1, r9
bl __aeabi_dadd
add r3, sp, #24
ldmia r3, {r2-r3}
mov r6, r0
mov r7, r1
add r1, r10, #16
ldmia r1, {r0-r1}
bl __aeabi_dadd
ldr r5, [sp, #80]
asr r4, fp, #1
add r4, r5, r4, lsl #4
str r6, [r4, #8]
str r7, [r4, #12]
stm r4, {r0-r1}
mov r2, r8
add r1, r10, #24
ldmia r1, {r0-r1}
mov r3, r9
bl __aeabi_dsub
add r3, sp, #24
ldmia r3, {r2-r3}
ldr r7, [sp, #56]
mov r4, r0
add r6, fp, r7
asr r6, r6, #1
add r6, r5, r6, lsl #4
mov r5, r1
add r1, r10, #16
ldmia r1, {r0-r1}
bl __aeabi_dsub
add fp, fp, #4
cmp fp, r7
stm r6, {r0-r1}
str r4, [r6, #8]
str r5, [r6, #12]
add r10, r10, #64
blt .L81
b .L74
.L104:
ldr r2, .L110+8
ldr r3, .L110+12
ldr r1, [r2]
ldr r0, [r3]
add r1, r1, #16
add r0, r0, #16
b .L101
.L106:
add r4, sp, #48
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #16]
str r4, [sp, #20]
add r4, sp, #32
ldmia r4, {r3-r4}
str r8, [sp, #8]
str r9, [sp, #12]
stm sp, {r3-r4}
ldr r0, [sp, #44]
mov r3, r7
bl __muldc3
add r4, sp, #104
ldmia r4, {r3-r4}
str r3, [sp, #24]
str r4, [sp, #28]
add r5, sp, #112
ldmia r5, {r4-r5}
b .L83
.L108:
add r4, sp, #48
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #16]
str r4, [sp, #20]
add r4, sp, #32
ldmia r4, {r3-r4}
str r8, [sp, #8]
str r9, [sp, #12]
stm sp, {r3-r4}
ldr r0, [sp, #44]
mov r3, r7
bl __muldc3
add r4, sp, #104
ldmia r4, {r3-r4}
str r3, [sp, #24]
str r4, [sp, #28]
add r5, sp, #112
ldmia r5, {r4-r5}
b .L76
.L109:
add r4, sp, #48
ldmia r4, {r3-r4}
mov r2, r6
str r3, [sp, #16]
str r4, [sp, #20]
add r4, sp, #88
ldmia r4, {r3-r4}
ldr r0, [sp, #44]
str r3, [sp, #8]
str r4, [sp, #12]
add r4, sp, #32
ldmia r4, {r3-r4}
stm sp, {r3-r4}
mov r3, r7
bl __muldc3
add r4, sp, #104
ldmia r4, {r3-r4}
add r9, sp, #112
ldmia r9, {r8-r9}
str r3, [sp, #24]
str r4, [sp, #28]
b .L79
.L107:
bl __stack_chk_fail
.L105:
ldr r0, .L110+4
bl pthread_barrier_wait
cmp fp, #1
ldreq r5, .L110+8
ldreq r4, .L110+12
beq .L75
b .L102
.L111:
.align 2
.L110:
.word .LC12
.word barrier
.word answer
.word buffer
.word N
.word .LANCHOR0
.size threadFunction4, .-threadFunction4
.section .rodata.str1.4
.align 2
.LC13:
.ascii "%d\012\000"
.align 2
.LC14:
.ascii "%lf %lf\012\000"
.text
.align 2
.global print
.syntax unified
.arm
.fpu softvfp
.type print, %function
print:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
ldr r5, .L117
ldr r6, .L117+4
ldr r3, [r5]
mov r1, #1
ldr r0, [r6]
ldr r2, .L117+8
sub sp, sp, #16
bl __fprintf_chk
ldr r3, [r5]
cmp r3, #0
ble .L112
mov r4, #0
ldr r7, .L117+12
ldr r10, .L117+16
.L114:
ldr r3, [r7]
mov r2, r10
add r3, r3, r4, lsl #4
add r1, r3, #8
ldmia r1, {r0-r1}
str r0, [sp, #8]
str r1, [sp, #12]
mov r1, #1
ldmia r3, {r8-r9}
ldr r0, [r6]
stm sp, {r8-r9}
bl __fprintf_chk
ldr r3, [r5]
add r4, r4, #1
cmp r3, r4
bgt .L114
.L112:
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L118:
.align 2
.L117:
.word N
.word out
.word .LC13
.word buffer
.word .LC14
.size print, .-print
.align 2
.global destroy
.syntax unified
.arm
.fpu softvfp
.type destroy, %function
destroy:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L121
push {r4, lr}
ldr r0, [r3]
bl free
pop {r4, lr}
ldr r3, .L121+4
ldr r0, [r3]
b free
.L122:
.align 2
.L121:
.word buffer
.word answer
.size destroy, .-destroy
.section .rodata.cst4
.align 2
.LC15:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #12
ldr r3, .L153
ldr r6, .L153+4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
bl getArgs
bl init
mov r1, #0
ldr r2, [r6]
ldr r0, .L153+8
bl pthread_barrier_init
ldr r3, .L153+12
ldr ip, [r3]
cmp ip, #0
ble .L128
ldr r3, .L153+16
ldr r2, .L153+20
ldr r3, [r3]
ldr r2, [r2]
add ip, r3, ip, lsl #4
.L127:
ldmia r3, {r4-r5}
add r1, r3, #8
ldmia r1, {r0-r1}
add r3, r3, #16
cmp r3, ip
stm r2, {r4-r5}
str r0, [r2, #8]
str r1, [r2, #12]
add r2, r2, #16
bne .L127
.L128:
ldr r3, [r6]
lsl r0, r3, #2
add r0, r0, #7
bic r2, r0, #7
sub sp, sp, r2
mov r7, sp
cmp r3, #0
movgt r2, #0
subgt r1, r7, #4
ble .L135
.L129:
str r2, [r1, #4]!
add r2, r2, #1
cmp r3, r2
bne .L129
bic r0, r0, #7
sub sp, sp, r0
mov r5, sp
mov r4, #0
ldr r10, .L153+24
ldr r9, .L153+28
ldr r8, .L153+32
b .L134
.L151:
cmp r3, #1
beq .L149
.L133:
ldr r3, [r6]
add r4, r4, #1
cmp r3, r4
ble .L150
.L134:
cmp r3, #2
beq .L131
cmp r3, #4
bne .L151
add r3, r7, r4, lsl #2
add r0, r5, r4, lsl #2
mov r2, r9
mov r1, #0
bl pthread_create
ldr r3, [r6]
add r4, r4, #1
cmp r3, r4
bgt .L134
.L150:
cmp r3, #0
ble .L135
mov r4, #0
sub r5, r5, #4
.L136:
mov r1, #0
ldr r0, [r5, #4]!
bl pthread_join
ldr r3, [r6]
add r4, r4, #1
cmp r3, r4
bgt .L136
.L135:
bl print
ldr r3, [r6]
cmp r3, #1
beq .L137
ldr r0, .L153+8
bl pthread_barrier_destroy
.L137:
bl destroy
ldr r3, .L153+36
ldr r0, [r3]
bl fclose
ldr r3, .L153+40
ldr r0, [r3]
bl fclose
ldr r3, .L153
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L152
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L131:
mov r2, r10
mov r1, #0
add r3, r7, r4, lsl #2
add r0, r5, r4, lsl #2
bl pthread_create
b .L133
.L149:
mov r2, r8
mov r1, #0
add r3, r7, r4, lsl #2
add r0, r5, r4, lsl #2
bl pthread_create
b .L133
.L152:
bl __stack_chk_fail
.L154:
.align 2
.L153:
.word .LC15
.word P
.word barrier
.word N
.word buffer
.word answer
.word threadFunction2
.word threadFunction4
.word threadFunction1
.word in
.word out
.size main, .-main
.comm barrier,20,4
.comm out,4,4
.comm in,4,4
.comm buffer,4,4
.comm answer,4,4
.comm P,4,4
.comm N,4,4
.global PI
.data
.align 3
.set .LANCHOR0,. + 0
.type PI, %object
.size PI, 8
PI:
.word 1413754136
.word 1074340347
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001229.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "#define ZAIMONI_HAVE_POSIX_NANOSLEEP_IN_TIME_H 1\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov rcx, QWORD PTR stdout[rip]
mov edx, 1
mov esi, 49
lea rdi, .LC0[rip]
call fwrite@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001229.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "#define ZAIMONI_HAVE_POSIX_NANOSLEEP_IN_TIME_H 1\012"
.ascii "\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r3, .L4
mov r2, #1
mov r1, #49
push {r4, lr}
ldr r3, [r3]
ldr r0, .L4+4
bl fwrite
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word stdout
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001231.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Overflow"
.text
.p2align 4
.globl insert
.type insert, @function
insert:
.LFB23:
.cfi_startproc
endbr64
mov eax, DWORD PTR rear[rip]
cmp eax, esi
je .L6
mov ecx, DWORD PTR front[rip]
mov rdx, QWORD PTR queue[rip]
and ecx, eax
cmp ecx, -1
je .L7
add eax, 1
mov DWORD PTR rear[rip], eax
cdqe
mov DWORD PTR [rdx+rax*4], edi
ret
.p2align 4,,10
.p2align 3
.L6:
lea rdi, .LC0[rip]
jmp puts@PLT
.p2align 4,,10
.p2align 3
.L7:
mov DWORD PTR front[rip], 0
mov DWORD PTR rear[rip], 0
mov DWORD PTR [rdx], edi
ret
.cfi_endproc
.LFE23:
.size insert, .-insert
.section .rodata.str1.1
.LC1:
.string "Underflow"
.text
.p2align 4
.globl del
.type del, @function
del:
.LFB24:
.cfi_startproc
endbr64
mov eax, DWORD PTR front[rip]
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
cmp eax, -1
je .L13
mov rcx, QWORD PTR queue[rip]
movsx rdx, eax
cmp eax, DWORD PTR rear[rip]
mov r12d, DWORD PTR [rcx+rdx*4]
je .L14
add eax, 1
mov DWORD PTR front[rip], eax
mov eax, r12d
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L14:
.cfi_restore_state
mov DWORD PTR rear[rip], -1
mov eax, r12d
pop r12
.cfi_remember_state
.cfi_def_cfa_offset 8
mov DWORD PTR front[rip], -1
ret
.p2align 4,,10
.p2align 3
.L13:
.cfi_restore_state
lea rdi, .LC1[rip]
call puts@PLT
mov eax, r12d
pop r12
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE24:
.size del, .-del
.section .rodata.str1.1
.LC2:
.string "%d "
.text
.p2align 4
.globl bfs
.type bfs, @function
bfs:
.LFB25:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
movsx rbx, edi
mov edi, ebx
sub rsp, 8
.cfi_def_cfa_offset 48
mov esi, DWORD PTR n[rip]
call insert
mov rax, QWORD PTR state[rip]
mov DWORD PTR [rax+rbx*4], 2
cmp DWORD PTR front[rip], -1
je .L15
lea r12, .LC2[rip]
.p2align 4,,10
.p2align 3
.L20:
xor eax, eax
call del
mov rsi, r12
mov edi, 1
movsx rbp, eax
mov rax, QWORD PTR nodes[rip]
mov edx, DWORD PTR [rax+rbp*4]
xor eax, eax
call __printf_chk@PLT
mov rdx, QWORD PTR state[rip]
mov DWORD PTR [rdx+rbp*4], 3
mov esi, DWORD PTR n[rip]
test esi, esi
jle .L17
sal rbp, 3
xor ebx, ebx
jmp .L19
.p2align 4,,10
.p2align 3
.L18:
add rbx, 1
cmp esi, ebx
jle .L17
.L19:
mov rax, QWORD PTR adj[rip]
lea r13, 0[0+rbx*4]
mov rax, QWORD PTR [rax+rbp]
cmp DWORD PTR [rax+rbx*4], 1
jne .L18
cmp DWORD PTR [rdx+rbx*4], 1
jne .L18
mov edi, ebx
add rbx, 1
call insert
mov rdx, QWORD PTR state[rip]
mov DWORD PTR [rdx+r13], 2
mov esi, DWORD PTR n[rip]
cmp esi, ebx
jg .L19
.p2align 4,,10
.p2align 3
.L17:
cmp DWORD PTR front[rip], -1
jne .L20
.L15:
add rsp, 8
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE25:
.size bfs, .-bfs
.section .rodata.str1.1
.LC3:
.string "Enter the number of nodes:"
.LC4:
.string "%d"
.LC5:
.string "Enter the Data for nodes:"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC6:
.string "Enter the edges:(-1 -1 )for stop entering"
.section .rodata.str1.1
.LC7:
.string "Node %d:\n"
.LC8:
.string "Enter the edge %d:\n"
.LC9:
.string "Node->"
.LC10:
.string "\nAdjacency Matrix:\n"
.LC11:
.string "\nOrder="
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB26:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
lea rsi, .LC3[rip]
mov edi, 1
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 16
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rsi, n[rip]
lea rdi, .LC4[rip]
xor eax, eax
call __isoc99_scanf@PLT
movsx r14, DWORD PTR n[rip]
lea r12, 0[0+r14*4]
mov rdi, r12
call malloc@PLT
mov rdi, r12
mov QWORD PTR queue[rip], rax
call malloc@PLT
mov rdi, r12
mov QWORD PTR nodes[rip], rax
call malloc@PLT
lea rdi, 0[0+r14*8]
mov QWORD PTR state[rip], rax
mov r13, rax
call malloc@PLT
mov QWORD PTR adj[rip], rax
test r14d, r14d
jle .L25
mov rbp, rax
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L26:
mov DWORD PTR 0[r13+rbx*4], 1
mov rdi, r12
call malloc@PLT
mov QWORD PTR 0[rbp+rbx*8], rax
add rbx, 1
cmp rbx, r14
jne .L26
xor esi, esi
.p2align 4,,10
.p2align 3
.L27:
mov rcx, QWORD PTR 0[rbp+rsi*8]
xor eax, eax
.p2align 4,,10
.p2align 3
.L28:
mov DWORD PTR [rcx+rax*4], 0
mov edx, DWORD PTR n[rip]
add rax, 1
cmp edx, eax
jg .L28
add rsi, 1
cmp edx, esi
jg .L27
.L25:
lea rdi, .LC5[rip]
xor ebp, ebp
xor ebx, ebx
call puts@PLT
mov eax, DWORD PTR n[rip]
lea r12, .LC7[rip]
test eax, eax
jle .L31
.p2align 4,,10
.p2align 3
.L29:
add ebx, 1
mov rsi, r12
mov edi, 1
xor eax, eax
mov edx, ebx
call __printf_chk@PLT
mov rsi, QWORD PTR nodes[rip]
xor eax, eax
lea rdi, .LC4[rip]
add rsi, rbp
add rbp, 4
call __isoc99_scanf@PLT
cmp ebx, DWORD PTR n[rip]
jl .L29
.L31:
lea rdi, .LC6[rip]
xor r13d, r13d
lea rbp, 4[rsp]
mov r12, rsp
call puts@PLT
lea rbx, .LC9[rip]
jmp .L30
.p2align 4,,10
.p2align 3
.L49:
mov rcx, QWORD PTR adj[rip]
mov rdx, QWORD PTR -8[rcx+rdx*8]
mov DWORD PTR -4[rdx+rax*4], 1
movsx rax, DWORD PTR 4[rsp]
movsx rdx, DWORD PTR [rsp]
mov rax, QWORD PTR -8[rcx+rax*8]
mov DWORD PTR -4[rax+rdx*4], 1
.L30:
add r13d, 1
lea rsi, .LC8[rip]
mov edi, 1
xor eax, eax
mov edx, r13d
call __printf_chk@PLT
mov rsi, rbx
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rsi, r12
lea rdi, .LC4[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov rsi, rbx
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rsi, rbp
lea rdi, .LC4[rip]
xor eax, eax
call __isoc99_scanf@PLT
movsx rdx, DWORD PTR [rsp]
movsx rax, DWORD PTR 4[rsp]
mov ecx, edx
and ecx, eax
cmp ecx, -1
jne .L49
lea rdi, .LC10[rip]
xor r13d, r13d
lea r12, .LC2[rip]
call puts@PLT
mov eax, DWORD PTR n[rip]
test eax, eax
jle .L34
.p2align 4,,10
.p2align 3
.L33:
lea rbp, 0[0+r13*8]
xor ebx, ebx
test eax, eax
jle .L37
.p2align 4,,10
.p2align 3
.L35:
mov rax, QWORD PTR adj[rip]
mov rsi, r12
mov edi, 1
mov rax, QWORD PTR [rax+rbp]
mov edx, DWORD PTR [rax+rbx*4]
xor eax, eax
add rbx, 1
call __printf_chk@PLT
cmp DWORD PTR n[rip], ebx
jg .L35
.L37:
mov edi, 10
add r13, 1
call putchar@PLT
mov eax, DWORD PTR n[rip]
cmp eax, r13d
jg .L33
.L34:
lea rdi, .LC11[rip]
call puts@PLT
xor edi, edi
call bfs
mov rdi, QWORD PTR queue[rip]
call free@PLT
mov rdi, QWORD PTR nodes[rip]
call free@PLT
mov rdi, QWORD PTR state[rip]
call free@PLT
mov rdi, QWORD PTR adj[rip]
call free@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L50
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 48
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE26:
.size main, .-main
.globl adj
.bss
.align 8
.type adj, @object
.size adj, 8
adj:
.zero 8
.globl n
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.globl state
.align 8
.type state, @object
.size state, 8
state:
.zero 8
.globl rear
.data
.align 4
.type rear, @object
.size rear, 4
rear:
.long -1
.globl front
.align 4
.type front, @object
.size front, 4
front:
.long -1
.globl queue
.bss
.align 8
.type queue, @object
.size queue, 8
queue:
.zero 8
.globl nodes
.align 8
.type nodes, @object
.size nodes, 8
nodes:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001231.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Overflow\000"
.text
.align 2
.global insert
.syntax unified
.arm
.fpu softvfp
.type insert, %function
insert:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L7
ldr r3, [r2]
cmp r3, r1
beq .L6
ldr r1, [r2, #4]
ldr ip, .L7+4
and r1, r1, r3
cmn r1, #1
moveq r3, #0
ldr r1, [ip]
addne r3, r3, #1
streq r3, [r2, #4]
streq r3, [r2]
strne r3, [r2]
streq r0, [r1]
strne r0, [r1, r3, lsl #2]
bx lr
.L6:
ldr r0, .L7+8
b puts
.L8:
.align 2
.L7:
.word .LANCHOR0
.word queue
.word .LC0
.size insert, .-insert
.section .rodata.str1.4
.align 2
.LC1:
.ascii "Underflow\000"
.text
.align 2
.global del
.syntax unified
.arm
.fpu softvfp
.type del, %function
del:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr r2, .L15
push {r4, lr}
ldr r3, [r2, #4]
cmn r3, #1
beq .L14
ldr r1, .L15+4
ldr r0, [r2]
ldr r1, [r1]
cmp r3, r0
ldr r4, [r1, r3, lsl #2]
mvneq r3, #0
addne r3, r3, #1
mov r0, r4
streq r3, [r2]
str r3, [r2, #4]
pop {r4, pc}
.L14:
ldr r0, .L15+8
bl puts
mov r0, r4
pop {r4, pc}
.L16:
.align 2
.L15:
.word .LANCHOR0
.word queue
.word .LC1
.size del, .-del
.section .rodata.str1.4
.align 2
.LC2:
.ascii "%d \000"
.text
.align 2
.global bfs
.syntax unified
.arm
.fpu softvfp
.type bfs, %function
bfs:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r5, .L29
mov r4, r0
ldr r1, [r5]
bl insert
mov r1, #2
ldr r10, .L29+4
ldr r9, .L29+8
ldr r2, [r10]
str r1, [r2, r4, lsl #2]
ldr r2, [r9, #4]
cmn r2, #1
popeq {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
ldr fp, .L29+12
ldr r8, .L29+16
.L22:
bl del
ldr r2, [fp]
mov r4, r0
ldr r2, [r2, r0, lsl #2]
ldr r1, .L29+20
mov r0, #1
bl __printf_chk
mov r1, #3
ldr r2, [r10]
lsl r6, r4, #2
str r1, [r2, r4, lsl #2]
ldr r1, [r5]
cmp r1, #0
ble .L19
mov r4, #0
b .L21
.L20:
ldr r1, [r5]
add r4, r4, #1
cmp r1, r4
ble .L19
.L21:
ldr r0, [r8]
lsl r7, r4, #2
ldr r0, [r0, r6]
ldr r0, [r0, r4, lsl #2]
cmp r0, #1
bne .L20
ldr r0, [r10]
ldr r0, [r0, r4, lsl #2]
cmp r0, #1
bne .L20
mov r0, r4
bl insert
mov r2, #2
ldr r1, [r10]
add r4, r4, #1
str r2, [r1, r7]
ldr r1, [r5]
cmp r1, r4
bgt .L21
.L19:
ldr r2, [r9, #4]
cmn r2, #1
bne .L22
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L30:
.align 2
.L29:
.word n
.word state
.word .LANCHOR0
.word nodes
.word adj
.word .LC2
.size bfs, .-bfs
.section .rodata.str1.4
.align 2
.LC3:
.ascii "Enter the number of nodes:\000"
.align 2
.LC4:
.ascii "%d\000"
.align 2
.LC5:
.ascii "Enter the Data for nodes:\000"
.align 2
.LC6:
.ascii "Enter the edges:(-1 -1 )for stop entering\000"
.align 2
.LC7:
.ascii "Node %d:\012\000"
.align 2
.LC8:
.ascii "Enter the edge %d:\012\000"
.align 2
.LC9:
.ascii "Node->\000"
.align 2
.LC10:
.ascii "\012Adjacency Matrix:\012\000"
.align 2
.LC11:
.ascii "\012Order=\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC12:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L53
ldr r4, .L53+4
sub sp, sp, #20
ldr r1, .L53+8
mov r0, #1
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __printf_chk
mov r1, r4
ldr r0, .L53+12
bl __isoc99_scanf
ldr r7, [r4]
ldr r10, .L53+16
lsl r6, r7, #2
mov r0, r6
bl malloc
mov r3, r0
ldr r2, .L53+20
mov r0, r6
str r3, [r2]
bl malloc
mov r3, r0
mov r0, r6
str r3, [r10]
bl malloc
mov r8, r0
ldr r3, .L53+24
mov r0, r6
str r8, [r3]
bl malloc
ldr r5, .L53+28
cmp r7, #0
str r0, [r5]
ble .L32
mov r9, r0
sub r7, r6, #4
add r7, r8, r7
sub fp, r0, #4
sub r8, r8, #4
.L33:
mov r3, #1
mov r0, r6
str r3, [r8, #4]!
bl malloc
cmp r8, r7
str r0, [fp, #4]!
bne .L33
mov ip, #0
mov r0, ip
.L34:
mov r3, #0
ldr r2, [r9, ip, lsl #2]
sub r2, r2, #4
.L35:
str r0, [r2, #4]!
ldr r1, [r4]
add r3, r3, #1
cmp r1, r3
bgt .L35
add ip, ip, #1
cmp r1, ip
bgt .L34
.L32:
ldr r0, .L53+32
bl puts
ldr r3, [r4]
cmp r3, #0
ble .L38
mov r6, #0
mov r9, r6
ldr r8, .L53+36
ldr r7, .L53+12
.L36:
add r9, r9, #1
mov r2, r9
mov r1, r8
mov r0, #1
bl __printf_chk
ldr r1, [r10]
mov r0, r7
add r1, r1, r6
bl __isoc99_scanf
ldr r3, [r4]
add r6, r6, #4
cmp r9, r3
blt .L36
.L38:
ldr r0, .L53+40
bl puts
mov fp, #0
mov r8, #1
ldr r9, .L53+44
ldr r7, .L53+48
ldr r6, .L53+12
b .L37
.L51:
ldr r1, [r5]
sub r2, r2, #-1073741823
ldr r2, [r1, r2, lsl #2]
sub r3, r3, #-1073741823
str r8, [r2, r3, lsl #2]
ldr r2, [sp, #8]
ldr r3, [sp, #4]
sub r2, r2, #-1073741823
ldr r2, [r1, r2, lsl #2]
sub r3, r3, #-1073741823
str r8, [r2, r3, lsl #2]
.L37:
add fp, fp, #1
mov r2, fp
mov r1, r9
mov r0, #1
bl __printf_chk
mov r1, r7
mov r0, #1
bl __printf_chk
add r1, sp, #4
mov r0, r6
bl __isoc99_scanf
mov r1, r7
mov r0, #1
bl __printf_chk
add r1, sp, #8
mov r0, r6
bl __isoc99_scanf
ldmib sp, {r2, r3}
and r1, r2, r3
cmn r1, #1
bne .L51
ldr r0, .L53+52
bl puts
ldr r3, [r4]
cmp r3, #0
movgt r8, #0
ldrgt r7, .L53+56
ble .L41
.L40:
mov r6, #0
lsl r9, r8, #2
.L42:
ldr r3, [r5]
mov r1, r7
ldr r3, [r3, r9]
mov r0, #1
ldr r2, [r3, r6, lsl #2]
bl __printf_chk
ldr r3, [r4]
add r6, r6, #1
cmp r3, r6
bgt .L42
mov r0, #10
bl putchar
ldr r3, [r4]
add r8, r8, #1
cmp r3, r8
bgt .L40
.L41:
ldr r0, .L53+60
bl puts
mov r0, #0
bl bfs
ldr r3, .L53+20
ldr r0, [r3]
bl free
ldr r0, [r10]
bl free
ldr r3, .L53+24
ldr r0, [r3]
bl free
ldr r0, [r5]
bl free
ldr r3, .L53
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L52
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L52:
bl __stack_chk_fail
.L54:
.align 2
.L53:
.word .LC12
.word n
.word .LC3
.word .LC4
.word nodes
.word queue
.word state
.word adj
.word .LC5
.word .LC7
.word .LC6
.word .LC8
.word .LC9
.word .LC10
.word .LC2
.word .LC11
.size main, .-main
.comm adj,4,4
.comm n,4,4
.comm state,4,4
.global rear
.global front
.comm queue,4,4
.comm nodes,4,4
.data
.align 2
.set .LANCHOR0,. + 0
.type rear, %object
.size rear, 4
rear:
.word -1
.type front, %object
.size front, 4
front:
.word -1
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001269.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001269.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001278.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "x"
.text
.p2align 4
.globl klee_urange
.type klee_urange, @function
klee_urange:
.LFB39:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdx, .LC0[rip]
mov ebp, edi
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
mov ebx, esi
mov esi, 4
sub ebx, ebp
sub rsp, 24
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rdi, 4[rsp]
call klee_make_symbolic@PLT
mov eax, DWORD PTR 4[rsp]
mov edx, eax
sub edx, ebp
cmp edx, ebx
jnb .L6
.L1:
mov rcx, QWORD PTR 8[rsp]
sub rcx, QWORD PTR fs:40
jne .L7
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L6:
.cfi_restore_state
xor edi, edi
xor eax, eax
call klee_silent_exit@PLT
mov eax, DWORD PTR 4[rsp]
jmp .L1
.L7:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size klee_urange, .-klee_urange
.p2align 4
.globl make_int
.type make_int, @function
make_int:
.LFB40:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov ebx, edi
mov edi, 4
call malloc@PLT
mov DWORD PTR [rax], ebx
pop rbx
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE40:
.size make_int, .-make_int
.section .rodata.str1.1
.LC1:
.string "*buf[%d] = %d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB41:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
xor ebx, ebx
sub rsp, 48
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
mov rbp, rsp
.L11:
mov edi, 4
call malloc@PLT
mov DWORD PTR [rax], ebx
mov QWORD PTR 0[rbp+rbx*8], rax
add rbx, 1
cmp rbx, 3
jne .L11
mov esi, 4
xor edi, edi
lea r12, .LC1[rip]
xor ebx, ebx
mov QWORD PTR 24[rsp], 0
call klee_urange
cdqe
mov rdi, QWORD PTR [rsp+rax*8]
call free@PLT
.L12:
mov rax, QWORD PTR 0[rbp+rbx*8]
mov edx, ebx
mov rsi, r12
mov edi, 1
add rbx, 1
mov ecx, DWORD PTR [rax]
xor eax, eax
call __printf_chk@PLT
cmp rbx, 3
jne .L12
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L17
add rsp, 48
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE41:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001278.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "x\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global klee_urange
.syntax unified
.arm
.fpu softvfp
.type klee_urange, %function
klee_urange:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
mov r4, r0
mov r5, r1
sub sp, sp, #12
ldr r3, .L8
mov r1, #4
mov r0, sp
ldr r2, .L8+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl klee_make_symbolic
ldr r0, [sp]
sub r5, r5, r4
sub r4, r0, r4
cmp r4, r5
bcs .L6
.L1:
ldr r3, .L8
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L7
add sp, sp, #12
@ sp needed
pop {r4, r5, pc}
.L6:
mov r0, #0
bl klee_silent_exit
ldr r0, [sp]
b .L1
.L7:
bl __stack_chk_fail
.L9:
.align 2
.L8:
.word .LC1
.word .LC0
.size klee_urange, .-klee_urange
.align 2
.global make_int
.syntax unified
.arm
.fpu softvfp
.type make_int, %function
make_int:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r4, r0
mov r0, #4
bl malloc
str r4, [r0]
pop {r4, pc}
.size make_int, .-make_int
.section .rodata.str1.4
.align 2
.LC2:
.ascii "*buf[%d] = %d\012\000"
.section .rodata.cst4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L20
sub sp, sp, #24
add r5, sp, #4
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
mov r6, r5
mov r4, #0
.L13:
mov r0, #4
bl malloc
str r4, [r0]
add r4, r4, #1
cmp r4, #3
str r0, [r6], #4
bne .L13
mov r4, #0
mov r1, #4
mov r0, r4
str r4, [sp, #16]
bl klee_urange
add r3, sp, #24
add r0, r3, r0, lsl #2
ldr r0, [r0, #-20]
bl free
ldr r6, .L20+4
.L14:
ldr r3, [r5], #4
mov r2, r4
mov r1, r6
mov r0, #1
ldr r3, [r3]
add r4, r4, #1
bl __printf_chk
cmp r4, #3
bne .L14
ldr r3, .L20
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L19
mov r0, #0
add sp, sp, #24
@ sp needed
pop {r4, r5, r6, pc}
.L19:
bl __stack_chk_fail
.L21:
.align 2
.L20:
.word .LC3
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100128.c"
.intel_syntax noprefix
.text
#APP
.section .gnu.sgstubs,"ax",%progbits
.global func
.type func, %function
func:
nop @sg
b __acle_se_func @b.w
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "__acle_se_func"
#NO_APP
.text
.p2align 4
.globl __acle_se_func
.type __acle_se_func, @function
__acle_se_func:
.LFB23:
.cfi_startproc
endbr64
lea rdi, .LC0[rip]
jmp puts@PLT
.cfi_endproc
.LFE23:
.size __acle_se_func, .-__acle_se_func
.section .rodata.str1.1
.LC1:
.string "In fun1"
.text
.p2align 4
.globl fun1
.type fun1, @function
fun1:
.LFB24:
.cfi_startproc
endbr64
lea rdi, .LC1[rip]
jmp puts@PLT
.cfi_endproc
.LFE24:
.size fun1, .-fun1
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB25:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
xor eax, eax
call func@PLT
lea rdi, .LC1[rip]
call puts@PLT
lea rdi, .LC0[rip]
call puts@PLT
xor eax, eax
call func@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE25:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100128.c"
.text
.syntax divided
.section .gnu.sgstubs,"ax",%progbits
.global func
.type func, %function
func:
nop @sg
b __acle_se_func @b.w
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "__acle_se_func\000"
.arm
.syntax unified
.text
.align 2
.global __acle_se_func
.syntax unified
.arm
.fpu softvfp
.type __acle_se_func, %function
__acle_se_func:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r0, .L3
b puts
.L4:
.align 2
.L3:
.word .LC0
.size __acle_se_func, .-__acle_se_func
.section .rodata.str1.4
.align 2
.LC1:
.ascii "In fun1\000"
.text
.align 2
.global fun1
.syntax unified
.arm
.fpu softvfp
.type fun1, %function
fun1:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r0, .L6
b puts
.L7:
.align 2
.L6:
.word .LC1
.size fun1, .-fun1
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl func
ldr r0, .L10
bl puts
ldr r0, .L10+4
bl puts
bl func
mov r0, #0
pop {r4, pc}
.L11:
.align 2
.L10:
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001286.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.LC1:
.string "true"
.LC2:
.string "false"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push rbx
.cfi_def_cfa_offset 16
.cfi_offset 3, -16
mov edx, -1
lea rsi, .LC0[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
lea rsi, .LC0[rip]
mov edi, 1
mov ebx, eax
movsx edx, al
xor eax, eax
call __printf_chk@PLT
cmp bl, -1
je .L6
lea rdi, .LC2[rip]
call puts@PLT
.L3:
xor eax, eax
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
lea rdi, .LC1[rip]
call puts@PLT
jmp .L3
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001286.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.align 2
.LC1:
.ascii "false\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L4
mvn r2, #0
mov r1, r4
mov r0, #1
bl __printf_chk
ldr r3, .L4+4
ldr r0, [r3]
bl getc
mov r1, r4
and r2, r0, #255
mov r0, #1
bl __printf_chk
ldr r0, .L4+8
bl puts
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.word stdin
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001287.c"
.intel_syntax noprefix
.text
.p2align 4
.globl R_to_Temp
.type R_to_Temp, @function
R_to_Temp:
.LFB0:
.cfi_startproc
endbr64
imul edi, edi, 2605
sub edi, 26080999
movsx rax, edi
sar edi, 31
imul rax, rax, 274877907
sar rax, 38
sub eax, edi
ret
.cfi_endproc
.LFE0:
.size R_to_Temp, .-R_to_Temp
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov edx, 1792
mov edi, 1
xor eax, eax
lea rsi, .LC0[rip]
call __printf_chk@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001287.c"
.text
.align 2
.global R_to_Temp
.syntax unified
.arm
.fpu softvfp
.type R_to_Temp, %function
R_to_Temp:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
add r3, r0, r0, lsl #6
add r0, r0, r3, lsl #3
ldr r3, .L3
ldr r2, .L3+4
add r0, r0, r0, lsl #2
add r3, r0, r3
smull r1, r0, r2, r3
asr r3, r3, #31
rsb r0, r3, r0, asr #6
bx lr
.L4:
.align 2
.L3:
.word -26080999
.word 274877907
.size R_to_Temp, .-R_to_Temp
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #1792
push {r4, lr}
ldr r1, .L7
mov r0, #1
bl __printf_chk
mov r0, #0
pop {r4, pc}
.L8:
.align 2
.L7:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100129.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "recvmsg() returned %zd\n"
.LC1:
.string "the_stack_data/100129.c"
.LC2:
.string "res >= 0"
.LC3:
.string "cmsg != NULL"
.LC4:
.string "cmsg->cmsg_type == SCM_RIGHTS"
.LC5:
.string "Got FD #%d\n"
.text
.p2align 4
.globl receive_fd
.type receive_fd, @function
receive_fd:
.LFB66:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor edx, edx
pxor xmm0, xmm0
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 616
.cfi_def_cfa_offset 640
mov rax, QWORD PTR fs:40
mov QWORD PTR 600[rsp], rax
xor eax, eax
lea rax, 80[rsp]
lea rsi, 16[rsp]
mov QWORD PTR 8[rsp], 256
mov QWORD PTR [rsp], rax
mov rax, rsp
mov QWORD PTR 32[rsp], rax
lea rax, 336[rsp]
mov QWORD PTR 64[rsp], 0
mov QWORD PTR 40[rsp], 1
mov QWORD PTR 48[rsp], rax
mov QWORD PTR 56[rsp], 256
movups XMMWORD PTR 16[rsp], xmm0
call recvmsg@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC0[rip]
mov rbx, rax
mov rcx, rax
xor eax, eax
call __fprintf_chk@PLT
test rbx, rbx
js .L9
cmp QWORD PTR 56[rsp], 15
jbe .L3
mov rax, QWORD PTR 48[rsp]
test rax, rax
je .L3
cmp DWORD PTR 12[rax], 1
jne .L10
mov r12d, DWORD PTR 16[rax]
mov rdi, QWORD PTR stderr[rip]
xor eax, eax
lea rdx, .LC5[rip]
mov esi, 1
mov ecx, r12d
call __fprintf_chk@PLT
mov rax, QWORD PTR 600[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 616
.cfi_remember_state
.cfi_def_cfa_offset 24
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L3:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 40
lea rsi, .LC1[rip]
lea rdi, .LC3[rip]
call __assert_fail@PLT
.L9:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 37
lea rsi, .LC1[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.L11:
call __stack_chk_fail@PLT
.L10:
lea rcx, __PRETTY_FUNCTION__.4[rip]
mov edx, 41
lea rsi, .LC1[rip]
lea rdi, .LC4[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE66:
.size receive_fd, .-receive_fd
.section .rodata.str1.1
.LC6:
.string "res == 0"
.LC7:
.string "%d"
.LC8:
.string "_FUSE_COMMFD"
.LC9:
.string "fusermount -o %s -- %s"
.LC10:
.string "system() returned %d\n"
.text
.p2align 4
.globl mount
.type mount, @function
mount:
.LFB67:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor edx, edx
mov r12, rsi
mov esi, 2
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
mov edi, 1
sub rsp, 64
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 56[rsp], rax
xor eax, eax
lea rcx, 8[rsp]
call socketpair@PLT
test eax, eax
jne .L17
lea rbp, 16[rsp]
mov r8d, DWORD PTR 8[rsp]
mov edx, 32
xor eax, eax
lea rcx, .LC7[rip]
mov esi, 1
mov rdi, rbp
call __sprintf_chk@PLT
mov edx, 1
mov rsi, rbp
lea rdi, .LC8[rip]
call setenv@PLT
mov r8, rbx
mov edx, 32
mov r9, r12
lea rcx, .LC9[rip]
mov esi, 1
mov rdi, rbp
xor eax, eax
call __sprintf_chk@PLT
mov rdi, rbp
call system@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC10[rip]
mov ebx, eax
mov ecx, eax
xor eax, eax
call __fprintf_chk@PLT
test ebx, ebx
jne .L18
mov edi, DWORD PTR 12[rsp]
call receive_fd
mov edi, DWORD PTR 8[rsp]
mov r12d, eax
call close@PLT
mov edi, DWORD PTR 12[rsp]
call close@PLT
mov rax, QWORD PTR 56[rsp]
sub rax, QWORD PTR fs:40
jne .L19
add rsp, 64
.cfi_remember_state
.cfi_def_cfa_offset 32
mov eax, r12d
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 54
lea rsi, .LC1[rip]
lea rdi, .LC6[rip]
call __assert_fail@PLT
.L19:
call __stack_chk_fail@PLT
.L18:
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 60
lea rsi, .LC1[rip]
lea rdi, .LC6[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE67:
.size mount, .-mount
.section .rodata.str1.1
.LC11:
.string "Loading from %s...\n"
.LC12:
.string "fd >= 0"
.LC13:
.string "res >= 0 && res < size"
.text
.p2align 4
.globl read_dumped_message
.type read_dumped_message, @function
read_dumped_message:
.LFB68:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r8d, esi
mov r12, rdx
mov esi, 1
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov edx, 128
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rcx
mov rcx, rdi
sub rsp, 144
.cfi_def_cfa_offset 176
mov rax, QWORD PTR fs:40
mov QWORD PTR 136[rsp], rax
xor eax, eax
mov rbp, rsp
mov rdi, rbp
call __sprintf_chk@PLT
mov esi, 1
xor eax, eax
mov rcx, rbp
mov rdi, QWORD PTR stderr[rip]
lea rdx, .LC11[rip]
call __fprintf_chk@PLT
xor esi, esi
xor eax, eax
mov rdi, rbp
call open@PLT
test eax, eax
js .L27
mov rsi, r12
mov rdx, rbx
mov edi, eax
mov ebp, eax
call read@PLT
mov r12, rax
test rax, rax
js .L25
cmp rax, rbx
jnb .L25
mov edi, ebp
call close@PLT
mov rax, QWORD PTR 136[rsp]
sub rax, QWORD PTR fs:40
jne .L28
add rsp, 144
.cfi_remember_state
.cfi_def_cfa_offset 32
mov rax, r12
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 74
lea rsi, .LC1[rip]
lea rdi, .LC12[rip]
call __assert_fail@PLT
.L28:
call __stack_chk_fail@PLT
.L25:
lea rcx, __PRETTY_FUNCTION__.2[rip]
mov edx, 76
lea rsi, .LC1[rip]
lea rdi, .LC13[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE68:
.size read_dumped_message, .-read_dumped_message
.section .rodata.str1.1
.LC14:
.string "dump_%d.kernel_to_fuse"
.LC15:
.string "FUSE read() returned %zd\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC16:
.string "res >= 0 && res <= sizeof(fuse_buf)"
.section .rodata.str1.1
.LC17:
.string "WARN: Expected size: %zd\n"
.LC18:
.string "WARN: Contents differ.\n"
.text
.p2align 4
.globl fuse_read
.type fuse_read, @function
fuse_read:
.LFB69:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov ecx, 1024
lea rdx, expected_data.1[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, edi
lea rdi, .LC14[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
call read_dumped_message
mov edx, 524288
lea rsi, fuse_buf[rip]
mov edi, ebp
mov r12, rax
call read@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC15[rip]
mov rbx, rax
mov rcx, rax
xor eax, eax
call __fprintf_chk@PLT
cmp rbx, 524288
ja .L34
cmp r12, rbx
jne .L35
mov rdx, r12
lea rsi, expected_data.1[rip]
lea rdi, fuse_buf[rip]
call memcmp@PLT
test eax, eax
jne .L36
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L35:
.cfi_restore_state
mov rdi, QWORD PTR stderr[rip]
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
mov rcx, r12
mov esi, 1
pop rbp
.cfi_def_cfa_offset 16
lea rdx, .LC17[rip]
xor eax, eax
pop r12
.cfi_def_cfa_offset 8
jmp __fprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L36:
.cfi_restore_state
mov rcx, QWORD PTR stderr[rip]
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
mov edx, 23
mov esi, 1
pop rbp
.cfi_def_cfa_offset 16
lea rdi, .LC18[rip]
pop r12
.cfi_def_cfa_offset 8
jmp fwrite@PLT
.L34:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 87
lea rsi, .LC1[rip]
lea rdi, .LC16[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE69:
.size fuse_read, .-fuse_read
.section .rodata.str1.1
.LC19:
.string "dump_%d.fuse_to_kernel"
.LC20:
.string "FUSE write() returned %zd\n"
.LC21:
.string "WARN: Expected %zd.\n"
.text
.p2align 4
.globl fuse_write
.type fuse_write, @function
fuse_write:
.LFB70:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov ecx, 524288
lea rdx, fuse_buf[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, edi
lea rdi, .LC19[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
call read_dumped_message
lea rsi, fuse_buf[rip]
mov edi, ebp
mov rdx, rax
mov r12, rax
call write@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC20[rip]
mov rbx, rax
mov rcx, rax
xor eax, eax
call __fprintf_chk@PLT
cmp r12, rbx
jne .L40
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L40:
.cfi_restore_state
mov rdi, QWORD PTR stderr[rip]
pop rbx
.cfi_def_cfa_offset 24
mov rcx, r12
mov esi, 1
pop rbp
.cfi_def_cfa_offset 16
lea rdx, .LC21[rip]
xor eax, eax
pop r12
.cfi_def_cfa_offset 8
jmp __fprintf_chk@PLT
.cfi_endproc
.LFE70:
.size fuse_write, .-fuse_write
.section .rodata.str1.8
.align 8
.LC22:
.string "Usage: %s <mount point> <options> <number of messages>\n"
.section .rodata.str1.1
.LC23:
.string "Mounting to %s...\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB71:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov rbx, rsi
sub rsp, 8
.cfi_def_cfa_offset 48
cmp edi, 3
jle .L49
.L42:
mov rdi, QWORD PTR 24[rbx]
mov rbp, QWORD PTR 8[rbx]
mov edx, 10
xor esi, esi
mov r13, QWORD PTR 16[rbx]
call strtol@PLT
mov rdi, QWORD PTR stderr[rip]
mov rcx, rbp
lea rdx, .LC23[rip]
mov esi, 1
mov rbx, rax
mov r12d, eax
xor eax, eax
call __fprintf_chk@PLT
mov rsi, rbp
mov rdi, r13
call mount
mov ebp, eax
test ebx, ebx
jle .L43
xor ebx, ebx
jmp .L46
.p2align 4,,10
.p2align 3
.L50:
call fuse_read
add ebx, 1
cmp ebx, r12d
je .L43
.L46:
mov esi, ebx
mov edi, ebp
test bl, 1
je .L50
call fuse_write
add ebx, 1
cmp ebx, r12d
jne .L46
.L43:
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L49:
.cfi_restore_state
mov rcx, QWORD PTR [rsi]
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
xor eax, eax
lea rdx, .LC22[rip]
call __fprintf_chk@PLT
jmp .L42
.cfi_endproc
.LFE71:
.size main, .-main
.section .rodata
.align 8
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 10
__PRETTY_FUNCTION__.0:
.string "fuse_read"
.local expected_data.1
.comm expected_data.1,1024,32
.align 16
.type __PRETTY_FUNCTION__.2, @object
.size __PRETTY_FUNCTION__.2, 20
__PRETTY_FUNCTION__.2:
.string "read_dumped_message"
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 6
__PRETTY_FUNCTION__.3:
.string "mount"
.align 8
.type __PRETTY_FUNCTION__.4, @object
.size __PRETTY_FUNCTION__.4, 11
__PRETTY_FUNCTION__.4:
.string "receive_fd"
.globl fuse_buf
.bss
.align 4096
.type fuse_buf, @object
.size fuse_buf, 524288
fuse_buf:
.zero 524288
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100129.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "recvmsg() returned %zd\012\000"
.align 2
.LC1:
.ascii "the_stack_data/100129.c\000"
.align 2
.LC2:
.ascii "res >= 0\000"
.align 2
.LC3:
.ascii "cmsg != NULL\000"
.align 2
.LC4:
.ascii "cmsg->cmsg_type == SCM_RIGHTS\000"
.align 2
.LC5:
.ascii "Got FD #%d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global receive_fd
.syntax unified
.arm
.fpu softvfp
.type receive_fd, %function
receive_fd:
@ args = 0, pretend = 0, frame = 560
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #256
push {r4, r5, r6, lr}
mov r2, #0
mov r5, #1
ldr ip, .L12
sub sp, sp, #560
ldr ip, [ip]
str ip, [sp, #556]
mov ip,#0
add lr, sp, #44
add ip, sp, #8
add r1, sp, #16
str r3, [sp, #12]
str r3, [sp, #36]
add r3, sp, #300
str r2, [sp, #16]
str r2, [sp, #20]
str r2, [sp, #40]
str lr, [sp, #8]
str ip, [sp, #24]
str r3, [sp, #32]
str r5, [sp, #28]
bl recvmsg
mov r4, r0
ldr r6, .L12+4
mov r3, r0
mov r1, r5
ldr r0, [r6]
ldr r2, .L12+8
bl __fprintf_chk
cmp r4, #0
blt .L9
ldr r3, [sp, #36]
cmp r3, #11
bls .L3
ldr r1, [sp, #32]
cmp r1, #0
beq .L3
ldr r5, [r1, #8]
cmp r5, #1
bne .L10
mov r2, #4
add r1, r1, #12
add r0, sp, r2
bl memcpy
ldr r4, [sp, #4]
ldr r2, .L12+12
mov r3, r4
mov r1, r5
ldr r0, [r6]
bl __fprintf_chk
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #556]
eors r2, r3, r2
mov r3, #0
bne .L11
mov r0, r4
add sp, sp, #560
@ sp needed
pop {r4, r5, r6, pc}
.L3:
mov r2, #40
ldr r3, .L12+16
ldr r1, .L12+20
ldr r0, .L12+24
bl __assert_fail
.L9:
mov r2, #37
ldr r3, .L12+16
ldr r1, .L12+20
ldr r0, .L12+28
bl __assert_fail
.L11:
bl __stack_chk_fail
.L10:
mov r2, #41
ldr r3, .L12+16
ldr r1, .L12+20
ldr r0, .L12+32
bl __assert_fail
.L13:
.align 2
.L12:
.word .LC6
.word stderr
.word .LC0
.word .LC5
.word .LANCHOR0
.word .LC1
.word .LC3
.word .LC2
.word .LC4
.size receive_fd, .-receive_fd
.section .rodata.str1.4
.align 2
.LC7:
.ascii "res == 0\000"
.align 2
.LC8:
.ascii "%d\000"
.align 2
.LC9:
.ascii "_FUSE_COMMFD\000"
.align 2
.LC10:
.ascii "fusermount -o %s -- %s\000"
.align 2
.LC11:
.ascii "system() returned %d\012\000"
.section .rodata.cst4
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global mount
.syntax unified
.arm
.fpu softvfp
.type mount, %function
mount:
@ args = 0, pretend = 0, frame = 48
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr ip, .L22
sub sp, sp, #60
mov r4, r0
mov r5, r1
mov r2, #0
mov r1, #2
mov r0, #1
add r3, sp, #12
ldr ip, [ip]
str ip, [sp, #52]
mov ip,#0
bl socketpair
cmp r0, #0
bne .L19
ldr r3, [sp, #12]
mov r2, #32
mov r1, #1
str r3, [sp]
add r0, sp, #20
ldr r3, .L22+4
bl __sprintf_chk
mov r2, #1
add r1, sp, #20
ldr r0, .L22+8
bl setenv
mov r2, #32
mov r1, #1
ldr r3, .L22+12
stm sp, {r4, r5}
add r0, sp, #20
bl __sprintf_chk
add r0, sp, #20
bl system
mov r4, r0
ldr r2, .L22+16
mov r3, r0
mov r1, #1
ldr r0, [r2]
ldr r2, .L22+20
bl __fprintf_chk
cmp r4, #0
bne .L20
ldr r0, [sp, #16]
bl receive_fd
mov r4, r0
ldr r0, [sp, #12]
bl close
ldr r0, [sp, #16]
bl close
ldr r3, .L22
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L21
mov r0, r4
add sp, sp, #60
@ sp needed
pop {r4, r5, pc}
.L19:
mov r2, #54
ldr r3, .L22+24
ldr r1, .L22+28
ldr r0, .L22+32
bl __assert_fail
.L21:
bl __stack_chk_fail
.L20:
mov r2, #60
ldr r3, .L22+24
ldr r1, .L22+28
ldr r0, .L22+32
bl __assert_fail
.L23:
.align 2
.L22:
.word .LC12
.word .LC8
.word .LC9
.word .LC10
.word stderr
.word .LC11
.word .LANCHOR0+12
.word .LC1
.word .LC7
.size mount, .-mount
.section .rodata.str1.4
.align 2
.LC13:
.ascii "Loading from %s...\012\000"
.align 2
.LC14:
.ascii "fd >= 0\000"
.align 2
.LC15:
.ascii "res >= 0 && res < size\000"
.section .rodata.cst4
.align 2
.LC16:
.word __stack_chk_guard
.text
.align 2
.global read_dumped_message
.syntax unified
.arm
.fpu softvfp
.type read_dumped_message, %function
read_dumped_message:
@ args = 0, pretend = 0, frame = 136
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr ip, .L32
sub sp, sp, #144
str r1, [sp]
mov r4, r2
mov r1, #1
mov r2, #128
mov r6, r3
mov r3, r0
add r0, sp, #12
ldr ip, [ip]
str ip, [sp, #140]
mov ip,#0
bl __sprintf_chk
ldr r2, .L32+4
mov r1, #1
ldr r0, [r2]
add r3, sp, #12
ldr r2, .L32+8
bl __fprintf_chk
mov r1, #0
add r0, sp, #12
bl open
subs r5, r0, #0
blt .L29
mov r1, r4
mov r2, r6
bl read
mvn r3, r0
cmp r0, r6
lsr r3, r3, #31
movcs r3, #0
cmp r3, #0
mov r4, r0
beq .L30
mov r0, r5
bl close
ldr r3, .L32
ldr r2, [r3]
ldr r3, [sp, #140]
eors r2, r3, r2
mov r3, #0
bne .L31
mov r0, r4
add sp, sp, #144
@ sp needed
pop {r4, r5, r6, pc}
.L29:
mov r2, #74
ldr r3, .L32+12
ldr r1, .L32+16
ldr r0, .L32+20
bl __assert_fail
.L31:
bl __stack_chk_fail
.L30:
mov r2, #76
ldr r3, .L32+12
ldr r1, .L32+16
ldr r0, .L32+24
bl __assert_fail
.L33:
.align 2
.L32:
.word .LC16
.word stderr
.word .LC13
.word .LANCHOR0+20
.word .LC1
.word .LC14
.word .LC15
.size read_dumped_message, .-read_dumped_message
.section .rodata.str1.4
.align 2
.LC17:
.ascii "dump_%d.kernel_to_fuse\000"
.align 2
.LC18:
.ascii "FUSE read() returned %zd\012\000"
.align 2
.LC19:
.ascii "res >= 0 && res <= sizeof(fuse_buf)\000"
.align 2
.LC20:
.ascii "WARN: Expected size: %zd\012\000"
.align 2
.LC21:
.ascii "WARN: Contents differ.\012\000"
.text
.align 2
.global fuse_read
.syntax unified
.arm
.fpu softvfp
.type fuse_read, %function
fuse_read:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r3, #1024
mov r4, r0
ldr r2, .L41
ldr r0, .L41+4
bl read_dumped_message
mov r2, #524288
ldr r1, .L41+8
mov r5, r0
mov r0, r4
bl read
mov r4, r0
ldr r6, .L41+12
mov r3, r0
mov r1, #1
ldr r0, [r6]
ldr r2, .L41+16
bl __fprintf_chk
cmp r4, #524288
bhi .L39
cmp r5, r4
bne .L40
mov r2, r5
ldr r1, .L41
ldr r0, .L41+8
bl memcmp
cmp r0, #0
popeq {r4, r5, r6, pc}
ldr r3, [r6]
mov r2, #23
pop {r4, r5, r6, lr}
mov r1, #1
ldr r0, .L41+20
b fwrite
.L40:
mov r3, r5
ldr r0, [r6]
mov r1, #1
pop {r4, r5, r6, lr}
ldr r2, .L41+24
b __fprintf_chk
.L39:
mov r2, #87
ldr r3, .L41+28
ldr r1, .L41+32
ldr r0, .L41+36
bl __assert_fail
.L42:
.align 2
.L41:
.word .LANCHOR1
.word .LC17
.word fuse_buf
.word stderr
.word .LC18
.word .LC21
.word .LC20
.word .LANCHOR0+40
.word .LC1
.word .LC19
.size fuse_read, .-fuse_read
.section .rodata.str1.4
.align 2
.LC22:
.ascii "dump_%d.fuse_to_kernel\000"
.align 2
.LC23:
.ascii "FUSE write() returned %zd\012\000"
.align 2
.LC24:
.ascii "WARN: Expected %zd.\012\000"
.text
.align 2
.global fuse_write
.syntax unified
.arm
.fpu softvfp
.type fuse_write, %function
fuse_write:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
mov r3, #524288
mov r5, r0
ldr r2, .L46
ldr r0, .L46+4
bl read_dumped_message
mov r4, r0
ldr r1, .L46
mov r0, r5
mov r2, r4
bl write
mov r5, r0
ldr r6, .L46+8
mov r3, r0
mov r1, #1
ldr r0, [r6]
ldr r2, .L46+12
bl __fprintf_chk
cmp r4, r5
popeq {r4, r5, r6, pc}
mov r3, r4
ldr r0, [r6]
mov r1, #1
pop {r4, r5, r6, lr}
ldr r2, .L46+16
b __fprintf_chk
.L47:
.align 2
.L46:
.word fuse_buf
.word .LC22
.word stderr
.word .LC23
.word .LC24
.size fuse_write, .-fuse_write
.section .rodata.str1.4
.align 2
.LC25:
.ascii "Usage: %s <mount point> <options> <number of messag"
.ascii "es>\012\000"
.align 2
.LC26:
.ascii "Mounting to %s...\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #3
push {r4, r5, r6, r7, r8, lr}
mov r4, r1
ldr r7, .L59
ble .L56
.L49:
mov r2, #10
mov r1, #0
ldr r0, [r4, #12]
ldr r6, [r4, #4]
ldr r4, [r4, #8]
bl strtol
mov r3, r6
mov r5, r0
mov r1, #1
ldr r2, .L59+4
ldr r0, [r7]
bl __fprintf_chk
mov r1, r6
mov r0, r4
bl mount
cmp r5, #0
mov r6, r0
ble .L50
mov r4, #0
b .L53
.L58:
add r4, r4, #1
bl fuse_read
cmp r4, r5
beq .L50
.L53:
tst r4, #1
mov r1, r4
mov r0, r6
beq .L58
add r4, r4, #1
bl fuse_write
cmp r4, r5
bne .L53
.L50:
mov r0, #0
pop {r4, r5, r6, r7, r8, pc}
.L56:
ldr r3, [r1]
ldr r0, [r7]
mov r1, #1
ldr r2, .L59+8
bl __fprintf_chk
b .L49
.L60:
.align 2
.L59:
.word stderr
.word .LC26
.word .LC25
.size main, .-main
.comm fuse_buf,524288,4096
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type __PRETTY_FUNCTION__.6809, %object
.size __PRETTY_FUNCTION__.6809, 11
__PRETTY_FUNCTION__.6809:
.ascii "receive_fd\000"
.space 1
.type __PRETTY_FUNCTION__.6819, %object
.size __PRETTY_FUNCTION__.6819, 6
__PRETTY_FUNCTION__.6819:
.ascii "mount\000"
.space 2
.type __PRETTY_FUNCTION__.6829, %object
.size __PRETTY_FUNCTION__.6829, 20
__PRETTY_FUNCTION__.6829:
.ascii "read_dumped_message\000"
.type __PRETTY_FUNCTION__.6838, %object
.size __PRETTY_FUNCTION__.6838, 10
__PRETTY_FUNCTION__.6838:
.ascii "fuse_read\000"
.bss
.align 2
.set .LANCHOR1,. + 0
.type expected_data.6835, %object
.size expected_data.6835, 1024
expected_data.6835:
.space 1024
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001294.c"
.intel_syntax noprefix
.text
.globl datatoc_gpu_shader_text_simple_geom_glsl
.data
.align 32
.type datatoc_gpu_shader_text_simple_geom_glsl, @object
.size datatoc_gpu_shader_text_simple_geom_glsl, 724
datatoc_gpu_shader_text_simple_geom_glsl:
.ascii "\r\nlayout(points) in;\r\nlayout(triangle_strip, max_vertice"
.ascii "s = 4) out;\r\n\r\nin vec4 pos_rect[];\r\nin vec4 tex_rect[]"
.ascii ";\r\nin vec4 color[];\r\n\r\nflat out vec4 color_flat;\r\nfl"
.ascii "at out vec4 texCoord_rect;\r\nnoperspective out vec2 texCoor"
.ascii "d_interp;\r\n\r\nvoid main()\r\n{\r\n\tcolor_flat = color[0]"
.ascii ";\r\n\ttexCoord_rect = tex_rect[0];\r\n\tgl_Position.zw = ve"
.ascii "c2(0.0, 1.0);\r\n\r\n\tgl_Position.xy = pos_rect[0].xy;\r\n"
.ascii "\ttexCoord_interp = vec2(0.0, 0.0);\r\n\tEmitVertex();\r\n\r"
.ascii "\n\tgl_Position.xy = pos_rect[0].zy;\r"
.string "\n\ttexCoord_interp = vec2(1.0, 0.0);\r\n\tEmitVertex();\r\n\r\n\tgl_Position.xy = pos_rect[0].xw;\r\n\ttexCoord_interp = vec2(0.0, 1.0);\r\n\tEmitVertex();\r\n\r\n\tgl_Position.xy = pos_rect[0].zw;\r\n\ttexCoord_interp = vec2(1.0, 1.0);\r\n\tEmitVertex();\r\n\r\n\tEndPrimitive();\r\n}\r\n"
.globl datatoc_gpu_shader_text_simple_geom_glsl_size
.align 4
.type datatoc_gpu_shader_text_simple_geom_glsl_size, @object
.size datatoc_gpu_shader_text_simple_geom_glsl_size, 4
datatoc_gpu_shader_text_simple_geom_glsl_size:
.long 723
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001294.c"
.text
.global datatoc_gpu_shader_text_simple_geom_glsl
.global datatoc_gpu_shader_text_simple_geom_glsl_size
.data
.align 2
.type datatoc_gpu_shader_text_simple_geom_glsl, %object
.size datatoc_gpu_shader_text_simple_geom_glsl, 724
datatoc_gpu_shader_text_simple_geom_glsl:
.ascii "\015\012layout(points) in;\015\012layout(triangle_s"
.ascii "trip, max_vertices = 4) out;\015\012\015\012in vec4"
.ascii " pos_rect[];\015\012in vec4 tex_rect[];\015\012in v"
.ascii "ec4 color[];\015\012\015\012flat out vec4 color_fla"
.ascii "t;\015\012flat out vec4 texCoord_rect;\015\012noper"
.ascii "spective out vec2 texCoord_interp;\015\012\015\012v"
.ascii "oid main()\015\012{\015\012\011color_flat = color[0"
.ascii "];\015\012\011texCoord_rect = tex_rect[0];\015\012\011"
.ascii "gl_Position.zw = vec2(0.0, 1.0);\015\012\015\012\011"
.ascii "gl_Position.xy = pos_rect[0].xy;\015\012\011texCoo"
.ascii "rd_interp = vec2(0.0, 0.0);\015\012\011EmitVertex()"
.ascii ";\015\012\015\012\011gl_Position.xy = pos_rect[0]."
.ascii "zy;\015\012\011texCoord_interp = vec2(1.0, 0.0);\015"
.ascii "\012\011EmitVertex();\015\012\015\012\011gl_Positio"
.ascii "n.xy = pos_rect[0].xw;\015\012\011texCoord_interp "
.ascii "= vec2(0.0, 1.0);\015\012\011EmitVertex();\015\012\015"
.ascii "\012\011gl_Position.xy = pos_rect[0].zw;\015\012\011"
.ascii "texCoord_interp = vec2(1.0, 1.0);\015\012\011EmitVe"
.ascii "rtex();\015\012\015\012\011EndPrimitive();\015\012}"
.ascii "\015\012\000"
.type datatoc_gpu_shader_text_simple_geom_glsl_size, %object
.size datatoc_gpu_shader_text_simple_geom_glsl_size, 4
datatoc_gpu_shader_text_simple_geom_glsl_size:
.word 723
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "10013.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%lld\n"
.LC1:
.string "%lld %lld %lld %lld %lld"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 56
.cfi_def_cfa_offset 112
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
lea r14, 32[rsp]
lea r13, 24[rsp]
mov rbx, rsp
lea r12, 16[rsp]
lea rbp, 8[rsp]
.p2align 4,,10
.p2align 3
.L2:
xor eax, eax
mov r9, r14
mov r8, r13
mov rcx, r12
mov rdx, rbp
mov rsi, rbx
lea rdi, .LC1[rip]
call __isoc99_scanf@PLT
cmp eax, 5
jne .L3
mov r10, QWORD PTR [rsp]
mov r11, QWORD PTR 8[rsp]
mov r15, QWORD PTR 16[rsp]
mov rdi, QWORD PTR 24[rsp]
mov rax, r10
mov r9, QWORD PTR 32[rsp]
or rax, r11
or rax, r15
or rax, rdi
or rax, r9
je .L3
test r9, r9
js .L9
add r9, 1
xor esi, esi
xor r8d, r8d
xor ecx, ecx
.p2align 4,,10
.p2align 3
.L6:
mov rax, rcx
imul rax, rcx
imul rax, r10
add rax, rsi
add rax, r15
cqo
idiv rdi
cmp rdx, 1
adc r8, 0
add rcx, 1
add rsi, r11
cmp rcx, r9
jne .L6
.L4:
mov rdx, r8
lea rsi, .LC0[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L2
.p2align 4,,10
.p2align 3
.L9:
xor r8d, r8d
jmp .L4
.p2align 4,,10
.p2align 3
.L3:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L16
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "10013.c"
.text
.global __aeabi_ldivmod
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%lld\012\000"
.align 2
.LC1:
.ascii "%lld %lld %lld %lld %lld\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 96
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L17
sub sp, sp, #108
ldr r3, [r3]
str r3, [sp, #100]
mov r3,#0
.L2:
add r3, sp, #88
str r3, [sp, #4]
add r3, sp, #80
str r3, [sp]
ldr r0, .L17+4
add r3, sp, #72
add r2, sp, #64
add r1, sp, #56
bl __isoc99_scanf
cmp r0, #5
bne .L3
ldr r2, [sp, #60]
ldr fp, [sp, #56]
ldr ip, [sp, #64]
ldr r8, [sp, #68]
ldr r3, [sp, #72]
ldr lr, [sp, #76]
orr r1, r2, r8
ldr r9, [sp, #80]
ldr r10, [sp, #84]
orr r0, fp, ip
orr r0, r0, r3
orr r1, r1, lr
orr r0, r0, r9
orr r1, r1, r10
str r3, [sp, #36]
str r2, [sp, #32]
add r3, sp, #88
ldmia r3, {r2-r3}
orr r0, r0, r2
orr r1, r1, r3
str r0, [sp, #48]
str r1, [sp, #52]
add r1, sp, #48
ldmia r1, {r0-r1}
orrs r1, r0, r1
str lr, [sp, #40]
beq .L3
cmp r2, #0
sbcs r1, r3, #0
blt .L9
mov r4, #0
adds r1, r2, #1
adc r3, r3, r4
str r3, [sp, #28]
mov r3, r8
mov r5, r4
mov r8, fp
mov r6, r4
mov r7, r4
mov fp, r3
str ip, [sp, #44]
str r4, [sp, #16]
str r4, [sp, #20]
str r1, [sp, #24]
.L6:
umull r1, r2, r6, r6
mul r3, r6, r7
add r3, r2, r3, lsl #1
str r1, [sp, #8]
str r2, [sp, #12]
str r3, [sp, #12]
add r2, sp, #8
ldmia r2, {r1-r2}
mov r0, r1
ldr r3, [sp, #32]
mul r0, r3, r0
mla r1, r8, r2, r0
ldr r0, [sp, #8]
umull r2, r3, r0, r8
adds r0, r2, r4
add r3, r1, r3
adc r1, r3, r5
ldr r3, [sp, #36]
mov r2, r9
adds r0, r0, r3
ldr r3, [sp, #40]
adc r1, r1, r3
mov r3, r10
bl __aeabi_ldivmod
orrs r3, r2, r3
bne .L5
ldr r3, [sp, #16]
adds r3, r3, #1
str r3, [sp, #16]
ldr r3, [sp, #20]
adc r3, r3, #0
str r3, [sp, #20]
.L5:
ldr r3, [sp, #44]
adds r6, r6, #1
adc r7, r7, #0
adds r4, r4, r3
adc r5, r5, fp
add r3, sp, #24
ldmia r3, {r2-r3}
cmp r7, r3
cmpeq r6, r2
bne .L6
.L4:
ldr r2, [sp, #16]
ldr r3, [sp, #20]
ldr r1, .L17+8
mov r0, #1
bl __printf_chk
b .L2
.L9:
mov r3, #0
str r3, [sp, #16]
str r3, [sp, #20]
b .L4
.L3:
ldr r3, .L17
ldr r2, [r3]
ldr r3, [sp, #100]
eors r2, r3, r2
mov r3, #0
bne .L16
mov r0, #0
add sp, sp, #108
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L16:
bl __stack_chk_fail
.L18:
.align 2
.L17:
.word .LC2
.word .LC1
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100130.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
movabs eax, DWORD PTR [ds:3135242239]
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100130.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L3
ldrb r0, [r2, #1] @ zero_extendqisi2
ldrb r3, [r2] @ zero_extendqisi2
ldrb r1, [r2, #2] @ zero_extendqisi2
orr r3, r3, r0, lsl #8
ldrb r0, [r2, #3] @ zero_extendqisi2
orr r3, r3, r1, lsl #16
orr r0, r3, r0, lsl #24
bx lr
.L4:
.align 2
.L3:
.word -1159725057
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001302.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "\nEnter the value of n:"
.LC2:
.string "%d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "\nEnter the values in form x,y:"
.align 8
.LC4:
.string "\nEnter the value of x for which the value of y is wanted: "
.section .rodata.str1.1
.LC5:
.string "%f"
.LC6:
.string "%f %f"
.section .rodata.str1.8
.align 8
.LC7:
.string "\nWhen x = %6.1f, corresponding y = %6.2f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rdi, .LC1[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 2888
.cfi_def_cfa_offset 2928
mov rax, QWORD PTR fs:40
mov QWORD PTR 2872[rsp], rax
xor eax, eax
call puts@PLT
lea rsi, 12[rsp]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rdi, .LC3[rip]
call puts@PLT
mov eax, DWORD PTR 12[rsp]
test eax, eax
js .L6
lea rbp, 16[rsp]
xor ebx, ebx
lea r13, 432[rsp]
lea r12, .LC6[rip]
.p2align 4,,10
.p2align 3
.L5:
lea rdx, 0[r13+rbx*4]
mov rsi, rbp
mov rdi, r12
xor eax, eax
call __isoc99_scanf@PLT
add rbx, 1
add rbp, 4
cmp DWORD PTR 12[rsp], ebx
jge .L5
.L6:
lea rdi, .LC4[rip]
call puts@PLT
lea rsi, 8[rsp]
lea rdi, .LC5[rip]
xor eax, eax
call __isoc99_scanf@PLT
movss xmm1, DWORD PTR 20[rsp]
movss xmm4, DWORD PTR 16[rsp]
lea r8, 852[rsp]
mov esi, DWORD PTR 12[rsp]
movaps xmm5, xmm1
subss xmm5, xmm4
test esi, esi
jle .L4
lea r8, 852[rsp]
lea ecx, -1[rsi]
movss xmm0, DWORD PTR 432[rsp]
lea rax, 436[rsp]
mov rdx, r8
lea rcx, 440[rsp+rcx*4]
.p2align 4,,10
.p2align 3
.L7:
movaps xmm3, xmm0
movss xmm0, DWORD PTR [rax]
add rax, 4
add rdx, 20
movaps xmm2, xmm0
subss xmm2, xmm3
movss DWORD PTR -20[rdx], xmm2
cmp rax, rcx
jne .L7
.L4:
sub esi, 2
mov edi, 1
mov r9d, 2
lea r10, 868[rsp]
.L9:
test esi, esi
js .L13
mov eax, esi
mov rdx, r9
lea rax, [rax+rax*4]
sub rdx, rdi
add rax, rdi
lea rcx, [r10+rax*4]
mov rax, r8
.p2align 4,,10
.p2align 3
.L8:
movss xmm0, DWORD PTR 20[rax]
subss xmm0, DWORD PTR [rax]
movss DWORD PTR [rax+rdx*4], xmm0
add rax, 20
cmp rcx, rax
jne .L8
.L13:
add rdi, 1
sub esi, 1
add r8, 4
add r9, 1
cmp rdi, 4
jne .L9
movss xmm2, DWORD PTR 8[rsp]
comiss xmm4, xmm2
ja .L16
xor eax, eax
jmp .L11
.p2align 4,,10
.p2align 3
.L26:
movss xmm1, DWORD PTR 20[rsp+rax*4]
.L11:
movsx rdx, eax
add rax, 1
comiss xmm1, xmm2
jbe .L26
.L10:
movaps xmm7, xmm2
subss xmm7, DWORD PTR 16[rsp+rdx*4]
movss xmm6, DWORD PTR .LC0[rip]
lea rax, [rdx+rdx*4]
movss xmm1, DWORD PTR 432[rsp+rdx*4]
lea rdx, 848[rsp+rax*4]
mov eax, 1
movaps xmm4, xmm6
movaps xmm3, xmm6
divss xmm7, xmm5
.L14:
pxor xmm5, xmm5
movaps xmm0, xmm7
cvtsi2ss xmm5, eax
subss xmm0, xmm5
mulss xmm4, xmm5
addss xmm0, xmm6
mulss xmm3, xmm0
movaps xmm0, xmm3
divss xmm0, xmm4
mulss xmm0, DWORD PTR [rdx+rax*4]
add rax, 1
addss xmm1, xmm0
cmp rax, 5
jne .L14
pxor xmm0, xmm0
lea rsi, .LC7[rip]
mov edi, 1
mov eax, 2
cvtss2sd xmm0, xmm2
cvtss2sd xmm1, xmm1
call __printf_chk@PLT
mov rax, QWORD PTR 2872[rsp]
sub rax, QWORD PTR fs:40
jne .L27
add rsp, 2888
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L16:
.cfi_restore_state
or rdx, -1
jmp .L10
.L27:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst4,"aM",@progbits,4
.align 4
.LC0:
.long 1065353216
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001302.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012Enter the value of n:\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "\012Enter the values in form x,y:\000"
.align 2
.LC3:
.ascii "\012Enter the value of x for which the value of y i"
.ascii "s wanted: \000"
.align 2
.LC4:
.ascii "%f\000"
.global __aeabi_fsub
.align 2
.LC5:
.ascii "%f %f\000"
.global __aeabi_fcmpgt
.global __aeabi_fcmplt
.global __aeabi_fdiv
.global __aeabi_i2f
.global __aeabi_fadd
.global __aeabi_fmul
.global __aeabi_f2d
.align 2
.LC6:
.ascii "\012When x = %6.1f, corresponding y = %6.2f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 2856
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L27
sub sp, sp, #2864
sub sp, sp, #4
ldr r0, .L27+4
ldr r3, [r3]
str r3, [sp, #2860]
mov r3,#0
bl puts
add r1, sp, #28
ldr r0, .L27+8
bl __isoc99_scanf
ldr r0, .L27+12
bl puts
ldr r3, [sp, #28]
cmp r3, #0
blt .L6
mov r5, #0
ldr r7, .L27+16
add r6, sp, #32
add r4, sp, #436
.L5:
mov r2, r4
mov r1, r6
mov r0, r7
bl __isoc99_scanf
ldr r3, [sp, #28]
add r5, r5, #1
cmp r3, r5
add r4, r4, #4
add r6, r6, #4
bge .L5
.L6:
ldr r0, .L27+20
bl puts
add r1, sp, #24
ldr r0, .L27+24
bl __isoc99_scanf
ldr r3, [sp, #32] @ float
ldr r6, [sp, #36] @ float
mov r1, r3
mov r0, r6
str r3, [sp, #12] @ float
bl __aeabi_fsub
ldr r10, [sp, #28]
str r0, [sp, #16] @ float
cmp r10, #0
addle r3, sp, #840
add r8, sp, #848
strle r3, [sp, #20]
ble .L4
sub r3, r8, #8
mov r9, r3
add r4, sp, #440
ldr r7, [sp, #436] @ float
str r3, [sp, #20]
add r5, r4, r10, lsl #2
.L7:
mov r1, r7
ldr r7, [r4], #4 @ float
add r9, r9, #20
mov r0, r7
bl __aeabi_fsub
cmp r4, r5
str r0, [r9, #-16] @ float
bne .L7
.L4:
mov r7, #2
mov r9, #1
sub r4, r10, #2
add r3, r8, #16
add r4, r4, r4, lsl r7
add r4, r3, r4, lsl r7
sub r8, r8, #4
.L9:
sub r3, r10, r7
cmp r3, #0
movge r5, r8
subge fp, r7, r9
blt .L12
.L8:
ldr r1, [r5] @ float
ldr r0, [r5, #20] @ float
bl __aeabi_fsub
str r0, [r5, fp, lsl #2] @ float
add r5, r5, #20
cmp r4, r5
bne .L8
.L12:
add r7, r7, #1
cmp r7, #5
add r8, r8, #4
add r9, r9, #1
sub r4, r4, #16
bne .L9
ldr r7, [sp, #24] @ float
ldr r0, [sp, #12] @ float
mov r1, r7
bl __aeabi_fcmpgt
subs r4, r0, #0
bne .L15
mov r1, r6
add r5, sp, #40
b .L11
.L25:
mov r4, r3
ldr r1, [r5], #4 @ float
.L11:
mov r0, r7
bl __aeabi_fcmplt
cmp r0, #0
add r3, r4, #1
beq .L25
.L10:
add r3, sp, #2864
add fp, r3, r4, lsl #2
ldr r1, [fp, #-2832] @ float
mov r0, r7
bl __aeabi_fsub
ldr r1, [sp, #16] @ float
bl __aeabi_fdiv
mov r5, #1065353216
mov r10, #1
str r7, [sp, #12] @ float
mov r6, r5
mov r7, r10
mov r9, r5
mov r10, r0
lsl r3, r4, #2
add r4, r3, r4
ldr r3, [sp, #20]
ldr r8, [fp, #-2428] @ float
add fp, r3, r4, lsl #2
add fp, fp, #4
.L13:
mov r0, r7
bl __aeabi_i2f
mov r4, r0
mov r0, r10
mov r1, r4
bl __aeabi_fsub
mov r1, r9
bl __aeabi_fadd
mov r1, r0
mov r0, r6
bl __aeabi_fmul
mov r1, r4
mov r6, r0
mov r0, r5
bl __aeabi_fmul
mov r5, r0
ldr r4, [fp], #4 @ float
mov r1, r5
mov r0, r6
bl __aeabi_fdiv
mov r1, r4
bl __aeabi_fmul
mov r1, r0
mov r0, r8
bl __aeabi_fadd
add r7, r7, #1
cmp r7, #5
mov r8, r0
bne .L13
ldr r7, [sp, #12] @ float
mov r0, r7
bl __aeabi_f2d
mov r4, r0
mov r0, r8
mov r5, r1
bl __aeabi_f2d
mov r2, r4
stm sp, {r0-r1}
mov r3, r5
mov r0, #1
ldr r1, .L27+28
bl __printf_chk
ldr r3, .L27
ldr r2, [r3]
ldr r3, [sp, #2860]
eors r2, r3, r2
mov r3, #0
bne .L26
mov r0, #0
add sp, sp, #2864
add sp, sp, #4
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L15:
mvn r4, #0
b .L10
.L26:
bl __stack_chk_fail
.L28:
.align 2
.L27:
.word .LC7
.word .LC0
.word .LC1
.word .LC2
.word .LC5
.word .LC3
.word .LC4
.word .LC6
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001308.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d %d %d"
.LC1:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea r11, -8015872[rsp]
.cfi_def_cfa 11, 8015928
.LPSRL0:
sub rsp, 4096
or DWORD PTR [rsp], 0
cmp rsp, r11
jne .LPSRL0
.cfi_def_cfa_register 7
sub rsp, 216
.cfi_def_cfa_offset 8016144
mov rax, QWORD PTR fs:40
mov QWORD PTR 8016072[rsp], rax
xor eax, eax
lea rax, 48[rsp]
lea r14, 64[rsp]
mov QWORD PTR 24[rsp], rax
lea rax, 44[rsp]
lea rbx, 60[rsp]
mov QWORD PTR 16[rsp], rax
lea rax, 40[rsp]
mov QWORD PTR 8[rsp], rax
.L2:
mov rcx, QWORD PTR 24[rsp]
mov rdx, QWORD PTR 16[rsp]
xor eax, eax
lea rdi, .LC0[rip]
mov rsi, QWORD PTR 8[rsp]
call __isoc99_scanf@PLT
cmp eax, -1
je .L12
mov r12d, DWORD PTR 44[rsp]
mov ebp, r12d
or ebp, DWORD PTR 40[rsp]
jne .L13
mov r12d, DWORD PTR 48[rsp]
test r12d, r12d
je .L12
mov edx, 8016008
xor esi, esi
mov rdi, r14
call memset@PLT
.L5:
lea r8, 8008072[rsp]
lea r9, 72[rsp]
mov edi, r12d
xor r10d, r10d
.p2align 4,,10
.p2align 3
.L6:
mov rax, r8
mov edx, 1
test ebp, ebp
jg .L8
jmp .L10
.p2align 4,,10
.p2align 3
.L30:
cmp edi, ecx
je .L16
add edx, 1
add rax, 8
cmp edx, ebp
jg .L10
.L8:
mov esi, DWORD PTR [rax]
mov ecx, DWORD PTR 4[rax]
cmp esi, edi
jne .L30
.L7:
mov edi, ecx
mov r10d, 1
.L10:
sub r8, 8008
cmp r8, r9
je .L9
mov ebp, DWORD PTR -8[r8]
jmp .L6
.p2align 4,,10
.p2align 3
.L16:
mov ecx, esi
jmp .L7
.L9:
test r10b, r10b
je .L11
mov DWORD PTR 48[rsp], edi
mov r12d, edi
.L11:
mov edx, r12d
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L2
.L13:
xor esi, esi
mov edx, 8016008
mov rdi, r14
call memset@PLT
test r12d, r12d
jle .L3
xor r15d, r15d
lea r13, 56[rsp]
lea r12, 52[rsp]
lea rbp, .LC0[rip]
.L4:
mov rcx, rbx
mov rdx, r13
mov rsi, r12
mov rdi, rbp
xor eax, eax
add r15d, 1
call __isoc99_scanf@PLT
movsx rdx, DWORD PTR 52[rsp]
mov esi, DWORD PTR 56[rsp]
imul rcx, rdx, 8008
imul rdx, rdx, 1001
mov eax, DWORD PTR 64[rsp+rcx]
add eax, 1
mov DWORD PTR 64[rsp+rcx], eax
cdqe
add rax, rdx
mov DWORD PTR 64[rsp+rax*8], esi
movsx rax, DWORD PTR 64[rsp+rcx]
add rdx, rax
mov eax, DWORD PTR 60[rsp]
mov DWORD PTR 68[rsp+rdx*8], eax
cmp DWORD PTR 44[rsp], r15d
jg .L4
mov r12d, DWORD PTR 48[rsp]
mov ebp, DWORD PTR 8008064[rsp]
jmp .L5
.L12:
mov rax, QWORD PTR 8016072[rsp]
sub rax, QWORD PTR fs:40
jne .L31
add rsp, 8016088
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L3:
.cfi_restore_state
mov r12d, DWORD PTR 48[rsp]
xor ebp, ebp
jmp .L5
.L31:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001308.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d %d %d\000"
.align 2
.LC1:
.ascii "%d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8016040
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
sub sp, sp, #7995392
ldr r3, .L31
sub sp, sp, #20480
sub sp, sp, #168
ldr r2, .L31+4
add r3, sp, r3
ldr r2, [r2]
str r2, [r3]
mov r2,#0
add r4, sp, #28
ldr r5, .L31+8
ldr r6, .L31+12
add r7, r4, #7995392
.L2:
mov r0, r5
add r3, sp, #12
add r2, sp, #8
add r1, sp, #4
bl __isoc99_scanf
cmn r0, #1
beq .L12
ldr r8, [sp, #8]
ldr r9, [sp, #4]
orrs r9, r8, r9
bne .L13
ldr r8, [sp, #12]
cmp r8, #0
beq .L12
mov r2, r6
mov r1, r9
add r0, sp, #28
bl memset
.L5:
mov r1, r8
mov r10, #0
add lr, r7, #12608
.L6:
cmp r9, #0
movgt r3, lr
movgt r2, #1
bgt .L8
b .L10
.L29:
cmp r1, r0
beq .L16
add r2, r2, #1
cmp r2, r9
add r3, r3, #8
bgt .L10
.L8:
ldr ip, [r3, #8]
ldr r0, [r3, #12]
cmp ip, r1
bne .L29
.L7:
mov r1, r0
mov r10, #1
.L10:
sub r3, lr, #8000
sub lr, r3, #8
cmp lr, r4
beq .L9
ldr r9, [r3, #-8]
b .L6
.L16:
mov r0, ip
b .L7
.L9:
cmp r10, #0
movne r8, r1
strne r1, [sp, #12]
mov r2, r8
ldr r1, .L31+16
mov r0, #1
bl __printf_chk
b .L2
.L13:
mov r2, r6
mov r1, #0
add r0, sp, #28
bl memset
cmp r8, #0
ble .L3
mov r8, #0
.L4:
add r3, sp, #24
add r2, sp, #20
add r1, sp, #16
mov r0, r5
bl __isoc99_scanf
ldr r3, [sp, #16]
add r9, sp, #168
add r2, r3, r3, lsl #3
rsb r3, r3, r2, lsl #4
rsb r3, r3, r3, lsl #3
add r2, sp, #168
add r1, r2, r3, lsl #3
ldr r2, [r1, #-140]
ldr ip, [sp, #20]
add r2, r2, #1
add r0, r3, r2
add r0, r9, r0, lsl #3
str r2, [r1, #-140]
str ip, [r0, #-140]
ldr r2, [r1, #-140]
ldr lr, [sp, #8]
add r3, r3, r2
add r8, r8, #1
ldr r2, [sp, #24]
add r3, r9, r3, lsl #3
cmp lr, r8
str r2, [r3, #-136]
bgt .L4
add r3, r9, #7995392
add r3, r3, #12288
ldr r9, [r3, #180]
ldr r8, [sp, #12]
b .L5
.L12:
ldr r3, .L31
ldr r2, .L31+4
add r3, sp, r3
ldr r1, [r2]
ldr r2, [r3]
eors r1, r2, r1
mov r2, #0
bne .L30
mov r0, #0
add sp, sp, #7995392
add sp, sp, #20480
add sp, sp, #168
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L3:
mov r9, #0
ldr r8, [sp, #12]
b .L5
.L30:
bl __stack_chk_fail
.L32:
.align 2
.L31:
.word 8016036
.word .LC2
.word .LC0
.word 8016008
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100131.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100131.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001312.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "the other side has been closed."
.text
.p2align 4
.globl readthread
.type readthread, @function
readthread:
.LFB65:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r12, rdi
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
mov ebp, r12d
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 144
.cfi_def_cfa_offset 176
mov rax, QWORD PTR fs:40
mov QWORD PTR 136[rsp], rax
xor eax, eax
mov rbx, rsp
call pthread_self@PLT
mov rdi, rax
call pthread_detach@PLT
jmp .L3
.p2align 4,,10
.p2align 3
.L2:
movsx rdx, eax
mov rsi, rbx
mov edi, 1
call write@PLT
.L3:
mov edx, 128
mov rsi, rbx
mov edi, ebp
call read@PLT
test eax, eax
jne .L2
lea rdi, .LC0[rip]
call puts@PLT
mov edi, r12d
call close@PLT
xor edi, edi
call exit@PLT
.cfi_endproc
.LFE65:
.size readthread, .-readthread
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "usage:%s port\n"
.LC2:
.string "127.0.0.1"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB66:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 312
.cfi_def_cfa_offset 352
mov rax, QWORD PTR fs:40
mov QWORD PTR 296[rsp], rax
xor eax, eax
cmp edi, 2
jne .L14
mov rdi, QWORD PTR 8[rsi]
mov edx, 10
xor esi, esi
lea rbp, 16[rsp]
lea r13, 160[rsp]
call strtol@PLT
xor edx, edx
mov esi, 1
mov edi, 2
mov rbx, rax
call socket@PLT
pxor xmm0, xmm0
lea rdx, 20[rsp]
lea rsi, .LC2[rip]
mov r12d, eax
mov edi, 2
mov eax, 2
rol bx, 8
movups XMMWORD PTR 16[rsp], xmm0
mov WORD PTR 16[rsp], ax
call inet_pton@PLT
mov rsi, rbp
mov edx, 16
mov edi, r12d
mov WORD PTR 18[rsp], bx
lea rbp, 32[rsp]
call connect@PLT
movsx rcx, r12d
lea rdi, 8[rsp]
xor esi, esi
lea rdx, readthread[rip]
call pthread_create@PLT
jmp .L10
.p2align 4,,10
.p2align 3
.L11:
mov rdi, rbp
call strlen@PLT
lea rdi, 162[rsp]
mov rsi, rbp
mov ecx, 126
mov rbx, rax
rol ax, 8
mov rdx, rbx
mov WORD PTR 160[rsp], ax
call __memcpy_chk@PLT
lea rdx, 2[rbx]
mov rsi, r13
mov edi, r12d
call write@PLT
.L10:
mov rdx, QWORD PTR stdin[rip]
mov esi, 128
mov rdi, rbp
call fgets@PLT
test rax, rax
jne .L11
mov edi, r12d
call close@PLT
xor eax, eax
.L7:
mov rcx, QWORD PTR 296[rsp]
sub rcx, QWORD PTR fs:40
jne .L15
add rsp, 312
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
mov rdx, QWORD PTR [rsi]
mov edi, 1
lea rsi, .LC1[rip]
call __printf_chk@PLT
or eax, -1
jmp .L7
.L15:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE66:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001312.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "the other side has been closed.\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global readthread
.syntax unified
.arm
.fpu softvfp
.type readthread, %function
readthread:
@ args = 0, pretend = 0, frame = 144
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r3, .L7
sub sp, sp, #144
ldr r3, [r3]
str r3, [sp, #140]
mov r3,#0
mov r4, r0
bl pthread_self
bl pthread_detach
b .L3
.L2:
mov r0, #1
add r1, sp, #12
bl write
.L3:
mov r2, #128
mov r0, r4
add r1, sp, #12
bl read
subs r2, r0, #0
bne .L2
ldr r0, .L7+4
str r2, [sp, #4]
bl puts
mov r0, r4
bl close
ldr r2, [sp, #4]
mov r0, r2
bl exit
.L8:
.align 2
.L7:
.word .LC1
.word .LC0
.size readthread, .-readthread
.section .rodata.str1.4
.align 2
.LC2:
.ascii "usage:%s port\012\000"
.align 2
.LC3:
.ascii "127.0.0.1\000"
.section .rodata.cst4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 280
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L18
sub sp, sp, #284
cmp r0, #2
ldr r3, [r3]
str r3, [sp, #276]
mov r3,#0
bne .L16
mov r4, r0
mov r2, #10
ldr r0, [r1, #4]
mov r1, #0
bl strtol
mov r2, #0
mov r7, r0
mov r1, #1
mov r0, r4
bl socket
mov r6, #0
mov r5, r0
ldr r1, .L18+4
add r2, sp, #8
mov r0, r4
str r6, [sp, #4]
str r6, [sp, #8]
str r6, [sp, #12]
str r6, [sp, #16]
strh r4, [sp, #4] @ movhi
bl inet_pton
lsl r3, r7, #16
lsr r3, r3, #24
orr r3, r3, r7, lsl #8
mov r2, #16
add r1, sp, #4
mov r0, r5
strh r3, [sp, #6] @ movhi
bl connect
mov r1, r6
mov r3, r5
mov r0, sp
ldr r2, .L18+8
bl pthread_create
ldr r6, .L18+12
b .L12
.L13:
add r0, sp, #20
bl strlen
mov r4, r0
lsl ip, r0, #16
lsr ip, ip, #24
mov r2, r0
orr ip, ip, r0, lsl #8
add r1, sp, #20
mov r3, #126
add r0, sp, #150
strh ip, [sp, #148] @ movhi
bl __memcpy_chk
mov r0, r5
add r2, r4, #2
add r1, sp, #148
bl write
.L12:
mov r1, #128
ldr r2, [r6]
add r0, sp, #20
bl fgets
subs r4, r0, #0
bne .L13
mov r0, r5
bl close
mov r0, r4
.L9:
ldr r3, .L18
ldr r2, [r3]
ldr r3, [sp, #276]
eors r2, r3, r2
mov r3, #0
bne .L17
add sp, sp, #284
@ sp needed
pop {r4, r5, r6, r7, pc}
.L16:
ldr r2, [r1]
mov r0, #1
ldr r1, .L18+16
bl __printf_chk
mvn r0, #0
b .L9
.L17:
bl __stack_chk_fail
.L19:
.align 2
.L18:
.word .LC4
.word .LC3
.word readthread
.word stdin
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100132.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%lld"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea rsi, n[rip]
lea rdi, .LC0[rip]
xor eax, eax
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 40
.cfi_def_cfa_offset 96
call __isoc99_scanf@PLT
mov eax, DWORD PTR n[rip]
mov DWORD PTR i[rip], 0
test eax, eax
je .L2
xor eax, eax
lea r14, a[rip]
lea rbx, .LC0[rip]
.L3:
cdqe
mov rdi, rbx
lea rsi, [r14+rax*4]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR i[rip]
mov edx, DWORD PTR n[rip]
add eax, 1
mov DWORD PTR i[rip], eax
cmp eax, edx
jne .L3
mov rbx, QWORD PTR c[rip]
mov DWORD PTR 12[rsp], edx
mov DWORD PTR i[rip], 1
mov rcx, rbx
cmp edx, 1
jle .L5
mov ebp, DWORD PTR m[rip]
xor r8d, r8d
mov eax, DWORD PTR k[rip]
xor edx, edx
mov r13d, 1
lea r15, a[rip-4]
mov r11d, ebp
mov ebp, r8d
.L18:
lea ecx, -1[r13]
xor r9d, r9d
lea rdi, 4[0+rcx*4]
mov DWORD PTR 20[rsp], ecx
mov QWORD PTR 24[rsp], rdi
.p2align 4,,10
.p2align 3
.L17:
lea r12d, [r9+r13]
cmp DWORD PTR 12[rsp], r12d
jle .L6
test r13d, r13d
je .L9
movsx rax, r9d
mov rdx, QWORD PTR 24[rsp]
mov DWORD PTR 16[rsp], r9d
lea rdi, t[rip]
lea rsi, [r14+rax*4]
call memcpy@PLT
mov r9d, DWORD PTR 16[rsp]
.L9:
mov eax, DWORD PTR 12[rsp]
lea r11d, [r12+r13]
mov edx, DWORD PTR t[rip]
movsx rdi, r12d
lea r10, t[rip]
cmp r11d, eax
cmovg r11d, eax
add r9d, 1
xor ecx, ecx
movsx rax, r9d
jmp .L8
.p2align 4,,10
.p2align 3
.L33:
add ecx, 1
mov DWORD PTR [r15+rax*4], edx
cmp ecx, r13d
je .L11
movsx rdx, ecx
mov edx, DWORD PTR [r10+rdx*4]
.L15:
add rax, 1
.L8:
mov esi, DWORD PTR [r14+rdi*4]
mov r8d, eax
mov r9d, eax
cmp esi, edx
jge .L33
mov DWORD PTR [r15+rax*4], esi
mov esi, r13d
add r12d, 1
sub esi, ecx
movsx rsi, esi
add rbx, rsi
cmp r12d, r11d
je .L14
mov ebp, 1
movsx rdi, r12d
jmp .L15
.p2align 4,,10
.p2align 3
.L14:
cmp ecx, r13d
je .L24
movsx rax, r8d
mov edi, DWORD PTR 20[rsp]
lea rsi, [r14+rax*4]
movsx rax, ecx
lea r9, [r10+rax*4]
sub edi, ecx
xor eax, eax
jmp .L13
.p2align 4,,10
.p2align 3
.L34:
mov edx, DWORD PTR 4[r9+rax*4]
add rax, 1
.L13:
mov DWORD PTR [rsi+rax*4], edx
cmp rax, rdi
jne .L34
lea r9d, [r8+r13]
mov r12d, r11d
mov ebp, 1
sub r9d, ecx
.L11:
mov eax, r11d
mov edx, 1
sub eax, r12d
add r9d, eax
mov eax, r13d
cmp DWORD PTR 12[rsp], r9d
jg .L17
.L6:
add r13d, r13d
cmp DWORD PTR 12[rsp], r13d
jg .L18
mov r8d, ebp
mov DWORD PTR j[rip], r9d
mov ebp, r11d
test dl, dl
je .L19
mov DWORD PTR k[rip], eax
mov DWORD PTR l[rip], r12d
mov DWORD PTR i[rip], r13d
test r8b, r8b
je .L23
mov QWORD PTR c[rip], rbx
.L23:
mov DWORD PTR m[rip], ebp
mov rcx, QWORD PTR c[rip]
.L5:
mov rax, rcx
mov edi, 1
movabs rdx, -9223354444635176895
imul rdx
lea rax, [rdx+rcx]
mov rdx, rcx
sar rdx, 63
sar rax, 18
sub rax, rdx
mov rsi, rax
sal rsi, 19
sub rsi, rax
xor eax, eax
sub rcx, rsi
lea rsi, .LC1[rip]
mov rdx, rcx
call __printf_chk@PLT
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L19:
.cfi_restore_state
mov DWORD PTR l[rip], r12d
mov rcx, QWORD PTR c[rip]
mov DWORD PTR i[rip], r13d
test r8b, r8b
je .L5
mov QWORD PTR c[rip], rbx
mov rcx, rbx
jmp .L5
.L2:
mov DWORD PTR i[rip], 1
mov rcx, QWORD PTR c[rip]
jmp .L5
.L24:
mov ebp, 1
jmp .L11
.cfi_endproc
.LFE23:
.size main, .-main
.globl c
.bss
.align 8
.type c, @object
.size c, 8
c:
.zero 8
.globl m
.align 4
.type m, @object
.size m, 4
m:
.zero 4
.globl l
.align 4
.type l, @object
.size l, 4
l:
.zero 4
.globl k
.align 4
.type k, @object
.size k, 4
k:
.zero 4
.globl j
.align 4
.type j, @object
.size j, 4
j:
.zero 4
.globl i
.align 4
.type i, @object
.size i, 4
i:
.zero 4
.globl t
.align 32
.type t, @object
.size t, 40000000
t:
.zero 40000000
.globl a
.align 32
.type a, @object
.size a, 40000000
a:
.zero 40000000
.globl n
.align 4
.type n, @object
.size n, 4
n:
.zero 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100132.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.global __aeabi_ldivmod
.align 2
.LC1:
.ascii "%lld\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r4, .L36
ldr r0, .L36+4
mov r1, r4
sub sp, sp, #20
bl __isoc99_scanf
mov r1, #0
ldr r3, [r4]
cmp r3, r1
ldr r3, .L36+8
str r1, [r3]
beq .L2
ldr r5, .L36+12
ldr r6, .L36+4
.L3:
add r1, r5, r1, lsl #2
mov r0, r6
bl __isoc99_scanf
ldr r2, .L36+8
ldr r3, [r4]
ldr r1, [r2]
add r1, r1, #1
cmp r1, r3
str r1, [r2]
bne .L3
mov lr, #1
ldr r2, .L36+16
str r3, [sp, #8]
cmp r3, lr
ldr r3, .L36+8
str r2, [sp, #12]
str lr, [r3]
ldmia r2, {r10-fp}
ble .L5
mov r1, #0
ldr r3, .L36+20
ldr r9, .L36+24
ldr r8, [r3]
ldr r3, .L36+28
ldr r6, .L36+32
ldr r2, [r3]
str r1, [sp, #4]
.L19:
mov r3, #0
add r7, r9, lr, lsl #2
.L18:
ldr ip, [sp, #8]
add r0, r3, lr
cmp ip, r0
ble .L6
cmp lr, #0
movne r2, r9
addne r1, r5, r3, lsl #2
beq .L10
.L9:
ldr ip, [r1], #4
str ip, [r2], #4
cmp r7, r2
bne .L9
.L10:
ldr r2, [sp, #8]
add r8, r0, lr
cmp r8, r2
movge r8, r2
mov r2, #0
ldr r1, [r9]
.L8:
ldr ip, [r5, r0, lsl #2]
sub r4, lr, r2
cmp ip, r1
add r3, r3, #1
blt .L11
add r2, r2, #1
cmp r2, lr
str r1, [r6, r3, lsl #2]
beq .L12
ldr r1, [r9, r2, lsl #2]
b .L8
.L11:
adds r10, r10, r4
add r0, r0, #1
adc fp, fp, r4, asr #31
cmp r0, r8
str ip, [r6, r3, lsl #2]
lsl r4, r3, #2
beq .L15
mov ip, #1
str ip, [sp, #4]
b .L8
.L26:
mov r1, #1
str r1, [sp, #4]
.L12:
sub r1, r8, r0
add r3, r3, r1
ldr r1, [sp, #8]
cmp r1, r3
mov r1, #1
bgt .L18
.L6:
ldr ip, [sp, #8]
lsl lr, lr, #1
cmp ip, lr
bgt .L19
ldr ip, .L36+36
cmp r1, #0
str r3, [ip]
ldr r3, .L36+40
beq .L20
ldr r1, [sp, #4]
str r0, [r3]
cmp r1, #0
ldr r1, .L36+28
str r2, [r1]
ldr r2, .L36+8
str lr, [r2]
ldrne r3, [sp, #12]
stmne r3, {r10-fp}
.L24:
ldr r3, .L36+20
str r8, [r3]
.L5:
ldr r1, [sp, #12]
mov r3, #0
ldmia r1, {r0-r1}
ldr r2, .L36+44
bl __aeabi_ldivmod
ldr r1, .L36+48
mov r0, #1
bl __printf_chk
mov r0, #0
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L15:
cmp r2, lr
beq .L26
add ip, r2, #1
add r0, r5, r4
add ip, r9, ip, lsl #2
b .L14
.L35:
ldr r1, [ip], #4
.L14:
cmp r7, ip
str r1, [r0], #4
bne .L35
mov r1, #1
add r3, r3, lr
sub r3, r3, r2
mov r0, r8
mov r2, lr
str r1, [sp, #4]
b .L12
.L20:
ldr r2, [sp, #4]
str r0, [r3]
cmp r2, #0
ldr r2, .L36+8
str lr, [r2]
ldrne r3, [sp, #12]
stmne r3, {r10-fp}
b .L5
.L2:
mov r3, #1
ldr r2, .L36+16
str r2, [sp, #12]
ldr r2, .L36+8
str r3, [r2]
b .L5
.L37:
.align 2
.L36:
.word n
.word .LC0
.word i
.word a
.word c
.word m
.word t
.word k
.word a-4
.word j
.word l
.word 524287
.word .LC1
.size main, .-main
.comm c,8,8
.comm m,4,4
.comm l,4,4
.comm k,4,4
.comm j,4,4
.comm i,4,4
.comm t,40000000,4
.comm a,40000000,4
.comm n,4,4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001323.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "LISTA DE EXERCICOS (PONTEIROS) - QUESTAO 10 \n"
.align 8
.LC1:
.string "A) x for declarado como char: x -> %d; x + 1 -> %d; x + 2 -> %d; x + 3 -> %d\n"
.align 8
.LC2:
.string "B) x for declarado como int: x -> %d; x + 1 -> %d; x + 2 -> %d; x + 3 -> %d\n"
.align 8
.LC3:
.string "C) x for declarado como float: x -> %d; x + 1 -> %d; x + 2 -> %d; x + 3 -> %d\n"
.align 8
.LC4:
.string "D) x for declarado como double: x -> %d; x + 1 -> %d; x + 2 -> %d; x + 3 -> %d\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC5:
.string "\nDEMONSTRACAO\n"
.section .rodata.str1.8
.align 8
.LC6:
.string "B) x for declarado como int (Obs.: variavel do tipo int ocupa 4 bytes): x -> %d; x + 1 -> %d; x + 2 -> %d; x + 3 -> %d\n"
.section .rodata.str1.1
.LC7:
.string "pause"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 88
.cfi_def_cfa_offset 96
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 72[rsp], rax
xor eax, eax
call puts@PLT
mov r9d, 4095
mov r8d, 4094
mov ecx, 4093
mov edx, 4092
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov r9d, 4098
mov r8d, 4096
mov ecx, 4094
mov edx, 4092
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov r9d, 4104
mov r8d, 4100
mov ecx, 4096
mov edx, 4092
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov r9d, 4116
mov r8d, 4108
mov ecx, 4100
mov edx, 4092
lea rsi, .LC4[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rdi, .LC5[rip]
call puts@PLT
lea rdx, 68[rsp]
lea rcx, 69[rsp]
mov edi, 1
lea r9, 71[rsp]
lea r8, 70[rsp]
xor eax, eax
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov rdx, rsp
lea rcx, 4[rsp]
xor eax, eax
lea r9, 12[rsp]
lea r8, 8[rsp]
mov edi, 1
lea rsi, .LC6[rip]
call __printf_chk@PLT
lea rdx, 16[rsp]
lea rcx, 20[rsp]
mov edi, 1
lea r9, 28[rsp]
lea r8, 24[rsp]
xor eax, eax
lea rsi, .LC3[rip]
call __printf_chk@PLT
mov edi, 1
xor eax, eax
lea rdx, 32[rsp]
lea rcx, 40[rsp]
lea r9, 56[rsp]
lea r8, 48[rsp]
lea rsi, .LC4[rip]
call __printf_chk@PLT
lea rdi, .LC7[rip]
call system@PLT
mov rax, QWORD PTR 72[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 88
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001323.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "LISTA DE EXERCICOS (PONTEIROS) - QUESTAO 10 \012\000"
.align 2
.LC1:
.ascii "A) x for declarado como char: x -> %d; x + 1 -> %d;"
.ascii " x + 2 -> %d; x + 3 -> %d\012\000"
.align 2
.LC2:
.ascii "B) x for declarado como int: x -> %d; x + 1 -> %d; "
.ascii "x + 2 -> %d; x + 3 -> %d\012\000"
.align 2
.LC3:
.ascii "C) x for declarado como float: x -> %d; x + 1 -> %d"
.ascii "; x + 2 -> %d; x + 3 -> %d\012\000"
.align 2
.LC4:
.ascii "D) x for declarado como double: x -> %d; x + 1 -> %"
.ascii "d; x + 2 -> %d; x + 3 -> %d\012\000"
.align 2
.LC5:
.ascii "\012DEMONSTRACAO\012\000"
.align 2
.LC6:
.ascii "B) x for declarado como int (Obs.: variavel do tipo"
.ascii " int ocupa 4 bytes): x -> %d; x + 1 -> %d; x + 2 ->"
.ascii " %d; x + 3 -> %d\012\000"
.align 2
.LC7:
.ascii "pause\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC8:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
mov r5, #4096
ldr r3, .L6
sub sp, sp, #84
ldr r0, .L6+4
ldr r4, .L6+8
ldr r3, [r3]
str r3, [sp, #76]
mov r3,#0
bl puts
ldr r3, .L6+12
ldr r2, .L6+16
ldr r1, .L6+20
str r4, [sp]
str r3, [sp, #4]
mov r0, #1
sub r3, r3, #2
bl __printf_chk
ldr r2, .L6+24
mov r3, r4
ldr r1, .L6+28
str r2, [sp, #4]
mov r0, #1
sub r2, r2, #6
str r5, [sp]
bl __printf_chk
ldr r2, .L6+32
add r4, r4, #6
mov r3, r5
ldr r1, .L6+36
str r2, [sp, #4]
mov r0, #1
sub r2, r2, #12
str r4, [sp]
bl __printf_chk
ldr r1, .L6+40
ldr r2, .L6+44
mov r3, r4
str r1, [sp, #4]
str r2, [sp]
ldr r1, .L6+48
sub r2, r2, #16
mov r0, #1
bl __printf_chk
ldr r0, .L6+52
bl puts
add r2, sp, #75
add r3, sp, #74
ldr r1, .L6+20
str r2, [sp, #4]
str r3, [sp]
add r2, sp, #72
add r3, sp, #73
mov r0, #1
bl __printf_chk
add r2, sp, #20
add r3, sp, #16
ldr r1, .L6+56
str r2, [sp, #4]
str r3, [sp]
add r2, sp, #8
add r3, sp, #12
mov r0, #1
bl __printf_chk
add r2, sp, #36
add r3, sp, #32
ldr r1, .L6+36
str r2, [sp, #4]
str r3, [sp]
add r2, sp, #24
add r3, sp, #28
mov r0, #1
bl __printf_chk
add r2, sp, #64
add r3, sp, #56
ldr r1, .L6+48
str r2, [sp, #4]
str r3, [sp]
add r2, sp, #40
add r3, sp, #48
mov r0, #1
bl __printf_chk
ldr r0, .L6+60
bl system
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #76]
eors r2, r3, r2
mov r3, #0
bne .L5
add sp, sp, #84
@ sp needed
pop {r4, r5, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC8
.word .LC0
.word 4094
.word 4095
.word 4092
.word .LC1
.word 4098
.word .LC2
.word 4104
.word .LC3
.word 4116
.word 4108
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100133.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Color 1a"
.LC1:
.string "Dizinin boyutunu gir: "
.LC2:
.string "%u"
.LC3:
.string "\n\tSAYI DIZISI:\n\t"
.LC4:
.string "%d "
.LC5:
.string "\n\n\tKARAKTER DIZISI:\n\t"
.LC6:
.string "%c "
.LC7:
.string "\n"
.LC8:
.string "PAUSE"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
lea rdi, .LC0[rip]
mov rbp, rsp
.cfi_def_cfa_register 6
push r13
push r12
push rbx
sub rsp, 24
.cfi_offset 13, -24
.cfi_offset 12, -32
.cfi_offset 3, -40
mov rax, QWORD PTR fs:40
mov QWORD PTR -40[rbp], rax
xor eax, eax
call system@PLT
xor edi, edi
call time@PLT
mov rdi, rax
call srand@PLT
lea rsi, .LC1[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, -44[rbp]
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR -44[rbp]
mov rdx, rsp
lea rax, 15[0+rax*4]
shr rax, 4
sal rax, 4
mov rcx, rax
and rcx, -4096
sub rdx, rcx
cmp rsp, rdx
je .L3
.L17:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rdx
jne .L17
.L3:
and eax, 4095
sub rsp, rax
test rax, rax
jne .L18
.L4:
xor eax, eax
lea rsi, .LC3[rip]
mov edi, 1
mov r12, rsp
call __printf_chk@PLT
cmp DWORD PTR -44[rbp], 0
je .L5
mov ebx, 1
lea r13, .LC4[rip]
.p2align 4,,10
.p2align 3
.L6:
call rand@PLT
mov rsi, r13
mov edi, 1
movsx rdx, eax
mov ecx, eax
imul rdx, rdx, 1374389535
sar ecx, 31
sar rdx, 37
sub edx, ecx
imul ecx, edx, 100
sub eax, ecx
mov edx, eax
mov eax, ebx
add ebx, 1
mov DWORD PTR [r12+rax*4], edx
xor eax, eax
call __printf_chk@PLT
cmp DWORD PTR -44[rbp], ebx
jnb .L6
.L5:
lea rsi, .LC5[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov eax, DWORD PTR -44[rbp]
test eax, eax
je .L7
mov ebx, 1
lea r13, .LC6[rip]
.p2align 4,,10
.p2align 3
.L8:
mov eax, ebx
mov rsi, r13
mov edi, 1
add ebx, 1
movsx edx, BYTE PTR [r12+rax*4]
xor eax, eax
call __printf_chk@PLT
cmp DWORD PTR -44[rbp], ebx
jnb .L8
.L7:
lea rdi, .LC7[rip]
call puts@PLT
lea rdi, .LC8[rip]
call system@PLT
mov rax, QWORD PTR -40[rbp]
sub rax, QWORD PTR fs:40
jne .L19
lea rsp, -24[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L18:
.cfi_restore_state
or QWORD PTR -8[rsp+rax], 0
jmp .L4
.L19:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100133.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Color 1a\000"
.align 2
.LC1:
.ascii "Dizinin boyutunu gir: \000"
.align 2
.LC2:
.ascii "%u\000"
.align 2
.LC3:
.ascii "\012\011SAYI DIZISI:\012\011\000"
.align 2
.LC4:
.ascii "%d \000"
.align 2
.LC5:
.ascii "\012\012\011KARAKTER DIZISI:\012\011\000"
.align 2
.LC6:
.ascii "%c \000"
.align 2
.LC7:
.ascii "\012\000"
.align 2
.LC8:
.ascii "PAUSE\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC9:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, fp, lr}
add fp, sp, #24
sub sp, sp, #12
ldr r3, .L18
ldr r0, .L18+4
ldr r3, [r3]
str r3, [fp, #-32]
mov r3,#0
bl system
mov r0, #0
bl time
bl srand
ldr r1, .L18+8
mov r0, #1
bl __printf_chk
sub r1, fp, #36
ldr r0, .L18+12
bl __isoc99_scanf
ldr r3, [fp, #-36]
mov r0, #1
lsl r3, r3, #2
add r3, r3, #7
bic r3, r3, #7
sub sp, sp, r3
ldr r1, .L18+16
bl __printf_chk
ldr r3, [fp, #-36]
mov r4, sp
cmp r3, #0
beq .L2
mov r5, r4
mov r8, #1
ldr r7, .L18+20
ldr r6, .L18+24
.L3:
bl rand
smull r2, r3, r7, r0
asr r2, r0, #31
rsb r2, r2, r3, asr #5
add r2, r2, r2, lsl #2
add r2, r2, r2, lsl #2
sub r2, r0, r2, lsl #2
mov r1, r6
mov r0, #1
str r2, [r5, #4]!
bl __printf_chk
ldr r3, [fp, #-36]
add r8, r8, #1
cmp r3, r8
bcs .L3
.L2:
mov r0, #1
ldr r1, .L18+28
bl __printf_chk
ldr r3, [fp, #-36]
cmp r3, #0
beq .L4
mov r5, #1
ldr r6, .L18+32
.L5:
ldr r2, [r4, #4]!
mov r1, r6
mov r0, #1
and r2, r2, #255
bl __printf_chk
ldr r3, [fp, #-36]
add r5, r5, #1
cmp r3, r5
bcs .L5
.L4:
ldr r0, .L18+36
bl puts
ldr r0, .L18+40
bl system
ldr r3, .L18
ldr r2, [r3]
ldr r3, [fp, #-32]
eors r2, r3, r2
mov r3, #0
bne .L17
mov r0, #0
sub sp, fp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, fp, pc}
.L17:
bl __stack_chk_fail
.L19:
.align 2
.L18:
.word .LC9
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word 1374389535
.word .LC4
.word .LC5
.word .LC6
.word .LC7
.word .LC8
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001346.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "digite o numero:"
.LC2:
.string "%f"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "vetor dividido pelo maior numero %.2f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
pxor xmm1, xmm1
lea r13, .LC1[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 104
.cfi_def_cfa_offset 144
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
lea rbp, 16[rsp]
lea r12, 76[rsp]
mov rbx, rbp
.p2align 4,,10
.p2align 3
.L4:
mov rsi, r13
mov edi, 1
xor eax, eax
movss DWORD PTR 12[rsp], xmm1
call __printf_chk@PLT
mov rsi, rbx
lea rdi, .LC2[rip]
xor eax, eax
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR [rbx]
movss xmm1, DWORD PTR 12[rsp]
add rbx, 4
maxss xmm0, xmm1
movaps xmm1, xmm0
cmp rbx, r12
jne .L4
mov rax, rbp
.p2align 4,,10
.p2align 3
.L5:
movss xmm0, DWORD PTR [rax]
add rax, 4
divss xmm0, xmm1
movss DWORD PTR -4[rax], xmm0
cmp rax, r12
jne .L5
lea rbx, .LC3[rip]
.p2align 4,,10
.p2align 3
.L6:
pxor xmm0, xmm0
mov rsi, rbx
mov edi, 1
add rbp, 4
mov eax, 1
cvtss2sd xmm0, DWORD PTR -4[rbp]
call __printf_chk@PLT
cmp rbp, r12
jne .L6
mov rax, QWORD PTR 88[rsp]
sub rax, QWORD PTR fs:40
jne .L14
add rsp, 104
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001346.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "digite o numero:\000"
.align 2
.LC1:
.ascii "%f\000"
.global __aeabi_fcmpgt
.global __aeabi_fdiv
.global __aeabi_f2d
.align 2
.LC2:
.ascii "vetor dividido pelo maior numero %.2f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
sub sp, sp, #64
mov r5, sp
ldr r3, .L15
mov r4, r5
ldr r3, [r3]
str r3, [sp, #60]
mov r3,#0
mov r7, #0
ldr r10, .L15+4
ldr r9, .L15+8
add r6, sp, #60
.L4:
mov r1, r10
mov r0, #1
bl __printf_chk
mov r1, r4
mov r0, r9
bl __isoc99_scanf
ldr r8, [r4], #4 @ float
mov r1, r7
mov r0, r8
bl __aeabi_fcmpgt
cmp r0, #0
movne r7, r8
cmp r4, r6
bne .L4
mov r4, r5
.L5:
ldr r0, [r4] @ float
mov r1, r7
bl __aeabi_fdiv
str r0, [r4], #4 @ float
cmp r4, r6
bne .L5
ldr r4, .L15+12
.L6:
ldr r0, [r5], #4 @ float
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, #1
mov r1, r4
bl __printf_chk
cmp r5, r6
bne .L6
ldr r3, .L15
ldr r2, [r3]
ldr r3, [sp, #60]
eors r2, r3, r2
mov r3, #0
bne .L14
mov r0, #0
add sp, sp, #64
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L14:
bl __stack_chk_fail
.L16:
.align 2
.L15:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001349.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Usage: ./lab2.5.2 <address> <port>\n"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Value of errno: %d.\n"
.LC2:
.string "String related to errno %s.\n"
.LC3:
.string "%d bytes from %s:%s\n"
.LC4:
.string "%H:%M:%S %p"
.LC5:
.string "%Y-%m-%d"
.LC6:
.string "Command not supported %s\n"
.LC7:
.string "Exiting..."
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB54:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov r8d, edi
mov ecx, 126
pxor xmm0, xmm0
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
lea rdi, -1072[rbp]
push r13
push r12
push rbx
sub rsp, 1576
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
movups XMMWORD PTR -1344[rbp], xmm0
mov DWORD PTR -1572[rbp], 128
movups XMMWORD PTR -1328[rbp], xmm0
movups XMMWORD PTR -1312[rbp], xmm0
movups XMMWORD PTR -1296[rbp], xmm0
movups XMMWORD PTR -1280[rbp], xmm0
rep stosq
movups XMMWORD PTR -1264[rbp], xmm0
movups XMMWORD PTR -1248[rbp], xmm0
movups XMMWORD PTR -1232[rbp], xmm0
movups XMMWORD PTR -1216[rbp], xmm0
movups XMMWORD PTR -1200[rbp], xmm0
movups XMMWORD PTR -1184[rbp], xmm0
mov BYTE PTR [rdi], 0
movups XMMWORD PTR -1168[rbp], xmm0
movups XMMWORD PTR -1152[rbp], xmm0
movups XMMWORD PTR -1136[rbp], xmm0
movups XMMWORD PTR -1120[rbp], xmm0
movups XMMWORD PTR -1104[rbp], xmm0
movups XMMWORD PTR -1088[rbp], xmm0
movups XMMWORD PTR -1376[rbp], xmm0
movups XMMWORD PTR -1360[rbp], xmm0
cmp r8d, 3
je .L2
mov rcx, QWORD PTR stderr[rip]
mov edx, 35
mov esi, 1
lea rdi, .LC0[rip]
call fwrite@PLT
xor edi, edi
call _exit@PLT
.L2:
mov r8, QWORD PTR 16[rsi]
mov rdi, QWORD PTR 8[rsi]
lea rcx, -1568[rbp]
lea rdx, -1552[rbp]
mov QWORD PTR -1552[rbp], 0
mov DWORD PTR -1544[rbp], 2
mov rsi, r8
call getaddrinfo@PLT
add eax, 1
je .L16
mov rax, QWORD PTR -1568[rbp]
xor edx, edx
mov esi, DWORD PTR 8[rax]
mov edi, DWORD PTR 4[rax]
call socket@PLT
mov r13d, eax
cmp eax, -1
je .L16
mov rax, QWORD PTR -1568[rbp]
mov edi, r13d
mov edx, DWORD PTR 16[rax]
mov rsi, QWORD PTR 24[rax]
call bind@PLT
add eax, 1
je .L16
lea rax, -1572[rbp]
lea rbx, -1504[rbp]
mov QWORD PTR -1600[rbp], rax
lea rax, -1088[rbp]
lea r15, -1344[rbp]
mov QWORD PTR -1592[rbp], rax
lea rax, -1560[rbp]
lea r12, -1376[rbp]
mov QWORD PTR -1608[rbp], rax
.p2align 4,,10
.p2align 3
.L5:
mov r9, QWORD PTR -1600[rbp]
mov r8, rbx
xor ecx, ecx
mov rsi, r15
mov edx, 256
mov edi, r13d
call recvfrom@PLT
sub rsp, 8
mov r8, r12
mov rdi, rbx
push 3
mov esi, DWORD PTR -1572[rbp]
mov r14, rax
lea eax, -1[rax]
mov rdx, QWORD PTR -1592[rbp]
cdqe
mov r9d, 32
mov ecx, 1025
mov BYTE PTR -1344[rbp+rax], 0
call getnameinfo@PLT
mov r8, r12
mov edx, r14d
mov edi, 1
mov rcx, QWORD PTR -1592[rbp]
lea rsi, .LC3[rip]
xor eax, eax
call __printf_chk@PLT
movzx eax, BYTE PTR [r15]
sub eax, 116
jne .L6
movzx eax, BYTE PTR 1[r15]
.L6:
pop rdx
pop rcx
test eax, eax
je .L21
cmp BYTE PTR [r15], 100
jne .L10
cmp BYTE PTR 1[r15], 0
jne .L10
mov r14, QWORD PTR -1608[rbp]
mov rdi, r14
call time@PLT
mov rdi, r14
call localtime@PLT
lea rdx, .LC5[rip]
mov rcx, rax
.L18:
mov rdi, r15
mov esi, 256
call strftime@PLT
mov r8, rbx
xor ecx, ecx
mov rsi, r15
mov BYTE PTR -1344[rbp+rax], 0
mov rdx, rax
mov edi, r13d
mov r9d, DWORD PTR -1572[rbp]
call sendto@PLT
jmp .L5
.L16:
call __errno_location@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC1[rip]
mov ecx, DWORD PTR [rax]
mov rbx, rax
xor eax, eax
call __fprintf_chk@PLT
mov edi, DWORD PTR [rbx]
call strerror@PLT
mov rdi, QWORD PTR stderr[rip]
mov esi, 1
lea rdx, .LC2[rip]
mov rcx, rax
xor eax, eax
call __fprintf_chk@PLT
xor edi, edi
call _exit@PLT
.p2align 4,,10
.p2align 3
.L10:
cmp BYTE PTR [r15], 113
jne .L14
cmp BYTE PTR 1[r15], 0
je .L12
.L14:
mov rdx, r15
lea rsi, .LC6[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
jmp .L5
.p2align 4,,10
.p2align 3
.L21:
mov r14, QWORD PTR -1608[rbp]
mov rdi, r14
call time@PLT
mov rdi, r14
call localtime@PLT
lea rdx, .LC4[rip]
mov rcx, rax
jmp .L18
.L12:
mov edi, r13d
call close@PLT
lea rdi, .LC7[rip]
call puts@PLT
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L22
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L22:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE54:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001349.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Usage: ./lab2.5.2 <address> <port>\012\000"
.align 2
.LC1:
.ascii "Value of errno: %d.\012\000"
.align 2
.LC2:
.ascii "String related to errno %s.\012\000"
.align 2
.LC3:
.ascii "%d bytes from %s:%s\012\000"
.align 2
.LC4:
.ascii "%H:%M:%S %p\000"
.align 2
.LC5:
.ascii "%Y-%m-%d\000"
.align 2
.LC6:
.ascii "Command not supported %s\012\000"
.align 2
.LC7:
.ascii "Exiting...\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC8:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 1496
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r4, #0
sub sp, sp, #1504
sub sp, sp, #12
ldr r3, .L22
mov r5, r0
mov r2, #252
mov r6, r1
add r0, sp, #228
mov r1, r4
ldr r3, [r3]
str r3, [sp, #1508]
mov r3,#0
str r4, [sp, #224]
bl memset
ldr r2, .L22+4
mov r1, r4
add r0, sp, #484
str r4, [sp, #480]
bl memset
mov r2, #128
add r3, sp, #200
str r4, [r3], #-4
cmp r5, #3
str r4, [sp, #192]
str r4, [sp, #196]
str r4, [r3, #8]
str r4, [r3, #12]
str r4, [r3, #16]
str r4, [r3, #20]
str r4, [r3, #24]
str r2, [sp, #24]
beq .L2
ldr r3, .L22+8
mov r2, #35
mov r1, #1
ldr r3, [r3]
ldr r0, .L22+12
bl fwrite
mov r0, r4
bl _exit
.L2:
mov ip, #2
ldmib r6, {r0, r1}
add r8, sp, #24
sub r3, r8, #4
add r2, sp, #32
str r4, [sp, #32]
str r4, [sp, #36]
str ip, [sp, #40]
bl getaddrinfo
cmn r0, #1
beq .L16
ldr r3, [sp, #20]
mov r2, r4
ldmib r3, {r0, r1}
bl socket
cmn r0, #1
mov r7, r0
beq .L16
ldr r3, [sp, #20]
ldr r2, [r3, #16]
ldr r1, [r3, #20]
bl bind
cmn r0, #1
beq .L16
ldr r9, .L22+16
ldr r10, .L22+20
ldr fp, .L22+24
add r5, sp, #64
add r6, sp, #192
.L5:
mov r3, #0
mov r2, #256
add r1, sp, #224
mov r0, r7
stm sp, {r5, r8}
bl recvfrom
mov ip, #0
mov r2, #3
mov r3, #32
mov r4, r0
add r1, sp, #1504
add r1, r1, #8
add r0, r1, r0
str r2, [sp, #8]
str r3, [sp, #4]
ldr r1, [sp, #24]
ldr r3, .L22+28
str r6, [sp]
add r2, sp, #480
strb ip, [r0, #-1289]
mov r0, r5
bl getnameinfo
add r3, sp, #480
mov r2, r4
mov r1, r9
mov r0, #1
str r6, [sp]
bl __printf_chk
ldrb r3, [sp, #224] @ zero_extendqisi2
cmp r3, #116
bne .L7
ldrb r4, [sp, #225] @ zero_extendqisi2
cmp r4, #0
bne .L7
add r0, sp, #28
bl time
add r0, sp, #28
bl localtime
mov r2, fp
mov r3, r0
.L18:
mov r1, #256
add r0, sp, #224
bl strftime
add r3, sp, #1504
ldr r1, [sp, #24]
add r3, r3, #8
add ip, r3, r0
str r1, [sp, #4]
mov r2, r0
str r5, [sp]
mov r3, r4
mov r0, r7
add r1, sp, #224
strb r4, [ip, #-1288]
bl sendto
b .L5
.L16:
bl __errno_location
mov r5, r0
ldr r6, .L22+8
ldr r3, [r0]
mov r1, #1
ldr r2, .L22+32
ldr r0, [r6]
bl __fprintf_chk
ldr r0, [r5]
ldr r6, [r6]
bl strerror
mov r1, #1
mov r3, r0
ldr r2, .L22+36
mov r0, r6
bl __fprintf_chk
mov r0, r4
bl _exit
.L7:
ldrb r3, [sp, #224] @ zero_extendqisi2
cmp r3, #100
bne .L10
ldrb r4, [sp, #225] @ zero_extendqisi2
cmp r4, #0
bne .L10
add r0, sp, #28
bl time
add r0, sp, #28
bl localtime
ldr r2, .L22+40
mov r3, r0
b .L18
.L10:
ldrb r3, [sp, #224] @ zero_extendqisi2
cmp r3, #113
bne .L14
ldrb r4, [sp, #225] @ zero_extendqisi2
cmp r4, #0
beq .L12
.L14:
mov r1, r10
add r2, sp, #224
mov r0, #1
bl __printf_chk
b .L5
.L12:
mov r0, r7
bl close
ldr r0, .L22+44
bl puts
ldr r3, .L22
ldr r2, [r3]
ldr r3, [sp, #1508]
eors r2, r3, r2
mov r3, #0
bne .L21
mov r0, r4
add sp, sp, #1504
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L21:
bl __stack_chk_fail
.L23:
.align 2
.L22:
.word .LC8
.word 1021
.word stderr
.word .LC0
.word .LC3
.word .LC6
.word .LC4
.word 1025
.word .LC1
.word .LC2
.word .LC5
.word .LC7
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001359.c"
.intel_syntax noprefix
.text
.p2align 4
.globl foo
.type foo, @function
foo:
.LFB0:
.cfi_startproc
endbr64
mov eax, 1
ret
.cfi_endproc
.LFE0:
.size foo, .-foo
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB1:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov esi, 1
lea rdi, .LC0[rip]
xor eax, eax
call printf@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE1:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001359.c"
.text
.align 2
.global foo
.syntax unified
.arm
.fpu softvfp
.type foo, %function
foo:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #1
bx lr
.size foo, .-foo
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r1, #1
push {r4, lr}
ldr r0, .L5
bl printf
mov r0, #0
pop {r4, pc}
.L6:
.align 2
.L5:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100136.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d = %d*%d + %d\n"
.text
.p2align 4
.globl mcd
.type mcd, @function
mcd:
.LFB39:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
mov r10d, edi
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
test esi, esi
je .L4
mov r12d, esi
lea rbx, .LC0[rip]
jmp .L3
.p2align 4,,10
.p2align 3
.L5:
mov r12d, r13d
.L3:
mov eax, r10d
mov ecx, r12d
mov rsi, rbx
mov edi, 1
cdq
idiv r12d
mov r8d, eax
mov r9d, edx
mov r13d, edx
xor eax, eax
mov edx, r10d
call __printf_chk@PLT
mov r10d, r12d
test r13d, r13d
jne .L5
mov eax, r12d
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L4:
.cfi_restore_state
mov r12d, edi
pop rbx
.cfi_def_cfa_offset 24
mov eax, r12d
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size mcd, .-mcd
.section .rodata.str1.1
.LC1:
.string "Usage: MCD [a] [b]"
.LC2:
.string "MCD = +inf"
.LC3:
.string "\nMCD = {%d, %d}\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB40:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
cmp edi, 2
jle .L13
mov rdi, QWORD PTR 8[rsi]
mov rbp, rsi
mov edx, 10
xor esi, esi
call strtol@PLT
mov rdi, QWORD PTR 16[rbp]
xor esi, esi
mov edx, 10
mov rbx, rax
call strtol@PLT
mov edi, ebx
mov rsi, rax
mov eax, ebx
sar eax, 31
xor edi, eax
sub edi, eax
mov eax, esi
sar eax, 31
mov r12d, edi
xor esi, eax
sub esi, eax
or r12d, esi
je .L14
call mcd
lea rsi, .LC3[rip]
mov edi, 1
xor r12d, r12d
mov ecx, eax
mov edx, eax
xor eax, eax
neg ecx
call __printf_chk@PLT
.L8:
mov eax, r12d
pop rbx
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L14:
.cfi_restore_state
lea rdi, .LC2[rip]
call puts@PLT
jmp .L8
.L13:
lea rdi, .LC1[rip]
mov r12d, 1
call puts@PLT
jmp .L8
.cfi_endproc
.LFE40:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100136.c"
.text
.global __aeabi_idivmod
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d = %d*%d + %d\012\000"
.text
.align 2
.global mcd
.syntax unified
.arm
.fpu softvfp
.type mcd, %function
mcd:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
subs r5, r1, #0
mov r6, r0
sub sp, sp, #12
beq .L4
ldr r7, .L8
b .L3
.L5:
mov r5, r4
.L3:
mov r0, r6
mov r1, r5
bl __aeabi_idivmod
mov r4, r1
mov r2, r6
stm sp, {r0, r4}
mov r3, r5
mov r1, r7
mov r0, #1
bl __printf_chk
cmp r4, #0
mov r6, r5
bne .L5
mov r0, r5
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L4:
mov r5, r0
mov r0, r5
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L9:
.align 2
.L8:
.word .LC0
.size mcd, .-mcd
.section .rodata.str1.4
.align 2
.LC1:
.ascii "Usage: MCD [a] [b]\000"
.align 2
.LC2:
.ascii "MCD = +inf\000"
.align 2
.LC3:
.ascii "\012MCD = {%d, %d}\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
cmp r0, #2
sub sp, sp, #12
ble .L21
mov r4, r1
mov r2, #10
mov r1, #0
ldr r0, [r4, #4]
bl strtol
mov r2, #10
mov r5, r0
mov r1, #0
ldr r0, [r4, #8]
bl strtol
cmp r5, #0
eor r6, r0, r0, asr #31
rsblt r5, r5, #0
sub r6, r6, r0, asr #31
orrs r4, r5, r6
beq .L22
cmp r0, #0
beq .L14
ldr r7, .L23
b .L15
.L16:
mov r6, r4
.L15:
mov r0, r5
mov r1, r6
bl __aeabi_idivmod
mov r4, r1
mov r2, r5
stm sp, {r0, r4}
mov r3, r6
mov r1, r7
mov r0, #1
bl __printf_chk
cmp r4, #0
mov r5, r6
bne .L16
.L14:
mov r2, r5
mov r0, #1
ldr r1, .L23+4
rsb r3, r5, #0
bl __printf_chk
mov r4, #0
.L10:
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L22:
ldr r0, .L23+8
bl puts
b .L10
.L21:
ldr r0, .L23+12
bl puts
mov r4, #1
b .L10
.L24:
.align 2
.L23:
.word .LC0
.word .LC3
.word .LC2
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001379.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001379.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100138.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100138.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001380.c"
.intel_syntax noprefix
.text
.p2align 4
.globl err_handler
.type err_handler, @function
err_handler:
.LFB64:
.cfi_startproc
endbr64
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
sub rsp, 8
.cfi_def_cfa_offset 16
mov rsi, QWORD PTR stderr[rip]
call fputs@PLT
mov rsi, QWORD PTR stderr[rip]
mov edi, 10
call fputc@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE64:
.size err_handler, .-err_handler
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Usage:%s <port>\n"
.LC1:
.string "bind() error"
.LC2:
.string "listen() error"
.LC3:
.string "accept() error"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB65:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rsi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
sub rsp, 96
.cfi_def_cfa_offset 128
movdqa xmm0, XMMWORD PTR .LC4[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
mov DWORD PTR 72[rsp], 169967207
movabs rax, 7956010533280442223
mov QWORD PTR 64[rsp], rax
mov BYTE PTR 76[rsp], 0
movups XMMWORD PTR 48[rsp], xmm0
cmp edi, 2
jne .L11
xor edx, edx
mov esi, 1
mov edi, 2
call socket@PLT
mov rdi, QWORD PTR 8[r12]
xor esi, esi
pxor xmm0, xmm0
mov ebp, eax
mov edx, 10
mov eax, 2
movups XMMWORD PTR 16[rsp], xmm0
lea r13, 16[rsp]
mov WORD PTR 16[rsp], ax
call strtol@PLT
mov edx, 16
mov rsi, r13
mov edi, ebp
rol ax, 8
mov WORD PTR 18[rsp], ax
call bind@PLT
cmp eax, -1
je .L12
mov esi, 10
mov edi, ebp
call listen@PLT
cmp eax, 1
je .L13
lea rdx, 12[rsp]
lea rsi, 32[rsp]
mov edi, ebp
mov DWORD PTR 12[rsp], 16
call accept@PLT
mov r12d, eax
cmp eax, -1
je .L14
lea rsi, 48[rsp]
mov edx, 29
mov edi, eax
call write@PLT
mov edi, r12d
call close@PLT
mov edi, ebp
call close@PLT
mov rax, QWORD PTR 88[rsp]
sub rax, QWORD PTR fs:40
jne .L15
add rsp, 96
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
mov rdx, QWORD PTR [rsi]
mov edi, 1
xor eax, eax
lea rsi, .LC0[rip]
call __printf_chk@PLT
or edi, -1
call exit@PLT
.L15:
call __stack_chk_fail@PLT
.L14:
lea rdi, .LC3[rip]
call err_handler
.L13:
lea rdi, .LC2[rip]
call err_handler
.L12:
lea rdi, .LC1[rip]
call err_handler
.cfi_endproc
.LFE65:
.size main, .-main
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC4:
.quad 7299807708946654536
.quad 8237119364314134388
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001380.c"
.text
.align 2
.global err_handler
.syntax unified
.arm
.fpu softvfp
.type err_handler, %function
err_handler:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r4, .L4
ldr r1, [r4]
bl fputs
mov r0, #10
ldr r1, [r4]
bl fputc
mov r0, #1
bl exit
.L5:
.align 2
.L4:
.word stderr
.size err_handler, .-err_handler
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "Usage:%s <port>\012\000"
.align 2
.LC2:
.ascii "bind() error\000"
.align 2
.LC3:
.ascii "listen() error\000"
.align 2
.LC4:
.ascii "accept() error\000"
.align 2
.LC0:
.ascii "Hello Network Programming~!\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr lr, .L18
sub sp, sp, #76
add ip, sp, #36
mov r6, r0
mov r7, r1
cmp r0, #2
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldm lr, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2}
ldr r2, .L18+4
ldr r2, [r2]
str r2, [sp, #68]
mov r2,#0
strb r3, [ip]
bne .L13
mov r2, #0
mov r1, #1
mov r0, r6
mov r4, r2
bl socket
mov r1, r4
mov r5, r0
mov r2, #10
ldr r0, [r7, #4]
str r4, [sp, #4]
str r4, [sp, #8]
strh r6, [sp, #4] @ movhi
str r4, [sp, #12]
str r4, [sp, #16]
bl strtol
lsl r3, r0, #16
lsr r3, r3, #24
orr r3, r3, r0, lsl #8
mov r2, #16
mov r0, r5
add r1, sp, #4
strh r3, [sp, #6] @ movhi
bl bind
cmn r0, #1
beq .L14
mov r1, #10
mov r0, r5
bl listen
cmp r0, #1
beq .L15
mov r3, #16
mov r2, sp
mov r0, r5
add r1, sp, #20
str r3, [sp]
bl accept
cmn r0, #1
mov r6, r0
beq .L16
mov r2, #29
add r1, sp, #36
bl write
mov r0, r6
bl close
mov r0, r5
bl close
ldr r3, .L18+4
ldr r2, [r3]
ldr r3, [sp, #68]
eors r2, r3, r2
mov r3, #0
bne .L17
mov r0, r4
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, pc}
.L13:
mov r0, #1
ldr r2, [r7]
ldr r1, .L18+8
bl __printf_chk
mvn r0, #0
bl exit
.L17:
bl __stack_chk_fail
.L16:
ldr r0, .L18+12
bl err_handler
.L15:
ldr r0, .L18+16
bl err_handler
.L14:
ldr r0, .L18+20
bl err_handler
.L19:
.align 2
.L18:
.word .LC0
.word .LC5
.word .LC1
.word .LC4
.word .LC3
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "1001386.c"
.intel_syntax noprefix
.text
.p2align 4
.type NmiSR, @function
NmiSR:
.LFB1:
.cfi_startproc
endbr64
.p2align 4,,10
.p2align 3
.L2:
jmp .L2
.cfi_endproc
.LFE1:
.size NmiSR, .-NmiSR
.p2align 4
.type FaultISR, @function
FaultISR:
.LFB2:
.cfi_startproc
endbr64
.p2align 4,,10
.p2align 3
.L5:
jmp .L5
.cfi_endproc
.LFE2:
.size FaultISR, .-FaultISR
.p2align 4
.type IntDefaultHandler, @function
IntDefaultHandler:
.LFB3:
.cfi_startproc
endbr64
.p2align 4,,10
.p2align 3
.L7:
jmp .L7
.cfi_endproc
.LFE3:
.size IntDefaultHandler, .-IntDefaultHandler
.p2align 4
.globl ResetISR
.type ResetISR, @function
ResetISR:
.LFB0:
.cfi_startproc
endbr64
lea rdi, _data[rip]
lea rax, _edata[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
cmp rdi, rax
jnb .L9
sub rax, 1
lea rsi, _etext[rip]
sub rax, rdi
shr rax, 3
lea rdx, 8[0+rax*8]
call memcpy@PLT
.L9:
#APP
# 188 "the_stack_data/1001386.c" 1
ldr r0, =_bss
ldr r1, =_ebss
mov r2, #0
.thumb_func
zero_loop:
cmp r0, r1
it lt
strlt r2, [r0], #4
blt zero_loop
# 0 "" 2
#NO_APP
add rsp, 8
.cfi_def_cfa_offset 8
jmp main@PLT
.cfi_endproc
.LFE0:
.size ResetISR, .-ResetISR
.globl g_pfnVectors
.section .isr_vector,"aw"
.align 32
.type g_pfnVectors, @object
.size g_pfnVectors, 568
g_pfnVectors:
.quad _vStackTop
.quad ResetISR
.quad NmiSR
.quad FaultISR
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad 0
.quad 0
.quad 0
.quad 0
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad 0
.quad IntDefaultHandler
.quad SysTickHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad TouchScreenIntHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad USB0OTGModeIntHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.quad SoundIntHandler
.quad IntDefaultHandler
.quad IntDefaultHandler
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "1001386.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type NmiSR, %function
NmiSR:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.L2:
b .L2
.size NmiSR, .-NmiSR
.align 2
.syntax unified
.arm
.fpu softvfp
.type FaultISR, %function
FaultISR:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.L5:
b .L5
.size FaultISR, .-FaultISR
.align 2
.syntax unified
.arm
.fpu softvfp
.type IntDefaultHandler, %function
IntDefaultHandler:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
.L7:
b .L7
.size IntDefaultHandler, .-IntDefaultHandler
.align 2
.global ResetISR
.syntax unified
.arm
.fpu softvfp
.type ResetISR, %function
ResetISR:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r2, .L12
ldr r3, .L12+4
cmp r2, r3
bcs .L9
ldr r0, .L12+8
sub r1, r3, #1
mov r3, r0
sub r1, r1, r2
bic r1, r1, #3
add r1, r1, #4
sub r2, r2, #4
add r1, r1, r0
.L10:
ldr r0, [r3], #4
cmp r3, r1
str r0, [r2, #4]!
bne .L10
.L9:
.syntax divided
@ 188 "the_stack_data/1001386.c" 1
ldr r0, =_bss
ldr r1, =_ebss
mov r2, #0
.thumb_func
zero_loop:
cmp r0, r1
it lt
strlt r2, [r0], #4
blt zero_loop
@ 0 "" 2
.arm
.syntax unified
b main
.L13:
.align 2
.L12:
.word _data
.word _edata
.word _etext
.size ResetISR, .-ResetISR
.global g_pfnVectors
.section .isr_vector,"a"
.align 2
.type g_pfnVectors, %object
.size g_pfnVectors, 284
g_pfnVectors:
.word _vStackTop
.word ResetISR
.word NmiSR
.word FaultISR
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word 0
.word 0
.word 0
.word 0
.word IntDefaultHandler
.word IntDefaultHandler
.word 0
.word IntDefaultHandler
.word SysTickHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word TouchScreenIntHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word USB0OTGModeIntHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word IntDefaultHandler
.word SoundIntHandler
.word IntDefaultHandler
.word IntDefaultHandler
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%i"
.LC1:
.string "%i\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
lea rsi, 4[rsp]
call __isoc99_scanf@PLT
mov edx, DWORD PTR 4[rsp]
cmp edx, 6
jle .L5
.p2align 4,,10
.p2align 3
.L3:
sub edx, 7
cmp edx, 6
jg .L3
mov DWORD PTR 4[rsp], edx
.L2:
xor eax, eax
lea rsi, .LC1[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L9
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
xor edx, edx
jmp .L2
.L9:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%i\000"
.align 2
.LC1:
.ascii "%i\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L10
sub sp, sp, #12
mov r1, sp
ldr r0, .L10+4
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
bl __isoc99_scanf
ldr r2, [sp]
cmp r2, #6
ble .L5
.L3:
sub r2, r2, #7
cmp r2, #6
bgt .L3
str r2, [sp]
.L2:
mov r0, #1
ldr r1, .L10+8
bl __printf_chk
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L5:
mov r2, #0
b .L2
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC2
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139184.c"
.intel_syntax noprefix
.text
.p2align 4
.globl my_strstr
.type my_strstr, @function
my_strstr:
.LFB0:
.cfi_startproc
endbr64
mov rax, rdi
ret
.cfi_endproc
.LFE0:
.size my_strstr, .-my_strstr
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139184.c"
.text
.align 2
.global my_strstr
.syntax unified
.arm
.fpu softvfp
.type my_strstr, %function
my_strstr:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
bx lr
.size my_strstr, .-my_strstr
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139185.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Inserire la chiave di cifratura (numero intero): "
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string " %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
xor ebx, ebx
add rsp, -128
.cfi_def_cfa_offset 160
mov rax, QWORD PTR fs:40
mov QWORD PTR 120[rsp], rax
xor eax, eax
lea rbp, 16[rsp]
jmp .L2
.p2align 4,,10
.p2align 3
.L3:
mov BYTE PTR 0[rbp+rbx], al
add rbx, 1
.L2:
mov rdi, QWORD PTR stdin[rip]
movsx r12, ebx
call getc@PLT
cmp al, 46
jne .L3
lea rdi, .LC0[rip]
mov BYTE PTR 16[rsp+r12], 46
xor ebx, ebx
call puts@PLT
lea rsi, 12[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
movzx r12d, BYTE PTR 12[rsp]
jmp .L4
.p2align 4,,10
.p2align 3
.L5:
add BYTE PTR 0[rbp+rbx], r12b
add rbx, 1
.L4:
mov rdi, rbp
call strlen@PLT
cmp rax, rbx
ja .L5
mov rdi, rbp
call puts@PLT
mov rax, QWORD PTR 120[rsp]
sub rax, QWORD PTR fs:40
jne .L9
sub rsp, -128
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139185.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Inserire la chiave di cifratura (numero intero): \000"
.align 2
.LC1:
.ascii " %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L10
sub sp, sp, #116
add r5, sp, #7
ldr r3, [r3]
str r3, [sp, #108]
mov r3,#0
mov r6, r5
mov r4, #0
ldr r7, .L10+4
b .L2
.L3:
strb r3, [r6, #1]!
add r4, r4, #1
.L2:
ldr r0, [r7]
bl getc
and r3, r0, #255
cmp r3, #46
bne .L3
add r2, sp, #112
add r4, r2, r4
ldr r0, .L10+8
strb r3, [r4, #-104]
bl puts
ldr r0, .L10+12
add r1, sp, #4
bl __isoc99_scanf
mov r4, #0
ldrb r6, [sp, #4] @ zero_extendqisi2
b .L4
.L5:
ldrb r3, [r5, #1]! @ zero_extendqisi2
add r4, r4, #1
add r3, r6, r3
strb r3, [r5]
.L4:
add r0, sp, #8
bl strlen
cmp r0, r4
bhi .L5
add r0, sp, #8
bl puts
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #108]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #116
@ sp needed
pop {r4, r5, r6, r7, pc}
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC2
.word stdin
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139186.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139186.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139187.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "Entrez le 1e terme de la suite (u0):"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%d"
.LC2:
.string "Entrez la raison (r):"
.section .rodata.str1.8
.align 8
.LC3:
.string "Entrez le dernier rang \303\240 calculer (n):"
.align 8
.LC5:
.string "Somme arithm\303\251tique: %d; Somme g\303\251om\303\251trique: %d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rdi, .LC0[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 40
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov DWORD PTR 12[rsp], 0
mov DWORD PTR 16[rsp], 0
mov DWORD PTR 20[rsp], 0
call puts@PLT
lea rsi, 12[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
lea rdi, .LC2[rip]
call puts@PLT
lea rsi, 16[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
lea rdi, .LC3[rip]
call puts@PLT
lea rsi, 20[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
mov ebx, DWORD PTR 20[rsp]
mov r13d, DWORD PTR 16[rsp]
pxor xmm0, xmm0
pxor xmm1, xmm1
mov r12d, DWORD PTR 12[rsp]
cvtsi2sd xmm0, r13d
lea ebp, 1[rbx]
cvtsi2sd xmm1, ebp
imul ebx, r13d
call pow@PLT
mov ecx, 1
sub ecx, DWORD PTR 16[rsp]
movsd xmm1, QWORD PTR .LC4[rip]
movapd xmm2, xmm0
pxor xmm0, xmm0
lea edx, [rbx+r12*2]
mov edi, 1
cvtsi2sd xmm0, r12d
subsd xmm1, xmm2
mov eax, edx
imul eax, ebp
lea rsi, .LC5[rip]
mulsd xmm0, xmm1
pxor xmm1, xmm1
mov edx, eax
cvtsi2sd xmm1, ecx
shr edx, 31
add edx, eax
xor eax, eax
sar edx
divsd xmm0, xmm1
cvttsd2si ecx, xmm0
call __printf_chk@PLT
mov edi, DWORD PTR 20[rsp]
mov eax, DWORD PTR 12[rsp]
test edi, edi
jle .L5
mov esi, DWORD PTR 16[rsp]
add edi, 1
mov ecx, eax
mov r8d, eax
mov r9d, eax
mov edx, 1
.p2align 4,,10
.p2align 3
.L3:
imul ecx, esi
add eax, esi
add edx, 1
add r9d, eax
add r8d, ecx
cmp edi, edx
jne .L3
.L2:
xor eax, eax
mov ecx, r8d
mov edx, r9d
mov edi, 1
lea rsi, .LC5[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L9
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
mov r8d, eax
mov r9d, eax
jmp .L2
.L9:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC4:
.long 0
.long 1072693248
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139187.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Entrez le 1e terme de la suite (u0):\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "Entrez la raison (r):\000"
.align 2
.LC3:
.ascii "Entrez le dernier rang \303\240 calculer (n):\000"
.global __aeabi_i2d
.global __aeabi_dsub
.global __aeabi_dmul
.global __aeabi_ddiv
.global __aeabi_d2iz
.align 2
.LC4:
.ascii "Somme arithm\303\251tique: %d; Somme g\303\251om\303"
.ascii "\251trique: %d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
push {r4, r5, r6, r7, r8, r9, lr}
ldr r2, .L10
sub sp, sp, #20
ldr r4, .L10+4
ldr r0, .L10+8
ldr r2, [r2]
str r2, [sp, #12]
mov r2,#0
str r3, [sp]
str r3, [sp, #4]
str r3, [sp, #8]
bl puts
mov r1, sp
ldr r0, .L10+12
bl __isoc99_scanf
ldr r0, [r4]
bl getc
ldr r0, .L10+16
bl puts
add r1, sp, #4
ldr r0, .L10+12
bl __isoc99_scanf
ldr r0, [r4]
bl getc
ldr r0, .L10+20
bl puts
add r1, sp, #8
ldr r0, .L10+12
bl __isoc99_scanf
ldr r0, [r4]
bl getc
ldr r4, [sp, #8]
ldr r9, [sp, #4]
add r8, r4, #1
mov r0, r8
bl __aeabi_i2d
mov r6, r0
mov r7, r1
mov r0, r9
bl __aeabi_i2d
mov r2, r6
mov r3, r7
ldr r5, [sp]
bl pow
mov r6, r0
mov r0, r5
mov r7, r1
bl __aeabi_i2d
mov r2, r6
mov r3, r7
mov r6, r0
mov r7, r1
mov r0, #0
ldr r1, .L10+24
bl __aeabi_dsub
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_dmul
ldr r3, [sp, #4]
mov r6, r0
rsb r0, r3, #1
mov r7, r1
bl __aeabi_i2d
mov r2, r0
mov r3, r1
mov r0, r6
mov r1, r7
bl __aeabi_ddiv
bl __aeabi_d2iz
mla r4, r9, r4, r5
add r5, r4, r5
mul r8, r5, r8
add r8, r8, r8, lsr #31
mov r3, r0
ldr r1, .L10+28
mov r0, #1
asr r2, r8, #1
bl __printf_chk
ldr r4, [sp, #8]
ldr r1, [sp]
cmp r4, #0
ble .L5
mov r0, #1
mov ip, r1
mov r3, r1
mov r2, r1
ldr lr, [sp, #4]
add r4, r4, r0
.L3:
mul ip, lr, ip
add r0, r0, #1
add r1, r1, lr
cmp r4, r0
add r3, r3, ip
add r2, r2, r1
bne .L3
.L2:
mov r0, #1
ldr r1, .L10+28
bl __printf_chk
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L5:
mov r3, r1
mov r2, r1
b .L2
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC5
.word stdin
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word 1072693248
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139192.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
mov DWORD PTR array[rip], 5
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.globl array
.data
.align 16
.type array, @object
.size array, 16
array:
.long 1
.long 2
.long 3
.long 4
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139192.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r2, #5
ldr r3, .L3
mov r0, #0
str r2, [r3]
bx lr
.L4:
.align 2
.L3:
.word .LANCHOR0
.size main, .-main
.global array
.data
.align 2
.set .LANCHOR0,. + 0
.type array, %object
.size array, 16
array:
.word 1
.word 2
.word 3
.word 4
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139194.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139194.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139195.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter number of digits:"
.LC1:
.string "%d"
.LC2:
.string "Enter the number:"
.LC3:
.string "%d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rsi, .LC0[rip]
mov edi, 1
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 24
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
mov rsi, rsp
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rsi, 4[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov ebp, DWORD PTR [rsp]
test ebp, ebp
je .L1
mov eax, ebp
mov ebx, 1
.p2align 4,,10
.p2align 3
.L2:
lea ebx, [rbx+rbx*4]
add ebx, ebx
sub eax, 1
jne .L2
mov DWORD PTR [rsp], 0
test ebp, ebp
jle .L1
mov r13d, 1
mov r12d, 3435973837
.p2align 4,,10
.p2align 3
.L4:
mov eax, DWORD PTR 4[rsp]
lea rsi, .LC3[rip]
mov edi, 1
add r13d, 1
cdq
idiv ebx
mov ebx, ebx
xor eax, eax
imul rbx, r12
shr rbx, 35
mov DWORD PTR 4[rsp], edx
call __printf_chk@PLT
cmp ebp, r13d
jge .L4
.L1:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L12
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 40
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L12:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139195.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter number of digits:\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "Enter the number:\000"
.global __aeabi_idivmod
.align 2
.LC3:
.ascii "%d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
ldr r3, .L12
sub sp, sp, #16
ldr r1, .L12+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __printf_chk
add r1, sp, #4
ldr r0, .L12+8
bl __isoc99_scanf
ldr r1, .L12+12
mov r0, #1
bl __printf_chk
ldr r0, .L12+8
add r1, sp, #8
bl __isoc99_scanf
ldr r6, [sp, #4]
cmp r6, #0
beq .L1
mov r3, r6
mov r4, #1
.L2:
add r4, r4, r4, lsl #2
subs r3, r3, #1
lsl r4, r4, #1
bne .L2
cmp r6, #0
str r3, [sp, #4]
ble .L1
mov r5, #1
ldr r8, .L12+16
ldr r7, .L12+20
add r6, r6, r5
.L4:
ldr r0, [sp, #8]
mov r1, r4
bl __aeabi_idivmod
mov r2, r1
umull r3, r4, r8, r4
mov r1, r7
mov r0, #1
add r5, r5, #1
str r2, [sp, #8]
bl __printf_chk
cmp r6, r5
lsr r4, r4, #3
bne .L4
.L1:
ldr r3, .L12
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L11
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
.L11:
bl __stack_chk_fail
.L13:
.align 2
.L12:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word -858993459
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139196.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%lu, %lu, %lu, %lu\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
mov r8d, 56
mov ecx, 4368
xor eax, eax
mov edx, 336
mov esi, 880
lea rdi, .LC0[rip]
jmp printf@PLT
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139196.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%lu, %lu, %lu, %lu\012\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov r2, #56
str lr, [sp, #-4]!
sub sp, sp, #12
str r2, [sp]
mov r1, #440
mov r2, #168
ldr r3, .L4
ldr r0, .L4+4
bl printf
add sp, sp, #12
@ sp needed
ldr pc, [sp], #4
.L5:
.align 2
.L4:
.word 2184
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139197.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB0:
.cfi_startproc
endbr64
mov eax, 1
ret
.cfi_endproc
.LFE0:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139197.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #1
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139198.c"
.intel_syntax noprefix
.text
.p2align 4
.globl swap
.type swap, @function
swap:
.LFB23:
.cfi_startproc
endbr64
mov eax, DWORD PTR [rdi]
mov edx, DWORD PTR [rsi]
mov DWORD PTR [rdi], edx
mov DWORD PTR [rsi], eax
ret
.cfi_endproc
.LFE23:
.size swap, .-swap
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB24:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov edx, 4
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
lea r13, .LC0[rip]
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
xor ebp, ebp
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
xor ebx, ebx
sub rsp, 56
.cfi_def_cfa_offset 112
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
movabs rax, 21474836484
mov DWORD PTR 12[rsp], 6
lea r12, 16[rsp]
lea r14, 32[rsp]
mov QWORD PTR 16[rsp], rax
movabs rax, 30064771078
mov QWORD PTR 24[rsp], rax
mov eax, 5
.p2align 4,,10
.p2align 3
.L4:
cmp edx, eax
mov edx, 0
cmovle ebp, edx
mov edx, DWORD PTR 24[rsp]
cmp eax, edx
mov eax, 1
cmovle ebp, eax
mov eax, DWORD PTR 28[rsp]
cmp edx, eax
mov edx, 2
cmovle ebp, edx
cmp eax, DWORD PTR 32[rsp]
jg .L22
.L8:
jmp .L8
.p2align 4,,10
.p2align 3
.L22:
movsx rcx, ebp
lea eax, 1[rbp]
mov edx, DWORD PTR 16[rsp+rcx*4]
cdqe
.L6:
cmp DWORD PTR [r12+rax*4], edx
cmovg ebx, eax
add rax, 1
cmp eax, 3
jle .L6
movsx rax, ebx
mov r15, r12
mov esi, DWORD PTR 16[rsp+rax*4]
mov DWORD PTR 16[rsp+rcx*4], esi
mov DWORD PTR 16[rsp+rax*4], edx
.L9:
mov edx, DWORD PTR [r15]
mov rsi, r13
mov edi, 1
xor eax, eax
add r15, 4
call __printf_chk@PLT
cmp r15, r14
jne .L9
mov edi, 10
call putchar@PLT
sub DWORD PTR 12[rsp], 1
je .L10
mov edx, DWORD PTR 16[rsp]
mov eax, DWORD PTR 20[rsp]
jmp .L4
.p2align 4,,10
.p2align 3
.L10:
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L25
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L25:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE24:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139198.c"
.text
.align 2
.global swap
.syntax unified
.arm
.fpu softvfp
.type swap, %function
swap:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, [r0]
ldr r2, [r1]
str r2, [r0]
str r3, [r1]
bx lr
.size swap, .-swap
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC1:
.ascii "%d \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
mov r5, #0
mov r9, #6
mov r4, r5
sub sp, sp, #24
ldr r2, .L26
ldr r3, .L26+4
add r8, sp, #4
ldr r2, [r2]
str r2, [sp, #20]
mov r2,#0
ldm r3, {r0, r1, r2, r3}
stm r8, {r0, r1, r2, r3}
ldr r6, .L26+8
add r7, sp, #20
.L4:
mov r3, #0
ldr r2, [sp, #4]
add r1, sp, #8
.L6:
mov ip, r2
mov r0, r3
ldr r2, [r1], #4
add r3, r3, #1
cmp r2, ip
movge r4, r0
cmp r3, #4
bne .L6
add r3, r4, #1
add r2, sp, #24
add r2, r2, r4, lsl #2
cmp r3, #3
ldr ip, [r2, #-20]
lsl r0, r4, #2
bgt .L7
add r2, r8, r3, lsl #2
.L9:
ldr r1, [r2], #4
cmp r1, ip
movgt r5, r3
add r3, r3, #1
cmp r3, #4
bne .L9
add r3, sp, #24
add r3, r3, r5, lsl #2
ldr r2, [r3, #-20]
add r1, sp, #24
add r0, r1, r0
str r2, [r0, #-20]
str ip, [r3, #-20]
.L14:
mov r10, r8
.L12:
ldr r2, [r10], #4
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r10, r7
bne .L12
mov r0, #10
bl putchar
subs r9, r9, #1
bne .L4
ldr r3, .L26
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L25
mov r0, r9
add sp, sp, #24
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L7:
add r1, sp, #24
add lr, r1, r5, lsl #2
ldr r1, [lr, #-20]
add r0, r8, r3, lsl #2
str r1, [r2, #-20]
add r1, sp, #16
str ip, [lr, #-20]
.L11:
add r3, r3, #1
rsb r2, r3, #4
ldr ip, [r0]
ldr lr, [r1]
add r2, r2, r4
cmp r3, r2
str lr, [r0], #4
str ip, [r1], #-4
bgt .L11
b .L14
.L25:
bl __stack_chk_fail
.L27:
.align 2
.L26:
.word .LC2
.word .LANCHOR0
.word .LC1
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.LC0:
.word 4
.word 5
.word 6
.word 7
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139202.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Input number(%d): "
.LC1:
.string "%d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "The sum and average of the numbers are %d and %f."
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea r13, .LC0[rip]
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
xor ebx, ebx
sub rsp, 56
.cfi_def_cfa_offset 96
mov rax, QWORD PTR fs:40
mov QWORD PTR 40[rsp], rax
xor eax, eax
mov r12, rsp
mov rbp, r12
.p2align 4,,10
.p2align 3
.L2:
add ebx, 1
mov rsi, r13
mov edi, 1
xor eax, eax
mov edx, ebx
call __printf_chk@PLT
mov rsi, rbp
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
add rbp, 4
cmp ebx, 8
jne .L2
mov edx, DWORD PTR [rsp]
lea rax, 4[rsp]
lea rcx, 32[r12]
.p2align 4,,10
.p2align 3
.L3:
add edx, DWORD PTR [rax]
add rax, 4
cmp rcx, rax
jne .L3
pxor xmm0, xmm0
mov edi, 1
mov eax, 1
cvtsi2sd xmm0, edx
mulsd xmm0, QWORD PTR .LC2[rip]
lea rsi, .LC3[rip]
cvtsd2ss xmm0, xmm0
cvtss2sd xmm0, xmm0
call __printf_chk@PLT
mov rax, QWORD PTR 40[rsp]
sub rax, QWORD PTR fs:40
jne .L9
add rsp, 56
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L9:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC2:
.long 0
.long 1069547520
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139202.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Input number(%d): \000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "The sum and average of the numbers are %d and %f.\000"
.global __aeabi_i2d
.global __aeabi_dmul
.global __aeabi_d2f
.global __aeabi_f2d
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L10
sub sp, sp, #52
ldr r3, [r3]
str r3, [sp, #44]
mov r3,#0
mov r4, #0
ldr r7, .L10+4
ldr r6, .L10+8
add r5, sp, #12
.L2:
add r4, r4, #1
mov r2, r4
mov r1, r7
mov r0, #1
bl __printf_chk
mov r1, r5
mov r0, r6
bl __isoc99_scanf
cmp r4, #8
add r5, r5, #4
bne .L2
ldr r4, [sp, #12]
add r1, sp, #44
add r3, sp, #16
.L3:
ldr r2, [r3], #4
cmp r1, r3
add r4, r4, r2
bne .L3
mov r0, r4
bl __aeabi_i2d
mov r3, #1069547520
mov r2, #0
bl __aeabi_dmul
bl __aeabi_d2f
bl __aeabi_f2d
mov r2, r4
stm sp, {r0-r1}
mov r0, #1
ldr r1, .L10+12
bl __printf_chk
ldr r3, .L10
ldr r2, [r3]
ldr r3, [sp, #44]
eors r2, r3, r2
mov r3, #0
bne .L9
mov r0, #0
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, pc}
.L9:
bl __stack_chk_fail
.L11:
.align 2
.L10:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139204.c"
.intel_syntax noprefix
.text
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC0:
.string "++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "-- No space left --"
.LC2:
.string "\nDay HH:MM Reminder"
.section .rodata.str1.8
.align 8
.LC3:
.string "Enter day, 24-hour time (HH:MM) and reminder: "
.section .rodata.str1.1
.LC4:
.string "%2d"
.LC5:
.string "%2d:%2d"
.LC6:
.string " "
.LC7:
.string "%s"
.section .rodata.str1.8
.align 8
.LC8:
.string "\n++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
.section .rodata.str1.1
.LC9:
.string " %s\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
lea rdi, .LC0[rip]
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
xor ebp, ebp
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 3304
.cfi_def_cfa_offset 3360
mov rax, QWORD PTR fs:40
mov QWORD PTR 3288[rsp], rax
xor eax, eax
call puts@PLT
lea rax, 48[rsp]
mov QWORD PTR [rsp], rax
mov QWORD PTR 16[rsp], rax
lea rax, 36[rsp]
mov QWORD PTR 24[rsp], rax
lea rax, 3198[rsp]
mov QWORD PTR 8[rsp], rax
.p2align 4,,10
.p2align 3
.L2:
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rsi, QWORD PTR 24[rsp]
lea rdi, .LC4[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov r8d, DWORD PTR 36[rsp]
test r8d, r8d
je .L4
mov rdi, QWORD PTR 8[rsp]
lea rcx, .LC4[rip]
xor eax, eax
xor ebx, ebx
mov edx, 3
mov esi, 1
lea r13, 3201[rsp]
call __sprintf_chk@PLT
lea rdx, 44[rsp]
lea rsi, 40[rsp]
xor eax, eax
lea rdi, .LC5[rip]
lea r14, 3216[rsp]
call __isoc99_scanf@PLT
mov r9d, DWORD PTR 44[rsp]
mov rdi, r13
xor eax, eax
mov r8d, DWORD PTR 40[rsp]
mov edx, 6
mov esi, 1
lea rcx, .LC5[rip]
call __sprintf_chk@PLT
.L5:
mov r12d, ebx
jmp .L6
.p2align 4,,10
.p2align 3
.L7:
cmp rbx, 60
jne .L26
.L6:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, 10
jne .L7
lea rbx, 3207[rsp]
mov rsi, QWORD PTR 8[rsp]
movsx rax, r12d
mov edx, 9
mov rdi, rbx
mov BYTE PTR 3216[rsp+rax], 0
mov r12, rbx
call __stpcpy_chk@PLT
mov edx, 1
lea rsi, .LC6[rip]
sub r12, rax
mov rdi, rax
lea rcx, 9[r12]
call __memcpy_chk@PLT
lea rdx, 8[r12]
mov rsi, r13
mov rdi, rax
add rdi, 1
call __stpcpy_chk@PLT
xor eax, eax
mov rdx, rbx
mov edi, 1
lea rsi, .LC7[rip]
call __printf_chk@PLT
test ebp, ebp
je .L17
mov r8, QWORD PTR [rsp]
xor r13d, r13d
jmp .L10
.p2align 4,,10
.p2align 3
.L28:
add r13d, 1
lea r8, 63[r12]
cmp r13d, ebp
je .L27
.L10:
mov rsi, r8
mov rdi, rbx
mov r12, r8
call strcmp@PLT
test eax, eax
jns .L28
cmp r13d, ebp
jge .L11
lea eax, -1[rbp]
mov r15, QWORD PTR 16[rsp]
sub eax, r13d
mov rdx, rax
lea rcx, -63[r15]
sal rdx, 6
sub rdx, rax
sub rcx, rdx
mov r13, rcx
.p2align 4,,10
.p2align 3
.L12:
mov rdi, r15
sub r15, 63
mov rsi, r15
call strcpy@PLT
cmp r13, r15
jne .L12
.L11:
mov rsi, rbx
mov rdi, r12
add ebp, 1
call stpcpy@PLT
mov rsi, r14
mov rdi, rax
call strcpy@PLT
add QWORD PTR 16[rsp], 63
cmp ebp, 50
jne .L2
lea rdi, .LC1[rip]
call puts@PLT
lea rdi, .LC2[rip]
call puts@PLT
jmp .L3
.p2align 4,,10
.p2align 3
.L26:
mov BYTE PTR [r14+rbx], al
add rbx, 1
jmp .L5
.p2align 4,,10
.p2align 3
.L27:
movsx rax, ebp
mov r8, rax
sal r8, 6
sub r8, rax
mov rax, QWORD PTR [rsp]
lea r12, [rax+r8]
jmp .L11
.L4:
lea rdi, .LC2[rip]
call puts@PLT
test ebp, ebp
je .L15
.L3:
xor r12d, r12d
lea rbx, .LC9[rip]
.p2align 4,,10
.p2align 3
.L14:
mov rdx, r12
mov rsi, rbx
mov edi, 1
xor eax, eax
sal rdx, 6
sub rdx, r12
add r12, 1
add rdx, QWORD PTR [rsp]
call __printf_chk@PLT
cmp ebp, r12d
jg .L14
.L15:
lea rdi, .LC8[rip]
call puts@PLT
mov rax, QWORD PTR 3288[rsp]
sub rax, QWORD PTR fs:40
jne .L29
add rsp, 3304
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.L17:
.cfi_restore_state
mov r12, QWORD PTR [rsp]
jmp .L11
.L29:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.text
.p2align 4
.globl read_line
.type read_line, @function
read_line:
.LFB35:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
mov r12, rdi
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
mov ebp, esi
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
xor ebx, ebx
sub rsp, 8
.cfi_def_cfa_offset 48
.L31:
mov r13d, ebx
jmp .L32
.p2align 4,,10
.p2align 3
.L33:
cmp ebp, ebx
jg .L36
.L32:
mov rdi, QWORD PTR stdin[rip]
call getc@PLT
cmp eax, 10
jne .L33
movsx rax, r13d
mov BYTE PTR [r12+rax], 0
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 40
mov eax, r13d
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L36:
.cfi_restore_state
mov BYTE PTR [r12+rbx], al
add rbx, 1
jmp .L31
.cfi_endproc
.LFE35:
.size read_line, .-read_line
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139204.c"
.text
.align 2
.global read_line
.syntax unified
.arm
.fpu softvfp
.type read_line, %function
read_line:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
mov r7, r0
mov r5, r1
mov r4, #0
ldr r6, .L8
sub r8, r0, #1
b .L3
.L4:
cmp r4, r5
addlt r4, r4, #1
strblt r0, [r8, #1]!
.L3:
ldr r0, [r6]
bl getc
cmp r0, #10
bne .L4
mov r3, #0
mov r0, r4
strb r3, [r7, r4]
pop {r4, r5, r6, r7, r8, pc}
.L9:
.align 2
.L8:
.word stdin
.size read_line, .-read_line
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "+++++++++++++++++++++++++++++++++++++++++++++++++++"
.ascii "+++++++++++++++++\000"
.align 2
.LC1:
.ascii "-- No space left --\000"
.align 2
.LC2:
.ascii "\012Day HH:MM Reminder\000"
.align 2
.LC3:
.ascii "Enter day, 24-hour time (HH:MM) and reminder: \000"
.align 2
.LC4:
.ascii "%2d\000"
.align 2
.LC5:
.ascii "%2d:%2d\000"
.align 2
.LC6:
.ascii " \000"
.align 2
.LC7:
.ascii "%s\000"
.align 2
.LC8:
.ascii "\012+++++++++++++++++++++++++++++++++++++++++++++++"
.ascii "+++++++++++++++++++++\000"
.align 2
.LC9:
.ascii " %s\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC10:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 3264
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L32
sub sp, sp, #3264
sub sp, sp, #12
ldr r3, [r3]
str r3, [sp, #3268]
mov r3,#0
ldr r0, .L32+4
add r3, sp, #28
str r3, [sp, #12]
mov r4, #0
bl puts
ldr r9, .L32+8
ldr r10, .L32+12
add r8, sp, #28
.L11:
ldr r1, .L32+16
mov r0, #1
bl __printf_chk
mov r0, r9
add r1, sp, #16
bl __isoc99_scanf
ldr r3, [sp, #16]
cmp r3, #0
beq .L13
add r0, sp, #3168
mov r2, #3
mov r1, #1
str r3, [sp]
add r0, r0, #12
mov r3, r9
bl __sprintf_chk
add r2, sp, #24
sub r1, r2, #4
mov r0, r10
bl __isoc99_scanf
ldr r2, [sp, #24]
ldr r3, [sp, #20]
mov r1, #1
str r2, [sp, #4]
str r3, [sp]
mov r2, #6
mov r3, r10
add r0, sp, #3184
bl __sprintf_chk
add r0, sp, #3200
mov r1, #60
add r7, sp, #3184
add r0, r0, #4
bl read_line
add r7, r7, #8
add r1, sp, #3168
mov r2, #9
add r1, r1, #12
mov r0, r7
bl __stpcpy_chk
mov r5, r0
sub r6, r7, r0
add r3, r6, #9
mov r2, #1
ldr r1, .L32+20
bl __memcpy_chk
add r2, r6, #8
add r0, r5, #1
add r1, sp, #3184
bl __strcpy_chk
mov r2, r7
mov r0, #1
ldr r1, .L32+24
bl __printf_chk
cmp r4, #0
add r5, sp, #28
beq .L17
mov r6, #0
b .L16
.L30:
add r6, r6, #1
cmp r6, r4
add r5, r5, #63
beq .L29
.L16:
mov r0, r7
mov r1, r5
bl strcmp
cmp r0, #0
bge .L30
cmp r6, r4
bge .L17
mov r0, r8
rsb r6, r6, r6, lsl #6
add r3, sp, #28
add r6, r3, r6
.L18:
sub fp, r0, #63
mov r1, fp
bl strcpy
cmp fp, r6
mov r0, fp
bne .L18
.L17:
mov r1, r7
mov r0, r5
bl stpcpy
add r1, sp, #3200
add r1, r1, #4
add r4, r4, #1
bl strcpy
cmp r4, #50
add r8, r8, #63
bne .L11
ldr r0, .L32+28
bl puts
ldr r0, .L32+32
bl puts
b .L12
.L29:
rsb r5, r4, r4, lsl #6
add r3, sp, #28
add r5, r3, r5
b .L17
.L13:
ldr r0, .L32+32
bl puts
cmp r4, #0
beq .L21
.L12:
mov r5, #0
ldr r6, .L32+36
ldr r7, [sp, #12]
.L20:
mov r2, r7
mov r1, r6
mov r0, #1
add r5, r5, #1
bl __printf_chk
cmp r5, r4
add r7, r7, #63
blt .L20
.L21:
ldr r0, .L32+40
bl puts
ldr r3, .L32
ldr r2, [r3]
ldr r3, [sp, #3268]
eors r2, r3, r2
mov r3, #0
bne .L31
mov r0, #0
add sp, sp, #3264
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L31:
bl __stack_chk_fail
.L33:
.align 2
.L32:
.word .LC10
.word .LC0
.word .LC4
.word .LC5
.word .LC3
.word .LC6
.word .LC7
.word .LC1
.word .LC2
.word .LC9
.word .LC8
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139205.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "Precision"
.text
.p2align 4
.globl dlar1v_
.type dlar1v_, @function
dlar1v_:
.LFB65:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15, r9
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, r8
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
mov r13, rcx
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
sub rsp, 264
.cfi_def_cfa_offset 320
mov QWORD PTR 24[rsp], rdx
mov rdx, QWORD PTR 336[rsp]
mov r9, QWORD PTR 328[rsp]
mov r8, QWORD PTR 344[rsp]
mov QWORD PTR 72[rsp], rdi
lea rdi, .LC1[rip]
mov QWORD PTR 104[rsp], rdx
mov rdx, QWORD PTR 352[rsp]
mov rbx, QWORD PTR 392[rsp]
mov QWORD PTR 64[rsp], r9
mov QWORD PTR 56[rsp], rdx
mov rdx, QWORD PTR 360[rsp]
mov QWORD PTR 48[rsp], r8
mov rbp, QWORD PTR 320[rsp]
mov QWORD PTR 128[rsp], rdx
mov rdx, QWORD PTR 368[rsp]
mov QWORD PTR 32[rsp], rsi
mov QWORD PTR 208[rsp], rdx
mov rdx, QWORD PTR 376[rsp]
mov QWORD PTR 40[rsp], rbx
mov QWORD PTR 16[rsp], rdx
mov rdx, QWORD PTR 384[rsp]
mov QWORD PTR 8[rsp], rdx
mov rdx, QWORD PTR 400[rsp]
mov QWORD PTR 88[rsp], rdx
mov rdx, QWORD PTR 408[rsp]
mov QWORD PTR 136[rsp], rdx
mov rdx, QWORD PTR 416[rsp]
mov r12, QWORD PTR 432[rsp]
mov QWORD PTR 144[rsp], rdx
mov rdx, QWORD PTR 424[rsp]
mov QWORD PTR 152[rsp], rdx
mov rdx, QWORD PTR fs:40
mov QWORD PTR 248[rsp], rdx
xor edx, edx
lea rdx, -8[r12]
mov QWORD PTR [rsp], rdx
call dlamch_@PLT
mov ebx, DWORD PTR [rbx]
mov rax, QWORD PTR 32[rsp]
mov rdx, QWORD PTR 16[rsp]
mov r8, QWORD PTR 48[rsp]
movapd xmm2, xmm0
test ebx, ebx
mov r9, QWORD PTR 64[rsp]
mov r10, QWORD PTR 72[rsp]
je .L2
mov DWORD PTR 16[rsp], ebx
movsx rax, DWORD PTR [rax]
.L3:
mov edi, DWORD PTR [r10]
lea ecx, [rdi+rdi]
mov DWORD PTR 84[rsp], edi
lea esi, 1[rcx]
mov DWORD PTR 48[rsp], ecx
add ecx, edi
mov rdi, QWORD PTR [rsp]
mov DWORD PTR 96[rsp], ecx
add ecx, 1
mov DWORD PTR 72[rsp], ecx
lea ecx, [rsi+rax]
movsx rcx, ecx
mov DWORD PTR 64[rsp], esi
lea rcx, -8[rdi+rcx*8]
cmp eax, 1
je .L166
movsx rsi, eax
movsd xmm0, QWORD PTR -16[r9+rsi*8]
movsd QWORD PTR [rcx], xmm0
.L5:
subsd xmm0, QWORD PTR 0[r13]
movsd QWORD PTR 232[rsp], xmm0
cmp ebx, eax
jle .L105
movsx rsi, DWORD PTR 48[rsp]
xor ecx, ecx
pxor xmm1, xmm1
lea rdi, [r12+rsi*8]
.p2align 4,,10
.p2align 3
.L9:
movsd xmm3, QWORD PTR -8[r14+rax*8]
xor esi, esi
addsd xmm3, xmm0
movsd xmm0, QWORD PTR -8[rbp+rax*8]
divsd xmm0, xmm3
comisd xmm1, xmm3
seta sil
add ecx, esi
movsd QWORD PTR -8[r12+rax*8], xmm0
mulsd xmm0, QWORD PTR 232[rsp]
mulsd xmm0, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm0
subsd xmm0, QWORD PTR 0[r13]
add rax, 1
movsd QWORD PTR 232[rsp], xmm0
cmp ebx, eax
jg .L9
.L6:
lea rdi, 232[rsp]
mov QWORD PTR 168[rsp], rdx
mov QWORD PTR 160[rsp], r8
mov QWORD PTR 120[rsp], r9
movsd QWORD PTR 176[rsp], xmm1
movsd QWORD PTR 112[rsp], xmm2
mov DWORD PTR 192[rsp], ecx
mov QWORD PTR 184[rsp], rdi
call disnan_@PLT
movsd xmm2, QWORD PTR 112[rsp]
mov r9, QWORD PTR 120[rsp]
test eax, eax
mov DWORD PTR 100[rsp], eax
mov r8, QWORD PTR 160[rsp]
mov rdx, QWORD PTR 168[rsp]
movsd xmm1, QWORD PTR 176[rsp]
jne .L10
cmp ebx, DWORD PTR 16[rsp]
mov rdi, QWORD PTR 184[rsp]
mov ecx, DWORD PTR 192[rsp]
jge .L14
movsx rsi, DWORD PTR 48[rsp]
mov r10d, DWORD PTR 16[rsp]
movsx rax, ebx
movsd xmm0, QWORD PTR 232[rsp]
lea rsi, [r12+rsi*8]
.p2align 4,,10
.p2align 3
.L13:
movsd xmm3, QWORD PTR -8[r14+rax*8]
addsd xmm3, xmm0
movsd xmm0, QWORD PTR -8[rbp+rax*8]
divsd xmm0, xmm3
movsd QWORD PTR -8[r12+rax*8], xmm0
mulsd xmm0, QWORD PTR 232[rsp]
mulsd xmm0, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR [rsi+rax*8], xmm0
subsd xmm0, QWORD PTR 0[r13]
add rax, 1
movsd QWORD PTR 232[rsp], xmm0
cmp r10d, eax
jg .L13
.L14:
mov QWORD PTR 176[rsp], rdx
mov QWORD PTR 168[rsp], r8
mov QWORD PTR 160[rsp], r9
mov DWORD PTR 112[rsp], ecx
movsd QWORD PTR 184[rsp], xmm1
movsd QWORD PTR 120[rsp], xmm2
call disnan_@PLT
mov ecx, DWORD PTR 112[rsp]
movsd xmm2, QWORD PTR 120[rsp]
test eax, eax
mov DWORD PTR 100[rsp], eax
mov r9, QWORD PTR 160[rsp]
mov r8, QWORD PTR 168[rsp]
mov rdx, QWORD PTR 176[rsp]
movsd xmm1, QWORD PTR 184[rsp]
jne .L10
.L154:
movsd xmm3, QWORD PTR 0[r13]
.L25:
mov rax, QWORD PTR 24[rsp]
mov edi, DWORD PTR 72[rsp]
mov eax, DWORD PTR [rax]
lea esi, [rax+rdi]
movsx rdi, eax
sub eax, 1
movsd xmm0, QWORD PTR -8[r14+rdi*8]
mov rdi, QWORD PTR [rsp]
movsx rsi, esi
subsd xmm0, xmm3
movsd QWORD PTR -8[rdi+rsi*8], xmm0
cmp ebx, eax
jg .L109
movsx rdi, DWORD PTR 96[rsp]
movsx rsi, DWORD PTR 84[rsp]
cdqe
lea rdi, [r12+rdi*8]
sal rsi, 4
mov r11, rdi
sub r11, rsi
xor esi, esi
.p2align 4,,10
.p2align 3
.L35:
movsd xmm3, QWORD PTR -8[r9+rax*8]
addsd xmm3, QWORD PTR [rdi+rax*8]
xor r10d, r10d
movsd xmm0, QWORD PTR -8[r14+rax*8]
divsd xmm0, xmm3
comisd xmm1, xmm3
seta r10b
add esi, r10d
movsd QWORD PTR 240[rsp], xmm0
mulsd xmm0, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR -8[r11+rax*8], xmm0
movsd xmm0, QWORD PTR [rdi+rax*8]
mulsd xmm0, QWORD PTR 240[rsp]
subsd xmm0, QWORD PTR 0[r13]
movsd QWORD PTR -8[rdi+rax*8], xmm0
sub rax, 1
cmp ebx, eax
jle .L35
.L32:
mov eax, DWORD PTR 72[rsp]
mov QWORD PTR 192[rsp], rdx
lea rdi, 240[rsp]
mov rdx, QWORD PTR [rsp]
mov QWORD PTR 184[rsp], r8
add eax, ebx
mov DWORD PTR 168[rsp], esi
cdqe
mov DWORD PTR 160[rsp], ecx
lea rax, -8[rdx+rax*8]
mov QWORD PTR 216[rsp], r9
movsd xmm0, QWORD PTR [rax]
mov QWORD PTR 112[rsp], rax
movsd QWORD PTR 200[rsp], xmm1
movsd QWORD PTR 176[rsp], xmm2
movsd QWORD PTR 240[rsp], xmm0
call disnan_@PLT
mov ecx, DWORD PTR 160[rsp]
mov esi, DWORD PTR 168[rsp]
test eax, eax
mov DWORD PTR 120[rsp], eax
movsd xmm2, QWORD PTR 176[rsp]
mov r8, QWORD PTR 184[rsp]
mov rdx, QWORD PTR 192[rsp]
movsd xmm1, QWORD PTR 200[rsp]
je .L36
mov rsi, QWORD PTR 24[rsp]
mov esi, DWORD PTR [rsi]
lea eax, -1[rsi]
mov DWORD PTR 160[rsp], esi
cmp ebx, eax
jg .L110
movsx rsi, DWORD PTR 72[rsp]
cdqe
movq xmm5, QWORD PTR .LC3[rip]
mov DWORD PTR 72[rsp], ecx
mov r9, QWORD PTR 216[rsp]
mov r10, QWORD PTR 104[rsp]
add rsi, rax
movapd xmm6, xmm5
lea rdi, [r12+rsi*8]
movsx rsi, DWORD PTR 84[rsp]
lea r11, [r12+rsi*8]
xor esi, esi
.p2align 4,,10
.p2align 3
.L44:
movsd xmm0, QWORD PTR -8[r9+rax*8]
addsd xmm0, QWORD PTR -8[rdi]
comisd xmm0, xmm1
movapd xmm4, xmm0
jnb .L37
xorpd xmm4, xmm5
.L37:
movsd xmm3, QWORD PTR [r10]
comisd xmm3, xmm4
jbe .L38
xorpd xmm3, xmm6
movapd xmm0, xmm3
.L38:
movsd xmm3, QWORD PTR -8[r14+rax*8]
xor ecx, ecx
comisd xmm1, xmm0
divsd xmm3, xmm0
seta cl
add esi, ecx
movsd QWORD PTR 240[rsp], xmm3
mulsd xmm3, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR -8[r11+rax*8], xmm3
movsd xmm0, QWORD PTR -8[rdi]
mulsd xmm0, QWORD PTR 240[rsp]
subsd xmm0, QWORD PTR 0[r13]
movsd QWORD PTR -16[rdi], xmm0
ucomisd xmm1, QWORD PTR 240[rsp]
jp .L42
jne .L42
movsd xmm0, QWORD PTR -8[r14+rax*8]
subsd xmm0, QWORD PTR 0[r13]
movsd QWORD PTR -16[rdi], xmm0
.L42:
sub rax, 1
sub rdi, 8
cmp ebx, eax
jle .L44
mov ecx, DWORD PTR 72[rsp]
.L36:
mov eax, DWORD PTR 64[rsp]
mov rdi, QWORD PTR [rsp]
add eax, ebx
cdqe
lea rax, -8[rdi+rax*8]
mov rdi, QWORD PTR 112[rsp]
movsd xmm0, QWORD PTR [rax]
addsd xmm0, QWORD PTR [rdi]
mov rdi, QWORD PTR 8[rsp]
comisd xmm1, xmm0
movsd QWORD PTR [rdi], xmm0
mov rdi, QWORD PTR 128[rsp]
mov edi, DWORD PTR [rdi]
ja .L167
mov r9d, -1
test edi, edi
jne .L48
.L49:
ucomisd xmm0, xmm1
mov rcx, QWORD PTR 208[rsp]
mov DWORD PTR [rcx], r9d
jp .L50
jne .L50
movsd xmm0, QWORD PTR [rax]
mov rax, QWORD PTR 8[rsp]
mulsd xmm0, xmm2
movsd QWORD PTR [rax], xmm0
.L50:
mov rax, QWORD PTR 40[rsp]
mov DWORD PTR [rax], ebx
cmp ebx, DWORD PTR 16[rsp]
jge .L62
movsx rcx, DWORD PTR 64[rsp]
movsx rsi, DWORD PTR 48[rsp]
movsx rax, ebx
movsx rdi, DWORD PTR 96[rsp]
movq xmm5, QWORD PTR .LC3[rip]
add rax, rcx
mov r9, QWORD PTR 40[rsp]
mov rcx, QWORD PTR 8[rsp]
sub rdi, rsi
mov esi, DWORD PTR 16[rsp]
lea rax, -8[r12+rax*8]
movapd xmm6, xmm5
.p2align 4,,10
.p2align 3
.L61:
movsd xmm0, QWORD PTR [rax+rdi*8]
addsd xmm0, QWORD PTR [rax]
movsd QWORD PTR 240[rsp], xmm0
ucomisd xmm0, xmm1
jp .L55
jne .L55
movsd xmm0, QWORD PTR [rax]
mulsd xmm0, xmm2
movsd QWORD PTR 240[rsp], xmm0
.L55:
comisd xmm0, xmm1
movapd xmm4, xmm0
jnb .L57
xorpd xmm4, xmm5
.L57:
movsd xmm3, QWORD PTR [rcx]
comisd xmm3, xmm1
jnb .L58
xorpd xmm3, xmm6
.L58:
add ebx, 1
comisd xmm3, xmm4
jb .L59
movsd QWORD PTR [rcx], xmm0
mov DWORD PTR [r9], ebx
.L59:
add rax, 8
cmp esi, ebx
jne .L61
.L62:
mov rax, QWORD PTR 32[rsp]
mov rbx, QWORD PTR 88[rsp]
movsd xmm3, QWORD PTR .LC0[rip]
mov eax, DWORD PTR [rax]
mov DWORD PTR [rbx], eax
mov rax, QWORD PTR 24[rsp]
mov esi, DWORD PTR [rax]
mov rax, QWORD PTR 40[rsp]
mov DWORD PTR 4[rbx], esi
movsx rax, DWORD PTR [rax]
mov rbx, QWORD PTR 56[rsp]
lea rdi, 0[0+rax*8]
mov rcx, rax
movsd QWORD PTR -8[rbx+rdi], xmm3
mov ebx, DWORD PTR 120[rsp]
or ebx, DWORD PTR 100[rsp]
movsd QWORD PTR [rdx], xmm3
jne .L168
mov rax, QWORD PTR 32[rsp]
mov r9d, DWORD PTR [rax]
lea eax, -1[rcx]
cmp r9d, eax
jg .L63
mov rbx, QWORD PTR 56[rsp]
movq xmm2, QWORD PTR .LC3[rip]
cdqe
lea rsi, -16[rbx+rdi]
jmp .L69
.p2align 4,,10
.p2align 3
.L157:
mulsd xmm4, xmm4
sub rax, 1
sub rsi, 8
addsd xmm4, QWORD PTR [rdx]
movsd QWORD PTR [rdx], xmm4
cmp r9d, eax
jg .L63
.L69:
movsd xmm6, QWORD PTR 8[rsi]
movsd xmm4, QWORD PTR -8[r12+rax*8]
mov edi, eax
mulsd xmm4, xmm6
comisd xmm6, xmm1
movapd xmm5, xmm4
movapd xmm0, xmm4
cmplesd xmm5, xmm1
xorpd xmm0, xmm2
movsd QWORD PTR [rsi], xmm0
movsd xmm7, QWORD PTR -8[rbp+rax*8]
andpd xmm0, xmm5
andnpd xmm5, xmm4
orpd xmm0, xmm5
jnb .L65
xorpd xmm6, xmm2
.L65:
comisd xmm7, xmm1
addsd xmm0, xmm6
jnb .L66
xorpd xmm7, xmm2
.L66:
mulsd xmm0, xmm7
movsd xmm5, QWORD PTR [r8]
comisd xmm5, xmm0
jbe .L157
mov rax, QWORD PTR 88[rsp]
add edi, 1
mov QWORD PTR [rsi], 0x000000000
mov DWORD PTR [rax], edi
mov rax, QWORD PTR 40[rsp]
movsx rcx, DWORD PTR [rax]
.L63:
mov rax, QWORD PTR 24[rsp]
mov eax, DWORD PTR [rax]
sub eax, 1
cmp eax, ecx
jl .L164
mov rbx, QWORD PTR 56[rsp]
movsx rdi, DWORD PTR 84[rsp]
movq xmm2, QWORD PTR .LC3[rip]
lea rsi, [rbx+rcx*8]
lea rdi, [r12+rdi*8]
jmp .L87
.p2align 4,,10
.p2align 3
.L159:
mulsd xmm0, xmm0
add rcx, 1
add rsi, 8
addsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rdx], xmm0
cmp eax, ecx
jl .L96
.L87:
movsd xmm4, QWORD PTR -8[rsi]
movsd xmm0, QWORD PTR -8[rdi+rcx*8]
mov r9d, ecx
mulsd xmm0, xmm4
comisd xmm4, xmm1
movapd xmm5, xmm0
xorpd xmm5, xmm2
movsd QWORD PTR [rsi], xmm5
movsd xmm7, QWORD PTR -8[rbp+rcx*8]
jnb .L81
xorpd xmm4, xmm2
.L81:
movapd xmm6, xmm0
comisd xmm7, xmm1
cmplesd xmm6, xmm1
andpd xmm5, xmm6
andnpd xmm6, xmm0
orpd xmm5, xmm6
addsd xmm4, xmm5
jnb .L83
xorpd xmm7, xmm2
.L83:
mulsd xmm4, xmm7
movsd xmm5, QWORD PTR [r8]
comisd xmm5, xmm4
jbe .L159
mov rax, QWORD PTR 88[rsp]
mov QWORD PTR [rsi], 0x000000000
movsd xmm0, QWORD PTR [rdx]
mov DWORD PTR 4[rax], r9d
.L86:
.L96:
divsd xmm3, xmm0
movsd QWORD PTR 240[rsp], xmm3
ucomisd xmm1, xmm3
ja .L161
.L103:
movapd xmm2, xmm3
sqrtsd xmm2, xmm2
.L99:
mov rax, QWORD PTR 136[rsp]
movsd QWORD PTR [rax], xmm2
mov rax, QWORD PTR 8[rsp]
movsd xmm0, QWORD PTR [rax]
comisd xmm0, xmm1
jnb .L100
xorpd xmm0, XMMWORD PTR .LC3[rip]
.L100:
mulsd xmm0, xmm2
mov rax, QWORD PTR 144[rsp]
movsd QWORD PTR [rax], xmm0
mov rax, QWORD PTR 8[rsp]
mulsd xmm3, QWORD PTR [rax]
mov rax, QWORD PTR 152[rsp]
movsd QWORD PTR [rax], xmm3
mov rax, QWORD PTR 248[rsp]
sub rax, QWORD PTR fs:40
jne .L169
add rsp, 264
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L48:
.cfi_restore_state
lea r9d, [rsi+rcx]
jmp .L49
.p2align 4,,10
.p2align 3
.L168:
mov rbx, QWORD PTR 32[rsp]
lea r9d, -1[rax]
mov r10d, DWORD PTR [rbx]
cmp r10d, r9d
jg .L70
mov rax, QWORD PTR 56[rsp]
movq xmm2, QWORD PTR .LC3[rip]
movsx r9, r9d
lea rax, -16[rax+rdi]
jmp .L80
.p2align 4,,10
.p2align 3
.L171:
jne .L71
movsd xmm4, QWORD PTR 0[rbp+r9*8]
divsd xmm4, QWORD PTR -8[rbp+r9*8]
xorpd xmm4, xmm2
mulsd xmm4, QWORD PTR 16[rax]
comisd xmm4, xmm1
movsd QWORD PTR [rax], xmm4
movapd xmm5, xmm4
movsd xmm6, QWORD PTR -8[rbp+r9*8]
jb .L74
.L73:
comisd xmm6, xmm1
addsd xmm0, xmm4
jnb .L76
xorpd xmm6, xmm2
.L76:
mulsd xmm0, xmm6
movsd xmm4, QWORD PTR [r8]
comisd xmm4, xmm0
ja .L170
mulsd xmm5, xmm5
sub r9, 1
sub rax, 8
addsd xmm5, QWORD PTR [rdx]
movsd QWORD PTR [rdx], xmm5
cmp r10d, r9d
jg .L79
.L80:
movsd xmm0, QWORD PTR 8[rax]
mov esi, r9d
ucomisd xmm0, xmm1
jnp .L171
.L71:
movsd xmm7, QWORD PTR -8[r12+r9*8]
mulsd xmm7, xmm0
comisd xmm1, xmm7
movapd xmm4, xmm7
xorpd xmm4, xmm2
movsd QWORD PTR [rax], xmm4
movapd xmm5, xmm4
movsd xmm6, QWORD PTR -8[rbp+r9*8]
jb .L74
.L75:
comisd xmm0, xmm1
jnb .L73
xorpd xmm0, xmm2
jmp .L73
.p2align 4,,10
.p2align 3
.L10:
mov rax, QWORD PTR 32[rsp]
mov ecx, DWORD PTR 64[rsp]
mov rsi, QWORD PTR [rsp]
movsx rax, DWORD PTR [rax]
add ecx, eax
movsx rcx, ecx
movsd xmm0, QWORD PTR -8[rsi+rcx*8]
subsd xmm0, QWORD PTR 0[r13]
movsd QWORD PTR 232[rsp], xmm0
cmp eax, ebx
jge .L106
movsx rsi, DWORD PTR 48[rsp]
movq xmm5, QWORD PTR .LC3[rip]
xor ecx, ecx
movapd xmm3, xmm0
lea rdi, [r12+rsi*8]
mov rsi, QWORD PTR 104[rsp]
movapd xmm6, xmm5
.p2align 4,,10
.p2align 3
.L23:
addsd xmm3, QWORD PTR -8[r14+rax*8]
comisd xmm3, xmm1
movapd xmm4, xmm3
jnb .L16
xorpd xmm4, xmm5
.L16:
movsd xmm0, QWORD PTR [rsi]
comisd xmm0, xmm4
jbe .L17
movapd xmm3, xmm0
xorpd xmm3, xmm6
.L17:
movsd xmm0, QWORD PTR -8[rbp+rax*8]
xor r10d, r10d
comisd xmm1, xmm3
divsd xmm0, xmm3
movsd xmm3, QWORD PTR 232[rsp]
seta r10b
add ecx, r10d
mulsd xmm3, xmm0
movsd QWORD PTR -8[r12+rax*8], xmm0
mulsd xmm3, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm3
ucomisd xmm1, QWORD PTR -8[r12+rax*8]
jp .L21
jne .L21
movsd xmm3, QWORD PTR -8[r9+rax*8]
movsd QWORD PTR [rdi+rax*8], xmm3
.L21:
subsd xmm3, QWORD PTR 0[r13]
add rax, 1
movsd QWORD PTR 232[rsp], xmm3
cmp ebx, eax
jg .L23
.L15:
cmp ebx, DWORD PTR 16[rsp]
jge .L154
movsx rsi, DWORD PTR 48[rsp]
movq xmm5, QWORD PTR .LC3[rip]
movsx rax, ebx
movsd xmm0, QWORD PTR 232[rsp]
mov edi, DWORD PTR 16[rsp]
mov r10, QWORD PTR 104[rsp]
lea rsi, [r12+rsi*8]
movapd xmm6, xmm5
.p2align 4,,10
.p2align 3
.L31:
movsd xmm3, QWORD PTR -8[r14+rax*8]
addsd xmm3, xmm0
comisd xmm3, xmm1
movapd xmm4, xmm3
jnb .L26
xorpd xmm4, xmm5
.L26:
movsd xmm0, QWORD PTR [r10]
comisd xmm0, xmm4
jbe .L27
movapd xmm3, xmm0
xorpd xmm3, xmm6
.L27:
movsd xmm0, QWORD PTR -8[rbp+rax*8]
divsd xmm0, xmm3
movsd QWORD PTR -8[r12+rax*8], xmm0
mulsd xmm0, QWORD PTR 232[rsp]
mulsd xmm0, QWORD PTR -8[r15+rax*8]
movsd QWORD PTR [rsi+rax*8], xmm0
ucomisd xmm1, QWORD PTR -8[r12+rax*8]
jp .L29
jne .L29
movsd xmm0, QWORD PTR -8[r9+rax*8]
movsd QWORD PTR [rsi+rax*8], xmm0
.L29:
movsd xmm3, QWORD PTR 0[r13]
add rax, 1
subsd xmm0, xmm3
movsd QWORD PTR 232[rsp], xmm0
cmp edi, eax
jg .L31
jmp .L25
.p2align 4,,10
.p2align 3
.L74:
movapd xmm7, xmm4
movapd xmm5, xmm4
xorpd xmm7, xmm2
movapd xmm4, xmm7
jmp .L75
.p2align 4,,10
.p2align 3
.L2:
mov ebx, DWORD PTR [rax]
mov rax, QWORD PTR 24[rsp]
mov eax, DWORD PTR [rax]
mov DWORD PTR 16[rsp], eax
movsx rax, ebx
jmp .L3
.p2align 4,,10
.p2align 3
.L170:
mov QWORD PTR [rax], 0x000000000
mov rax, QWORD PTR 88[rsp]
add esi, 1
mov DWORD PTR [rax], esi
mov rax, QWORD PTR 40[rsp]
mov ecx, DWORD PTR [rax]
.L79:
mov rax, QWORD PTR 24[rsp]
mov esi, DWORD PTR [rax]
movsx rax, ecx
sub esi, 1
cmp esi, ecx
jl .L164
.L102:
mov rbx, QWORD PTR 56[rsp]
mov r10, QWORD PTR [rsp]
mov r11d, DWORD PTR 84[rsp]
lea rcx, [rbx+rax*8]
jmp .L95
.p2align 4,,10
.p2align 3
.L173:
jne .L88
movsd xmm0, QWORD PTR -16[rbp+rax*8]
divsd xmm0, QWORD PTR -8[rbp+rax*8]
xorpd xmm0, xmm2
mulsd xmm0, QWORD PTR -16[rcx]
movsd QWORD PTR [rcx], xmm0
movsd xmm5, QWORD PTR -8[rbp+rax*8]
.L90:
comisd xmm0, xmm1
movapd xmm6, xmm0
jnb .L91
xorpd xmm6, xmm2
.L91:
comisd xmm5, xmm1
addsd xmm4, xmm6
jnb .L92
xorpd xmm5, xmm2
.L92:
mulsd xmm4, xmm5
movsd xmm5, QWORD PTR [r8]
comisd xmm5, xmm4
ja .L172
mulsd xmm0, xmm0
add rax, 1
add rcx, 8
addsd xmm0, QWORD PTR [rdx]
movsd QWORD PTR [rdx], xmm0
cmp esi, eax
jl .L96
.L95:
movsd xmm4, QWORD PTR -8[rcx]
mov r9d, eax
mov edi, eax
ucomisd xmm4, xmm1
jnp .L173
.L88:
add r9d, r11d
comisd xmm4, xmm1
movsx r9, r9d
movsd xmm0, QWORD PTR [r10+r9*8]
mulsd xmm0, xmm4
xorpd xmm0, xmm2
movsd QWORD PTR [rcx], xmm0
movsd xmm5, QWORD PTR -8[rbp+rax*8]
jnb .L90
xorpd xmm4, xmm2
jmp .L90
.p2align 4,,10
.p2align 3
.L167:
add ecx, 1
test edi, edi
jne .L48
mov rax, QWORD PTR 208[rsp]
mov DWORD PTR [rax], -1
jmp .L50
.p2align 4,,10
.p2align 3
.L166:
movsx rsi, esi
mov QWORD PTR [rdi+rsi*8], 0x000000000
movsd xmm0, QWORD PTR [rcx]
jmp .L5
.p2align 4,,10
.p2align 3
.L172:
mov rax, QWORD PTR 88[rsp]
mov QWORD PTR [rcx], 0x000000000
movsd xmm0, QWORD PTR [rdx]
mov DWORD PTR 4[rax], edi
jmp .L96
.L106:
xor ecx, ecx
jmp .L15
.L110:
xor esi, esi
jmp .L36
.L164:
movsd xmm0, QWORD PTR [rdx]
jmp .L96
.p2align 4,,10
.p2align 3
.L109:
xor esi, esi
jmp .L32
.p2align 4,,10
.p2align 3
.L105:
xor ecx, ecx
pxor xmm1, xmm1
jmp .L6
.L70:
sub esi, 1
movq xmm2, QWORD PTR .LC3[rip]
cmp eax, esi
jle .L102
jmp .L103
.L161:
movapd xmm0, xmm3
movsd QWORD PTR [rsp], xmm1
call sqrt@PLT
movsd xmm1, QWORD PTR [rsp]
movsd xmm3, QWORD PTR 240[rsp]
movapd xmm2, xmm0
jmp .L99
.L169:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE65:
.size dlar1v_, .-dlar1v_
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 0
.long 1072693248
.section .rodata.cst16,"aM",@progbits,16
.align 16
.LC3:
.long 0
.long -2147483648
.long 0
.long 0
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139205.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Precision\000"
.global __aeabi_dsub
.global __aeabi_dadd
.global __aeabi_ddiv
.global __aeabi_dcmplt
.global __aeabi_dmul
.global __aeabi_dcmpge
.global __aeabi_dcmpgt
.global __aeabi_dcmpeq
.global __aeabi_dcmple
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC1:
.word __stack_chk_guard
.text
.align 2
.global dlar1v_
.syntax unified
.arm
.fpu softvfp
.type dlar1v_, %function
dlar1v_:
@ args = 68, pretend = 0, frame = 176
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #180
str r3, [sp, #4]
ldr r3, .L174
str r2, [sp, #76]
str r1, [sp, #92]
ldr r3, [r3]
str r3, [sp, #172]
mov r3,#0
ldr r3, [sp, #216]
ldr r5, [sp, #260]
str r3, [sp, #80]
ldr r3, [sp, #220]
str r5, [sp, #44]
str r3, [sp, #84]
ldr r3, [sp, #224]
mov r4, r0
str r3, [sp, #68]
ldr r3, [sp, #228]
ldr r0, .L174+4
str r3, [sp, #96]
ldr r3, [sp, #232]
mov r7, r1
str r3, [sp, #24]
ldr r3, [sp, #236]
str r3, [sp, #12]
ldr r3, [sp, #240]
str r3, [sp, #108]
ldr r3, [sp, #244]
str r3, [sp, #124]
ldr r3, [sp, #248]
str r3, [sp, #140]
ldr r3, [sp, #252]
str r3, [sp, #8]
ldr r3, [sp, #256]
str r3, [sp, #20]
ldr r3, [sp, #264]
str r3, [sp, #112]
ldr r3, [sp, #268]
ldr r6, [sp, #280]
str r3, [sp, #128]
ldr r3, [sp, #272]
str r6, [sp, #48]
str r3, [sp, #132]
ldr r3, [sp, #276]
str r3, [sp, #136]
bl dlamch_
ldr r3, [r5]
sub r2, r6, #8
cmp r3, #0
str r3, [sp, #36]
ldreq r3, [sp, #92]
str r2, [sp, #64]
ldreq fp, [r3]
ldreq r3, [sp, #76]
ldr r2, [r4]
ldreq r3, [r3]
ldrne fp, [r7]
str r0, [sp, #56]
str r1, [sp, #60]
lsl r1, r2, #1
str r3, [sp, #72]
add r3, r1, #1
add r6, r1, r2
str r2, [sp, #100]
str r3, [sp, #40]
ldr r2, [sp, #64]
add r3, r3, fp
sub r3, r3, #-536870911
streq fp, [sp, #36]
lsl r9, r3, #3
cmp fp, #1
add r3, r2, r3, lsl #3
add r2, r6, #1
str r1, [sp, #116]
str r2, [sp, #104]
beq .L164
ldr r2, [sp, #96]
add r2, r2, fp, lsl #3
sub r1, r2, #16
ldmia r1, {r0-r1}
stm r3, {r0-r1}
.L5:
ldr r3, [sp, #4]
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr r0, [sp, #36]
str r2, [sp, #152]
str r3, [sp, #156]
cmp r0, fp
ble .L101
mov r1, #0
ldr ip, [sp, #80]
sub fp, fp, #-536870911
add r8, ip, fp, lsl #3
str r1, [sp, #28]
sub r1, ip, #8
ldr ip, [sp, #68]
ldr lr, [sp, #48]
add ip, ip, fp, lsl #3
str ip, [sp, #16]
ldr ip, [sp, #84]
add r1, r1, r0, lsl #3
add r10, lr, fp, lsl #3
add r9, lr, r9
add fp, ip, fp, lsl #3
str r1, [sp, #32]
.L9:
ldmia r8!, {r0-r1}
bl __aeabi_dadd
mov r6, r0
mov r7, r1
ldr r3, [sp, #16]
mov r2, r6
ldmia r3!, {r0-r1}
str r3, [sp, #16]
mov r3, r7
bl __aeabi_ddiv
mov r4, r0
mov r5, r1
mov r3, #0
mov r1, r7
mov r2, #0
stm r10!, {r4-r5}
mov r0, r6
bl __aeabi_dcmplt
cmp r0, #0
ldrne r3, [sp, #28]
mov r0, r4
addne r3, r3, #1
strne r3, [sp, #28]
mov r1, r5
add r3, sp, #152
ldmia r3, {r2-r3}
ldmia fp!, {r4-r5}
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r9!, {r2-r3}
ldr r3, [sp, #4]
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r3, r1
mov r2, r0
ldr r1, [sp, #32]
str r2, [sp, #152]
str r3, [sp, #156]
cmp r8, r1
bne .L9
.L6:
add r0, sp, #152
bl disnan_
subs r3, r0, #0
str r3, [sp, #120]
ldr r3, [sp, #36]
bne .L165
ldr r2, [sp, #72]
cmp r3, r2
bge .L166
ldr r2, [sp, #36]
ldr r3, [sp, #40]
sub r5, r2, #-536870911
add r3, r2, r3
sub r6, r3, #-536870911
str r3, [sp, #144]
ldr r3, [sp, #80]
ldr r2, [sp, #48]
sub r10, r3, #8
add r4, r3, r5, lsl #3
ldr r3, [sp, #68]
add r7, r2, r5, lsl #3
add fp, r3, r5, lsl #3
ldr r3, [sp, #84]
add r6, r2, r6, lsl #3
add r5, r3, r5, lsl #3
ldr r3, [sp, #72]
add r10, r10, r3, lsl #3
add r3, sp, #152
ldmia r3, {r2-r3}
.L13:
ldmia r4!, {r0-r1}
bl __aeabi_dadd
ldmia fp!, {r8-r9}
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r9
bl __aeabi_ddiv
add r3, sp, #152
ldmia r3, {r2-r3}
mov r8, r0
mov r9, r1
stm r7!, {r8-r9}
bl __aeabi_dmul
ldmia r5!, {r8-r9}
mov r2, r8
mov r3, r9
bl __aeabi_dmul
mov r2, r0
mov r3, r1
stm r6!, {r2-r3}
ldr r3, [sp, #4]
ldmia r3, {r2-r3}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
cmp r4, r10
str r2, [sp, #152]
str r3, [sp, #156]
bne .L13
.L14:
add r0, sp, #152
bl disnan_
subs r3, r0, #0
str r3, [sp, #120]
bne .L10
.L149:
ldr r3, [sp, #4]
ldmia r3, {r8-r9}
.L25:
ldr r3, [sp, #76]
ldr r6, [sp, #104]
ldr r4, [r3]
ldr r7, [sp, #80]
ldr ip, [sp, #64]
add r5, r4, r6
add r1, r7, r4, lsl #3
mov r3, r9
ldmdb r1, {r0-r1}
mov r2, r8
sub r5, r5, #-536870911
add r5, ip, r5, lsl #3
bl __aeabi_dsub
mov r3, #0
ldr r2, [sp, #36]
sub fp, r4, #1
cmp r2, fp
stm r5, {r0-r1}
lsl r9, r4, #3
str r3, [sp, #32]
bgt .L32
ldr r1, [sp, #96]
ldr r3, [sp, #100]
sub r9, r9, #8
add r8, r6, fp
add r10, r1, r9
add fp, r3, fp
sub r3, r1, #8
add r1, r7, r9
str r1, [sp, #16]
ldr r1, [sp, #84]
add r3, r3, r2, lsl #3
add r9, r1, r9
ldr r1, [sp, #48]
str r3, [sp, #40]
add r8, r1, r8, lsl #3
add fp, r1, fp, lsl #3
.L35:
ldmdb r8!, {r2-r3}
ldmdb r10!, {r0-r1}
bl __aeabi_dadd
mov r6, r0
mov r7, r1
ldr r3, [sp, #16]
mov r2, r6
ldmdb r3!, {r0-r1}
str r3, [sp, #16]
mov r3, r7
bl __aeabi_ddiv
mov r4, r0
mov r5, r1
mov r3, #0
mov r1, r7
mov r2, #0
mov r0, r6
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dcmplt
cmp r0, #0
ldrne r3, [sp, #32]
ldmdb r9!, {r0-r1}
addne r3, r3, #1
strne r3, [sp, #32]
mov r2, r4
mov r3, r5
bl __aeabi_dmul
add r3, sp, #160
ldmia r3, {r2-r3}
stmdb fp!, {r0-r1}
ldmia r8, {r0-r1}
bl __aeabi_dmul
ldr r3, [sp, #4]
ldmia r3, {r2-r3}
bl __aeabi_dsub
ldr r3, [sp, #40]
stmdb r8, {r0-r1}
cmp r3, r10
bne .L35
.L32:
ldr r4, [sp, #36]
ldr r5, [sp, #104]
ldr r3, [sp, #64]
add r9, r4, r5
sub r9, r9, #-536870911
add r3, r3, r9, lsl #3
lsl r2, r9, #3
add r0, sp, #160
str r3, [sp, #88]
str r2, [sp, #148]
ldmia r3, {r2-r3}
str r2, [sp, #160]
str r3, [sp, #164]
bl disnan_
subs r3, r0, #0
str r3, [sp, #104]
beq .L36
ldr r3, [sp, #76]
ldr r8, [r3]
mov r3, #0
sub r9, r8, #1
cmp r4, r9
str r3, [sp, #32]
bgt .L36
mov r10, #0
mov fp, #0
ldr r3, [sp, #100]
add r6, r5, r9
add r9, r3, r9
ldr r3, [sp, #48]
sub r8, r8, #-536870911
add r6, r3, r6, lsl #3
add r3, r3, r9, lsl #3
str r3, [sp, #16]
ldr r3, [sp, #84]
lsl r7, r8, #3
add r3, r3, r7
ldr r1, [sp, #96]
str r3, [sp, #40]
ldr r3, [sp, #80]
add r7, r7, #8
add r7, r3, r7
sub r3, r1, #8
add r3, r3, r4, lsl #3
add r8, r1, r8, lsl #3
str r3, [sp, #80]
.L44:
ldmdb r6!, {r2-r3}
ldmdb r8!, {r0-r1}
bl __aeabi_dadd
mov r2, r10
mov r3, fp
mov r5, r1
mov r4, r0
bl __aeabi_dcmpge
cmp r0, #0
movne ip, r5
ldr lr, [sp, #24]
addeq ip, r5, #-2147483648
ldr r1, [lr]
ldr r9, [lr, #4]
mov r3, ip
mov r2, r4
mov r0, r1
str r1, [sp, #52]
mov r1, r9
bl __aeabi_dcmpgt
cmp r0, #0
ldrne r4, [sp, #52]
addne r5, r9, #-2147483648
sub r1, r7, #16
ldmia r1, {r0-r1}
mov r2, r4
mov r3, r5
bl __aeabi_ddiv
mov r2, r4
mov r3, r5
mov r4, r0
mov r5, r1
mov r0, r2
mov r1, r3
mov r2, r10
mov r3, fp
str r4, [sp, #160]
str r5, [sp, #164]
bl __aeabi_dcmplt
cmp r0, #0
ldrne r3, [sp, #32]
ldr ip, [sp, #40]
addne r3, r3, #1
strne r3, [sp, #32]
ldmdb ip!, {r0-r1}
mov r2, r4
mov r3, r5
str ip, [sp, #40]
bl __aeabi_dmul
add r3, sp, #160
ldmia r3, {r2-r3}
ldr ip, [sp, #16]
stmdb ip!, {r0-r1}
ldmia r6, {r0-r1}
str ip, [sp, #16]
bl __aeabi_dmul
ldr r4, [sp, #4]
ldmia r4, {r2-r3}
bl __aeabi_dsub
stmdb r6, {r0-r1}
add r1, sp, #160
ldmia r1, {r0-r1}
mov r2, r10
mov r3, fp
bl __aeabi_dcmpeq
cmp r0, #0
beq .L42
ldmia r4, {r2-r3}
sub r1, r7, #16
ldmia r1, {r0-r1}
bl __aeabi_dsub
stmdb r6, {r0-r1}
.L42:
ldr r3, [sp, #80]
sub r7, r7, #8
cmp r3, r8
bne .L44
.L36:
ldr r1, [sp, #144]
ldr r3, [sp, #88]
sub r6, r1, #-536870911
ldr r1, [sp, #64]
ldmia r3, {r2-r3}
add r7, r1, r6, lsl #3
ldmia r7, {r0-r1}
bl __aeabi_dadd
mov r4, r0
mov r5, r1
ldr ip, [sp, #20]
mov r3, #0
mov r2, #0
stm ip, {r4-r5}
bl __aeabi_dcmplt
ldr r3, [sp, #124]
cmp r0, #0
ldr r3, [r3]
lsl r6, r6, #3
bne .L167
cmp r3, #0
mvneq r3, #0
bne .L48
.L49:
ldr r2, [sp, #140]
mov r0, r4
str r3, [r2]
mov r1, r5
mov r2, #0
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
beq .L50
ldmia r7, {r0-r1}
add r3, sp, #56
ldmia r3, {r2-r3}
bl __aeabi_dmul
ldr r3, [sp, #20]
stm r3, {r0-r1}
.L50:
ldr r3, [sp, #36]
ldr r2, [sp, #72]
cmp r3, r2
ldr r2, [sp, #44]
str r3, [r2]
bge .L62
mov r10, #0
mov fp, #0
ldr r2, [sp, #116]
ldr r3, [sp, #72]
add r3, r3, r2
ldr r2, [sp, #48]
add r3, r2, r3, lsl #3
str r3, [sp, #24]
ldr r3, [sp, #148]
add r6, r2, r6
add r9, r2, r3
str r9, [sp, #4]
ldr r9, [sp, #36]
.L61:
ldr r1, [sp, #4]
ldmia r1!, {r2-r3}
str r1, [sp, #4]
ldmia r6!, {r0-r1}
bl __aeabi_dadd
mov r2, r0
mov r3, r1
str r2, [sp, #160]
str r3, [sp, #164]
mov r2, r10
mov r3, fp
mov r4, r0
mov r5, r1
bl __aeabi_dcmpeq
cmp r0, #0
beq .L55
ldmdb r6, {r2-r3}
add r1, sp, #56
ldmia r1, {r0-r1}
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r4, r0
mov r5, r1
str r2, [sp, #160]
str r3, [sp, #164]
.L55:
mov r3, fp
mov r1, r5
mov r2, r10
mov r0, r4
bl __aeabi_dcmpge
cmp r0, #0
addeq r3, r5, #-2147483648
streq r3, [sp, #16]
ldr r3, [sp, #20]
mov r2, r10
ldr r7, [r3, #4]
ldr r8, [r3]
mov r1, r7
mov r3, fp
mov r0, r8
strne r5, [sp, #16]
bl __aeabi_dcmpge
cmp r0, #0
addeq r7, r7, #-2147483648
mov r2, r8
mov r0, r4
mov r3, r7
ldr r1, [sp, #16]
bl __aeabi_dcmple
cmp r0, #0
add r9, r9, #1
beq .L59
mov r3, r5
mov r2, r4
ldr r1, [sp, #20]
stm r1, {r2-r3}
ldr r3, [sp, #44]
str r9, [r3]
.L59:
ldr r3, [sp, #24]
cmp r3, r6
bne .L61
.L62:
mov r2, #0
ldr r0, [sp, #104]
ldr r1, [sp, #92]
ldr ip, [sp, #120]
ldr r1, [r1]
orrs r0, r0, ip
ldr r0, [sp, #112]
ldr r3, .L174+8
str r1, [r0]
ldr r1, [sp, #76]
ldr r1, [r1]
str r1, [r0, #4]
ldr r1, [sp, #44]
ldr r0, [sp, #108]
ldr r1, [r1]
add r10, r0, r1, lsl #3
ldr r0, [sp, #8]
stmdb r10, {r2-r3}
str r1, [sp, #4]
stm r0, {r2-r3}
lsl r3, r1, #3
bne .L168
ldr r2, [sp, #92]
ldr r1, [sp, #4]
ldr r2, [r2]
sub r7, r1, #1
cmp r2, r7
str r2, [sp, #32]
bgt .L63
ldr r2, [sp, #48]
sub r3, r3, #8
add r2, r2, r3
str r2, [sp, #24]
ldr r2, [sp, #68]
str r7, [sp, #28]
add r3, r2, r3
str r3, [sp, #16]
b .L69
.L152:
mov r2, r4
mov r0, r4
mov r3, r5
mov r1, r5
bl __aeabi_dmul
ldr r4, [sp, #8]
mov r2, r0
mov r3, r1
ldmia r4, {r0-r1}
bl __aeabi_dadd
ldr r3, [sp, #28]
ldr r2, [sp, #32]
sub r3, r3, #1
cmp r2, r3
stm r4, {r0-r1}
str r3, [sp, #28]
bgt .L63
.L69:
mov ip, r10
ldr fp, [r10, #-8]!
ldr r1, [sp, #24]
ldr r9, [r10, #4]
ldmdb r1!, {r2-r3}
sub ip, ip, #16
str r1, [sp, #24]
mov r0, fp
mov r1, r9
str ip, [sp, #36]
bl __aeabi_dmul
add r8, r1, #-2147483648
mov r3, r8
mov r2, r0
stmdb r10, {r2-r3}
mov r2, #0
mov r3, #0
mov r5, r1
mov r4, r0
bl __aeabi_dcmple
mov ip, r0
mov r1, r9
cmp ip, #0
mov r2, #0
mov r3, #0
mov r0, fp
moveq r8, r5
bl __aeabi_dcmpge
ldr r3, [sp, #16]
cmp r0, #0
ldr r7, [r3, #-8]!
addeq r9, r9, #-2147483648
ldr r6, [r3, #4]
mov r2, fp
mov r1, r8
str r3, [sp, #16]
mov r0, r4
mov r3, r9
bl __aeabi_dadd
mov r2, #0
mov r8, r0
mov r9, r1
mov r3, #0
mov r1, r6
mov r0, r7
bl __aeabi_dcmpge
cmp r0, #0
addeq r6, r6, #-2147483648
mov r2, r7
mov r3, r6
mov r0, r8
mov r1, r9
bl __aeabi_dmul
ldr r3, [sp, #12]
ldmia r3, {r2-r3}
bl __aeabi_dcmplt
cmp r0, #0
beq .L152
mov r0, #0
mov r1, #0
ldr r2, [sp, #36]
ldr r7, [sp, #28]
stm r2, {r0-r1}
ldr r2, [sp, #112]
add r3, r7, #1
str r3, [r2]
ldr r3, [sp, #44]
ldr r3, [r3]
str r3, [sp, #4]
.L63:
ldr r3, [sp, #76]
ldr r2, [sp, #4]
ldr r3, [r3]
cmp r3, r2
str r3, [sp, #32]
ble .L162
ldr r3, [sp, #4]
ldr r2, [sp, #100]
ldr r1, [sp, #48]
add r2, r2, r3
sub r2, r2, #-536870911
add r2, r1, r2, lsl #3
ldr r1, [sp, #108]
sub r3, r3, #-536870911
ldr r0, [sp, #68]
str r2, [sp, #28]
add r2, r1, r3, lsl #3
add r2, r2, #8
add r10, r0, r3, lsl #3
str r2, [sp, #24]
add r7, r1, r3, lsl #3
b .L86
.L155:
mov r2, r4
mov r0, r4
mov r3, r5
mov r1, r5
bl __aeabi_dmul
ldr r4, [sp, #8]
ldmia r4, {r2-r3}
bl __aeabi_dadd
ldr r3, [sp, #4]
ldr r2, [sp, #32]
add r3, r3, #1
cmp r2, r3
stm r4, {r0-r1}
str r3, [sp, #4]
beq .L96
.L86:
ldmia r7, {r2-r3}
ldr ip, [sp, #28]
add r10, r10, #8
ldmia ip!, {r0-r1}
str ip, [sp, #28]
bl __aeabi_dmul
add r9, r1, #-2147483648
mov r2, r0
mov r3, r9
mov r5, r1
ldr r1, [sp, #24]
mov r4, r0
stm r1!, {r2-r3}
ldr fp, [r7], #8
mov r2, #0
ldr r8, [r7, #-4]
mov r3, #0
str r1, [sp, #24]
mov r0, fp
mov r1, r8
bl __aeabi_dcmpge
ldr r3, [r10, #-8]
cmp r0, #0
mov r1, r5
mov r2, #0
str r3, [sp, #16]
mov r0, r4
mov r3, #0
addeq r8, r8, #-2147483648
bl __aeabi_dcmple
mov ip, r0
cmp ip, #0
movne r3, r9
moveq r3, r5
mov r2, r4
mov r1, r8
mov r0, fp
bl __aeabi_dadd
ldr r6, [r10, #-4]
mov r8, r0
mov r9, r1
mov r2, #0
mov r1, r6
mov r3, #0
ldr r0, [sp, #16]
bl __aeabi_dcmpge
cmp r0, #0
addeq r6, r6, #-2147483648
mov r3, r6
ldr r2, [sp, #16]
mov r0, r8
mov r1, r9
bl __aeabi_dmul
ldr r3, [sp, #12]
ldmia r3, {r2-r3}
bl __aeabi_dcmplt
cmp r0, #0
beq .L155
mov r2, #0
mov r3, #0
stm r7, {r2-r3}
.L161:
ldr r3, [sp, #112]
ldr r2, [sp, #4]
str r2, [r3, #4]
.L162:
ldr r3, [sp, #8]
ldmia r3, {r0-r1}
.L85:
.L96:
mov r2, r0
mov r3, r1
mov r0, #0
ldr r1, .L174+8
bl __aeabi_ddiv
mov r2, r0
mov r3, r1
str r2, [sp, #160]
str r3, [sp, #164]
bl sqrt
mov r4, r0
mov r5, r1
ldr r3, [sp, #128]
mov r2, #0
stm r3, {r4-r5}
ldr r3, [sp, #20]
ldr r6, [r3, #4]
ldr r7, [r3]
mov r1, r6
mov r3, #0
mov r0, r7
bl __aeabi_dcmpge
cmp r0, #0
addeq r6, r6, #-2147483648
mov r2, r7
mov r3, r6
mov r0, r4
mov r1, r5
bl __aeabi_dmul
add r3, sp, #160
ldmia r3, {r2-r3}
ldr ip, [sp, #132]
stm ip, {r0-r1}
ldr r1, [sp, #20]
ldmia r1, {r0-r1}
bl __aeabi_dmul
ldr r3, [sp, #136]
stm r3, {r0-r1}
ldr r3, .L174
ldr r2, [r3]
ldr r3, [sp, #172]
eors r2, r3, r2
mov r3, #0
bne .L169
mov r0, #0
add sp, sp, #180
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L167:
cmp r3, #0
beq .L47
ldr r3, [sp, #28]
add r3, r3, #1
str r3, [sp, #28]
.L48:
ldr r3, [sp, #32]
ldr r2, [sp, #28]
add r3, r3, r2
b .L49
.L175:
.align 2
.L174:
.word .LC1
.word .LC0
.word 1072693248
.L165:
ldr r2, [sp, #40]
add r3, r3, r2
str r3, [sp, #144]
.L10:
ldr r3, [sp, #92]
ldr r1, [sp, #40]
ldr r6, [r3]
ldr r0, [sp, #64]
ldr r3, [sp, #4]
add r1, r6, r1
add r1, r0, r1, lsl #3
ldmia r3, {r2-r3}
ldmdb r1, {r0-r1}
bl __aeabi_dsub
mov r2, r0
mov r3, r1
ldr ip, [sp, #36]
str r2, [sp, #152]
str r3, [sp, #156]
cmp r6, ip
bge .L102
mov r1, #0
ldr r0, [sp, #116]
ldr r4, [sp, #48]
str r1, [sp, #28]
sub r1, r6, #-536870911
add r6, r0, r6
add r6, r4, r6, lsl #3
mov r10, #0
mov fp, #0
mov r8, r6
ldr lr, [sp, #80]
add r7, r4, r1, lsl #3
sub r0, lr, #8
add r9, lr, r1, lsl #3
ldr lr, [sp, #96]
add lr, lr, r1, lsl #3
str lr, [sp, #16]
ldr lr, [sp, #84]
add lr, lr, r1, lsl #3
str lr, [sp, #32]
ldr lr, [sp, #68]
add r1, lr, r1, lsl #3
str r1, [sp, #40]
add r1, r0, ip, lsl #3
str r1, [sp, #88]
.L23:
ldmia r9!, {r0-r1}
bl __aeabi_dadd
mov r2, r10
mov r3, fp
mov r6, r1
mov r5, r0
bl __aeabi_dcmpge
cmp r0, #0
movne ip, r6
ldr lr, [sp, #24]
addeq ip, r6, #-2147483648
ldr r1, [lr]
ldr r4, [lr, #4]
mov r2, r5
mov r3, ip
mov r0, r1
str r1, [sp, #52]
mov r1, r4
bl __aeabi_dcmpgt
cmp r0, #0
ldr ip, [sp, #40]
ldrne r5, [sp, #52]
addne r6, r4, #-2147483648
ldmia ip!, {r0-r1}
mov r2, r5
mov r3, r6
str ip, [sp, #40]
bl __aeabi_ddiv
mov r2, r5
mov r4, r0
mov r5, r1
mov r3, fp
stm r7, {r4-r5}
mov r0, r2
mov r1, r6
mov r2, r10
bl __aeabi_dcmplt
cmp r0, #0
ldrne r3, [sp, #28]
mov r0, r4
addne r3, r3, #1
strne r3, [sp, #28]
ldr r3, [sp, #32]
mov r1, r5
ldmia r3!, {r4-r5}
str r3, [sp, #32]
add r3, sp, #152
ldmia r3, {r2-r3}
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r4, r0
mov r5, r1
stm r8, {r4-r5}
mov r2, r10
ldmia r7, {r0-r1}
mov r3, fp
bl __aeabi_dcmpeq
cmp r0, #0
add r7, r7, #8
ldrne r3, [sp, #16]
ldmiane r3, {r4-r5}
stmne r8, {r4-r5}
.L21:
ldr r3, [sp, #4]
mov r0, r4
ldmia r3, {r2-r3}
mov r1, r5
bl __aeabi_dsub
mov r3, r1
mov r2, r0
ldr r1, [sp, #88]
str r2, [sp, #152]
str r3, [sp, #156]
cmp r9, r1
ldr r1, [sp, #16]
add r8, r8, #8
add r1, r1, #8
str r1, [sp, #16]
bne .L23
.L15:
ldr r3, [sp, #36]
ldr r2, [sp, #72]
cmp r3, r2
bge .L149
add r3, sp, #152
ldmia r3, {r2-r3}
ldr r0, [sp, #36]
ldr ip, [sp, #116]
sub r1, r0, #-536870911
add r6, ip, r0
ldr ip, [sp, #80]
ldr lr, [sp, #84]
sub r0, ip, #8
add r10, ip, r1, lsl #3
ldr ip, [sp, #96]
add fp, ip, r1, lsl #3
ldr ip, [sp, #68]
add ip, ip, r1, lsl #3
str ip, [sp, #16]
ldr ip, [sp, #48]
add r7, ip, r1, lsl #3
add r1, lr, r1, lsl #3
str r1, [sp, #32]
mov r1, r0
ldr r0, [sp, #72]
add r6, ip, r6, lsl #3
add r1, r1, r0, lsl #3
str r1, [sp, #40]
.L31:
ldmia r10!, {r0-r1}
bl __aeabi_dadd
mov r2, #0
mov r3, #0
mov r5, r1
mov r4, r0
bl __aeabi_dcmpge
cmp r0, #0
movne ip, r5
ldr lr, [sp, #24]
addeq ip, r5, #-2147483648
ldr r9, [lr]
ldr r8, [lr, #4]
mov r2, r4
mov r3, ip
mov r1, r8
mov r0, r9
bl __aeabi_dcmpgt
cmp r0, #0
movne r4, r9
ldr ip, [sp, #16]
addne r5, r8, #-2147483648
ldmia ip!, {r0-r1}
mov r2, r4
mov r3, r5
str ip, [sp, #16]
bl __aeabi_ddiv
add r3, sp, #152
ldmia r3, {r2-r3}
mov r4, r0
mov r5, r1
stm r7, {r4-r5}
ldr ip, [sp, #32]
ldmia ip!, {r4-r5}
str ip, [sp, #32]
bl __aeabi_dmul
mov r2, r4
mov r3, r5
bl __aeabi_dmul
mov r4, r0
mov r5, r1
stm r6, {r4-r5}
mov r2, #0
ldmia r7!, {r0-r1}
mov r3, #0
bl __aeabi_dcmpeq
cmp r0, #0
ldmiane fp, {r4-r5}
stmne r6, {r4-r5}
.L29:
ldr r3, [sp, #4]
mov r0, r4
ldmia r3, {r8-r9}
mov r1, r5
mov r2, r8
mov r3, r9
bl __aeabi_dsub
mov r3, r1
mov r2, r0
ldr r1, [sp, #40]
str r2, [sp, #152]
str r3, [sp, #156]
cmp r1, r10
add fp, fp, #8
add r6, r6, #8
bne .L31
b .L25
.L168:
ldr r2, [sp, #92]
ldr r1, [sp, #4]
ldr r2, [r2]
sub r1, r1, #1
cmp r2, r1
str r2, [sp, #36]
str r1, [sp, #24]
bgt .L70
ldr r1, [sp, #68]
sub r2, r3, #8
add r7, r1, r2
ldr r2, [sp, #48]
mov r6, r7
add r3, r2, r3
str r3, [sp, #16]
b .L79
.L171:
ldmdb r6, {r2-r3}
ldmia r6, {r0-r1}
bl __aeabi_ddiv
ldmia r10, {r2-r3}
add r5, r1, #-2147483648
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
str r2, [r10, #-16]
str r3, [r10, #-12]
mov r2, #0
mov r3, #0
mov r8, r0
mov r9, r1
bl __aeabi_dcmpge
ldr r5, [r6, #-8]!
cmp r0, #0
ldr r4, [r6, #4]
strne r8, [sp, #28]
strne r9, [sp, #32]
beq .L74
.L73:
mov r2, r7
mov r0, r8
mov r3, fp
mov r1, r9
bl __aeabi_dadd
mov r2, #0
mov r8, r0
mov r9, r1
mov r3, #0
mov r1, r4
mov r0, r5
bl __aeabi_dcmpge
cmp r0, #0
addeq r4, r4, #-2147483648
mov r2, r5
mov r3, r4
mov r0, r8
mov r1, r9
bl __aeabi_dmul
ldr r3, [sp, #12]
ldmia r3, {r2-r3}
bl __aeabi_dcmplt
cmp r0, #0
bne .L170
ldr ip, [sp, #28]
sub r10, r10, #8
mov r2, ip
mov r0, ip
ldr ip, [sp, #32]
mov r3, ip
mov r1, ip
bl __aeabi_dmul
ldr r4, [sp, #8]
mov r2, r0
mov r3, r1
ldmia r4, {r0-r1}
bl __aeabi_dadd
ldr r3, [sp, #24]
ldr r2, [sp, #36]
sub r3, r3, #1
str r3, [sp, #24]
cmp r2, r3
ldr r3, [sp, #16]
stm r4, {r0-r1}
sub r3, r3, #8
str r3, [sp, #16]
bgt .L70
.L79:
ldr r7, [r10, #-8]
ldr fp, [r10, #-4]
mov r3, #0
mov r0, r7
mov r2, #0
mov r1, fp
bl __aeabi_dcmpeq
sub r3, r10, #16
cmp r0, #0
str r3, [sp, #40]
bne .L171
ldr r3, [sp, #16]
mov r0, r7
sub r3, r3, #16
ldmia r3, {r2-r3}
mov r1, fp
bl __aeabi_dmul
add r9, r1, #-2147483648
mov r2, r0
mov r3, r9
str r2, [r10, #-16]
str r3, [r10, #-12]
mov r2, #0
mov r3, #0
mov r8, r0
bl __aeabi_dcmple
ldr r5, [r6, #-8]!
cmp r0, #0
ldr r4, [r6, #4]
strne r8, [sp, #28]
strne r9, [sp, #32]
beq .L74
.L75:
mov r1, fp
mov r0, r7
mov r2, #0
mov r3, #0
bl __aeabi_dcmpge
cmp r0, #0
addeq fp, fp, #-2147483648
b .L73
.L170:
mov r0, #0
mov r1, #0
ldr r2, [sp, #40]
ldr r3, [sp, #24]
stm r2, {r0-r1}
ldr r2, [sp, #112]
add r3, r3, #1
str r3, [r2]
ldr r3, [sp, #44]
ldr r3, [r3]
str r3, [sp, #4]
.L70:
ldr r3, [sp, #76]
ldr r2, [sp, #4]
ldr r3, [r3]
cmp r3, r2
str r3, [sp, #32]
ble .L162
ldr r2, [sp, #4]
ldr r3, [sp, #100]
ldr r1, [sp, #48]
add r3, r3, r2
add r3, r1, r3, lsl #3
str r3, [sp, #28]
ldr r3, [sp, #108]
sub fp, r2, #-536870911
add r10, r3, fp, lsl #3
ldr r3, [sp, #68]
mov r6, #0
add fp, r3, fp, lsl #3
str fp, [sp, #24]
mov r7, #0
mov fp, r10
b .L95
.L173:
ldr r1, [sp, #24]
ldmia r1, {r2-r3}
ldmdb r1, {r0-r1}
bl __aeabi_ddiv
sub r3, fp, #16
ldmia r3, {r2-r3}
add r5, r1, #-2147483648
mov r1, r5
bl __aeabi_dmul
mov r2, r0
mov r3, r1
mov r10, r0
mov r4, r1
stm fp, {r2-r3}
.L89:
ldr r8, [fp, #-4]
ldr r9, [fp, #-8]
mov r1, r8
mov r0, r9
mov r2, r6
mov r3, r7
bl __aeabi_dcmpge
ldr r3, [sp, #24]
cmp r0, #0
ldr r2, [r3]
ldr r5, [r3, #4]
add r3, r3, #8
mov r1, r4
str r2, [sp, #16]
str r3, [sp, #24]
mov r2, r6
mov r3, r7
mov r0, r10
addeq r8, r8, #-2147483648
bl __aeabi_dcmpge
cmp r0, #0
movne ip, r4
addeq ip, r4, #-2147483648
mov r3, ip
mov r2, r10
mov r0, r9
mov r1, r8
bl __aeabi_dadd
mov r2, r6
mov r8, r0
mov r9, r1
mov r3, r7
mov r1, r5
ldr r0, [sp, #16]
bl __aeabi_dcmpge
cmp r0, #0
addeq r5, r5, #-2147483648
mov r3, r5
ldr r2, [sp, #16]
mov r0, r8
mov r1, r9
bl __aeabi_dmul
ldr r3, [sp, #12]
ldmia r3, {r2-r3}
bl __aeabi_dcmplt
cmp r0, #0
bne .L172
mov r3, r4
mov r2, r10
mov r1, r4
mov r0, r10
bl __aeabi_dmul
ldr r4, [sp, #8]
ldmia r4, {r2-r3}
bl __aeabi_dadd
ldr r3, [sp, #4]
ldr r2, [sp, #32]
add r3, r3, #1
str r3, [sp, #4]
cmp r2, r3
ldr r3, [sp, #28]
stm r4, {r0-r1}
add r3, r3, #8
str r3, [sp, #28]
beq .L96
.L95:
ldmia fp!, {r4-r5}
mov r2, r6
mov r3, r7
mov r0, r4
mov r1, r5
bl __aeabi_dcmpeq
cmp r0, #0
bne .L173
ldr r3, [sp, #28]
mov r0, r4
ldmdb r3, {r2-r3}
mov r1, r5
bl __aeabi_dmul
add r4, r1, #-2147483648
mov r2, r0
mov r3, r4
mov r10, r0
stm fp, {r2-r3}
b .L89
.L74:
str r9, [sp, #32]
str r8, [sp, #28]
add r9, r9, #-2147483648
b .L75
.L164:
mov r0, #0
mov r1, #0
ldr r2, [sp, #64]
ldr ip, [sp, #40]
add r2, r2, ip, lsl #3
stm r2, {r0-r1}
ldmia r3, {r0-r1}
b .L5
.L172:
mov r2, #0
mov r3, #0
stm fp, {r2-r3}
b .L161
.L47:
mvn r3, #0
ldr r2, [sp, #140]
str r3, [r2]
b .L50
.L102:
mov r3, #0
str r3, [sp, #28]
b .L15
.L101:
mov r3, #0
str r3, [sp, #28]
b .L6
.L166:
ldr r2, [sp, #40]
add r3, r3, r2
str r3, [sp, #144]
b .L14
.L169:
bl __stack_chk_fail
.size dlar1v_, .-dlar1v_
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139206.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter the number of elements:"
.LC1:
.string "%d"
.LC2:
.string "Enter the elements:"
.LC3:
.string "The Array elements are:"
.LC4:
.string "sum = %d\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea rdi, .LC0[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 112
.cfi_def_cfa_offset 144
mov rax, QWORD PTR fs:40
mov QWORD PTR 104[rsp], rax
xor eax, eax
call puts@PLT
lea rsi, 12[rsp]
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rdi, .LC2[rip]
call puts@PLT
mov eax, DWORD PTR 12[rsp]
test eax, eax
jle .L2
lea rbp, 16[rsp]
xor ebx, ebx
lea r12, .LC1[rip]
.p2align 4,,10
.p2align 3
.L3:
mov rsi, rbp
mov rdi, r12
xor eax, eax
add ebx, 1
call __isoc99_scanf@PLT
add rbp, 4
cmp DWORD PTR 12[rsp], ebx
jg .L3
.L2:
lea rdi, .LC3[rip]
call puts@PLT
mov edx, DWORD PTR 12[rsp]
test edx, edx
jle .L7
sub edx, 1
lea rax, 16[rsp]
lea rcx, 20[rsp+rdx*4]
xor edx, edx
.p2align 4,,10
.p2align 3
.L5:
add edx, DWORD PTR [rax]
add rax, 4
cmp rax, rcx
jne .L5
.L4:
xor eax, eax
lea rsi, .LC4[rip]
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L12
add rsp, 112
.cfi_remember_state
.cfi_def_cfa_offset 32
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L7:
.cfi_restore_state
xor edx, edx
jmp .L4
.L12:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139206.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter the number of elements:\000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "Enter the elements:\000"
.align 2
.LC3:
.ascii "The Array elements are:\000"
.align 2
.LC4:
.ascii "sum = %d\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC5:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L13
sub sp, sp, #88
ldr r0, .L13+4
ldr r3, [r3]
str r3, [sp, #84]
mov r3,#0
bl puts
mov r1, sp
ldr r0, .L13+8
bl __isoc99_scanf
ldr r0, .L13+12
bl puts
ldr r3, [sp]
cmp r3, #0
ble .L2
mov r5, #0
ldr r6, .L13+8
add r4, sp, #4
.L3:
mov r1, r4
mov r0, r6
bl __isoc99_scanf
ldr r3, [sp]
add r5, r5, #1
cmp r3, r5
add r4, r4, #4
bgt .L3
.L2:
ldr r0, .L13+16
bl puts
ldr r0, [sp]
mov r2, #0
cmp r0, #0
ble .L4
add r3, sp, #4
add r0, r3, r0, lsl #2
.L5:
ldr r1, [r3], #4
cmp r3, r0
add r2, r2, r1
bne .L5
.L4:
mov r0, #1
ldr r1, .L13+20
bl __printf_chk
ldr r3, .L13
ldr r2, [r3]
ldr r3, [sp, #84]
eors r2, r3, r2
mov r3, #0
bne .L12
add sp, sp, #88
@ sp needed
pop {r4, r5, r6, pc}
.L12:
bl __stack_chk_fail
.L14:
.align 2
.L13:
.word .LC5
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139207.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "\nEnter no. of elements: "
.LC1:
.string "%d"
.LC2:
.string "\nEnter %d elements:\n"
.LC3:
.string "\nGiven Array:-"
.LC4:
.string " %d"
.LC5:
.string "\nSorted Array:-"
.LC6:
.string "\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
lea rsi, .LC0[rip]
mov edi, 1
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
sub rsp, 120
.cfi_def_cfa_offset 160
mov rax, QWORD PTR fs:40
mov QWORD PTR 104[rsp], rax
xor eax, eax
lea rbx, 12[rsp]
call __printf_chk@PLT
mov rsi, rbx
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov edx, DWORD PTR 12[rsp]
mov edi, 1
xor eax, eax
lea rsi, .LC2[rip]
call __printf_chk@PLT
mov ecx, DWORD PTR 12[rsp]
test ecx, ecx
jle .L2
lea r12, 16[rsp]
xor ebp, ebp
lea r13, .LC1[rip]
.p2align 4,,10
.p2align 3
.L3:
mov rsi, r12
mov rdi, r13
xor eax, eax
add ebp, 1
call __isoc99_scanf@PLT
add r12, 4
cmp DWORD PTR 12[rsp], ebp
jg .L3
.L2:
lea rdi, .LC3[rip]
call puts@PLT
mov edx, DWORD PTR 12[rsp]
test edx, edx
jle .L4
xor ebp, ebp
lea r12, 16[rsp]
lea r13, .LC4[rip]
.p2align 4,,10
.p2align 3
.L5:
mov edx, DWORD PTR [r12+rbp*4]
mov rsi, r13
mov edi, 1
xor eax, eax
add rbp, 1
call __printf_chk@PLT
cmp DWORD PTR 12[rsp], ebp
jg .L5
.L4:
mov edi, 10
call putchar@PLT
mov r8d, DWORD PTR 12[rsp]
cmp r8d, 1
je .L6
movsx rsi, r8d
lea eax, -1[r8]
mov edi, r8d
sal rsi, 2
sal rax, 2
lea r9, 16[rsp+rsi]
add rsi, rbx
sub rsi, rax
.p2align 4,,10
.p2align 3
.L10:
test r8d, r8d
je .L7
mov rax, r9
.p2align 4,,10
.p2align 3
.L9:
mov edx, DWORD PTR [rax]
mov ecx, DWORD PTR -4[rax]
cmp edx, ecx
jge .L8
mov DWORD PTR [rax], ecx
mov DWORD PTR -4[rax], edx
.L8:
sub rax, 4
cmp rsi, rax
jne .L9
.L7:
sub edi, 1
cmp edi, 1
jne .L10
.L6:
lea rdi, .LC5[rip]
call puts@PLT
mov eax, DWORD PTR 12[rsp]
test eax, eax
jle .L11
xor ebx, ebx
lea r12, 16[rsp]
lea rbp, .LC4[rip]
.p2align 4,,10
.p2align 3
.L12:
mov edx, DWORD PTR [r12+rbx*4]
mov rsi, rbp
mov edi, 1
xor eax, eax
add rbx, 1
call __printf_chk@PLT
cmp DWORD PTR 12[rsp], ebx
jg .L12
.L11:
lea rdi, .LC6[rip]
call puts@PLT
mov rax, QWORD PTR 104[rsp]
sub rax, QWORD PTR fs:40
jne .L27
add rsp, 120
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L27:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.text
.p2align 4
.globl bubble_sort
.type bubble_sort, @function
bubble_sort:
.LFB24:
.cfi_startproc
endbr64
mov rax, rdi
mov r8d, esi
mov edi, edx
cmp edx, 1
je .L28
movsx rdx, esi
lea r9, [rax+rdx*4]
lea eax, -1[r8]
lea rsi, -4[r9]
sal rax, 2
sub rsi, rax
.p2align 4,,10
.p2align 3
.L33:
test r8d, r8d
je .L30
mov rax, r9
.p2align 4,,10
.p2align 3
.L31:
mov edx, DWORD PTR [rax]
mov ecx, DWORD PTR -4[rax]
cmp edx, ecx
jge .L32
mov DWORD PTR [rax], ecx
mov DWORD PTR -4[rax], edx
.L32:
sub rax, 4
cmp rax, rsi
jne .L31
.L30:
sub edi, 1
cmp edi, 1
jne .L33
.L28:
ret
.cfi_endproc
.LFE24:
.size bubble_sort, .-bubble_sort
.p2align 4
.globl pass
.type pass, @function
pass:
.LFB25:
.cfi_startproc
endbr64
mov edx, esi
test esi, esi
je .L44
movsx rcx, esi
sub edx, 1
sal rcx, 2
sal rdx, 2
lea rsi, -4[rdi+rcx]
lea rax, [rdi+rcx]
sub rsi, rdx
.p2align 4,,10
.p2align 3
.L48:
mov edx, DWORD PTR [rax]
mov ecx, DWORD PTR -4[rax]
cmp edx, ecx
jge .L46
mov DWORD PTR [rax], ecx
mov DWORD PTR -4[rax], edx
.L46:
sub rax, 4
cmp rax, rsi
jne .L48
.L44:
ret
.cfi_endproc
.LFE25:
.size pass, .-pass
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139207.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "\012Enter no. of elements: \000"
.align 2
.LC1:
.ascii "%d\000"
.align 2
.LC2:
.ascii "\012Enter %d elements:\012\000"
.align 2
.LC3:
.ascii "\012Given Array:-\000"
.align 2
.LC4:
.ascii " %d\000"
.align 2
.LC5:
.ascii "\012Sorted Array:-\000"
.align 2
.LC6:
.ascii "\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC7:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r3, .L28
sub sp, sp, #88
ldr r1, .L28+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #84]
mov r3,#0
bl __printf_chk
mov r1, sp
ldr r0, .L28+8
bl __isoc99_scanf
mov r0, #1
ldr r2, [sp]
ldr r1, .L28+12
bl __printf_chk
ldr r3, [sp]
cmp r3, #0
ble .L2
mov r5, #0
ldr r6, .L28+8
add r4, sp, #4
.L3:
mov r1, r4
mov r0, r6
bl __isoc99_scanf
ldr r3, [sp]
add r5, r5, #1
cmp r3, r5
add r4, r4, #4
bgt .L3
.L2:
ldr r0, .L28+16
bl puts
ldr r3, [sp]
cmp r3, #0
ble .L4
mov r5, sp
mov r4, #0
ldr r6, .L28+20
.L5:
mov r1, r6
mov r0, #1
ldr r2, [r5, #4]!
bl __printf_chk
ldr r3, [sp]
add r4, r4, #1
cmp r3, r4
bgt .L5
.L4:
mov r0, #10
bl putchar
ldr lr, [sp]
cmp lr, #1
beq .L6
mov ip, lr
add r0, sp, #4
add r4, r0, lr, lsl #2
.L10:
cmp lr, #0
beq .L7
mov r3, r4
.L9:
ldr r2, [r3]
ldr r1, [r3, #-4]!
cmp r2, r1
strlt r1, [r3, #4]
strlt r2, [r3]
cmp r0, r3
bne .L9
.L7:
sub ip, ip, #1
cmp ip, #1
bne .L10
.L6:
ldr r0, .L28+24
bl puts
ldr r3, [sp]
cmp r3, #0
ble .L11
mov r5, sp
mov r4, #0
ldr r6, .L28+20
.L12:
mov r1, r6
mov r0, #1
ldr r2, [r5, #4]!
bl __printf_chk
ldr r3, [sp]
add r4, r4, #1
cmp r3, r4
bgt .L12
.L11:
ldr r0, .L28+28
bl puts
ldr r3, .L28
ldr r2, [r3]
ldr r3, [sp, #84]
eors r2, r3, r2
mov r3, #0
bne .L27
mov r0, #0
add sp, sp, #88
@ sp needed
pop {r4, r5, r6, pc}
.L27:
bl __stack_chk_fail
.L29:
.align 2
.L28:
.word .LC7
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.word .LC4
.word .LC5
.word .LC6
.size main, .-main
.text
.align 2
.global bubble_sort
.syntax unified
.arm
.fpu softvfp
.type bubble_sort, %function
bubble_sort:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #1
bxeq lr
push {r4, lr}
add r4, r0, r1, lsl #2
.L36:
cmp r1, #0
beq .L32
mov r3, r4
.L35:
ldr ip, [r3]
ldr lr, [r3, #-4]!
cmp ip, lr
stmlt r3, {ip, lr}
cmp r0, r3
bne .L35
.L32:
sub r2, r2, #1
cmp r2, #1
bne .L36
pop {r4, pc}
.size bubble_sort, .-bubble_sort
.align 2
.global pass
.syntax unified
.arm
.fpu softvfp
.type pass, %function
pass:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r1, #0
bxeq lr
add r1, r0, r1, lsl #2
.L55:
ldr r3, [r1]
ldr r2, [r1, #-4]!
cmp r3, r2
strlt r2, [r1, #4]
strlt r3, [r1]
cmp r0, r1
bne .L55
bx lr
.size pass, .-pass
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139214.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter a sentence: "
.LC1:
.string "%s"
.LC2:
.string "Reversal of sentence: "
.LC3:
.string "%c\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov ecx, 312
lea rsi, .LC0[rip]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
sub rsp, 2512
.cfi_def_cfa_offset 2544
mov rax, QWORD PTR fs:40
mov QWORD PTR 2504[rsp], rax
xor eax, eax
mov rdi, rsp
mov rbx, rsp
rep stosq
mov DWORD PTR [rdi], 0
mov edi, 1
call __printf_chk@PLT
mov rsi, rbx
lea rdi, .LC1[rip]
xor eax, eax
call __isoc99_scanf@PLT
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov rdi, rbx
call strlen@PLT
lea r12d, -1[rax]
test r12d, r12d
jle .L2
sub eax, 2
lea rbp, 1[rsp+rax]
.p2align 4,,10
.p2align 3
.L3:
movsx edi, BYTE PTR [rbx]
add rbx, 1
call putchar@PLT
cmp rbp, rbx
jne .L3
.L2:
movsx r12, r12d
xor eax, eax
mov edi, 1
movsx edx, BYTE PTR [rsp+r12]
lea rsi, .LC3[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 2504[rsp]
sub rax, QWORD PTR fs:40
jne .L8
add rsp, 2512
.cfi_remember_state
.cfi_def_cfa_offset 32
xor eax, eax
pop rbx
.cfi_def_cfa_offset 24
pop rbp
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L8:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139214.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter a sentence: \000"
.align 2
.LC1:
.ascii "%s\000"
.align 2
.LC2:
.ascii "Reversal of sentence: \000"
.align 2
.LC3:
.ascii "%c\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 2504
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
sub sp, sp, #2496
sub sp, sp, #8
ldr r3, .L9
ldr r2, .L9+4
mov r1, #0
mov r0, sp
ldr r3, [r3]
str r3, [sp, #2500]
mov r3,#0
bl memset
ldr r1, .L9+8
mov r0, #1
bl __printf_chk
mov r1, sp
ldr r0, .L9+12
bl __isoc99_scanf
ldr r1, .L9+16
mov r0, #1
bl __printf_chk
mov r0, sp
bl strlen
sub r6, r0, #1
cmp r6, #0
ble .L2
add r3, sp, #8
sub r5, sp, #2
add r5, r5, r0
sub r4, r3, #9
.L3:
ldrb r0, [r4, #1]! @ zero_extendqisi2
bl putchar
cmp r5, r4
bne .L3
.L2:
add r3, sp, #2496
add r3, r3, #8
add r6, r3, r6
ldrb r2, [r6, #-2504] @ zero_extendqisi2
mov r0, #1
ldr r1, .L9+20
bl __printf_chk
ldr r3, .L9
ldr r2, [r3]
ldr r3, [sp, #2500]
eors r2, r3, r2
mov r3, #0
bne .L8
mov r0, #0
add sp, sp, #2496
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, pc}
.L8:
bl __stack_chk_fail
.L10:
.align 2
.L9:
.word .LC4
.word 2500
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139215.c"
.intel_syntax noprefix
.text
.p2align 4
.type cmplist.part.0, @function
cmplist.part.0:
.LFB26:
.cfi_startproc
test esi, esi
jle .L4
movsx rsi, esi
xor eax, eax
jmp .L3
.p2align 4,,10
.p2align 3
.L8:
add rax, 1
cmp rax, rsi
je .L4
.L3:
mov ecx, DWORD PTR [rdx+rax*4]
cmp DWORD PTR [rdi+rax*4], ecx
je .L8
xor eax, eax
ret
.p2align 4,,10
.p2align 3
.L4:
mov eax, 1
ret
.cfi_endproc
.LFE26:
.size cmplist.part.0, .-cmplist.part.0
.p2align 4
.globl cmplist
.type cmplist, @function
cmplist:
.LFB23:
.cfi_startproc
endbr64
xor eax, eax
cmp esi, ecx
jne .L9
test esi, esi
jle .L13
movsx rsi, esi
xor eax, eax
jmp .L11
.p2align 4,,10
.p2align 3
.L16:
add rax, 1
cmp rax, rsi
je .L13
.L11:
mov ecx, DWORD PTR [rdx+rax*4]
cmp DWORD PTR [rdi+rax*4], ecx
je .L16
xor eax, eax
.L9:
ret
.p2align 4,,10
.p2align 3
.L13:
mov eax, 1
ret
.cfi_endproc
.LFE23:
.size cmplist, .-cmplist
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d,"
.text
.p2align 4
.globl printlist
.type printlist, @function
printlist:
.LFB24:
.cfi_startproc
endbr64
test esi, esi
jle .L22
lea eax, -1[rsi]
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
lea r12, 4[rdi+rax*4]
push rbp
.cfi_def_cfa_offset 24
.cfi_offset 6, -24
lea rbp, .LC0[rip]
push rbx
.cfi_def_cfa_offset 32
.cfi_offset 3, -32
mov rbx, rdi
.p2align 4,,10
.p2align 3
.L19:
mov edx, DWORD PTR [rbx]
mov rsi, rbp
mov edi, 1
xor eax, eax
add rbx, 4
call __printf_chk@PLT
cmp rbx, r12
jne .L19
pop rbx
.cfi_restore 3
.cfi_def_cfa_offset 24
mov edi, 10
pop rbp
.cfi_restore 6
.cfi_def_cfa_offset 16
pop r12
.cfi_restore 12
.cfi_def_cfa_offset 8
jmp putchar@PLT
.p2align 4,,10
.p2align 3
.L22:
mov edi, 10
jmp putchar@PLT
.cfi_endproc
.LFE24:
.size printlist, .-printlist
.section .rodata.str1.1
.LC1:
.string "the_stack_data/100139215.c"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "cmplist(unsorted0, sizeof(unsorted0)/sizeof(unsorted0[0]), sorted0, sizeof(unsorted0)/sizeof(sorted0[0]))"
.align 8
.LC3:
.string "cmplist(unsorted1, sizeof(unsorted1)/sizeof(unsorted1[0]), sorted1, sizeof(unsorted1)/sizeof(sorted1[0]))"
.align 8
.LC4:
.string "cmplist(unsorted2, sizeof(unsorted2)/sizeof(unsorted2[0]), sorted2, sizeof(unsorted2)/sizeof(sorted2[0]))"
.align 8
.LC5:
.string "cmplist(unsorted3, sizeof(unsorted3)/sizeof(unsorted3[0]), sorted3, sizeof(unsorted3)/sizeof(sorted3[0]))"
.align 8
.LC6:
.string "cmplist(unsorted4, sizeof(unsorted4)/sizeof(unsorted4[0]), sorted4, sizeof(unsorted4)/sizeof(sorted4[0]))"
.section .rodata.str1.1
.LC7:
.string "Done!"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB25:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov esi, 15
lea rdi, unsorted0[rip]
call printlist
mov esi, 15
lea rdi, sorted0[rip]
call printlist
lea rdx, sorted0[rip]
mov esi, 15
lea rdi, unsorted0[rip]
call cmplist.part.0
test al, al
je .L32
lea rdx, sorted1[rip]
mov esi, 15
lea rdi, unsorted1[rip]
call cmplist.part.0
test al, al
je .L33
lea rdx, sorted2[rip]
mov esi, 15
lea rdi, unsorted2[rip]
call cmplist.part.0
test al, al
je .L34
lea rdx, sorted3[rip]
mov esi, 15
lea rdi, unsorted3[rip]
call cmplist.part.0
test al, al
je .L35
lea rdx, sorted4[rip]
mov esi, 15
lea rdi, unsorted4[rip]
call cmplist.part.0
test al, al
je .L36
lea rdi, .LC7[rip]
call puts@PLT
xor eax, eax
add rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L32:
.cfi_restore_state
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 40
lea rsi, .LC1[rip]
lea rdi, .LC2[rip]
call __assert_fail@PLT
.L36:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 44
lea rsi, .LC1[rip]
lea rdi, .LC6[rip]
call __assert_fail@PLT
.L35:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 43
lea rsi, .LC1[rip]
lea rdi, .LC5[rip]
call __assert_fail@PLT
.L34:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 42
lea rsi, .LC1[rip]
lea rdi, .LC4[rip]
call __assert_fail@PLT
.L33:
lea rcx, __PRETTY_FUNCTION__.0[rip]
mov edx, 41
lea rsi, .LC1[rip]
lea rdi, .LC3[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE25:
.size main, .-main
.section .rodata
.type __PRETTY_FUNCTION__.0, @object
.size __PRETTY_FUNCTION__.0, 5
__PRETTY_FUNCTION__.0:
.string "main"
.globl sorted4
.data
.align 32
.type sorted4, @object
.size sorted4, 60
sorted4:
.long 0
.long 5
.long 20
.long 25
.long 29
.long 30
.long 34
.long 41
.long 45
.long 61
.long 65
.long 86
.long 92
.long 92
.long 97
.globl unsorted4
.align 32
.type unsorted4, @object
.size unsorted4, 60
unsorted4:
.long 29
.long 65
.long 0
.long 45
.long 20
.long 92
.long 30
.long 86
.long 34
.long 61
.long 41
.long 5
.long 97
.long 92
.long 25
.globl sorted3
.align 32
.type sorted3, @object
.size sorted3, 60
sorted3:
.long 1
.long 3
.long 4
.long 17
.long 17
.long 19
.long 26
.long 57
.long 61
.long 65
.long 71
.long 71
.long 74
.long 86
.long 99
.globl unsorted3
.align 32
.type unsorted3, @object
.size unsorted3, 60
unsorted3:
.long 61
.long 17
.long 71
.long 17
.long 57
.long 99
.long 19
.long 86
.long 71
.long 26
.long 74
.long 1
.long 65
.long 3
.long 4
.globl sorted2
.align 32
.type sorted2, @object
.size sorted2, 60
sorted2:
.long 5
.long 11
.long 15
.long 17
.long 19
.long 20
.long 33
.long 39
.long 42
.long 42
.long 46
.long 48
.long 70
.long 76
.long 91
.globl unsorted2
.align 32
.type unsorted2, @object
.size unsorted2, 60
unsorted2:
.long 17
.long 91
.long 42
.long 42
.long 76
.long 46
.long 15
.long 33
.long 19
.long 39
.long 11
.long 70
.long 20
.long 48
.long 5
.globl sorted1
.align 32
.type sorted1, @object
.size sorted1, 60
sorted1:
.long 10
.long 12
.long 12
.long 15
.long 16
.long 33
.long 50
.long 51
.long 61
.long 65
.long 82
.long 87
.long 87
.long 96
.long 96
.globl unsorted1
.align 32
.type unsorted1, @object
.size unsorted1, 60
unsorted1:
.long 50
.long 87
.long 16
.long 12
.long 96
.long 15
.long 12
.long 33
.long 96
.long 10
.long 82
.long 61
.long 65
.long 51
.long 87
.globl sorted0
.align 32
.type sorted0, @object
.size sorted0, 60
sorted0:
.long 18
.long 29
.long 35
.long 39
.long 49
.long 58
.long 61
.long 65
.long 66
.long 78
.long 79
.long 88
.long 91
.long 95
.long 99
.globl unsorted0
.align 32
.type unsorted0, @object
.size unsorted0, 60
unsorted0:
.long 91
.long 39
.long 99
.long 66
.long 95
.long 65
.long 61
.long 49
.long 79
.long 18
.long 78
.long 35
.long 58
.long 29
.long 88
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139215.c"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type cmplist.part.0, %function
cmplist.part.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #0
ble .L4
mov r3, #0
str lr, [sp, #-4]!
sub r0, r0, #4
sub r2, r2, #4
b .L3
.L13:
cmp r3, r1
beq .L12
.L3:
ldr lr, [r0, #4]!
ldr ip, [r2, #4]!
add r3, r3, #1
cmp lr, ip
beq .L13
mov r0, #0
ldr pc, [sp], #4
.L12:
mov r0, #1
ldr pc, [sp], #4
.L4:
mov r0, #1
bx lr
.size cmplist.part.0, .-cmplist.part.0
.align 2
.global cmplist
.syntax unified
.arm
.fpu softvfp
.type cmplist, %function
cmplist:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r1, r3
bne .L15
b cmplist.part.0
.L15:
mov r0, #0
bx lr
.size cmplist, .-cmplist
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d,\000"
.text
.align 2
.global printlist
.syntax unified
.arm
.fpu softvfp
.type printlist, %function
printlist:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
subs r5, r1, #0
ble .L17
sub r4, r0, #4
ldr r6, .L21
add r5, r4, r5, lsl #2
.L18:
ldr r2, [r4, #4]!
mov r1, r6
mov r0, #1
bl __printf_chk
cmp r4, r5
bne .L18
.L17:
pop {r4, r5, r6, lr}
mov r0, #10
b putchar
.L22:
.align 2
.L21:
.word .LC0
.size printlist, .-printlist
.section .rodata.str1.4
.align 2
.LC1:
.ascii "the_stack_data/100139215.c\000"
.align 2
.LC2:
.ascii "cmplist(unsorted0, sizeof(unsorted0)/sizeof(unsorte"
.ascii "d0[0]), sorted0, sizeof(unsorted0)/sizeof(sorted0[0"
.ascii "]))\000"
.align 2
.LC3:
.ascii "cmplist(unsorted1, sizeof(unsorted1)/sizeof(unsorte"
.ascii "d1[0]), sorted1, sizeof(unsorted1)/sizeof(sorted1[0"
.ascii "]))\000"
.align 2
.LC4:
.ascii "cmplist(unsorted2, sizeof(unsorted2)/sizeof(unsorte"
.ascii "d2[0]), sorted2, sizeof(unsorted2)/sizeof(sorted2[0"
.ascii "]))\000"
.align 2
.LC5:
.ascii "cmplist(unsorted3, sizeof(unsorted3)/sizeof(unsorte"
.ascii "d3[0]), sorted3, sizeof(unsorted3)/sizeof(sorted3[0"
.ascii "]))\000"
.align 2
.LC6:
.ascii "cmplist(unsorted4, sizeof(unsorted4)/sizeof(unsorte"
.ascii "d4[0]), sorted4, sizeof(unsorted4)/sizeof(sorted4[0"
.ascii "]))\000"
.align 2
.LC7:
.ascii "Done!\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r1, #15
ldr r0, .L35
bl printlist
mov r1, #15
ldr r0, .L35+4
bl printlist
ldr r2, .L35+4
mov r1, #15
sub r0, r2, #60
bl cmplist.part.0
cmp r0, #0
beq .L30
ldr r2, .L35+8
mov r1, #15
add r0, r2, #60
bl cmplist.part.0
cmp r0, #0
beq .L31
ldr r2, .L35+12
mov r1, #15
add r0, r2, #60
bl cmplist.part.0
cmp r0, #0
beq .L32
ldr r2, .L35+16
mov r1, #15
add r0, r2, #60
bl cmplist.part.0
cmp r0, #0
beq .L33
ldr r2, .L35+20
mov r1, #15
add r0, r2, #60
bl cmplist.part.0
cmp r0, #0
beq .L34
ldr r0, .L35+24
bl puts
mov r0, #0
pop {r4, pc}
.L30:
mov r2, #40
ldr r3, .L35+28
ldr r1, .L35+32
ldr r0, .L35+36
bl __assert_fail
.L34:
mov r2, #44
ldr r3, .L35+28
ldr r1, .L35+32
ldr r0, .L35+40
bl __assert_fail
.L33:
mov r2, #43
ldr r3, .L35+28
ldr r1, .L35+32
ldr r0, .L35+44
bl __assert_fail
.L32:
mov r2, #42
ldr r3, .L35+28
ldr r1, .L35+32
ldr r0, .L35+48
bl __assert_fail
.L31:
mov r2, #41
ldr r3, .L35+28
ldr r1, .L35+32
ldr r0, .L35+52
bl __assert_fail
.L36:
.align 2
.L35:
.word .LANCHOR0
.word .LANCHOR0+60
.word .LANCHOR0+120
.word .LANCHOR0+240
.word .LANCHOR0+360
.word .LANCHOR0+480
.word .LC7
.word .LANCHOR1
.word .LC1
.word .LC2
.word .LC6
.word .LC5
.word .LC4
.word .LC3
.size main, .-main
.global sorted4
.global unsorted4
.global sorted3
.global unsorted3
.global sorted2
.global unsorted2
.global sorted1
.global unsorted1
.global sorted0
.global unsorted0
.section .rodata
.align 2
.set .LANCHOR1,. + 0
.type __PRETTY_FUNCTION__.4840, %object
.size __PRETTY_FUNCTION__.4840, 5
__PRETTY_FUNCTION__.4840:
.ascii "main\000"
.data
.align 2
.set .LANCHOR0,. + 0
.type unsorted0, %object
.size unsorted0, 60
unsorted0:
.word 91
.word 39
.word 99
.word 66
.word 95
.word 65
.word 61
.word 49
.word 79
.word 18
.word 78
.word 35
.word 58
.word 29
.word 88
.type sorted0, %object
.size sorted0, 60
sorted0:
.word 18
.word 29
.word 35
.word 39
.word 49
.word 58
.word 61
.word 65
.word 66
.word 78
.word 79
.word 88
.word 91
.word 95
.word 99
.type sorted1, %object
.size sorted1, 60
sorted1:
.word 10
.word 12
.word 12
.word 15
.word 16
.word 33
.word 50
.word 51
.word 61
.word 65
.word 82
.word 87
.word 87
.word 96
.word 96
.type unsorted1, %object
.size unsorted1, 60
unsorted1:
.word 50
.word 87
.word 16
.word 12
.word 96
.word 15
.word 12
.word 33
.word 96
.word 10
.word 82
.word 61
.word 65
.word 51
.word 87
.type sorted2, %object
.size sorted2, 60
sorted2:
.word 5
.word 11
.word 15
.word 17
.word 19
.word 20
.word 33
.word 39
.word 42
.word 42
.word 46
.word 48
.word 70
.word 76
.word 91
.type unsorted2, %object
.size unsorted2, 60
unsorted2:
.word 17
.word 91
.word 42
.word 42
.word 76
.word 46
.word 15
.word 33
.word 19
.word 39
.word 11
.word 70
.word 20
.word 48
.word 5
.type sorted3, %object
.size sorted3, 60
sorted3:
.word 1
.word 3
.word 4
.word 17
.word 17
.word 19
.word 26
.word 57
.word 61
.word 65
.word 71
.word 71
.word 74
.word 86
.word 99
.type unsorted3, %object
.size unsorted3, 60
unsorted3:
.word 61
.word 17
.word 71
.word 17
.word 57
.word 99
.word 19
.word 86
.word 71
.word 26
.word 74
.word 1
.word 65
.word 3
.word 4
.type sorted4, %object
.size sorted4, 60
sorted4:
.word 0
.word 5
.word 20
.word 25
.word 29
.word 30
.word 34
.word 41
.word 45
.word 61
.word 65
.word 86
.word 92
.word 92
.word 97
.type unsorted4, %object
.size unsorted4, 60
unsorted4:
.word 29
.word 65
.word 0
.word 45
.word 20
.word 92
.word 30
.word 86
.word 34
.word 61
.word 41
.word 5
.word 97
.word 92
.word 25
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139216.c"
.intel_syntax noprefix
.text
.p2align 4
.globl rush
.type rush, @function
rush:
.LFB0:
.cfi_startproc
endbr64
test esi, esi
je .L50
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
mov r14d, esi
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
mov r12d, 1
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov ebp, edi
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
.p2align 4,,10
.p2align 3
.L2:
cmp r12d, 1
mov ebx, 1
sete r13b
test ebp, ebp
jne .L14
jmp .L16
.p2align 4,,10
.p2align 3
.L51:
test r13b, r13b
je .L19
.L4:
mov edi, 65
call ft_putchar@PLT
.L7:
lea eax, 1[rbx]
cmp ebp, ebx
je .L16
.L18:
mov ebx, eax
.L14:
cmp ebx, 1
sete cl
je .L51
.L19:
cmp r14d, r12d
sete al
cmp ebp, ebx
sete dl
test al, al
je .L6
test dl, dl
je .L20
cmp ebx, 1
je .L6
cmp r12d, 1
jne .L4
.L6:
test dl, dl
je .L20
test r13b, r13b
jne .L8
.L20:
test cl, cl
je .L10
test al, al
je .L21
.L8:
mov edi, 67
call ft_putchar@PLT
lea eax, 1[rbx]
cmp ebp, ebx
jne .L18
.L16:
mov edi, 10
call ft_putchar@PLT
lea eax, 1[r12]
cmp r14d, r12d
je .L1
mov r12d, eax
jmp .L2
.p2align 4,,10
.p2align 3
.L10:
test al, al
jne .L11
.L21:
test r13b, r13b
jne .L11
test cl, cl
jne .L11
test dl, dl
jne .L11
mov edi, 32
call ft_putchar@PLT
jmp .L7
.p2align 4,,10
.p2align 3
.L11:
mov edi, 66
call ft_putchar@PLT
jmp .L7
.p2align 4,,10
.p2align 3
.L1:
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L50:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE0:
.size rush, .-rush
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139216.c"
.text
.align 2
.global rush
.syntax unified
.arm
.fpu softvfp
.type rush, %function
rush:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, lr}
subs r9, r1, #0
popeq {r4, r5, r6, r7, r8, r9, r10, pc}
mov r6, #1
mov r8, r0
add r10, r9, #1
add r7, r0, r6
.L3:
cmp r8, #0
beq .L13
sub r5, r6, #1
clz r5, r5
mov r4, #1
lsr r5, r5, #5
b .L11
.L26:
cmp r4, #1
cmpne r6, #1
beq .L5
.L4:
mov r0, #65
bl ft_putchar
.L6:
add r4, r4, #1
cmp r7, r4
beq .L13
.L11:
sub r3, r4, #1
clz r3, r3
lsr r3, r3, #5
tst r3, r5
bne .L4
sub r1, r9, r6
sub r2, r8, r4
clz r1, r1
clz r2, r2
lsr r1, r1, #5
lsr r2, r2, #5
tst r1, r2
bne .L26
.L5:
tst r2, r5
bne .L7
tst r3, r1
bne .L7
orrs r1, r1, r5
bne .L9
orrs r3, r3, r2
beq .L10
.L9:
mov r0, #66
add r4, r4, #1
bl ft_putchar
cmp r7, r4
bne .L11
.L13:
mov r0, #10
add r6, r6, #1
bl ft_putchar
cmp r10, r6
bne .L3
pop {r4, r5, r6, r7, r8, r9, r10, pc}
.L7:
mov r0, #67
bl ft_putchar
b .L6
.L10:
mov r0, #32
bl ft_putchar
b .L6
.size rush, .-rush
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139217.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "myPtr = %p.\n"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "The value, to which myPtr points, is %f.\n"
.align 8
.LC3:
.string "Because myPtr points to x, the value is the same as %f.\n"
.section .rodata.str1.1
.LC5:
.string "*myPtr = %f, and x = %f.\n"
.LC6:
.string "x = %f.\n"
.text
.p2align 4
.globl basics
.type basics, @function
basics:
.LFB23:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
xor edx, edx
lea rsi, .LC1[rip]
mov edi, 1
sub rsp, 16
.cfi_def_cfa_offset 32
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov rax, QWORD PTR .LC0[rip]
mov r12, rsp
mov QWORD PTR [rsp], rax
xor eax, eax
call __printf_chk@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC1[rip]
call __printf_chk@PLT
movsd xmm0, QWORD PTR [rsp]
mov edi, 1
lea rsi, .LC2[rip]
mov eax, 1
call __printf_chk@PLT
movsd xmm0, QWORD PTR [rsp]
mov edi, 1
lea rsi, .LC3[rip]
mov eax, 1
call __printf_chk@PLT
mov edi, 1
mov eax, 2
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, QWORD PTR [rsp]
lea rsi, .LC5[rip]
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call __printf_chk@PLT
mov edi, 1
mov eax, 2
movsd xmm1, QWORD PTR .LC4[rip]
addsd xmm1, QWORD PTR [rsp]
lea rsi, .LC5[rip]
movapd xmm0, xmm1
movsd QWORD PTR [rsp], xmm1
call __printf_chk@PLT
mov rdx, r12
mov edi, 1
xor eax, eax
lea rsi, .LC1[rip]
call __printf_chk@PLT
xor edx, edx
lea rsi, .LC1[rip]
xor eax, eax
mov edi, 1
call __printf_chk@PLT
movsd xmm0, QWORD PTR [rsp]
mov edi, 1
lea rsi, .LC6[rip]
mov eax, 1
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L5
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size basics, .-basics
.section .rodata.str1.8
.align 8
.LC7:
.string "sizeof(double) = %d, sizeof(double *) = %d.\n"
.align 8
.LC8:
.string "sizeof(int) = %d, sizeof(int *) = %d.\n"
.align 8
.LC9:
.string "sizeof(char) = %d, sizeof(char *) = %d.\n"
.text
.p2align 4
.globl sizes
.type sizes, @function
sizes:
.LFB24:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, 8
mov edx, 8
xor eax, eax
lea rsi, .LC7[rip]
mov edi, 1
call __printf_chk@PLT
mov ecx, 8
mov edx, 4
xor eax, eax
lea rsi, .LC8[rip]
mov edi, 1
call __printf_chk@PLT
mov ecx, 8
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
mov edx, 1
lea rsi, .LC9[rip]
mov edi, 1
jmp __printf_chk@PLT
.cfi_endproc
.LFE24:
.size sizes, .-sizes
.section .rodata.str1.1
.LC10:
.string "%d = %d = %d.\n"
.LC11:
.string "%p = %p = %p.\n"
.LC12:
.string "%p = %p.\n"
.text
.p2align 4
.globl multiple
.type multiple, @function
multiple:
.LFB25:
.cfi_startproc
endbr64
push r12
.cfi_def_cfa_offset 16
.cfi_offset 12, -16
mov r8d, 18
mov ecx, 18
mov edx, 18
lea rsi, .LC10[rip]
mov edi, 1
sub rsp, 32
.cfi_def_cfa_offset 48
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
lea r12, 12[rsp]
mov DWORD PTR 12[rsp], 18
mov QWORD PTR 16[rsp], r12
call __printf_chk@PLT
mov rcx, QWORD PTR 16[rsp]
mov rdx, r12
xor eax, eax
lea rsi, .LC11[rip]
mov edi, 1
mov r8, rcx
call __printf_chk@PLT
lea rdx, 16[rsp]
xor eax, eax
lea rsi, .LC12[rip]
mov rcx, rdx
mov edi, 1
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L11
add rsp, 32
.cfi_remember_state
.cfi_def_cfa_offset 16
pop r12
.cfi_def_cfa_offset 8
ret
.L11:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE25:
.size multiple, .-multiple
.p2align 4
.globl special
.type special, @function
special:
.LFB26:
.cfi_startproc
endbr64
movsx rax, DWORD PTR [rdi]
mov rdx, rax
imul rax, rax, 1717986919
sar edx, 31
sar rax, 34
sub eax, edx
mov DWORD PTR [rdi], eax
ret
.cfi_endproc
.LFE26:
.size special, .-special
.section .rodata.str1.1
.LC13:
.string "a = %d, *b = %d, *c = %d.\n"
.text
.p2align 4
.globl update
.type update, @function
update:
.LFB27:
.cfi_startproc
endbr64
add DWORD PTR [rsi], 2
movsx r8, DWORD PTR [rdx]
mov rax, r8
imul r8, r8, 1717986919
sar eax, 31
sar r8, 34
sub r8d, eax
xor eax, eax
mov DWORD PTR [rdx], r8d
mov ecx, DWORD PTR [rsi]
lea edx, 2[rdi]
lea rsi, .LC13[rip]
mov edi, 1
jmp __printf_chk@PLT
.cfi_endproc
.LFE27:
.size update, .-update
.section .rodata.str1.1
.LC14:
.string "n = %d, m = %d, p = %d.\n"
.text
.p2align 4
.globl functions
.type functions, @function
functions:
.LFB28:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
mov ecx, -3
mov edx, 10
xor eax, eax
mov r8d, 123
lea rsi, .LC14[rip]
mov edi, 1
call __printf_chk@PLT
mov r8d, 12
xor eax, eax
mov ecx, -1
mov edx, 12
lea rsi, .LC13[rip]
mov edi, 1
call __printf_chk@PLT
mov ecx, -1
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
mov r8d, 12
mov edx, 10
mov edi, 1
lea rsi, .LC14[rip]
jmp __printf_chk@PLT
.cfi_endproc
.LFE28:
.size functions, .-functions
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB29:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
call basics
call sizes
call multiple
call functions
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE29:
.size main, .-main
.section .rodata.cst8,"aM",@progbits,8
.align 8
.LC0:
.long 1374389535
.long 1074339512
.align 8
.LC4:
.long 0
.long 1074266112
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139217.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "myPtr = %p.\012\000"
.align 2
.LC1:
.ascii "The value, to which myPtr points, is %f.\012\000"
.align 2
.LC2:
.ascii "Because myPtr points to x, the value is the same as"
.ascii " %f.\012\000"
.global __aeabi_dadd
.align 2
.LC3:
.ascii "*myPtr = %f, and x = %f.\012\000"
.align 2
.LC4:
.ascii "x = %f.\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC5:
.word __stack_chk_guard
.text
.align 2
.global basics
.syntax unified
.arm
.fpu softvfp
.type basics, %function
basics:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
ldr r3, .L6
ldr r4, .L6+4
ldr r5, .L6+8
sub sp, sp, #28
mov r2, #0
ldr r1, .L6+12
mov r0, #1
ldr r3, [r3]
str r3, [sp, #20]
mov r3,#0
str r4, [sp, #8]
str r5, [sp, #12]
bl __printf_chk
ldr r1, .L6+12
add r2, sp, #8
mov r0, #1
bl __printf_chk
add r3, sp, #8
ldmia r3, {r2-r3}
ldr r1, .L6+16
mov r0, #1
bl __printf_chk
add r3, sp, #8
ldmia r3, {r2-r3}
ldr r1, .L6+20
mov r0, #1
bl __printf_chk
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L6+24
bl __aeabi_dadd
mov r2, r0
mov r3, r1
mov r0, #1
stm sp, {r2-r3}
ldr r1, .L6+28
str r2, [sp, #8]
str r3, [sp, #12]
bl __printf_chk
add r1, sp, #8
ldmia r1, {r0-r1}
mov r2, #0
ldr r3, .L6+24
bl __aeabi_dadd
mov r3, r1
mov r2, r0
ldr r1, .L6+28
stm sp, {r2-r3}
mov r0, #1
str r2, [sp, #8]
str r3, [sp, #12]
bl __printf_chk
ldr r1, .L6+12
add r2, sp, #8
mov r0, #1
bl __printf_chk
mov r2, #0
ldr r1, .L6+12
mov r0, #1
bl __printf_chk
add r3, sp, #8
ldmia r3, {r2-r3}
mov r0, #1
ldr r1, .L6+32
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L5
add sp, sp, #28
@ sp needed
pop {r4, r5, pc}
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC5
.word 1374389535
.word 1074339512
.word .LC0
.word .LC1
.word .LC2
.word 1074266112
.word .LC3
.word .LC4
.size basics, .-basics
.section .rodata.str1.4
.align 2
.LC6:
.ascii "sizeof(double) = %d, sizeof(double *) = %d.\012\000"
.align 2
.LC7:
.ascii "sizeof(int) = %d, sizeof(int *) = %d.\012\000"
.align 2
.LC8:
.ascii "sizeof(char) = %d, sizeof(char *) = %d.\012\000"
.text
.align 2
.global sizes
.syntax unified
.arm
.fpu softvfp
.type sizes, %function
sizes:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
mov r3, #4
mov r2, #8
ldr r1, .L10
mov r0, #1
bl __printf_chk
mov r3, #4
ldr r1, .L10+4
mov r2, r3
mov r0, #1
bl __printf_chk
pop {r4, lr}
mov r2, #1
mov r3, #4
mov r0, r2
ldr r1, .L10+8
b __printf_chk
.L11:
.align 2
.L10:
.word .LC6
.word .LC7
.word .LC8
.size sizes, .-sizes
.section .rodata.str1.4
.align 2
.LC9:
.ascii "%d = %d = %d.\012\000"
.align 2
.LC10:
.ascii "%p = %p = %p.\012\000"
.align 2
.LC11:
.ascii "%p = %p.\012\000"
.section .rodata.cst4
.align 2
.LC12:
.word __stack_chk_guard
.text
.align 2
.global multiple
.syntax unified
.arm
.fpu softvfp
.type multiple, %function
multiple:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #18
push {r4, lr}
ldr ip, .L16
sub sp, sp, #24
mov r2, r3
str r3, [sp]
ldr r1, .L16+4
add r4, sp, #12
mov r0, #1
ldr ip, [ip]
str ip, [sp, #20]
mov ip,#0
str r3, [sp, #12]
str r4, [sp, #16]
bl __printf_chk
ldr r3, [sp, #16]
mov r2, r4
ldr r1, .L16+8
str r3, [sp]
mov r0, #1
bl __printf_chk
add r3, sp, #16
mov r2, r3
mov r0, #1
ldr r1, .L16+12
bl __printf_chk
ldr r3, .L16
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L15
add sp, sp, #24
@ sp needed
pop {r4, pc}
.L15:
bl __stack_chk_fail
.L17:
.align 2
.L16:
.word .LC12
.word .LC9
.word .LC10
.word .LC11
.size multiple, .-multiple
.align 2
.global special
.syntax unified
.arm
.fpu softvfp
.type special, %function
special:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, [r0]
ldr r2, .L19
smull r1, r2, r3, r2
asr r3, r3, #31
rsb r3, r3, r2, asr #2
str r3, [r0]
bx lr
.L20:
.align 2
.L19:
.word 1717986919
.size special, .-special
.section .rodata.str1.4
.align 2
.LC13:
.ascii "a = %d, *b = %d, *c = %d.\012\000"
.text
.align 2
.global update
.syntax unified
.arm
.fpu softvfp
.type update, %function
update:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, r2
ldr r3, [r1]
push {r4, lr}
add r3, r3, #2
str r3, [r1]
ldr r3, [r2]
ldr lr, .L23
add r2, r0, #2
smull r4, r0, lr, r3
asr r3, r3, #31
rsb r0, r3, r0, asr #2
sub sp, sp, #8
str r0, [ip]
ldr r3, [r1]
str r0, [sp]
ldr r1, .L23+4
mov r0, #1
bl __printf_chk
add sp, sp, #8
@ sp needed
pop {r4, pc}
.L24:
.align 2
.L23:
.word 1717986919
.word .LC13
.size update, .-update
.section .rodata.str1.4
.align 2
.LC14:
.ascii "n = %d, m = %d, p = %d.\012\000"
.section .rodata.cst4
.align 2
.LC15:
.word __stack_chk_guard
.text
.align 2
.global functions
.syntax unified
.arm
.fpu softvfp
.type functions, %function
functions:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, #123
mvn r3, #2
push {r4, lr}
ldr lr, .L29
sub sp, sp, #24
str ip, [sp]
mov r2, #10
ldr r1, .L29+4
mov r0, #1
ldr lr, [lr]
str lr, [sp, #20]
mov lr,#0
str r3, [sp, #12]
str ip, [sp, #16]
bl __printf_chk
mov r0, #10
add r2, sp, #16
add r1, sp, #12
bl update
ldr r2, [sp, #16]
ldr r3, [sp, #12]
str r2, [sp]
mov r0, #1
mov r2, #10
ldr r1, .L29+4
bl __printf_chk
ldr r3, .L29
ldr r2, [r3]
ldr r3, [sp, #20]
eors r2, r3, r2
mov r3, #0
bne .L28
add sp, sp, #24
@ sp needed
pop {r4, pc}
.L28:
bl __stack_chk_fail
.L30:
.align 2
.L29:
.word .LC15
.word .LC14
.size functions, .-functions
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
bl basics
bl sizes
bl multiple
bl functions
mov r0, #0
pop {r4, pc}
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139218.c"
.intel_syntax noprefix
.text
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB11:
.cfi_startproc
endbr64
xor eax, eax
ret
.cfi_endproc
.LFE11:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139218.c"
.text
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
mov r0, #0
bx lr
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139223.c"
.intel_syntax noprefix
.text
.p2align 4
.type get_random_less_than, @function
get_random_less_than:
.LFB56:
.cfi_startproc
xor r8d, r8d
cmp rsi, 1
jbe .L1
mov ecx, DWORD PTR remaining.1[rip]
mov edx, DWORD PTR ranc.0[rip]
cmp rcx, rsi
jb .L7
.L4:
mov eax, edx
xor edx, edx
div rsi
mov DWORD PTR ranc.0[rip], eax
mov r8, rdx
mov rax, rcx
xor edx, edx
div rsi
mov DWORD PTR remaining.1[rip], eax
.L1:
mov rax, r8
ret
.p2align 4,,10
.p2align 3
.L7:
movabs rax, 6364136223846793005
mov rcx, QWORD PTR [rdi]
imul rax, rcx
add rax, QWORD PTR 8[rdi]
mov QWORD PTR [rdi], rax
mov rax, rcx
shr rax, 18
xor rax, rcx
shr rcx, 59
shr rax, 27
mov edx, eax
ror edx, cl
mov ecx, 4294967295
jmp .L4
.cfi_endproc
.LFE56:
.size get_random_less_than, .-get_random_less_than
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "the_stack_data/100139223.c"
.LC1:
.string "strlen(optarg) == 1"
.text
.p2align 4
.type parsebyte, @function
parsebyte:
.LFB65:
.cfi_startproc
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rdi
push rbx
.cfi_def_cfa_offset 24
.cfi_offset 3, -24
sub rsp, 24
.cfi_def_cfa_offset 48
movzx ebx, BYTE PTR [rdi]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
cmp bl, 92
je .L28
call strlen@PLT
cmp rax, 1
ja .L29
test bl, bl
je .L22
cmp rax, 1
jne .L30
lea eax, -48[rbx]
cmp al, 9
jbe .L22
movsx eax, bl
.L8:
mov rcx, QWORD PTR 8[rsp]
sub rcx, QWORD PTR fs:40
jne .L31
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 24
pop rbx
.cfi_def_cfa_offset 16
pop rbp
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L29:
.cfi_restore_state
xor edx, edx
mov rsi, rsp
mov rdi, rbp
call strtoul@PLT
cmp QWORD PTR [rsp], rbp
jne .L23
test rax, rax
je .L22
.L23:
cmp rax, 255
mov ebx, -1
cmova eax, ebx
jmp .L8
.p2align 4,,10
.p2align 3
.L28:
movzx edx, BYTE PTR 1[rdi]
mov eax, -1
test dl, dl
je .L8
cmp BYTE PTR 2[rdi], 0
jne .L8
sub edx, 34
cmp dl, 84
ja .L8
movzx edx, dl
lea rax, CSWTCH.75[rip]
movsx eax, BYTE PTR [rax+rdx]
jmp .L8
.p2align 4,,10
.p2align 3
.L22:
mov eax, -1
jmp .L8
.L31:
call __stack_chk_fail@PLT
.L30:
lea rcx, __PRETTY_FUNCTION__.5[rip]
mov edx, 444
lea rsi, .LC0[rip]
lea rdi, .LC1[rip]
call __assert_fail@PLT
.cfi_endproc
.LFE65:
.size parsebyte, .-parsebyte
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "random_line_generator - generate many random short lines\n"
.align 8
.LC3:
.ascii "[ -n numlines -m minlen -M maxlen -e eolbyte] -B -L lobyte -"
.ascii "H hibyte -R -S -T ]\n\n -n num: 'num' is number of lines to "
.ascii "generate (default 1000000)\n -m min: 'min' is minimum length"
.ascii " of each line (default 0)\n -M max: 'max' is maximum length "
.ascii "of each line (default 100)\n -e eol: 'eol' is end of line by"
.ascii "te (defaults to '\\n' linefeed)\n -B: use Base64 [A-Za-z"
.ascii "0-9+/] bytes (default)\n -C: use Consecutive sequence of"
.ascii " bytes instead of -B\n -L lo: 'lo' byte of range to "
.string "use in -C sequence\n -H hi: 'hi' byte of range to use in -C sequence\n -R: Randomly and independently select each output byte\n -S: Sequentially rotate through output byte range (default)\n -T: Do not issue the final Terminating end of line byte\n"
.section .rodata.str1.1
.LC4:
.string "random_line_generator"
.LC5:
.string "Usage: %s %s\n"
.text
.p2align 4
.type show_usage_and_exit, @function
show_usage_and_exit:
.LFB60:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
mov edx, 57
mov esi, 1
lea rdi, .LC2[rip]
sub rsp, 8
.cfi_def_cfa_offset 16
mov rcx, QWORD PTR stderr[rip]
call fwrite@PLT
mov rdi, QWORD PTR stderr[rip]
xor eax, eax
lea r8, .LC3[rip]
lea rcx, .LC4[rip]
lea rdx, .LC5[rip]
mov esi, 1
call __fprintf_chk@PLT
mov edi, 1
call exit@PLT
.cfi_endproc
.LFE60:
.size show_usage_and_exit, .-show_usage_and_exit
.section .rodata.str1.8
.align 8
.LC6:
.string "\n\t%s: Invalid option value '%s': %s\n\n"
.text
.p2align 4
.type fatal_usage, @function
fatal_usage:
.LFB61:
.cfi_startproc
push rax
.cfi_def_cfa_offset 16
pop rax
.cfi_def_cfa_offset 8
lea rcx, .LC4[rip]
lea rdx, .LC6[rip]
xor eax, eax
sub rsp, 8
.cfi_def_cfa_offset 16
mov r9, rdi
mov rdi, QWORD PTR stderr[rip]
mov r8, rsi
mov esi, 1
call __fprintf_chk@PLT
xor eax, eax
call show_usage_and_exit
.cfi_endproc
.LFE61:
.size fatal_usage, .-fatal_usage
.p2align 4
.globl pcg32_srandom_r
.type pcg32_srandom_r, @function
pcg32_srandom_r:
.LFB4:
.cfi_startproc
endbr64
movabs rax, 6364136223846793005
lea rdx, 1[rdx+rdx]
add rsi, rdx
mov QWORD PTR 8[rdi], rdx
imul rsi, rax
add rsi, rdx
mov QWORD PTR [rdi], rsi
ret
.cfi_endproc
.LFE4:
.size pcg32_srandom_r, .-pcg32_srandom_r
.p2align 4
.globl pcg32_random_r
.type pcg32_random_r, @function
pcg32_random_r:
.LFB5:
.cfi_startproc
endbr64
movabs rax, 6364136223846793005
mov rcx, QWORD PTR [rdi]
imul rax, rcx
add rax, QWORD PTR 8[rdi]
mov QWORD PTR [rdi], rax
mov rax, rcx
shr rax, 18
xor rax, rcx
shr rcx, 59
shr rax, 27
ror eax, cl
ret
.cfi_endproc
.LFE5:
.size pcg32_random_r, .-pcg32_random_r
.section .rodata.str1.1
.LC7:
.string "invalid number of numlines"
.LC8:
.string "invalid minimum line length"
.LC9:
.string "invalid maximum line length"
.LC10:
.string "invalid end of line byte"
.section .rodata.str1.8
.align 8
.LC11:
.string "options -B and -C are mutually exclusive"
.section .rodata.str1.1
.LC12:
.string "invalid lo byte"
.LC13:
.string "invalid hi byte"
.LC14:
.string "n:m:M:e:BCL:H:RST"
.section .rodata.str1.8
.align 8
.LC15:
.string "\n\tSetting -C option also requires setting -L and -H\n\n"
.align 8
.LC16:
.string "\n\tSetting -L and -H options also requires setting -C\n\n"
.align 8
.LC17:
.string "\n\tInvalid -L, -H range <%d, %d>\n\n"
.section .rodata.str1.1
.LC18:
.string "!useConsecutive"
.LC19:
.string "useConsecutive"
.LC20:
.string "bytemaplen < len"
.LC21:
.string "malloc"
.LC22:
.string "fwrite"
.section .rodata.str1.8
.align 8
.LC23:
.string "\n\tNot allowed to have eol (0x%2x) in -B or -C byte set.\n\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB66:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
lea r12, .L42[rip]
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
mov rbp, rsi
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov ebx, edi
sub rsp, 104
.cfi_def_cfa_offset 160
mov rax, QWORD PTR fs:40
mov QWORD PTR 88[rsp], rax
xor eax, eax
mov DWORD PTR 60[rsp], 0
lea r15, 64[rsp]
mov DWORD PTR 44[rsp], 0
mov DWORD PTR 52[rsp], -1
mov DWORD PTR 48[rsp], -1
mov DWORD PTR 8[rsp], 0
mov DWORD PTR 12[rsp], 0
mov DWORD PTR 40[rsp], 1
mov DWORD PTR 56[rsp], 10
mov QWORD PTR 32[rsp], 100
mov QWORD PTR 24[rsp], 0
mov QWORD PTR 16[rsp], 1000000
.p2align 4,,10
.p2align 3
.L39:
lea rdx, .LC14[rip]
mov rsi, rbp
mov edi, ebx
call getopt@PLT
mov r13d, eax
cmp eax, -1
je .L135
call __errno_location@PLT
sub r13d, 66
mov DWORD PTR [rax], 0
mov r14, rax
cmp r13d, 44
ja .L134
movsx rax, DWORD PTR [r12+r13*4]
add rax, r12
notrack jmp rax
.section .rodata
.align 4
.align 4
.L42:
.long .L52-.L42
.long .L51-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L50-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L49-.L42
.long .L48-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L47-.L42
.long .L46-.L42
.long .L88-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L44-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L134-.L42
.long .L43-.L42
.long .L41-.L42
.section .text.startup
.L72:
mov ecx, DWORD PTR 56[rsp]
mov rdi, QWORD PTR stderr[rip]
lea rdx, .LC23[rip]
xor eax, eax
mov esi, 1
call __fprintf_chk@PLT
.p2align 4,,10
.p2align 3
.L134:
xor eax, eax
call show_usage_and_exit
.p2align 4,,10
.p2align 3
.L41:
mov rdi, QWORD PTR optarg[rip]
mov rsi, r15
xor edx, edx
call strtoul@PLT
mov rsi, QWORD PTR optarg[rip]
mov QWORD PTR 16[rsp], rax
cmp rax, -1
je .L53
cmp DWORD PTR [r14], 0
je .L136
.L53:
lea rdi, .LC7[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L43:
mov rdi, QWORD PTR optarg[rip]
mov rsi, r15
xor edx, edx
call strtoul@PLT
mov ecx, 4294967294
mov rsi, QWORD PTR optarg[rip]
mov QWORD PTR 24[rsp], rax
cmp rax, rcx
ja .L54
cmp DWORD PTR [r14], 0
jne .L54
cmp rsi, QWORD PTR 64[rsp]
jne .L39
cmp QWORD PTR 24[rsp], 0
jne .L39
.L54:
lea rdi, .LC8[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L44:
mov rdi, QWORD PTR optarg[rip]
call parsebyte
mov DWORD PTR 56[rsp], eax
cmp eax, -1
jne .L39
mov rsi, QWORD PTR optarg[rip]
lea rdi, .LC10[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L47:
mov DWORD PTR 44[rsp], 1
jmp .L39
.p2align 4,,10
.p2align 3
.L48:
mov rdi, QWORD PTR optarg[rip]
mov rsi, r15
xor edx, edx
call strtoul@PLT
mov ecx, 4294967294
mov rsi, QWORD PTR optarg[rip]
mov QWORD PTR 32[rsp], rax
cmp rax, rcx
ja .L55
cmp DWORD PTR [r14], 0
jne .L55
cmp rsi, QWORD PTR 64[rsp]
jne .L39
cmp QWORD PTR 32[rsp], 0
jne .L39
.L55:
lea rdi, .LC9[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L49:
mov rdi, QWORD PTR optarg[rip]
call parsebyte
mov DWORD PTR 48[rsp], eax
cmp eax, -1
jne .L39
mov rsi, QWORD PTR optarg[rip]
lea rdi, .LC12[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L50:
mov rdi, QWORD PTR optarg[rip]
call parsebyte
mov DWORD PTR 52[rsp], eax
cmp eax, -1
jne .L39
mov rsi, QWORD PTR optarg[rip]
lea rdi, .LC13[rip]
call fatal_usage
.p2align 4,,10
.p2align 3
.L51:
mov ecx, DWORD PTR 8[rsp]
and DWORD PTR 40[rsp], ecx
jne .L56
mov DWORD PTR 8[rsp], 1
mov DWORD PTR 12[rsp], 1
jmp .L39
.p2align 4,,10
.p2align 3
.L52:
mov ecx, DWORD PTR 8[rsp]
and DWORD PTR 12[rsp], ecx
jne .L56
mov DWORD PTR 8[rsp], 1
mov DWORD PTR 40[rsp], 1
jmp .L39
.L88:
mov DWORD PTR 60[rsp], 1
jmp .L39
.p2align 4,,10
.p2align 3
.L136:
cmp QWORD PTR 64[rsp], rsi
jne .L39
cmp QWORD PTR 16[rsp], 0
jne .L39
jmp .L53
.L46:
mov DWORD PTR 44[rsp], 0
jmp .L39
.L135:
cmp DWORD PTR optind[rip], ebx
jne .L134
cmp DWORD PTR 12[rsp], 0
je .L59
cmp DWORD PTR 48[rsp], -1
je .L92
cmp DWORD PTR 52[rsp], -1
je .L92
mov ecx, DWORD PTR 48[rsp]
mov r8d, DWORD PTR 52[rsp]
cmp ecx, r8d
jle .L63
mov rdi, QWORD PTR stderr[rip]
lea rdx, .LC17[rip]
mov esi, 1
xor eax, eax
call __fprintf_chk@PLT
xor eax, eax
call show_usage_and_exit
.L59:
mov eax, DWORD PTR 48[rsp]
and eax, DWORD PTR 52[rsp]
add eax, 1
je .L62
mov rcx, QWORD PTR stderr[rip]
mov edx, 54
mov esi, 1
lea rdi, .LC16[rip]
call fwrite@PLT
xor eax, eax
call show_usage_and_exit
.L56:
mov rsi, QWORD PTR optarg[rip]
lea rdi, .LC11[rip]
call fatal_usage
.L62:
cmp DWORD PTR 40[rsp], 0
je .L137
xor eax, eax
lea rdx, b64map[rip]
.L64:
lea ecx, 65[rax]
mov BYTE PTR [rdx+rax], cl
add rax, 1
cmp rax, 26
jne .L64
.L66:
lea ecx, 71[rax]
mov BYTE PTR [rdx+rax], cl
add rax, 1
cmp rax, 52
jne .L66
.L67:
lea ecx, -4[rax]
mov BYTE PTR [rdx+rax], cl
add rax, 1
cmp rax, 62
jne .L67
mov WORD PTR b64map[rip+62], 12075
mov QWORD PTR map[rip], rdx
mov DWORD PTR maplen[rip], 64
.L68:
mov ecx, DWORD PTR maplen[rip]
mov rsi, QWORD PTR map[rip]
xor eax, eax
mov edi, DWORD PTR 56[rsp]
jmp .L71
.L73:
movzx edx, BYTE PTR [rsi+rax]
add rax, 1
cmp edi, edx
je .L72
.L71:
cmp ecx, eax
jg .L73
movzx eax, BYTE PTR 56[rsp]
lea r12, 64[rsp]
movabs rdx, -2720673578348880933
movabs rsi, -8846114313915602277
mov rdi, r12
mov BYTE PTR eol_byte[rip], al
call pcg32_srandom_r
mov rdi, QWORD PTR 32[rsp]
add rdi, 1
mov QWORD PTR outbuflen[rip], rdi
call malloc@PLT
mov QWORD PTR outbuf[rip], rax
test rax, rax
je .L82
movzx r13d, BYTE PTR 60[rsp]
mov r14d, DWORD PTR 44[rsp]
mov ebp, 1
and r13d, 1
mov BYTE PTR 8[rsp], r13b
.L83:
mov r9, QWORD PTR outbuf[rip]
cmp rbp, QWORD PTR 16[rsp]
ja .L138
mov rbx, QWORD PTR 24[rsp]
mov rsi, QWORD PTR outbuflen[rip]
mov rdi, r12
sub rsi, rbx
call get_random_less_than
cmp rbp, QWORD PTR 16[rsp]
movzx r11d, BYTE PTR eol_byte[rip]
sete r10b
and r10d, DWORD PTR 8[rsp]
add rax, rbx
mov rbx, rax
je .L75
mov r15, r9
lea r13, [r9+rax]
jmp .L78
.L76:
mov rax, QWORD PTR static_mi.2[rip]
lea rdx, 1[rax]
mov QWORD PTR static_mi.2[rip], rdx
xor edx, edx
div rsi
.L77:
mov rax, QWORD PTR map[rip]
movzx eax, BYTE PTR [rax+rdx]
mov BYTE PTR [r15], al
add r15, 1
cmp r15, r13
je .L139
.L78:
movsx rsi, DWORD PTR maplen[rip]
test r14d, r14d
je .L76
mov rdi, r12
call get_random_less_than
mov rdx, rax
jmp .L77
.L139:
cmp r10b, 1
mov BYTE PTR [r9+rbx], r11b
adc rbx, 0
.L79:
mov rcx, QWORD PTR stdout[rip]
mov rdx, rbx
mov esi, 1
mov rdi, r9
call fwrite@PLT
cmp rax, rbx
jb .L140
.L80:
add rbp, 1
jmp .L83
.L63:
cmp DWORD PTR 40[rsp], 0
je .L141
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 553
lea rsi, .LC0[rip]
lea rdi, .LC18[rip]
call __assert_fail@PLT
.L92:
mov rcx, QWORD PTR stderr[rip]
mov edx, 53
mov esi, 1
lea rdi, .LC15[rip]
call fwrite@PLT
xor eax, eax
call show_usage_and_exit
.L137:
lea rcx, __PRETTY_FUNCTION__.6[rip]
mov edx, 558
lea rsi, .LC0[rip]
lea rdi, .LC19[rip]
call __assert_fail@PLT
.L141:
mov eax, DWORD PTR 48[rsp]
movzx edx, BYTE PTR 52[rsp]
lea rsi, bytemap[rip]
mov edi, eax
movzx eax, al
sub edx, eax
xor eax, eax
add edx, 1
mov DWORD PTR bytemaplen[rip], edx
cmp edx, 256
jne .L69
jmp .L142
.L70:
mov BYTE PTR [rsi+rax], cl
add rax, 1
.L69:
lea ecx, [rdi+rax]
cmp edx, eax
jg .L70
mov QWORD PTR map[rip], rsi
mov DWORD PTR maplen[rip], edx
jmp .L68
.L75:
mov BYTE PTR [r9], r11b
mov ebx, 1
test r10b, r10b
je .L79
mov rcx, QWORD PTR stdout[rip]
xor edx, edx
mov esi, 1
mov rdi, r9
call fwrite@PLT
jmp .L80
.L138:
mov rdi, r9
call free@PLT
xor edi, edi
call exit@PLT
.L140:
lea rdi, .LC22[rip]
call perror@PLT
mov edi, 3
call exit@PLT
.L142:
lea rcx, __PRETTY_FUNCTION__.3[rip]
mov edx, 285
lea rsi, .LC0[rip]
lea rdi, .LC20[rip]
call __assert_fail@PLT
.L82:
lea rdi, .LC21[rip]
call perror@PLT
mov edi, 2
call exit@PLT
.cfi_endproc
.LFE66:
.size main, .-main
.section .rodata
.align 32
.type CSWTCH.75, @object
.size CSWTCH.75, 85
CSWTCH.75:
.byte 34
.byte -1
.byte -1
.byte -1
.byte -1
.byte 39
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 63
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 92
.byte -1
.byte -1
.byte -1
.byte -1
.byte 7
.byte 8
.byte -1
.byte -1
.byte 27
.byte 12
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 10
.byte -1
.byte -1
.byte -1
.byte 13
.byte -1
.byte 9
.byte -1
.byte 11
.local ranc.0
.comm ranc.0,4,4
.local remaining.1
.comm remaining.1,4,4
.local static_mi.2
.comm static_mi.2,8,8
.align 8
.type __PRETTY_FUNCTION__.3, @object
.size __PRETTY_FUNCTION__.3, 14
__PRETTY_FUNCTION__.3:
.string "build_bytemap"
.align 8
.type __PRETTY_FUNCTION__.5, @object
.size __PRETTY_FUNCTION__.5, 10
__PRETTY_FUNCTION__.5:
.string "parsebyte"
.type __PRETTY_FUNCTION__.6, @object
.size __PRETTY_FUNCTION__.6, 5
__PRETTY_FUNCTION__.6:
.string "main"
.local outbuflen
.comm outbuflen,8,8
.local outbuf
.comm outbuf,8,8
.local eol_byte
.comm eol_byte,1,1
.local map
.comm map,8,8
.local maplen
.comm maplen,4,4
.local bytemap
.comm bytemap,256,32
.local bytemaplen
.comm bytemaplen,4,4
.local b64map
.comm b64map,64,32
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139223.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "the_stack_data/100139223.c\000"
.align 2
.LC1:
.ascii "strlen(optarg) == 1\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC2:
.word __stack_chk_guard
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type parsebyte, %function
parsebyte:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldrb r4, [r0] @ zero_extendqisi2
ldr r3, .L21
sub sp, sp, #12
cmp r4, #92
mov r5, r0
ldr r3, [r3]
str r3, [sp, #4]
mov r3,#0
beq .L17
bl strlen
cmp r0, #1
bhi .L18
cmp r4, #0
beq .L13
cmp r0, #1
bne .L19
sub r3, r4, #48
cmp r3, #9
movhi r0, r4
mvnls r0, #0
.L1:
ldr r3, .L21
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L20
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
.L18:
mov r2, #0
mov r1, sp
mov r0, r5
bl strtoul
ldr r3, [sp]
mov r7, #0
cmp r3, r5
cmpeq r0, #0
beq .L13
cmp r7, #0
cmpeq r0, #255
mvnhi r0, #0
b .L1
.L17:
ldrb r3, [r0, #1] @ zero_extendqisi2
cmp r3, #0
beq .L13
ldrb r2, [r0, #2] @ zero_extendqisi2
cmp r2, #0
bne .L13
sub r3, r3, #34
and r3, r3, #255
cmp r3, #84
ldrls r2, .L21+4
ldrsbls r0, [r2, r3]
bls .L1
.L13:
mvn r0, #0
b .L1
.L20:
bl __stack_chk_fail
.L19:
mov r2, #444
ldr r3, .L21+8
ldr r1, .L21+12
ldr r0, .L21+16
bl __assert_fail
.L22:
.align 2
.L21:
.word .LC2
.word .LANCHOR0
.word .LANCHOR0+88
.word .LC0
.word .LC1
.size parsebyte, .-parsebyte
.section .rodata.str1.4
.align 2
.LC3:
.ascii "random_line_generator - generate many random short "
.ascii "lines\012\000"
.align 2
.LC4:
.ascii "random_line_generator\000"
.align 2
.LC5:
.ascii "Usage: %s %s\012\000"
.align 2
.LC6:
.ascii "[ -n numlines -m minlen -M maxlen -e eolbyte] -B -L"
.ascii " lobyte -H hibyte -R -S -T ]\012\012 -n num: 'num' "
.ascii "is number of lines to generate (default 1000000)\012"
.ascii " -m min: 'min' is minimum length of each line (defa"
.ascii "ult 0)\012 -M max: 'max' is maximum length of each "
.ascii "line (default 100)\012 -e eol: 'eol' is end of line"
.ascii " byte (defaults to '\\n' linefeed)\012 -B: use "
.ascii "Base64 [A-Za-z0-9+/] bytes (default)\012 -C: us"
.ascii "e Consecutive sequence of bytes instead of -B\012 -"
.ascii "L lo: 'lo' byte of range to use in -C sequence\012"
.ascii " -H hi: 'hi' byte of range to use in -C sequence\012"
.ascii " -R: Randomly and independently select each out"
.ascii "put byte\012 -S: Sequentially rotate through ou"
.ascii "tput byte range (default)\012 -T: Do not issue"
.ascii " the final Terminating end of line byte\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type show_usage_and_exit, %function
show_usage_and_exit:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r4, .L25
sub sp, sp, #12
mov r2, #57
mov r1, #1
ldr r3, [r4]
ldr r0, .L25+4
bl fwrite
ldr r3, .L25+8
mov r1, #1
str r3, [sp]
ldr r0, [r4]
ldr r3, .L25+12
ldr r2, .L25+16
bl __fprintf_chk
mov r0, #1
bl exit
.L26:
.align 2
.L25:
.word stderr
.word .LC3
.word .LC6
.word .LC4
.word .LC5
.size show_usage_and_exit, .-show_usage_and_exit
.section .rodata.str1.4
.align 2
.LC7:
.ascii "\012\011%s: Invalid option value '%s': %s\012\012\000"
.text
.align 2
.syntax unified
.arm
.fpu softvfp
.type fatal_usage, %function
fatal_usage:
@ Volatile: function does not return.
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L29
sub sp, sp, #12
str r1, [sp]
str r0, [sp, #4]
mov r1, #1
ldr r0, [r3]
ldr r2, .L29+4
ldr r3, .L29+8
bl __fprintf_chk
bl show_usage_and_exit
.L30:
.align 2
.L29:
.word stderr
.word .LC7
.word .LC4
.size fatal_usage, .-fatal_usage
.global __aeabi_uidivmod
.global __aeabi_uidiv
.align 2
.syntax unified
.arm
.fpu softvfp
.type get_random_less_than.isra.0, %function
get_random_less_than.isra.0:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r2, #1
push {r4, r5, r6, r7, r8, lr}
movls r4, #0
bls .L31
ldr r5, .L37
mov r4, r2
ldr r8, [r5]
cmp r2, r8
bhi .L33
ldr r0, [r5, #4]
.L34:
mov r1, r4
bl __aeabi_uidivmod
mov r2, r0
mov r3, r1
mov r0, r8
mov r1, r4
str r2, [r5, #4]
mov r4, r3
bl __aeabi_uidiv
str r0, [r5]
.L31:
mov r0, r4
pop {r4, r5, r6, r7, r8, pc}
.L33:
ldr lr, [r0]
ldr ip, .L37+4
ldr r2, [r0, #4]
mul ip, lr, ip
ldr r3, .L37+8
mvn r8, #0
mla ip, r3, r2, ip
umull r6, r7, lr, r3
lsr r3, lr, #18
add r7, ip, r7
orr r3, r3, r2, lsl #14
ldr ip, [r1]
eor r3, r3, lr
ldr r1, [r1, #4]
adds ip, ip, r6
eor lr, r2, r2, lsr #18
lsr r3, r3, #27
adc r1, r1, r7
orr r3, r3, lr, lsl #5
lsr r2, r2, #27
str r1, [r0, #4]
str ip, [r0]
ror r0, r3, r2
b .L34
.L38:
.align 2
.L37:
.word .LANCHOR1
.word 1481765933
.word 1284865837
.size get_random_less_than.isra.0, .-get_random_less_than.isra.0
.align 2
.global pcg32_srandom_r
.syntax unified
.arm
.fpu softvfp
.type pcg32_srandom_r, %function
pcg32_srandom_r:
@ args = 8, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
ldr r1, [sp, #16]
ldr ip, [sp, #20]
adds r1, r1, r1
orr r1, r1, #1
ldr lr, .L41
adc ip, ip, ip
adds r2, r1, r2
mul lr, r2, lr
ldr r6, .L41+4
adc r3, ip, r3
mla r3, r6, r3, lr
umull r4, r5, r2, r6
adds r2, r4, r1
add r5, r3, r5
adc r3, r5, ip
stm r0, {r2, r3}
str r1, [r0, #8]
str ip, [r0, #12]
pop {r4, r5, r6, pc}
.L42:
.align 2
.L41:
.word 1481765933
.word 1284865837
.size pcg32_srandom_r, .-pcg32_srandom_r
.align 2
.global pcg32_random_r
.syntax unified
.arm
.fpu softvfp
.type pcg32_random_r, %function
pcg32_random_r:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
ldr ip, [r0]
ldr r1, .L45
ldr r2, [r0, #4]
mul r1, ip, r1
push {r4, r5, lr}
ldr lr, .L45+4
lsr r3, ip, #18
umull r4, r5, ip, lr
mla r1, lr, r2, r1
orr r3, r3, r2, lsl #14
add r5, r1, r5
ldr r1, [r0, #8]
eor r3, r3, ip
ldr ip, [r0, #12]
adds r1, r1, r4
eor lr, r2, r2, lsr #18
lsr r3, r3, #27
adc ip, ip, r5
orr r3, r3, lr, lsl #5
lsr r2, r2, #27
stm r0, {r1, ip}
ror r0, r3, r2
pop {r4, r5, pc}
.L46:
.align 2
.L45:
.word 1481765933
.word 1284865837
.size pcg32_random_r, .-pcg32_random_r
.section .rodata.str1.4
.align 2
.LC8:
.ascii "invalid number of numlines\000"
.align 2
.LC9:
.ascii "invalid minimum line length\000"
.align 2
.LC10:
.ascii "invalid maximum line length\000"
.align 2
.LC11:
.ascii "invalid end of line byte\000"
.align 2
.LC12:
.ascii "options -B and -C are mutually exclusive\000"
.align 2
.LC13:
.ascii "invalid lo byte\000"
.align 2
.LC14:
.ascii "invalid hi byte\000"
.align 2
.LC15:
.ascii "n:m:M:e:BCL:H:RST\000"
.align 2
.LC16:
.ascii "\012\011Setting -C option also requires setting -L "
.ascii "and -H\012\012\000"
.align 2
.LC17:
.ascii "\012\011Setting -L and -H options also requires set"
.ascii "ting -C\012\012\000"
.align 2
.LC18:
.ascii "\012\011Invalid -L, -H range <%d, %d>\012\012\000"
.align 2
.LC19:
.ascii "!useConsecutive\000"
.align 2
.LC20:
.ascii "useConsecutive\000"
.align 2
.LC21:
.ascii "bytemaplen < len\000"
.align 2
.LC22:
.ascii "malloc\000"
.align 2
.LC23:
.ascii "fwrite\000"
.align 2
.LC24:
.ascii "\012\011Not allowed to have eol (0x%2x) in -B or -C"
.ascii " byte set.\012\012\000"
.section .rodata.cst4
.align 2
.LC25:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 72
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L122+16
sub sp, sp, #84
ldr r3, [r3]
str r3, [sp, #76]
mov r3,#0
mov r3, #1
str r3, [sp, #12]
mov r3, #10
mov r2, #100
str r3, [sp, #48]
mov r3, #0
str r2, [sp, #40]
str r3, [sp, #44]
mov r2, #0
mov r3, #0
mov r7, #0
str r2, [sp, #24]
str r3, [sp, #28]
mov r3, #0
mvn r9, #0
mov r4, r0
mov r5, r1
mov r10, r7
ldr r2, .L122+20
ldr r6, .L122+24
str r2, [sp, #16]
str r3, [sp, #20]
ldr r8, .L122+28
str r7, [sp, #32]
str r7, [sp, #8]
str r9, [sp, #36]
.L48:
mov r2, r6
mov r1, r5
mov r0, r4
bl getopt
cmn r0, #1
mov fp, r0
beq .L115
bl __errno_location
mov r2, #0
sub fp, fp, #66
str r2, [r0]
cmp fp, #44
ldrls pc, [pc, fp, asl #2]
b .L114
.L51:
.word .L61
.word .L60
.word .L114
.word .L114
.word .L114
.word .L114
.word .L59
.word .L114
.word .L114
.word .L114
.word .L58
.word .L57
.word .L114
.word .L114
.word .L114
.word .L114
.word .L56
.word .L55
.word .L96
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L53
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L114
.word .L52
.word .L50
.L79:
ldr r2, .L122+32
mov r1, #1
ldr r0, [r2]
ldr r3, [sp, #48]
ldr r2, .L122+36
bl __fprintf_chk
.L114:
bl show_usage_and_exit
.L56:
mov r3, #1
str r3, [sp, #32]
b .L48
.L57:
mov r2, #0
str r0, [sp, #52]
add r1, sp, #56
ldr r0, [r8]
bl strtoul
mov r3, #0
mov ip, #0
mvn fp, #0
mov r2, r0
cmp r3, ip
cmpeq r0, fp
str r2, [sp, #40]
str r3, [sp, #44]
beq .L64
ldr r3, [sp, #52]
ldr r3, [r3]
cmp r3, #0
bne .L64
ldr r2, [r8]
ldr r3, [sp, #56]
cmp r2, r3
cmpeq r0, #0
bne .L48
.L64:
ldr r1, [r8]
ldr r0, .L122+40
bl fatal_usage
.L50:
mov r2, #0
str r0, [sp, #52]
add r1, sp, #56
ldr r0, [r8]
bl strtoul
mov r3, #0
mov ip, #0
mvn fp, #0
mov r2, r0
cmp r3, ip
cmpeq r0, fp
str r2, [sp, #16]
str r3, [sp, #20]
beq .L62
ldr r3, [sp, #52]
ldr r3, [r3]
cmp r3, #0
bne .L62
ldr r2, [sp, #56]
ldr r3, [r8]
cmp r2, r3
cmpeq r0, #0
bne .L48
.L62:
ldr r1, [r8]
ldr r0, .L122+44
bl fatal_usage
.L52:
mov r2, #0
str r0, [sp, #52]
add r1, sp, #56
ldr r0, [r8]
bl strtoul
mov r3, #0
mov ip, #0
mvn fp, #0
mov r2, r0
cmp r3, ip
cmpeq r0, fp
str r2, [sp, #24]
str r3, [sp, #28]
beq .L63
ldr r3, [sp, #52]
ldr r3, [r3]
cmp r3, #0
bne .L63
ldr r2, [r8]
ldr r3, [sp, #56]
cmp r2, r3
cmpeq r0, #0
bne .L48
.L63:
ldr r1, [r8]
ldr r0, .L122+48
bl fatal_usage
.L53:
ldr r0, [r8]
bl parsebyte
cmn r0, #1
str r0, [sp, #48]
bne .L48
ldr r1, [r8]
ldr r0, .L122+52
bl fatal_usage
.L58:
ldr r0, [r8]
bl parsebyte
cmn r0, #1
str r0, [sp, #36]
bne .L48
ldr r1, [r8]
ldr r0, .L122+56
bl fatal_usage
.L59:
ldr r0, [r8]
bl parsebyte
cmn r0, #1
mov r9, r0
bne .L48
ldr r1, [r8]
ldr r0, .L122+60
bl fatal_usage
.L60:
ldr r3, [sp, #12]
ands r3, r3, r10
str r3, [sp, #12]
bne .L65
mov r10, #1
str r10, [sp, #8]
b .L48
.L61:
ldr r3, [sp, #8]
ands r3, r3, r10
str r3, [sp, #8]
bne .L65
mov r10, #1
str r10, [sp, #12]
b .L48
.L96:
mov r7, #1
b .L48
.L55:
mov r3, #0
str r3, [sp, #32]
b .L48
.L115:
ldr r3, .L122+64
ldr r3, [r3]
cmp r3, r4
bne .L114
ldr r3, [sp, #8]
cmp r3, #0
ldr r3, [sp, #36]
bne .L116
and r3, r3, r9
cmn r3, #1
beq .L70
ldr r3, .L122+32
mov r2, #54
mov r1, #1
ldr r3, [r3]
ldr r0, .L122+68
bl fwrite
bl show_usage_and_exit
.L116:
cmn r3, #1
cmnne r9, #1
beq .L117
ldr r3, [sp, #36]
cmp r3, r9
ble .L71
ldr r2, .L122+32
str r9, [sp]
mov r1, #1
ldr r0, [r2]
ldr r2, .L122+72
bl __fprintf_chk
bl show_usage_and_exit
.L65:
ldr r3, .L122+28
ldr r0, .L122+76
ldr r1, [r3]
bl fatal_usage
.L70:
ldr r3, [sp, #12]
cmp r3, #0
beq .L110
ldr r0, .L122+80
mov r3, #65
mov r2, r0
.L72:
add r1, r3, #1
strb r3, [r2], #1
and r3, r1, #255
cmp r3, #91
bne .L72
mov r3, #97
ldr r2, .L122+84
.L73:
add r1, r3, #1
strb r3, [r2, #1]!
and r3, r1, #255
cmp r3, #123
bne .L73
mov r3, #64
ldr r6, .L122+88
ldr r1, .L122+92
str r3, [r6, #76]
sub r3, r3, #-805306360
ldr r2, .L122+96
sub r3, r3, #13893632
sub r3, r3, #50944
str r0, [r6, #72]
str r1, [r6, #60]
str r2, [r6, #64]
str r3, [r6, #68]
.L74:
mov r3, #0
ldr r1, [r6, #76]
ldr r0, [r6, #72]
ldr ip, [sp, #48]
b .L78
.L80:
ldrb r2, [r0, r3] @ zero_extendqisi2
cmp ip, r2
beq .L79
add r3, r3, #1
.L78:
cmp r3, r1
blt .L80
ldr r3, [sp, #40]
ldr r1, [sp, #48]
add r0, r3, #1
str r0, [r6, #340]
adr r3, .L122
ldmia r3, {r2-r3}
strb r1, [r6, #352]
str r2, [sp, #64]
str r3, [sp, #68]
adr r3, .L122+8
ldmia r3, {r2-r3}
str r2, [sp, #56]
str r3, [sp, #60]
bl malloc
cmp r0, #0
str r0, [r6, #348]
beq .L89
mov r4, #1
mov r5, #0
ldr r10, .L122+100
ldr fp, [sp, #32]
.L90:
add r3, sp, #16
ldmia r3, {r2-r3}
cmp r5, r3
cmpeq r4, r2
bhi .L118
ldr r3, [sp, #24]
ldr r2, [r6, #340]
add r1, sp, #64
sub r2, r2, r3
add r0, sp, #56
bl get_random_less_than.isra.0
ldr r3, [sp, #24]
mov r8, #0
add r9, r0, r3
b .L82
.L83:
ldr r0, [r6, #344]
add r3, r0, #1
str r3, [r6, #344]
bl __aeabi_uidivmod
.L84:
ldr r2, [r6, #72]
ldr r3, [r6, #348]
ldrb r2, [r2, r1] @ zero_extendqisi2
strb r2, [r3, r8]
add r8, r8, #1
.L82:
cmp r9, r8
beq .L119
cmp fp, #0
ldr r1, [r6, #76]
beq .L83
mov r2, r1
add r0, sp, #56
add r1, sp, #64
bl get_random_less_than.isra.0
mov r1, r0
b .L84
.L119:
add r3, sp, #16
ldmia r3, {r2-r3}
cmp r5, r3
cmpeq r4, r2
moveq r2, r7
movne r2, #0
ldrb r3, [r6, #352] @ zero_extendqisi2
ldr r0, [r6, #348]
cmp r2, #0
strb r3, [r0, r8]
addeq r8, r8, #1
mov r2, r8
mov r1, #1
ldr r3, [r10]
bl fwrite
cmp r0, r8
bcc .L120
adds r4, r4, #1
adc r5, r5, #0
b .L90
.L71:
ldr r3, [sp, #12]
cmp r3, #0
beq .L121
ldr r3, .L122+104
ldr r2, .L122+108
ldr r1, .L122+112
ldr r0, .L122+116
bl __assert_fail
.L117:
ldr r3, .L122+32
mov r2, #53
mov r1, #1
ldr r3, [r3]
ldr r0, .L122+120
bl fwrite
bl show_usage_and_exit
.L110:
ldr r3, .L122+104
ldr r2, .L122+124
ldr r1, .L122+112
ldr r0, .L122+128
bl __assert_fail
.L121:
ldr r3, [sp, #36]
and r1, r9, #255
and ip, r3, #255
sub r1, r1, ip
add r1, r1, #1
ldr r6, .L122+88
cmp r1, #256
str r1, [r6, #80]
beq .L75
add lr, r6, #84
mov r0, lr
ldr r3, [sp, #12]
b .L76
.L77:
add r3, r3, #1
strb r2, [r0], #1
.L76:
add r2, ip, r3
cmp r1, r3
and r2, r2, #255
bgt .L77
str lr, [r6, #72]
str r1, [r6, #76]
b .L74
.L118:
ldr r0, [r6, #348]
bl free
mov r0, #0
bl exit
.L120:
ldr r0, .L122+132
bl perror
mov r0, #3
bl exit
.L89:
ldr r0, .L122+136
bl perror
mov r0, #2
bl exit
.L75:
ldr r3, .L122+140
ldr r2, .L122+144
ldr r1, .L122+112
ldr r0, .L122+148
bl __assert_fail
.L123:
.align 3
.L122:
.word 695383991
.word -1266912361
.word 271183393
.word -367295438
.word .LC25
.word 1000000
.word .LC15
.word optarg
.word stderr
.word .LC24
.word .LC10
.word .LC8
.word .LC9
.word .LC11
.word .LC13
.word .LC14
.word optind
.word .LC17
.word .LC18
.word .LC12
.word .LANCHOR1+8
.word .LANCHOR1+33
.word .LANCHOR1
.word 858927408
.word 926299444
.word stdout
.word .LANCHOR0+100
.word 553
.word .LC0
.word .LC19
.word .LC16
.word 558
.word .LC20
.word .LC23
.word .LC22
.word .LANCHOR0+108
.word 285
.word .LC21
.size main, .-main
.section .rodata
.align 2
.set .LANCHOR0,. + 0
.type CSWTCH.84, %object
.size CSWTCH.84, 85
CSWTCH.84:
.byte 34
.byte -1
.byte -1
.byte -1
.byte -1
.byte 39
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 63
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 92
.byte -1
.byte -1
.byte -1
.byte -1
.byte 7
.byte 8
.byte -1
.byte -1
.byte 27
.byte 12
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte -1
.byte 10
.byte -1
.byte -1
.byte -1
.byte 13
.byte -1
.byte 9
.byte -1
.byte 11
.space 3
.type __PRETTY_FUNCTION__.5918, %object
.size __PRETTY_FUNCTION__.5918, 10
__PRETTY_FUNCTION__.5918:
.ascii "parsebyte\000"
.space 2
.type __PRETTY_FUNCTION__.5956, %object
.size __PRETTY_FUNCTION__.5956, 5
__PRETTY_FUNCTION__.5956:
.ascii "main\000"
.space 3
.type __PRETTY_FUNCTION__.5857, %object
.size __PRETTY_FUNCTION__.5857, 14
__PRETTY_FUNCTION__.5857:
.ascii "build_bytemap\000"
.bss
.align 2
.set .LANCHOR1,. + 0
.type remaining.5828, %object
.size remaining.5828, 4
remaining.5828:
.space 4
.type ranc.5827, %object
.size ranc.5827, 4
ranc.5827:
.space 4
.type b64map, %object
.size b64map, 64
b64map:
.space 64
.type map, %object
.size map, 4
map:
.space 4
.type maplen, %object
.size maplen, 4
maplen:
.space 4
.type bytemaplen, %object
.size bytemaplen, 4
bytemaplen:
.space 4
.type bytemap, %object
.size bytemap, 256
bytemap:
.space 256
.type outbuflen, %object
.size outbuflen, 4
outbuflen:
.space 4
.type static_mi.5871, %object
.size static_mi.5871, 4
static_mi.5871:
.space 4
.type outbuf, %object
.size outbuf, 4
outbuf:
.space 4
.type eol_byte, %object
.size eol_byte, 1
eol_byte:
.space 1
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139224.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Enter two numbers"
.LC1:
.string "%d %d"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC2:
.string "\nThe numbers before swapping is %d %d "
.align 8
.LC3:
.string "\nThe numbers after swapping is %d %d "
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
sub rsp, 24
.cfi_def_cfa_offset 32
lea rsi, .LC0[rip]
mov edi, 1
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call __printf_chk@PLT
lea rdx, 4[rsp]
mov rsi, rsp
xor eax, eax
lea rdi, .LC1[rip]
call __isoc99_scanf@PLT
mov ecx, DWORD PTR 4[rsp]
mov edx, DWORD PTR [rsp]
xor eax, eax
lea rsi, .LC2[rip]
mov edi, 1
call __printf_chk@PLT
mov ecx, DWORD PTR [rsp]
mov edx, DWORD PTR 4[rsp]
xor eax, eax
lea rsi, .LC3[rip]
mov edi, 1
mov DWORD PTR 4[rsp], ecx
mov DWORD PTR [rsp], edx
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L5
xor eax, eax
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L5:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139224.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Enter two numbers\000"
.align 2
.LC1:
.ascii "%d %d\000"
.align 2
.LC2:
.ascii "\012The numbers before swapping is %d %d \000"
.align 2
.LC3:
.ascii "\012The numbers after swapping is %d %d \000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
str lr, [sp, #-4]!
ldr r3, .L6
sub sp, sp, #20
ldr r1, .L6+4
mov r0, #1
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __printf_chk
add r2, sp, #8
add r1, sp, #4
ldr r0, .L6+8
bl __isoc99_scanf
ldmib sp, {r2, r3}
ldr r1, .L6+12
mov r0, #1
bl __printf_chk
ldr r3, [sp, #4]
ldr r2, [sp, #8]
mov r0, #1
ldr r1, .L6+16
stmib sp, {r2, r3}
bl __printf_chk
ldr r3, .L6
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L5
mov r0, #0
add sp, sp, #20
@ sp needed
ldr pc, [sp], #4
.L5:
bl __stack_chk_fail
.L7:
.align 2
.L6:
.word .LC4
.word .LC0
.word .LC1
.word .LC2
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139225.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%[^\n]s"
.LC2:
.string "%s"
.section .rodata.str1.8,"aMS",@progbits,1
.align 8
.LC3:
.string "\nTotal no of doubly repeated strings is %d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB34:
.cfi_startproc
endbr64
push rbp
.cfi_def_cfa_offset 16
.cfi_offset 6, -16
mov rbp, rsp
.cfi_def_cfa_register 6
push r15
push r14
push r13
push r12
push rbx
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 4096
or QWORD PTR [rsp], 0
sub rsp, 1880
.cfi_offset 15, -24
.cfi_offset 14, -32
.cfi_offset 13, -40
.cfi_offset 12, -48
.cfi_offset 3, -56
lea rdi, .LC0[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR -56[rbp], rax
xor eax, eax
lea rsi, -10072[rbp]
call __isoc99_scanf@PLT
mov rdi, QWORD PTR stdin[rip]
call fflush@PLT
mov eax, DWORD PTR -10072[rbp]
lea edx, -1[rax]
mov DWORD PTR -10072[rbp], edx
test eax, eax
je .L2
lea rax, -10068[rbp]
mov QWORD PTR -10104[rbp], rax
lea rax, -10064[rbp]
mov QWORD PTR -10112[rbp], rax
.p2align 4,,10
.p2align 3
.L16:
mov rsi, QWORD PTR -10104[rbp]
lea rdi, .LC0[rip]
xor eax, eax
mov QWORD PTR -10096[rbp], rsp
call __isoc99_scanf@PLT
mov r13d, DWORD PTR -10068[rbp]
mov rdi, QWORD PTR stdin[rip]
call fflush@PLT
movsx rax, r13d
mov rcx, rsp
lea rax, [rax+rax*4]
lea rax, [rax+rax*4]
lea rax, 15[rax+rax]
mov rdx, rax
and rax, -4096
sub rcx, rax
and rdx, -16
cmp rsp, rcx
je .L4
.L35:
sub rsp, 4096
or QWORD PTR 4088[rsp], 0
cmp rsp, rcx
jne .L35
.L4:
and edx, 4095
sub rsp, rdx
test rdx, rdx
je .L5
or QWORD PTR -8[rsp+rdx], 0
.L5:
mov r15, QWORD PTR -10112[rbp]
lea rdi, .LC1[rip]
xor eax, eax
mov r12, rsp
mov rsi, r15
call __isoc99_scanf@PLT
mov rdi, r15
call strlen@PLT
lea rsi, .LC0[rip]
mov edi, 1
mov rbx, rax
mov edx, eax
xor eax, eax
call __printf_chk@PLT
test rbx, rbx
je .L6
lea edx, -1[rbx]
mov rax, r15
xor edi, edi
xor ecx, ecx
lea r9, -10063[rbp+rdx]
jmp .L9
.p2align 4,,10
.p2align 3
.L36:
movsx rsi, edi
movsx r8, ecx
add rax, 1
add ecx, 1
lea rsi, [rsi+rsi*4]
lea rsi, [rsi+rsi*4]
lea rsi, [r12+rsi*2]
mov BYTE PTR [rsi+r8], dl
cmp rax, r9
je .L6
.L9:
movzx edx, BYTE PTR [rax]
cmp dl, 32
jne .L36
add edi, 1
add rax, 1
xor ecx, ecx
movsx rdx, edi
lea rdx, [rdx+rdx*4]
lea rdx, [rdx+rdx*4]
mov BYTE PTR [r12+rdx*2], 32
cmp rax, r9
jne .L9
.L6:
test r13d, r13d
jle .L18
mov eax, r13d
mov r14, r12
lea rax, [rax+rax*4]
lea rax, [rax+rax*4]
lea rbx, [r12+rax*2]
.p2align 4,,10
.p2align 3
.L11:
mov rdx, r14
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
add r14, 50
cmp rbx, r14
jne .L11
mov DWORD PTR -10088[rbp], 0
mov DWORD PTR -10084[rbp], 0
.p2align 4,,10
.p2align 3
.L15:
mov r15d, DWORD PTR -10084[rbp]
mov r14, r12
mov ebx, 1
.p2align 4,,10
.p2align 3
.L13:
mov rsi, r14
mov rdi, r12
call strcmp@PLT
cmp eax, 1
adc ebx, 0
add r15d, 1
add r14, 50
cmp r13d, r15d
jg .L13
xor eax, eax
cmp ebx, 2
sete al
add DWORD PTR -10084[rbp], 1
add r12, 50
add DWORD PTR -10088[rbp], eax
mov eax, DWORD PTR -10084[rbp]
cmp r13d, eax
jne .L15
.L10:
mov edx, DWORD PTR -10088[rbp]
lea rsi, .LC3[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
mov eax, DWORD PTR -10072[rbp]
mov rsp, QWORD PTR -10096[rbp]
lea edx, -1[rax]
mov DWORD PTR -10072[rbp], edx
test eax, eax
jne .L16
.L2:
mov rax, QWORD PTR -56[rbp]
sub rax, QWORD PTR fs:40
jne .L37
lea rsp, -40[rbp]
xor eax, eax
pop rbx
pop r12
pop r13
pop r14
pop r15
pop rbp
.cfi_remember_state
.cfi_def_cfa 7, 8
ret
.L18:
.cfi_restore_state
mov DWORD PTR -10088[rbp], 0
jmp .L10
.L37:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE34:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139225.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%[^\012]s\000"
.align 2
.LC2:
.ascii "%s\000"
.align 2
.LC3:
.ascii "\012Total no of doubly repeated strings is %d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 10024
@ frame_needed = 1, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
add fp, sp, #32
sub sp, sp, #9984
sub sp, sp, #44
ldr r3, .L30
sub r1, fp, #10048
ldr r0, .L30+4
ldr r3, [r3]
str r3, [fp, #-40]
mov r3,#0
bl __isoc99_scanf
ldr r3, .L30+8
ldr r0, [r3]
bl fflush
sub r3, fp, #10048
ldr r3, [r3]
sub r2, fp, #10048
cmp r3, #0
sub r3, r3, #1
str r3, [r2]
beq .L2
ldr r10, .L30+12
.L14:
sub r1, fp, #9984
sub r1, r1, #60
ldr r0, .L30+4
bl __isoc99_scanf
sub r3, fp, #9984
ldr r8, [r3, #-60]
sub r3, r3, #60
add r5, r8, r8, lsl #2
ldr r3, .L30+8
add r5, r5, r5, lsl #2
ldr r0, [r3]
lsl r5, r5, #1
bl fflush
sub r2, fp, #10048
add r3, r5, #7
bic r3, r3, #7
sub r1, fp, #9984
str sp, [r2, #-12]
sub r1, r1, #56
sub sp, sp, r3
ldr r0, .L30+16
sub r2, r2, #12
bl __isoc99_scanf
sub r0, fp, #9984
sub r0, r0, #56
bl strlen
mov r6, r0
mov r2, r0
ldr r1, .L30+4
mov r0, #1
bl __printf_chk
cmp r6, #0
mov r4, sp
beq .L3
mov ip, #0
sub r1, fp, #9984
sub r1, r1, #56
mov lr, ip
mov r3, r1
add r0, r1, r6
.L6:
ldrb r2, [r1], #1 @ zero_extendqisi2
cmp r2, #32
addne r3, ip, ip, lsl #2
addeq ip, ip, #1
addne r3, r3, r3, lsl #2
addeq r3, ip, ip, lsl #2
addne r3, r4, r3, lsl #1
addeq r3, r3, r3, lsl #2
strbne r2, [r3, lr]
moveq lr, #0
addne lr, lr, #1
strbeq r2, [r4, r3, lsl #1]
cmp r1, r0
bne .L6
.L3:
cmp r8, #0
ble .L16
mov r6, r4
add r5, r4, r5
.L8:
mov r2, r6
mov r1, r10
mov r0, #1
add r6, r6, #50
bl __printf_chk
cmp r6, r5
bne .L8
mov r3, #0
mov r7, r3
sub r2, fp, #10048
sub r2, r2, #8
str r3, [r2]
.L9:
cmp r8, r7
movgt r6, r4
movgt r9, #1
ble .L12
.L11:
mov r1, r6
mov r0, r4
bl strcmp
add r6, r6, #50
cmp r0, #0
addeq r9, r9, #1
cmp r6, r5
bne .L11
cmp r9, #2
bne .L12
sub r3, fp, #10048
sub r3, r3, #8
ldr r3, [r3]
sub r2, fp, #10048
add r3, r3, #1
sub r2, r2, #8
str r3, [r2]
.L12:
add r7, r7, #1
cmp r8, r7
add r4, r4, #50
bne .L9
.L7:
sub r3, fp, #10048
ldr r2, [r3, #-8]
mov r0, #1
ldr r1, .L30+20
sub r3, r3, #8
bl __printf_chk
sub r3, fp, #10048
ldr r3, [r3]
sub r2, fp, #10048
sub r2, r2, #12
ldr sp, [r2]
cmp r3, #0
sub r2, fp, #10048
sub r3, r3, #1
str r3, [r2]
bne .L14
.L2:
ldr r3, .L30
ldr r2, [r3]
ldr r3, [fp, #-40]
eors r2, r3, r2
mov r3, #0
bne .L29
mov r0, #0
sub sp, fp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L16:
mov r3, #0
sub r2, fp, #10048
sub r2, r2, #8
str r3, [r2]
b .L7
.L29:
bl __stack_chk_fail
.L31:
.align 2
.L30:
.word .LC4
.word .LC0
.word stdin
.word .LC2
.word .LC1
.word .LC3
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139226.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d%c"
.text
.p2align 4
.globl selection_sort
.type selection_sort, @function
selection_sort:
.LFB40:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
lea ebx, -1[rsi]
sub rsp, 24
.cfi_def_cfa_offset 80
test ebx, ebx
jle .L13
mov QWORD PTR 8[rsp], rdi
mov r15, rdi
mov ebp, esi
mov DWORD PTR [rsp], 0
mov DWORD PTR 4[rsp], 0
.p2align 4,,10
.p2align 3
.L3:
mov rax, QWORD PTR 8[rsp]
mov r10d, DWORD PTR [rax]
cmp ebp, DWORD PTR [rsp]
jle .L20
mov r8d, DWORD PTR [rsp]
mov rdx, QWORD PTR 8[rsp]
mov ecx, r10d
mov esi, r10d
mov eax, r8d
jmp .L7
.p2align 4,,10
.p2align 3
.L21:
movsx rcx, r8d
add eax, 1
add rdx, 4
lea rdi, [r15+rcx*4]
cmp ebp, eax
je .L6
.L22:
mov ecx, DWORD PTR [rdx]
.L7:
cmp esi, ecx
jle .L21
mov r8d, eax
add eax, 1
mov rdi, rdx
add DWORD PTR 4[rsp], 1
mov esi, ecx
add rdx, 4
cmp ebp, eax
jne .L22
.L6:
mov rax, QWORD PTR 8[rsp]
mov DWORD PTR [rax], esi
mov DWORD PTR [rdi], r10d
.L12:
mov r13d, ebx
xor r14d, r14d
mov r12d, 10
jmp .L10
.p2align 4,,10
.p2align 3
.L15:
mov r14, rax
.L10:
cmp ebx, r14d
mov ecx, 32
mov edx, DWORD PTR [r15+r14*4]
lea rsi, .LC0[rip]
cmove ecx, r12d
mov edi, 1
xor eax, eax
call __printf_chk@PLT
lea rax, 1[r14]
cmp r13, r14
jne .L15
.L8:
add DWORD PTR [rsp], 1
mov eax, DWORD PTR [rsp]
add QWORD PTR 8[rsp], 4
cmp eax, ebx
jne .L3
.L1:
mov eax, DWORD PTR 4[rsp]
add rsp, 24
.cfi_remember_state
.cfi_def_cfa_offset 56
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L20:
.cfi_restore_state
test ebp, ebp
jle .L8
jmp .L12
.p2align 4,,10
.p2align 3
.L13:
mov DWORD PTR 4[rsp], 0
jmp .L1
.cfi_endproc
.LFE40:
.size selection_sort, .-selection_sort
.p2align 4
.globl print_vetor
.type print_vetor, @function
print_vetor:
.LFB41:
.cfi_startproc
endbr64
test esi, esi
jle .L32
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
mov r14, rdi
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
lea r13d, -1[rsi]
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
movsx r12, esi
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
mov ebp, 32
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
xor ebx, ebx
.p2align 4,,10
.p2align 3
.L26:
cmp r13d, ebx
mov ecx, 10
mov edx, DWORD PTR [r14+rbx*4]
lea rsi, .LC0[rip]
cmovne ecx, ebp
mov edi, 1
xor eax, eax
add rbx, 1
call __printf_chk@PLT
cmp rbx, r12
jne .L26
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L32:
.cfi_restore 3
.cfi_restore 6
.cfi_restore 12
.cfi_restore 13
.cfi_restore 14
ret
.cfi_endproc
.LFE41:
.size print_vetor, .-print_vetor
.section .rodata.str1.1
.LC1:
.string "%d\n"
.LC2:
.string "%d"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
lea rdi, .LC1[rip]
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
sub rsp, 16
.cfi_def_cfa_offset 64
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
mov rsi, rsp
call __isoc99_scanf@PLT
movsx rdi, DWORD PTR [rsp]
mov rbp, rdi
sal rdi, 2
call malloc@PLT
mov r12, rax
test ebp, ebp
jle .L36
xor ebx, ebx
lea r14, 4[rsp]
lea r13, .LC2[rip]
.p2align 4,,10
.p2align 3
.L37:
mov rsi, r14
mov rdi, r13
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR 4[rsp]
mov ebp, DWORD PTR [rsp]
mov DWORD PTR [r12+rbx*4], eax
add rbx, 1
cmp ebp, ebx
jg .L37
.L36:
mov esi, ebp
mov rdi, r12
call print_vetor
mov esi, DWORD PTR [rsp]
mov rdi, r12
call selection_sort
mov esi, DWORD PTR [rsp]
mov rdi, r12
mov r13d, eax
call print_vetor
xor eax, eax
mov edx, r13d
mov edi, 1
lea rsi, .LC1[rip]
call __printf_chk@PLT
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L41
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 48
xor eax, eax
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.L41:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139226.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d%c\000"
.text
.align 2
.global print_vetor
.syntax unified
.arm
.fpu softvfp
.type print_vetor, %function
print_vetor:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
subs r6, r1, #0
pople {r4, r5, r6, r7, r8, pc}
mov r4, #0
ldr r8, .L10
sub r5, r0, #4
sub r7, r6, #1
.L4:
cmp r4, r7
moveq r3, #10
movne r3, #32
mov r1, r8
mov r0, #1
ldr r2, [r5, #4]!
add r4, r4, #1
bl __printf_chk
cmp r6, r4
bne .L4
pop {r4, r5, r6, r7, r8, pc}
.L11:
.align 2
.L10:
.word .LC0
.size print_vetor, .-print_vetor
.align 2
.global selection_sort
.syntax unified
.arm
.fpu softvfp
.type selection_sort, %function
selection_sort:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r1, #1
push {r4, r5, r6, r7, r8, lr}
ble .L19
mov r6, #0
mov r5, r1
mov r4, r0
mov r8, r6
sub r7, r1, #1
.L14:
ldr ip, [r4, r6, lsl #2]
cmp r5, r6
add r2, r4, r6, lsl #2
mov r0, ip
movgt r2, ip
movgt r3, r6
movgt r1, r6
bgt .L18
b .L17
.L23:
ldr r2, [r4, r3, lsl #2]
.L18:
cmp r2, r0
movlt r0, r2
movlt r1, r3
addlt r2, r4, r3, lsl #2
add r3, r3, #1
addge r2, r4, r1, lsl #2
addlt r8, r8, #1
cmp r5, r3
bne .L23
.L17:
str r0, [r4, r6, lsl #2]
mov r1, r5
mov r0, r4
str ip, [r2]
add r6, r6, #1
bl print_vetor
cmp r6, r7
bne .L14
mov r0, r8
pop {r4, r5, r6, r7, r8, pc}
.L19:
mov r8, #0
mov r0, r8
pop {r4, r5, r6, r7, r8, pc}
.size selection_sort, .-selection_sort
.section .rodata.str1.4
.align 2
.LC1:
.ascii "%d\012\000"
.align 2
.LC2:
.ascii "%d\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, lr}
ldr r3, .L31
sub sp, sp, #20
add r1, sp, #4
ldr r0, .L31+4
ldr r3, [r3]
str r3, [sp, #12]
mov r3,#0
bl __isoc99_scanf
ldr r0, [sp, #4]
lsl r0, r0, #2
bl malloc
ldr r1, [sp, #4]
mov r7, r0
cmp r1, #0
ble .L25
mov r4, #0
ldr r6, .L31+8
sub r5, r0, #4
.L26:
add r1, sp, #8
mov r0, r6
bl __isoc99_scanf
ldr r1, [sp, #4]
ldr r3, [sp, #8]
add r4, r4, #1
cmp r1, r4
str r3, [r5, #4]!
bgt .L26
.L25:
mov r0, r7
bl print_vetor
ldr r1, [sp, #4]
mov r0, r7
bl selection_sort
mov r4, r0
ldr r1, [sp, #4]
mov r0, r7
bl print_vetor
mov r2, r4
mov r0, #1
ldr r1, .L31+4
bl __printf_chk
ldr r3, .L31
ldr r2, [r3]
ldr r3, [sp, #12]
eors r2, r3, r2
mov r3, #0
bne .L30
mov r0, #0
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, pc}
.L30:
bl __stack_chk_fail
.L32:
.align 2
.L31:
.word .LC3
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139227.c"
.intel_syntax noprefix
.text
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139227.c"
.text
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139234.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "SAFE"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB39:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
lea rdi, .LC0[rip]
call puts@PLT
xor eax, eax
add rsp, 8
.cfi_def_cfa_offset 8
ret
.cfi_endproc
.LFE39:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139234.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "SAFE\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
ldr r0, .L4
bl puts
mov r0, #0
pop {r4, pc}
.L5:
.align 2
.L4:
.word .LC0
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139235.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "N"
.LC1:
.string "L"
.LC2:
.string "T"
.LC3:
.string "U"
.LC4:
.string "STFTRI"
.LC5:
.string "R"
.text
.p2align 4
.globl stftri_
.type stftri_, @function
stftri_:
.LFB65:
.cfi_startproc
endbr64
push r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
mov r15, r8
push r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
mov r14, rsi
lea rsi, .LC0[rip]
push r13
.cfi_def_cfa_offset 32
.cfi_offset 13, -32
push r12
.cfi_def_cfa_offset 40
.cfi_offset 12, -40
mov r12, rdx
push rbp
.cfi_def_cfa_offset 48
.cfi_offset 6, -48
push rbx
.cfi_def_cfa_offset 56
.cfi_offset 3, -56
mov rbx, r9
sub rsp, 72
.cfi_def_cfa_offset 128
mov QWORD PTR 16[rsp], rcx
mov rax, QWORD PTR fs:40
mov QWORD PTR 56[rsp], rax
xor eax, eax
mov DWORD PTR [r9], 0
mov QWORD PTR 8[rsp], rdi
call lsame_@PLT
lea rsi, .LC1[rip]
mov rdi, r14
mov r13d, eax
call lsame_@PLT
test r13d, r13d
mov r10, QWORD PTR 8[rsp]
mov ebp, eax
je .L46
.L2:
test ebp, ebp
jne .L4
lea rsi, .LC3[rip]
mov rdi, r14
call lsame_@PLT
test eax, eax
jne .L4
mov DWORD PTR [rbx], -2
mov edx, 2
.L37:
mov DWORD PTR 36[rsp], edx
lea rsi, 36[rsp]
mov edx, 6
lea rdi, .LC4[rip]
call xerbla_@PLT
.L8:
mov rax, QWORD PTR 56[rsp]
sub rax, QWORD PTR fs:40
jne .L47
add rsp, 72
.cfi_remember_state
.cfi_def_cfa_offset 56
xor eax, eax
pop rbx
.cfi_def_cfa_offset 48
pop rbp
.cfi_def_cfa_offset 40
pop r12
.cfi_def_cfa_offset 32
pop r13
.cfi_def_cfa_offset 24
pop r14
.cfi_def_cfa_offset 16
pop r15
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L4:
.cfi_restore_state
lea rsi, .LC0[rip]
mov rdi, r12
call lsame_@PLT
test eax, eax
je .L48
.L5:
mov rax, QWORD PTR 16[rsp]
mov eax, DWORD PTR [rax]
test eax, eax
js .L49
mov edx, DWORD PTR [rbx]
test edx, edx
jne .L50
test eax, eax
je .L8
mov ecx, eax
sar ecx
test al, 1
je .L51
mov esi, eax
mov edx, 1
sub esi, ecx
test ebp, ebp
je .L11
.L52:
mov DWORD PTR 52[rsp], ecx
mov DWORD PTR 48[rsp], esi
test edx, edx
je .L13
.L53:
test r13d, r13d
je .L14
test ebp, ebp
je .L15
mov r8, QWORD PTR 16[rsp]
lea rbp, 48[rsp]
mov r9, rbx
mov rcx, r15
mov rdx, rbp
mov rsi, r12
lea rdi, .LC1[rip]
call strtri_@PLT
mov r10d, DWORD PTR [rbx]
test r10d, r10d
jg .L8
lea r13, 52[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov rcx, r12
mov r14, QWORD PTR 24[rsp]
mov r8, r13
lea rdx, .LC0[rip]
lea rsi, .LC1[rip]
lea rdi, .LC5[rip]
push r14
.cfi_def_cfa_offset 144
movsx rax, DWORD PTR 64[rsp]
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 152
lea rax, c_b13[rip]
push r14
.cfi_def_cfa_offset 160
push r15
.cfi_def_cfa_offset 168
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
movsx rax, DWORD PTR [r14]
add rsp, 48
.cfi_def_cfa_offset 128
mov rdx, r13
mov r8, r14
mov r9, rbx
lea rdi, .LC3[rip]
mov rsi, r12
lea rcx, [r15+rax*4]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
movsx rax, DWORD PTR 48[rsp]
test edx, edx
jle .L18
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L18:
sub rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 136
lea rax, [r15+rax*4]
mov r9, rbp
mov r8, r13
mov rbx, QWORD PTR 24[rsp]
push rbx
.cfi_def_cfa_offset 144
push rax
.cfi_def_cfa_offset 152
movsx rax, DWORD PTR [rbx]
push rbx
.cfi_def_cfa_offset 160
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b18[rip]
push rax
.cfi_def_cfa_offset 176
jmp .L42
.p2align 4,,10
.p2align 3
.L51:
.cfi_restore_state
mov esi, eax
mov DWORD PTR 44[rsp], ecx
sub esi, ecx
test ebp, ebp
jne .L52
.L11:
mov DWORD PTR 48[rsp], ecx
mov DWORD PTR 52[rsp], esi
test edx, edx
jne .L53
.L13:
test r13d, r13d
je .L26
add eax, 1
mov DWORD PTR 36[rsp], eax
test ebp, ebp
je .L27
lea r14, 4[r15]
lea r13, 36[rsp]
mov rsi, r12
mov r9, rbx
lea rbp, 44[rsp]
mov r8, r13
mov rcx, r14
mov rdx, rbp
lea rdi, .LC1[rip]
call strtri_@PLT
mov esi, DWORD PTR [rbx]
test esi, esi
jg .L8
mov rax, QWORD PTR 16[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, rbp
mov rcx, r12
lea rdx, .LC0[rip]
lea rsi, .LC1[rip]
mov edi, DWORD PTR [rax]
lea eax, 1[rdi]
mov DWORD PTR 16[rsp], edi
lea rdi, c_b13[rip]
mov DWORD PTR 44[rsp], eax
mov DWORD PTR 48[rsp], eax
lea r10, 48[rsp]
push r10
.cfi_def_cfa_offset 144
movsx rax, DWORD PTR 60[rsp]
lea rax, 4[r15+rax*4]
mov QWORD PTR 40[rsp], r10
push rax
.cfi_def_cfa_offset 152
push r13
.cfi_def_cfa_offset 160
push r14
.cfi_def_cfa_offset 168
push rdi
.cfi_def_cfa_offset 176
lea rdi, .LC5[rip]
call strmm_@PLT
mov rax, QWORD PTR 64[rsp]
mov rdx, rbp
mov r9, rbx
mov r8, r13
mov rcx, r15
lea rdi, .LC3[rip]
mov rsi, r12
mov eax, DWORD PTR [rax]
mov DWORD PTR 56[rsp], eax
add eax, 1
mov DWORD PTR 84[rsp], eax
add rsp, 48
.cfi_def_cfa_offset 128
call strtri_@PLT
mov edx, DWORD PTR [rbx]
movsx rax, DWORD PTR 44[rsp]
mov r10, QWORD PTR 24[rsp]
test edx, edx
jle .L29
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L29:
mov rbx, QWORD PTR 16[rsp]
lea rax, 4[r15+rax*4]
mov r9, rbp
mov r8, rbp
sub rsp, 8
.cfi_def_cfa_offset 136
mov edx, DWORD PTR [rbx]
add edx, 1
mov DWORD PTR 44[rsp], edx
mov DWORD PTR 48[rsp], edx
push r10
.cfi_def_cfa_offset 144
push rax
.cfi_def_cfa_offset 152
lea rax, c_b18[rip]
push r13
.cfi_def_cfa_offset 160
push r15
.cfi_def_cfa_offset 168
push rax
.cfi_def_cfa_offset 176
.L42:
mov rcx, r12
lea rdx, .LC2[rip]
lea rsi, .LC3[rip]
lea rdi, .LC1[rip]
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
jmp .L8
.p2align 4,,10
.p2align 3
.L49:
mov DWORD PTR [rbx], -4
mov edx, 4
jmp .L37
.p2align 4,,10
.p2align 3
.L48:
lea rsi, .LC3[rip]
mov rdi, r12
call lsame_@PLT
test eax, eax
jne .L5
mov DWORD PTR [rbx], -3
mov edx, 3
jmp .L37
.p2align 4,,10
.p2align 3
.L46:
lea rsi, .LC2[rip]
mov rdi, r10
call lsame_@PLT
test eax, eax
jne .L2
mov DWORD PTR [rbx], -1
mov edx, 1
jmp .L37
.p2align 4,,10
.p2align 3
.L14:
test ebp, ebp
je .L21
lea rbp, 48[rsp]
mov r9, rbx
mov rcx, r15
mov rsi, r12
mov r8, rbp
mov rdx, rbp
lea rdi, .LC3[rip]
call strtri_@PLT
mov r8d, DWORD PTR [rbx]
test r8d, r8d
jg .L8
mov eax, DWORD PTR 48[rsp]
lea r13, 52[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r8, rbp
push rbp
.cfi_def_cfa_offset 144
mov r9, r13
mov rcx, r12
lea rdx, .LC0[rip]
imul eax, eax
lea rsi, .LC3[rip]
lea rdi, .LC1[rip]
lea r14, 4[r15]
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 152
lea rax, c_b13[rip]
push rbp
.cfi_def_cfa_offset 160
push r15
.cfi_def_cfa_offset 168
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
mov rdx, r13
mov r9, rbx
mov r8, rbp
mov rcx, r14
lea rdi, .LC1[rip]
mov rsi, r12
call strtri_@PLT
mov edx, DWORD PTR [rbx]
mov eax, DWORD PTR 48[rsp]
test edx, edx
jle .L23
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L23:
imul eax, eax
sub rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 136
mov r9, r13
push rbp
.cfi_def_cfa_offset 144
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 152
lea rax, c_b18[rip]
push rbp
.cfi_def_cfa_offset 160
push r14
.cfi_def_cfa_offset 168
push rax
.cfi_def_cfa_offset 176
jmp .L43
.p2align 4,,10
.p2align 3
.L26:
.cfi_restore_state
test ebp, ebp
movsx rax, DWORD PTR 44[rsp]
lea rbp, 44[rsp]
je .L32
mov rdx, rbp
lea rcx, [r15+rax*4]
mov r9, rbx
mov r8, rbp
mov rsi, r12
lea rdi, .LC3[rip]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
test edx, edx
jg .L8
movsx rax, DWORD PTR 44[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, rbp
push rbp
.cfi_def_cfa_offset 144
mov rcx, r12
lea rsi, .LC3[rip]
lea rdi, .LC1[rip]
lea edx, 1[rax]
imul edx, eax
lea rax, [r15+rax*4]
movsx rdx, edx
lea rdx, [r15+rdx*4]
push rdx
.cfi_def_cfa_offset 152
lea rdx, .LC0[rip]
push rbp
.cfi_def_cfa_offset 160
push rax
.cfi_def_cfa_offset 168
lea rax, c_b13[rip]
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
mov rdx, rbp
mov r9, rbx
mov r8, rbp
mov rcx, r15
lea rdi, .LC1[rip]
mov rsi, r12
call strtri_@PLT
mov edx, DWORD PTR [rbx]
mov eax, DWORD PTR 44[rsp]
test edx, edx
jle .L34
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L34:
lea edx, 1[rax]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
imul eax, edx
push rbp
.cfi_def_cfa_offset 144
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 152
lea rax, c_b18[rip]
push rbp
.cfi_def_cfa_offset 160
push r15
.cfi_def_cfa_offset 168
push rax
.cfi_def_cfa_offset 176
.L43:
mov r8, rbp
mov rcx, r12
lea rdx, .LC2[rip]
lea rsi, .LC1[rip]
lea rdi, .LC5[rip]
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
jmp .L8
.p2align 4,,10
.p2align 3
.L21:
mov eax, DWORD PTR 52[rsp]
lea r13, 52[rsp]
mov r9, rbx
mov rsi, r12
lea rbp, 48[rsp]
lea rdi, .LC3[rip]
mov r8, r13
imul eax, eax
mov rdx, rbp
cdqe
lea rcx, [r15+rax*4]
call strtri_@PLT
mov edi, DWORD PTR [rbx]
test edi, edi
jg .L8
mov eax, DWORD PTR 52[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, r13
push r13
.cfi_def_cfa_offset 144
mov rcx, r12
lea rdx, .LC2[rip]
lea rsi, .LC3[rip]
imul eax, eax
push r15
.cfi_def_cfa_offset 152
lea rdi, .LC5[rip]
push r13
.cfi_def_cfa_offset 160
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b13[rip]
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
mov eax, DWORD PTR 96[rsp]
add rsp, 48
.cfi_def_cfa_offset 128
mov rdx, r13
imul eax, DWORD PTR 52[rsp]
mov r9, rbx
mov r8, r13
mov rsi, r12
lea rdi, .LC1[rip]
cdqe
lea rcx, [r15+rax*4]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
mov eax, DWORD PTR 48[rsp]
test edx, edx
jle .L25
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L25:
sub rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, r13
push r13
.cfi_def_cfa_offset 144
push r15
.cfi_def_cfa_offset 152
push r13
.cfi_def_cfa_offset 160
imul eax, DWORD PTR 84[rsp]
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b18[rip]
push rax
.cfi_def_cfa_offset 176
jmp .L44
.p2align 4,,10
.p2align 3
.L27:
.cfi_restore_state
movsx rax, DWORD PTR 44[rsp]
lea r13, 36[rsp]
mov r9, rbx
mov rsi, r12
lea rbp, 44[rsp]
mov r8, r13
lea rdi, .LC1[rip]
lea rcx, 4[r15+rax*4]
mov rdx, rbp
call strtri_@PLT
mov ecx, DWORD PTR [rbx]
test ecx, ecx
jg .L8
mov r14, QWORD PTR 16[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, rbp
lea rsi, .LC1[rip]
mov rcx, r12
lea rdx, .LC2[rip]
mov eax, DWORD PTR [r14]
mov rdi, rsi
mov DWORD PTR 16[rsp], eax
add eax, 1
mov DWORD PTR 44[rsp], eax
mov DWORD PTR 48[rsp], eax
lea r10, 48[rsp]
push r10
.cfi_def_cfa_offset 144
mov QWORD PTR 40[rsp], r10
push r15
.cfi_def_cfa_offset 152
push r13
.cfi_def_cfa_offset 160
movsx rax, DWORD PTR 76[rsp]
lea rax, 4[r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b13[rip]
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
mov eax, DWORD PTR [r14]
mov rdx, rbp
mov r9, rbx
mov r8, r13
mov rsi, r12
lea rdi, .LC3[rip]
mov DWORD PTR 56[rsp], eax
add eax, 1
mov DWORD PTR 84[rsp], eax
movsx rax, DWORD PTR 92[rsp]
add rsp, 48
.cfi_def_cfa_offset 128
lea rcx, [r15+rax*4]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
movsx rax, DWORD PTR 44[rsp]
mov r10, QWORD PTR 24[rsp]
test edx, edx
jle .L31
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L31:
mov rbx, QWORD PTR 16[rsp]
lea rax, [r15+rax*4]
sub rsp, 8
.cfi_remember_state
.cfi_def_cfa_offset 136
mov r9, rbp
mov edx, DWORD PTR [rbx]
add edx, 1
mov DWORD PTR 44[rsp], edx
mov DWORD PTR 48[rsp], edx
push r10
.cfi_def_cfa_offset 144
push r15
.cfi_def_cfa_offset 152
push r13
.cfi_def_cfa_offset 160
push rax
.cfi_def_cfa_offset 168
lea rax, c_b18[rip]
push rax
.cfi_def_cfa_offset 176
jmp .L41
.p2align 4,,10
.p2align 3
.L15:
.cfi_restore_state
movsx rax, DWORD PTR 52[rsp]
mov r8, QWORD PTR 16[rsp]
mov r9, rbx
mov rsi, r12
lea rbp, 48[rsp]
lea rdi, .LC1[rip]
lea rcx, [r15+rax*4]
mov rdx, rbp
call strtri_@PLT
mov r9d, DWORD PTR [rbx]
test r9d, r9d
jg .L8
lea r13, 52[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r8, rbp
mov rcx, r12
mov r14, QWORD PTR 24[rsp]
lea rsi, .LC1[rip]
mov r9, r13
lea rdx, .LC2[rip]
mov rdi, rsi
push r14
.cfi_def_cfa_offset 144
push r15
.cfi_def_cfa_offset 152
push r14
.cfi_def_cfa_offset 160
movsx rax, DWORD PTR 84[rsp]
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b13[rip]
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
movsx rax, DWORD PTR 96[rsp]
mov rdx, r13
mov r9, rbx
add rsp, 48
.cfi_def_cfa_offset 128
mov r8, r14
mov rsi, r12
lea rcx, [r15+rax*4]
lea rdi, .LC3[rip]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
movsx rax, DWORD PTR 48[rsp]
test edx, edx
jle .L20
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L20:
sub rsp, 8
.cfi_def_cfa_offset 136
lea rax, [r15+rax*4]
mov r9, r13
mov rbx, QWORD PTR 24[rsp]
push rbx
.cfi_def_cfa_offset 144
push r15
.cfi_def_cfa_offset 152
push rbx
.cfi_def_cfa_offset 160
push rax
.cfi_def_cfa_offset 168
lea rax, c_b18[rip]
push rax
.cfi_def_cfa_offset 176
.L41:
mov r8, rbp
mov rcx, r12
lea rdx, .LC0[rip]
lea rsi, .LC3[rip]
lea rdi, .LC5[rip]
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
jmp .L8
.p2align 4,,10
.p2align 3
.L32:
lea edx, 1[rax]
mov r9, rbx
mov r8, rbp
mov rsi, r12
imul eax, edx
lea rdi, .LC3[rip]
mov rdx, rbp
cdqe
lea rcx, [r15+rax*4]
call strtri_@PLT
mov eax, DWORD PTR [rbx]
test eax, eax
jg .L8
mov edx, DWORD PTR 44[rsp]
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, rbp
push rbp
.cfi_def_cfa_offset 144
mov rcx, r12
lea rsi, .LC3[rip]
lea rdi, .LC5[rip]
lea eax, 1[rdx]
push r15
.cfi_def_cfa_offset 152
imul eax, edx
push rbp
.cfi_def_cfa_offset 160
lea rdx, .LC2[rip]
cdqe
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b13[rip]
push rax
.cfi_def_cfa_offset 176
call strmm_@PLT
mov eax, DWORD PTR 92[rsp]
mov rdx, rbp
add rsp, 48
.cfi_def_cfa_offset 128
mov r9, rbx
mov r8, rbp
lea rdi, .LC1[rip]
mov rsi, r12
imul eax, eax
cdqe
lea rcx, [r15+rax*4]
call strtri_@PLT
mov edx, DWORD PTR [rbx]
mov eax, DWORD PTR 44[rsp]
test edx, edx
jle .L36
add edx, eax
mov DWORD PTR [rbx], edx
test edx, edx
jg .L8
.p2align 4,,10
.p2align 3
.L36:
imul eax, eax
sub rsp, 8
.cfi_def_cfa_offset 136
mov r9, rbp
mov r8, rbp
push rbp
.cfi_def_cfa_offset 144
push r15
.cfi_def_cfa_offset 152
cdqe
push rbp
.cfi_def_cfa_offset 160
lea rax, [r15+rax*4]
push rax
.cfi_def_cfa_offset 168
lea rax, c_b18[rip]
push rax
.cfi_def_cfa_offset 176
.L44:
lea rsi, .LC1[rip]
mov rcx, r12
lea rdx, .LC0[rip]
mov rdi, rsi
call strmm_@PLT
add rsp, 48
.cfi_def_cfa_offset 128
jmp .L8
.L47:
call __stack_chk_fail@PLT
.L50:
neg edx
jmp .L37
.cfi_endproc
.LFE65:
.size stftri_, .-stftri_
.data
.align 4
.type c_b18, @object
.size c_b18, 4
c_b18:
.long 1065353216
.align 4
.type c_b13, @object
.size c_b13, 4
c_b13:
.long -1082130432
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139235.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "N\000"
.align 2
.LC1:
.ascii "L\000"
.align 2
.LC2:
.ascii "T\000"
.align 2
.LC3:
.ascii "U\000"
.align 2
.LC4:
.ascii "STFTRI\000"
.align 2
.LC5:
.ascii "R\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC6:
.word __stack_chk_guard
.text
.align 2
.global stftri_
.syntax unified
.arm
.fpu softvfp
.type stftri_, %function
stftri_:
@ args = 8, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
mov ip, #0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
sub sp, sp, #60
mov r8, r1
ldr r4, [sp, #100]
ldr r1, .L47
mov r6, r2
ldr r1, [r1]
str r1, [sp, #52]
mov r1,#0
ldr r1, .L47+4
str ip, [r4]
mov r9, r3
mov fp, r0
ldr r10, [sp, #96]
bl lsame_
ldr r1, .L47+8
mov r7, r0
mov r0, r8
bl lsame_
cmp r7, #0
mov r5, r0
beq .L42
.L2:
cmp r5, #0
bne .L4
mov r0, r8
ldr r1, .L47+12
bl lsame_
cmp r0, #0
bne .L4
mvn r2, #1
mov r3, #2
str r2, [r4]
.L37:
mov r2, #6
ldr r0, .L47+16
add r1, sp, #32
str r3, [sp, #32]
bl xerbla_
.L8:
ldr r3, .L47
ldr r2, [r3]
ldr r3, [sp, #52]
eors r2, r3, r2
mov r3, #0
bne .L43
mov r0, #0
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L4:
mov r0, r6
ldr r1, .L47+4
bl lsame_
cmp r0, #0
beq .L44
.L5:
ldr r3, [r9]
cmp r3, #0
blt .L45
ldr r2, [r4]
cmp r2, #0
bne .L46
cmp r3, #0
beq .L8
tst r3, #1
movne r2, #1
asr r1, r3, #1
sub r0, r3, r1
streq r1, [sp, #40]
cmp r5, #0
strne r1, [sp, #48]
strne r0, [sp, #44]
streq r1, [sp, #44]
streq r0, [sp, #48]
cmp r2, #0
beq .L13
cmp r7, #0
beq .L14
cmp r5, #0
beq .L15
add r5, sp, #44
mov r3, r10
mov r2, r5
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r9, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #44]
ldr r2, .L47+20
add r3, r10, r3, lsl #2
add r7, sp, #48
ldr r1, .L47+8
str r3, [sp, #20]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+4
ldr r0, .L47+24
str r9, [sp, #24]
str r9, [sp, #16]
str r10, [sp, #12]
str r5, [sp, #4]
str r7, [sp]
bl strmm_
ldr r3, [r9]
mov r2, r7
add r3, r10, r3, lsl #2
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r9, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #44]
cmp r2, #0
ble .L18
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L18:
ldr r2, [r9]
add r3, r10, r3, lsl #2
add r10, r10, r2, lsl #2
ldr r2, .L47+28
str r3, [sp, #20]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+32
ldr r1, .L47+12
str r9, [sp, #24]
str r9, [sp, #16]
str r10, [sp, #12]
str r5, [sp, #4]
str r7, [sp]
ldr r0, .L47+8
bl strmm_
b .L8
.L13:
cmp r7, #0
beq .L26
cmp r5, #0
add ip, r3, #1
beq .L27
add fp, r10, #4
add r5, sp, #40
add r7, sp, #32
mov r3, fp
mov r2, r5
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r7, [sp]
str ip, [sp, #32]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #40]
ldr ip, [r9]
ldr r2, .L47+20
add r3, r3, #1
add r3, r10, r3, lsl #2
add r8, sp, #36
add ip, ip, #1
ldr r1, .L47+8
str r3, [sp, #20]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+4
ldr r0, .L47+24
str r7, [sp, #16]
str fp, [sp, #12]
str r5, [sp, #4]
str r5, [sp]
str r8, [sp, #24]
str ip, [sp, #32]
str ip, [sp, #36]
bl strmm_
ldr ip, [r9]
mov r3, r10
mov r2, r5
add ip, ip, #1
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r7, [sp]
str ip, [sp, #32]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #40]
cmp r2, #0
ble .L29
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L29:
ldr ip, [r9]
ldr r2, .L47+28
add r3, r3, #1
add r3, r10, r3, lsl #2
add ip, ip, #1
str r3, [sp, #20]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+32
ldr r1, .L47+12
str r8, [sp, #24]
str r7, [sp, #16]
str r10, [sp, #12]
str r5, [sp, #4]
str r5, [sp]
ldr r0, .L47+8
str ip, [sp, #32]
str ip, [sp, #36]
bl strmm_
b .L8
.L45:
mvn r2, #3
mov r3, #4
str r2, [r4]
b .L37
.L44:
mov r0, r6
ldr r1, .L47+12
bl lsame_
cmp r0, #0
bne .L5
mvn r2, #2
mov r3, #3
str r2, [r4]
b .L37
.L42:
mov r0, fp
ldr r1, .L47+32
bl lsame_
cmp r0, #0
bne .L2
mvn r2, #0
mov r3, #1
str r2, [r4]
b .L37
.L14:
cmp r5, #0
beq .L21
add r5, sp, #44
mov r3, r10
mov r2, r5
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r5, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #44]
ldr r2, .L47+20
mov r1, r3
mul r1, r3, r1
add r7, sp, #48
add r3, r10, r1, lsl #2
str r3, [sp, #20]
ldr r1, .L47+12
mov r3, r6
str r2, [sp, #8]
ldr r0, .L47+8
ldr r2, .L47+4
str r5, [sp, #24]
str r5, [sp, #16]
str r10, [sp, #12]
str r5, [sp]
str r7, [sp, #4]
add r8, r10, #4
bl strmm_
mov r2, r7
mov r3, r8
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r5, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #44]
cmp r2, #0
ble .L23
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L23:
mov r2, r3
mul r2, r3, r2
mov r3, r2
ldr r2, .L47+28
add r10, r10, r3, lsl #2
str r2, [sp, #8]
mov r3, r6
stm sp, {r5, r7}
ldr r2, .L47+32
ldr r1, .L47+8
str r10, [sp, #20]
str r5, [sp, #24]
str r5, [sp, #16]
str r8, [sp, #12]
ldr r0, .L47+24
bl strmm_
b .L8
.L26:
cmp r5, #0
ldr r3, [sp, #40]
beq .L32
add r5, sp, #40
add r3, r10, r3, lsl #2
mov r2, r5
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r5, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #40]
ldr r1, .L47+20
add r2, r3, #1
mul r2, r3, r2
add r3, r10, r3, lsl #2
add r2, r10, r2, lsl #2
str r2, [sp, #20]
str r3, [sp, #12]
ldr r2, .L47+4
mov r3, r6
str r1, [sp, #8]
ldr r0, .L47+8
ldr r1, .L47+12
str r5, [sp, #24]
str r5, [sp, #16]
str r5, [sp, #4]
str r5, [sp]
bl strmm_
mov r3, r10
mov r2, r5
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r5, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #40]
cmp r2, #0
ble .L34
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L34:
add r2, r3, #1
mul r3, r2, r3
ldr r1, .L47+28
add r2, r10, r3, lsl #2
str r2, [sp, #20]
str r1, [sp, #8]
mov r3, r6
ldr r2, .L47+32
ldr r1, .L47+8
str r5, [sp, #24]
str r5, [sp, #16]
str r10, [sp, #12]
str r5, [sp, #4]
str r5, [sp]
ldr r0, .L47+24
bl strmm_
b .L8
.L21:
ldr r3, [sp, #48]
add r5, sp, #44
mov r2, r3
mul r2, r3, r2
add r7, sp, #48
add r3, r10, r2, lsl #2
mov r1, r6
mov r2, r5
ldr r0, .L47+12
str r4, [sp, #4]
str r7, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #48]
ldr r2, .L47+20
mov r1, r3
mul r1, r3, r1
add r3, r10, r1, lsl #2
str r3, [sp, #12]
ldr r1, .L47+12
mov r3, r6
str r2, [sp, #8]
ldr r0, .L47+24
ldr r2, .L47+32
str r7, [sp, #24]
str r10, [sp, #20]
str r7, [sp, #16]
str r5, [sp, #4]
str r7, [sp]
bl strmm_
ldr r2, [sp, #48]
ldr r3, [sp, #44]
mov r1, r6
mul r3, r2, r3
ldr r0, .L47+8
mov r2, r7
add r3, r10, r3, lsl #2
str r4, [sp, #4]
str r7, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #44]
cmp r2, #0
ble .L25
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L25:
ldr r2, [sp, #48]
ldr r0, .L47+28
mul r3, r2, r3
ldr r1, .L47+8
add r2, r10, r3, lsl #2
str r2, [sp, #12]
str r0, [sp, #8]
mov r3, r6
mov r0, r1
ldr r2, .L47+4
str r7, [sp, #24]
str r10, [sp, #20]
str r7, [sp, #16]
str r5, [sp, #4]
str r7, [sp]
bl strmm_
b .L8
.L27:
ldr r3, [sp, #40]
add r5, sp, #40
add r3, r3, #1
add r7, sp, #32
add r3, r10, r3, lsl #2
mov r2, r5
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r7, [sp]
str ip, [sp, #32]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #40]
ldr ip, [r9]
ldr r1, .L47+8
ldr r2, .L47+20
add r3, r3, #1
add r3, r10, r3, lsl #2
add r8, sp, #36
add ip, ip, #1
mov r0, r1
str r3, [sp, #12]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+32
str r10, [sp, #20]
str r7, [sp, #16]
str r5, [sp, #4]
str r5, [sp]
str r8, [sp, #24]
str ip, [sp, #32]
str ip, [sp, #36]
bl strmm_
ldr ip, [r9]
ldr r3, [sp, #40]
mov r2, r5
add ip, ip, #1
add r3, r10, r3, lsl #2
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r7, [sp]
str ip, [sp, #32]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #40]
cmp r2, #0
ble .L31
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L31:
ldr ip, [r9]
ldr r2, .L47+28
add r3, r10, r3, lsl #2
add ip, ip, #1
str r3, [sp, #12]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+4
ldr r1, .L47+12
str r8, [sp, #24]
str r10, [sp, #20]
str r7, [sp, #16]
str r5, [sp, #4]
str r5, [sp]
ldr r0, .L47+24
str ip, [sp, #32]
str ip, [sp, #36]
bl strmm_
b .L8
.L15:
ldr r3, [sp, #48]
add r5, sp, #44
add r3, r10, r3, lsl #2
mov r2, r5
mov r1, r6
ldr r0, .L47+8
str r4, [sp, #4]
str r9, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r3, [sp, #48]
ldr r1, .L47+8
ldr r2, .L47+20
add r3, r10, r3, lsl #2
add r7, sp, #48
mov r0, r1
str r3, [sp, #12]
str r2, [sp, #8]
mov r3, r6
ldr r2, .L47+32
str r9, [sp, #24]
str r10, [sp, #20]
str r9, [sp, #16]
str r5, [sp]
str r7, [sp, #4]
bl strmm_
ldr r3, [sp, #44]
mov r2, r7
add r3, r10, r3, lsl #2
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r9, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #44]
cmp r2, #0
ble .L20
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L20:
ldr r2, .L47+28
add r3, r10, r3, lsl #2
str r3, [sp, #12]
str r2, [sp, #8]
mov r3, r6
stm sp, {r5, r7}
ldr r2, .L47+4
ldr r1, .L47+12
str r9, [sp, #24]
str r10, [sp, #20]
str r9, [sp, #16]
ldr r0, .L47+24
bl strmm_
b .L8
.L32:
add r2, r3, #1
mul r3, r2, r3
add r5, sp, #40
add r3, r10, r3, lsl #2
mov r2, r5
mov r1, r6
ldr r0, .L47+12
str r4, [sp, #4]
str r5, [sp]
bl strtri_
ldr r3, [r4]
cmp r3, #0
bgt .L8
ldr r2, [sp, #40]
ldr r1, .L47+20
add r3, r2, #1
mul r3, r2, r3
add r3, r10, r3, lsl #2
ldr r2, .L47+32
str r3, [sp, #12]
str r1, [sp, #8]
mov r3, r6
ldr r1, .L47+12
ldr r0, .L47+24
str r5, [sp, #24]
str r10, [sp, #20]
str r5, [sp, #16]
str r5, [sp, #4]
str r5, [sp]
bl strmm_
ldr r3, [sp, #40]
mov r1, r6
mov r2, r3
mul r2, r3, r2
ldr r0, .L47+8
add r3, r10, r2, lsl #2
str r4, [sp, #4]
mov r2, r5
str r5, [sp]
bl strtri_
ldr r2, [r4]
ldr r3, [sp, #40]
cmp r2, #0
ble .L36
add r2, r2, r3
cmp r2, #0
str r2, [r4]
bgt .L8
.L36:
mov r2, r3
mul r2, r3, r2
mov r3, r2
ldr r1, .L47+8
ldr r2, .L47+28
add r3, r10, r3, lsl #2
str r3, [sp, #12]
str r2, [sp, #8]
mov r3, r6
mov r0, r1
ldr r2, .L47+4
str r5, [sp, #24]
str r10, [sp, #20]
str r5, [sp, #16]
str r5, [sp, #4]
str r5, [sp]
bl strmm_
b .L8
.L43:
bl __stack_chk_fail
.L46:
rsb r3, r2, #0
b .L37
.L48:
.align 2
.L47:
.word .LC6
.word .LC0
.word .LC1
.word .LC3
.word .LC4
.word .LANCHOR0
.word .LC5
.word .LANCHOR0+4
.word .LC2
.size stftri_, .-stftri_
.data
.align 2
.set .LANCHOR0,. + 0
.type c_b13, %object
.size c_b13, 4
c_b13:
.word 3212836864
.type c_b18, %object
.size c_b18, 4
c_b18:
.word 1065353216
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139236.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC1:
.string "%f"
.LC2:
.string "%d valores positivos\n"
.LC3:
.string "%.1f\n"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r13
.cfi_def_cfa_offset 16
.cfi_offset 13, -16
push r12
.cfi_def_cfa_offset 24
.cfi_offset 12, -24
lea r12, .LC1[rip]
push rbp
.cfi_def_cfa_offset 32
.cfi_offset 6, -32
xor ebp, ebp
push rbx
.cfi_def_cfa_offset 40
.cfi_offset 3, -40
mov ebx, 6
sub rsp, 40
.cfi_def_cfa_offset 80
mov rax, QWORD PTR fs:40
mov QWORD PTR 24[rsp], rax
xor eax, eax
mov DWORD PTR 20[rsp], 0x00000000
lea r13, 20[rsp]
mov DWORD PTR 12[rsp], 0x00000000
.p2align 4,,10
.p2align 3
.L4:
xor eax, eax
mov rsi, r13
mov rdi, r12
call __isoc99_scanf@PLT
movss xmm0, DWORD PTR 20[rsp]
pxor xmm2, xmm2
comiss xmm0, xmm2
jbe .L2
addss xmm0, DWORD PTR 12[rsp]
add ebp, 1
movss DWORD PTR 12[rsp], xmm0
.L2:
sub ebx, 1
jne .L4
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
mov edx, ebp
call __printf_chk@PLT
pxor xmm1, xmm1
movss xmm0, DWORD PTR 12[rsp]
lea rsi, .LC3[rip]
cvtsi2ss xmm1, ebp
mov edi, 1
mov eax, 1
divss xmm0, xmm1
cvtss2sd xmm0, xmm0
call __printf_chk@PLT
mov rax, QWORD PTR 24[rsp]
sub rax, QWORD PTR fs:40
jne .L10
add rsp, 40
.cfi_remember_state
.cfi_def_cfa_offset 40
xor eax, eax
pop rbx
.cfi_def_cfa_offset 32
pop rbp
.cfi_def_cfa_offset 24
pop r12
.cfi_def_cfa_offset 16
pop r13
.cfi_def_cfa_offset 8
ret
.L10:
.cfi_restore_state
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139236.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%f\000"
.global __aeabi_fcmpgt
.global __aeabi_fadd
.align 2
.LC1:
.ascii "%d valores positivos\012\000"
.global __aeabi_i2f
.global __aeabi_fdiv
.global __aeabi_f2d
.align 2
.LC2:
.ascii "%.1f\012\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC3:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
mov r3, #0
push {r4, r5, r6, r7, r8, r9, lr}
mov r5, r3
mov r4, #6
mov r9, r3
mov r7, #0
ldr r2, .L11
sub sp, sp, #12
ldr r8, .L11+4
ldr r2, [r2]
str r2, [sp, #4]
mov r2,#0
str r3, [sp] @ float
.L4:
mov r1, sp
mov r0, r8
bl __isoc99_scanf
ldr r6, [sp] @ float
mov r1, r9
mov r0, r6
bl __aeabi_fcmpgt
cmp r0, #0
beq .L2
mov r0, r5
mov r1, r6
bl __aeabi_fadd
mov r5, r0
add r7, r7, #1
.L2:
subs r4, r4, #1
bne .L4
mov r2, r7
ldr r1, .L11+8
mov r0, #1
bl __printf_chk
mov r0, r7
bl __aeabi_i2f
mov r1, r0
mov r0, r5
bl __aeabi_fdiv
bl __aeabi_f2d
mov r2, r0
mov r3, r1
mov r0, #1
ldr r1, .L11+12
bl __printf_chk
ldr r3, .L11
ldr r2, [r3]
ldr r3, [sp, #4]
eors r2, r3, r2
mov r3, #0
bne .L10
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
.L10:
bl __stack_chk_fail
.L12:
.align 2
.L11:
.word .LC3
.word .LC0
.word .LC1
.word .LC2
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139237.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "%d"
.LC1:
.string "%lld %lld\n"
.LC2:
.string "%lld\n"
.LC3:
.string "-1"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB23:
.cfi_startproc
endbr64
push r14
.cfi_def_cfa_offset 16
.cfi_offset 14, -16
xor esi, esi
push r13
.cfi_def_cfa_offset 24
.cfi_offset 13, -24
push r12
.cfi_def_cfa_offset 32
.cfi_offset 12, -32
push rbp
.cfi_def_cfa_offset 40
.cfi_offset 6, -40
push rbx
.cfi_def_cfa_offset 48
.cfi_offset 3, -48
xor ebx, ebx
sub rsp, 16
.cfi_def_cfa_offset 64
mov rdi, QWORD PTR stdout[rip]
mov rax, QWORD PTR fs:40
mov QWORD PTR 8[rsp], rax
xor eax, eax
call setbuf@PLT
lea rsi, 4[rsp]
lea rdi, .LC0[rip]
xor eax, eax
call __isoc99_scanf@PLT
mov eax, DWORD PTR 4[rsp]
test eax, eax
jle .L10
.p2align 4,,10
.p2align 3
.L2:
lea rdx, M[rip]
lea rsi, N[rip]
xor eax, eax
lea rdi, .LC1[rip]
call __isoc99_scanf@PLT
mov r11, QWORD PTR N[rip]
mov r12, QWORD PTR M[rip]
cmp r11, r12
je .L3
lea rax, [r12+r12*4]
mov edi, 2000000000
mov esi, 1
lea rax, [rax+rax*4]
sal rax, 2
cqo
idiv r11
mov r8, rax
.L4:
lea r13, [rsi+r12]
lea r10, [r11+rsi]
lea rax, 0[r13+r13*4]
lea r9, [rax+rax*4]
sal r9, 2
jmp .L7
.p2align 4,,10
.p2align 3
.L8:
lea rax, [rsi+rdi]
mov rcx, rax
shr rcx, 63
add rcx, rax
sar rcx
cmp rsi, rcx
je .L24
mov rax, r9
cqo
idiv r10
cmp rax, r8
jg .L15
lea rax, [r12+rcx]
lea r14, [r11+rcx]
lea rax, [rax+rax*4]
lea rax, [rax+rax*4]
sal rax, 2
cqo
idiv r14
cmp rax, r8
jle .L25
mov rdi, rcx
.L7:
cmp rsi, rdi
jl .L8
.L6:
mov rdx, rbp
lea rsi, .LC2[rip]
mov edi, 1
xor eax, eax
call __printf_chk@PLT
.L9:
add ebx, 1
cmp DWORD PTR 4[rsp], ebx
jg .L2
.L10:
mov rax, QWORD PTR 8[rsp]
sub rax, QWORD PTR fs:40
jne .L26
add rsp, 16
.cfi_remember_state
.cfi_def_cfa_offset 48
xor eax, eax
pop rbx
.cfi_def_cfa_offset 40
pop rbp
.cfi_def_cfa_offset 32
pop r12
.cfi_def_cfa_offset 24
pop r13
.cfi_def_cfa_offset 16
pop r14
.cfi_def_cfa_offset 8
ret
.p2align 4,,10
.p2align 3
.L3:
.cfi_restore_state
lea rdi, .LC3[rip]
call puts@PLT
jmp .L9
.p2align 4,,10
.p2align 3
.L24:
lea rax, 0[r13+r13*4]
mov rbp, rsi
lea rax, [rax+rax*4]
sal rax, 2
cqo
idiv r10
cmp rax, r8
jg .L6
add r12, rdi
add r11, rdi
mov rbp, -1
lea rax, [r12+r12*4]
lea rax, [rax+rax*4]
sal rax, 2
cqo
idiv r11
cmp rax, r8
cmovg rbp, rdi
jmp .L6
.p2align 4,,10
.p2align 3
.L15:
mov rbp, rsi
jmp .L6
.p2align 4,,10
.p2align 3
.L25:
lea rax, [r12+rdi]
lea rsi, [r11+rdi]
lea rax, [rax+rax*4]
lea rax, [rax+rax*4]
sal rax, 2
cqo
idiv rsi
cmp rax, r8
jle .L17
mov rsi, rcx
jmp .L4
.L17:
or rbp, -1
jmp .L6
.L26:
call __stack_chk_fail@PLT
.cfi_endproc
.LFE23:
.size main, .-main
.globl M
.bss
.align 8
.type M, @object
.size M, 8
M:
.zero 8
.globl N
.align 8
.type N, @object
.size N, 8
N:
.zero 8
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139237.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "%d\000"
.align 2
.LC1:
.ascii "%lld %lld\012\000"
.global __aeabi_ldivmod
.align 2
.LC2:
.ascii "%lld\012\000"
.align 2
.LC3:
.ascii "-1\000"
.section .rodata.cst4,"aM",%progbits,4
.align 2
.LC4:
.word __stack_chk_guard
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 64
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
ldr r3, .L25
sub sp, sp, #68
ldr r0, [r3]
ldr r3, .L25+4
mov r1, #0
ldr r3, [r3]
str r3, [sp, #60]
mov r3,#0
bl setbuf
ldr r0, .L25+8
add r1, sp, #56
bl __isoc99_scanf
ldr r3, [sp, #56]
cmp r3, #0
movgt r3, #0
strgt r3, [sp, #44]
ble .L10
.L2:
ldr r2, .L25+12
ldr r1, .L25+16
ldr r0, .L25+20
bl __isoc99_scanf
ldr r3, .L25+16
ldmia r3, {r6-r7}
ldr r3, .L25+12
str r6, [sp, #8]
str r7, [sp, #12]
ldmia r3, {r4-r5}
cmp r7, r5
cmpeq r6, r4
str r4, [sp, #16]
str r5, [sp, #20]
beq .L3
adds r0, r4, r4
adc r1, r5, r5
adds r0, r0, r4
adc r1, r1, r5
lsl r3, r1, #5
lsl r2, r0, #5
orr r3, r3, r0, lsr #27
adds r0, r0, r2
adc r1, r1, r3
adds r0, r0, r4
mov r3, r7
mov r2, r6
adc r1, r1, r5
bl __aeabi_ldivmod
ldr r3, .L25+24
mov r8, #1
str r3, [sp, #32]
mov r3, #0
mov r9, #0
str r3, [sp, #36]
str r0, [sp]
str r1, [sp, #4]
add r7, sp, #32
ldmia r7, {r6-r7}
.L4:
add r4, sp, #16
ldmia r4, {r3-r4}
adds r5, r8, r3
adc r4, r9, r4
adds r3, r5, r5
adc r2, r4, r4
adds r3, r3, r5
adc r2, r2, r4
lsl r1, r2, #5
lsl r0, r3, #5
orr r1, r1, r3, lsr #27
adds r3, r3, r0
adc r2, r2, r1
adds r3, r3, r5
str r3, [sp, #32]
adc r3, r2, r4
str r3, [sp, #40]
add r4, sp, #8
ldmia r4, {r3-r4}
adds r2, r3, r8
adc r3, r4, r9
str r2, [sp, #24]
str r3, [sp, #28]
b .L7
.L8:
adds r10, r8, r6
adc fp, r9, r7
lsr r1, fp, #31
adds r3, r10, r1
adc r4, fp, #0
mov r1, r4
lsr r2, r3, #1
asr r5, r1, #1
orr r4, r2, r4, lsl #31
cmp r9, r5
cmpeq r8, r4
beq .L22
ldr r2, [sp, #24]
ldr r3, [sp, #28]
ldr r0, [sp, #32]
ldr r1, [sp, #40]
bl __aeabi_ldivmod
ldmia sp, {r2-r3}
cmp r2, r0
sbcs r3, r3, r1
blt .L15
add r2, sp, #16
ldmia r2, {r1-r2}
adds ip, r1, r4
adc lr, r2, r5
adds r3, ip, ip
adc r1, lr, lr
adds r3, r3, ip
adc r1, r1, lr
lsl r2, r1, #5
lsl r0, r3, #5
adds r0, r3, r0
orr r2, r2, r3, lsr #27
ldr r3, [sp, #8]
adc r1, r1, r2
adds r2, r3, r4
ldr r3, [sp, #12]
adc r3, r3, r5
adds r0, r0, ip
adc r1, r1, lr
bl __aeabi_ldivmod
ldmia sp, {r2-r3}
cmp r2, r0
sbcs r3, r3, r1
bge .L23
mov r6, r4
mov r7, r5
.L7:
cmp r8, r6
sbcs r3, r9, r7
blt .L8
.L6:
mov r0, #1
ldr r2, [sp, #48]
ldr r3, [sp, #52]
ldr r1, .L25+28
bl __printf_chk
.L9:
ldr r2, [sp, #44]
ldr r3, [sp, #56]
add r2, r2, #1
cmp r3, r2
str r2, [sp, #44]
bgt .L2
.L10:
ldr r3, .L25+4
ldr r2, [r3]
ldr r3, [sp, #60]
eors r2, r3, r2
mov r3, #0
bne .L24
mov r0, #0
add sp, sp, #68
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
.L3:
ldr r0, .L25+32
bl puts
b .L9
.L15:
str r8, [sp, #48]
str r9, [sp, #52]
b .L6
.L22:
add r5, sp, #16
ldmia r5, {r4-r5}
adds r3, r4, r8
adc r1, r5, r9
adds r0, r3, r3
adc ip, r1, r1
adds r0, r0, r3
adc lr, ip, r1
lsl ip, lr, #5
lsl r2, r0, #5
str r6, [sp, #32]
str r7, [sp, #36]
orr ip, ip, r0, lsr #27
ldr r7, [sp, #24]
adds r0, r0, r2
ldr r6, [sp, #28]
adc ip, lr, ip
adds r0, r0, r3
mov r2, r7
mov r3, r6
adc r1, ip, r1
bl __aeabi_ldivmod
ldmia sp, {r6-r7}
cmp r6, r0
sbcs r3, r7, r1
blt .L15
add r3, sp, #32
ldmia r3, {r2-r3}
add r9, sp, #8
ldmia r9, {r8-r9}
mov r1, r5
adds r0, r4, r2
mov r4, r2
mov r5, r3
adc r1, r1, r3
adds r3, r0, r0
adc ip, r1, r1
adds r3, r3, r0
adc ip, ip, r1
lsl r2, ip, #5
lsl lr, r3, #5
adds lr, r3, lr
orr r2, r2, r3, lsr #27
adc ip, ip, r2
adds r2, r8, r4
adc r3, r9, r5
adds r0, lr, r0
adc r1, ip, r1
bl __aeabi_ldivmod
cmp r6, r0
sbcs r3, r7, r1
bge .L17
str r4, [sp, #48]
str r5, [sp, #52]
b .L6
.L23:
add r3, sp, #16
ldmia r3, {r2-r3}
adds ip, r2, r6
adc lr, r3, r7
adds r3, ip, ip
adc r2, lr, lr
adds r3, r3, ip
adc r2, r2, lr
lsl r1, r2, #5
lsl r0, r3, #5
adds r0, r3, r0
orr r1, r1, r3, lsr #27
adc r1, r2, r1
add r9, sp, #8
ldmia r9, {r8-r9}
adds r2, r8, r6
adc r3, r9, r7
adds r0, r0, ip
adc r1, r1, lr
bl __aeabi_ldivmod
ldmia sp, {r2-r3}
cmp r2, r0
sbcs r3, r3, r1
movlt r8, r4
movlt r9, r5
blt .L4
.L17:
mvn r3, #0
str r3, [sp, #48]
str r3, [sp, #52]
b .L6
.L24:
bl __stack_chk_fail
.L26:
.align 2
.L25:
.word stdout
.word .LC4
.word .LC0
.word M
.word N
.word .LC1
.word 2000000000
.word .LC2
.word .LC3
.size main, .-main
.comm M,8,8
.comm N,8,8
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
.file "100139240.c"
.intel_syntax noprefix
.text
.section .rodata.str1.1,"aMS",@progbits,1
.LC0:
.string "Usage:rmdir dirname"
.LC1:
.string "error:mkdir"
.section .text.startup,"ax",@progbits
.p2align 4
.globl main
.type main, @function
main:
.LFB45:
.cfi_startproc
endbr64
sub rsp, 8
.cfi_def_cfa_offset 16
cmp edi, 1
jle .L6
mov rdi, QWORD PTR 8[rsi]
call rmdir@PLT
test eax, eax
js .L7
.L3:
xor eax, eax
pop rdx
.cfi_remember_state
.cfi_def_cfa_offset 8
ret
.L6:
.cfi_restore_state
mov rcx, QWORD PTR stderr[rip]
mov edx, 19
mov esi, 1
lea rdi, .LC0[rip]
call fwrite@PLT
xor edi, edi
call _exit@PLT
.L7:
mov rcx, QWORD PTR stderr[rip]
mov edx, 11
mov esi, 1
lea rdi, .LC1[rip]
call fwrite@PLT
jmp .L3
.cfi_endproc
.LFE45:
.size main, .-main
.ident "GCC: (Ubuntu 10.5.0-1ubuntu1~20.04) 10.5.0"
.section .note.GNU-stack,"",@progbits
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
| .arch armv5t
.eabi_attribute 20, 1
.eabi_attribute 21, 1
.eabi_attribute 23, 3
.eabi_attribute 24, 1
.eabi_attribute 25, 1
.eabi_attribute 26, 2
.eabi_attribute 30, 2
.eabi_attribute 34, 0
.eabi_attribute 18, 4
.file "100139240.c"
.text
.section .rodata.str1.4,"aMS",%progbits,1
.align 2
.LC0:
.ascii "Usage:rmdir dirname\000"
.align 2
.LC1:
.ascii "error:mkdir\000"
.section .text.startup,"ax",%progbits
.align 2
.global main
.syntax unified
.arm
.fpu softvfp
.type main, %function
main:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
cmp r0, #1
push {r4, lr}
ble .L6
ldr r0, [r1, #4]
bl rmdir
cmp r0, #0
blt .L7
.L3:
mov r0, #0
pop {r4, pc}
.L6:
ldr r3, .L8
mov r2, #19
mov r1, #1
ldr r3, [r3]
ldr r0, .L8+4
bl fwrite
mov r0, #0
bl _exit
.L7:
ldr r3, .L8
mov r2, #11
mov r1, #1
ldr r3, [r3]
ldr r0, .L8+8
bl fwrite
b .L3
.L9:
.align 2
.L8:
.word stderr
.word .LC0
.word .LC1
.size main, .-main
.ident "GCC: (Ubuntu 9.4.0-1ubuntu1~20.04.2) 9.4.0"
.section .note.GNU-stack,"",%progbits
|
Subsets and Splits