document: Optical two-step modified signed-digit addition based on binary logic gates A new modified signed-digit -LRB- MSD -RRB- addition algorithm based on binary logic gates is proposed for parallel computing . It is shown that by encoding each of the input MSD digits and flag digits into a pair of binary bits , the number of addition steps can be reduced to two . The flag digit is introduced to characterize the next low order pair -LRB- NLOP -RRB- of the input digits in order to suppress carry propagation . The rules for two-step addition of binary coded MSD -LRB- BCMSD -RRB- numbers are formulated that can be implemented using optical shadow-casting logic system
doc_bio_tags: O O O O O O O B I I O O O O O O O O O O O B I I O O O B I O O O O O O O O O O B I I O B I O O O O B I O O O O B I O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O O O O O O B I I O O O O O O O O O O O O O O O
extractive_keyphrases: binary logic gates parallel computing input msd digits flag digits binary bits addition steps low order pair binary coded msd
abstractive_keyphrases: optical two-step modified signed-digit addition modified signed-digit addition algorithm carry propagation suppression two-step addition optical shadow-casting logic system