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$assert BATCH_TILE % 8 == 0 |
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$assert BATCH_TILE >= 8 |
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$SIMD_TILE = BATCH_TILE |
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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/vcvt.h> |
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void xnn_f32_f16_vcvt_ukernel__neonfp16_x${BATCH_TILE}( |
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size_t batch, |
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const float* input, |
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void* output, |
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const union xnn_f32_f16_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(float) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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uint16_t* o = (uint16_t*) output; |
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for (; batch >= ${BATCH_TILE} * sizeof(float); batch -= ${BATCH_TILE} * sizeof(float)) { |
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$for N in range(2*SIMD_TILE): |
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const float32x4_t vf${N} = vld1q_f32(input); input += 4; |
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$for N in range(SIMD_TILE): |
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const uint16x8_t vh${N} = vreinterpretq_u16_f16(vcombine_f16(vcvt_f16_f32(vf${2*N}), vcvt_f16_f32(vf${2*N+1}))); |
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$for N in range(SIMD_TILE): |
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vst1q_u16(o, vh${N}); o += 8; |
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} |
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for (; batch >= 4 * sizeof(float); batch -= 4 * sizeof(float)) { |
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const float32x4_t vf = vld1q_f32(input); input += 4; |
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const uint16x4_t vh = vreinterpret_u16_f16(vcvt_f16_f32(vf)); |
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vst1_u16(o, vh); o += 4; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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assert(batch % sizeof(float) == 0); |
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assert(batch >= 1 * sizeof(float)); |
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assert(batch <= 3 * sizeof(float)); |
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const float32x4_t vf = vld1q_f32(input); |
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uint16x4_t vh = vreinterpret_u16_f16(vcvt_f16_f32(vf)); |
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if (batch & (2 * sizeof(float))) { |
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vst1_lane_u32((void*) o, vreinterpret_u32_u16(vh), 0); o += 2; |
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vh = vext_u16(vh, vh, 2); |
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} |
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if (batch & (1 * sizeof(float))) { |
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vst1_lane_u16(o, vh, 0); |
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} |
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} |
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} |
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