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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/vunary.h> |
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void xnn_f16_vhswish_ukernel__neonfp16arith_x16( |
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size_t batch, |
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const void* restrict input, |
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void* restrict output, |
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const union xnn_f16_hswish_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(uint16_t) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const uint16_t* i = (const uint16_t*) input; |
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uint16_t* o = (uint16_t*) output; |
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const float16x8_t vsixth = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.sixth)); |
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const float16x8_t vthree = vreinterpretq_f16_u16(vld1q_dup_u16(¶ms->fp16arith.three)); |
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const int16x8_t vsix = vreinterpretq_s16_u16(vld1q_dup_u16(¶ms->fp16arith.six)); |
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const int16x8_t vzero = vdupq_n_s16(0); |
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for (; batch >= 16 * sizeof(uint16_t); batch -= 16 * sizeof(uint16_t)) { |
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float16x8_t vx01234567 = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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float16x8_t vx89ABCDEF = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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float16x8_t vacc01234567 = vaddq_f16(vx01234567, vthree); |
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vx01234567 = vmulq_f16(vx01234567, vsixth); |
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float16x8_t vacc89ABCDEF = vaddq_f16(vx89ABCDEF, vthree); |
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vx89ABCDEF = vmulq_f16(vx89ABCDEF, vsixth); |
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vacc01234567 = vreinterpretq_f16_s16(vmaxq_s16(vreinterpretq_s16_f16(vacc01234567), vzero)); |
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vacc89ABCDEF = vreinterpretq_f16_s16(vmaxq_s16(vreinterpretq_s16_f16(vacc89ABCDEF), vzero)); |
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vacc01234567 = vreinterpretq_f16_s16(vminq_s16(vreinterpretq_s16_f16(vacc01234567), vsix)); |
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vacc89ABCDEF = vreinterpretq_f16_s16(vminq_s16(vreinterpretq_s16_f16(vacc89ABCDEF), vsix)); |
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vacc01234567 = vmulq_f16(vacc01234567, vx01234567); |
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vacc89ABCDEF = vmulq_f16(vacc89ABCDEF, vx89ABCDEF); |
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vst1q_u16(o, vreinterpretq_u16_f16(vacc01234567)); o += 8; |
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vst1q_u16(o, vreinterpretq_u16_f16(vacc89ABCDEF)); o += 8; |
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} |
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for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) { |
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float16x8_t vx = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8; |
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float16x8_t vacc = vaddq_f16(vx, vthree); |
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vx = vmulq_f16(vx, vsixth); |
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vacc = vreinterpretq_f16_s16(vmaxq_s16(vreinterpretq_s16_f16(vacc), vzero)); |
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vacc = vreinterpretq_f16_s16(vminq_s16(vreinterpretq_s16_f16(vacc), vsix)); |
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vacc = vmulq_f16(vacc, vx); |
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vst1q_u16(o, vreinterpretq_u16_f16(vacc)); o += 8; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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float16x8_t vx = vreinterpretq_f16_u16(vld1q_u16(i)); |
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float16x8_t vacc = vaddq_f16(vx, vthree); |
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vx = vmulq_f16(vx, vsixth); |
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vacc = vreinterpretq_f16_s16(vmaxq_s16(vreinterpretq_s16_f16(vacc), vzero)); |
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vacc = vreinterpretq_f16_s16(vminq_s16(vreinterpretq_s16_f16(vacc), vsix)); |
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vacc = vmulq_f16(vacc, vx); |
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float16x4_t vacc_lo = vget_low_f16(vacc); |
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if (batch & (4 * sizeof(uint16_t))) { |
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vst1_u16(o, vreinterpret_u16_f16(vacc_lo)); o += 4; |
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vacc_lo = vget_high_f16(vacc); |
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} |
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if (batch & (2 * sizeof(uint16_t))) { |
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vst1_lane_u32((void*) o, vreinterpret_u32_f16(vacc_lo), 0); o += 2; |
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vacc_lo = vext_f16(vacc_lo, vacc_lo, 2); |
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} |
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if (batch & (1 * sizeof(uint16_t))) { |
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vst1_lane_u16(o, vreinterpret_u16_f16(vacc_lo), 0); |
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} |
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} |
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} |
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