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#include <assert.h> |
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#include <arm_neon.h> |
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#include <xnnpack/gemm.h> |
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void xnn_bf16_gemm_minmax_ukernel_1x4c8__neonfma_zip( |
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size_t mr, |
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size_t nc, |
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size_t kc, |
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const void* restrict a, |
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size_t a_stride, |
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const void* restrict w_ptr, |
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void* restrict c, |
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size_t cm_stride, |
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size_t cn_stride, |
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const union xnn_bf16_minmax_params params[restrict XNN_MIN_ELEMENTS(1)]) |
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{ |
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assert(mr != 0); |
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assert(mr <= 1); |
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assert(nc != 0); |
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assert(kc != 0); |
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assert(kc % sizeof(uint16_t) == 0); |
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assert(a != NULL); |
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assert(w_ptr != NULL); |
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assert(c != NULL); |
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const uint16_t* a0 = (const uint16_t*) a; |
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uint16_t* c0 = (uint16_t*) c; |
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const uint16_t* w = (const uint16_t*) w_ptr; |
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const uint16x8_t vzero = vmovq_n_u16(0); |
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do { |
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float32x4_t vacc0x0 = vreinterpretq_f32_u32(vshll_n_u16(vld1_lane_u16(w, vdup_n_u16(0), 0), 16)); w += 1; |
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float32x4_t vacc0x1 = vreinterpretq_f32_u32(vshll_n_u16(vld1_lane_u16(w, vdup_n_u16(0), 0), 16)); w += 1; |
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float32x4_t vacc0x2 = vreinterpretq_f32_u32(vshll_n_u16(vld1_lane_u16(w, vdup_n_u16(0), 0), 16)); w += 1; |
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float32x4_t vacc0x3 = vreinterpretq_f32_u32(vshll_n_u16(vld1_lane_u16(w, vdup_n_u16(0), 0), 16)); w += 1; |
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size_t k = kc; |
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for (; k >= 8 * sizeof(uint16_t); k -= 8 * sizeof(uint16_t)) { |
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const uint16x8_t va0h = vld1q_u16(a0); a0 += 8; |
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const uint16x8_t vb0h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb1h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb2h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb3h = vld1q_u16(w); w += 8; |
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const uint16x8x2_t va0f = vzipq_u16(vzero, va0h); |
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const uint16x8x2_t vb0f = vzipq_u16(vzero, vb0h); |
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const uint16x8x2_t vb1f = vzipq_u16(vzero, vb1h); |
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const uint16x8x2_t vb2f = vzipq_u16(vzero, vb2h); |
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const uint16x8x2_t vb3f = vzipq_u16(vzero, vb3h); |
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vacc0x0 = vfmaq_f32(vacc0x0, vreinterpretq_f32_u16(va0f.val[0]), vreinterpretq_f32_u16(vb0f.val[0])); |
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vacc0x1 = vfmaq_f32(vacc0x1, vreinterpretq_f32_u16(va0f.val[0]), vreinterpretq_f32_u16(vb1f.val[0])); |
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vacc0x2 = vfmaq_f32(vacc0x2, vreinterpretq_f32_u16(va0f.val[0]), vreinterpretq_f32_u16(vb2f.val[0])); |
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vacc0x3 = vfmaq_f32(vacc0x3, vreinterpretq_f32_u16(va0f.val[0]), vreinterpretq_f32_u16(vb3f.val[0])); |
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vacc0x0 = vfmaq_f32(vacc0x0, vreinterpretq_f32_u16(va0f.val[1]), vreinterpretq_f32_u16(vb0f.val[1])); |
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vacc0x1 = vfmaq_f32(vacc0x1, vreinterpretq_f32_u16(va0f.val[1]), vreinterpretq_f32_u16(vb1f.val[1])); |
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vacc0x2 = vfmaq_f32(vacc0x2, vreinterpretq_f32_u16(va0f.val[1]), vreinterpretq_f32_u16(vb2f.val[1])); |
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vacc0x3 = vfmaq_f32(vacc0x3, vreinterpretq_f32_u16(va0f.val[1]), vreinterpretq_f32_u16(vb3f.val[1])); |
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} |
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if XNN_UNLIKELY(k != 0) { |
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const uint16x8_t va0h = vld1q_u16(a0); a0 = (const uint16_t*) ((uintptr_t) a0 + k); |
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const uint16x8_t vb0h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb1h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb2h = vld1q_u16(w); w += 8; |
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const uint16x8_t vb3h = vld1q_u16(w); w += 8; |
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const uint16x8_t vm0h = vceqq_u16(vb0h, vmovq_n_u16(0)); |
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const uint16x8_t vm1h = vceqq_u16(vb1h, vmovq_n_u16(0)); |
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const uint16x8_t vm2h = vceqq_u16(vb2h, vmovq_n_u16(0)); |
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const uint16x8_t vm3h = vceqq_u16(vb3h, vmovq_n_u16(0)); |
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const uint16x8x2_t vb0f = vzipq_u16(vzero, vb0h); |
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const uint16x8x2_t vb1f = vzipq_u16(vzero, vb1h); |
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const uint16x8x2_t vb2f = vzipq_u16(vzero, vb2h); |
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const uint16x8x2_t vb3f = vzipq_u16(vzero, vb3h); |
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const uint16x8_t va0x0h = vbicq_u16(va0h, vm0h); |
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const uint16x8_t va0x1h = vbicq_u16(va0h, vm1h); |
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const uint16x8_t va0x2h = vbicq_u16(va0h, vm2h); |
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const uint16x8_t va0x3h = vbicq_u16(va0h, vm3h); |
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const uint16x8x2_t va0x0f = vzipq_u16(vzero, va0x0h); |
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const uint16x8x2_t va0x1f = vzipq_u16(vzero, va0x1h); |
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const uint16x8x2_t va0x2f = vzipq_u16(vzero, va0x2h); |
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const uint16x8x2_t va0x3f = vzipq_u16(vzero, va0x3h); |
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vacc0x0 = vfmaq_f32(vacc0x0, vreinterpretq_f32_u16(va0x0f.val[0]), vreinterpretq_f32_u16(vb0f.val[0])); |
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vacc0x1 = vfmaq_f32(vacc0x1, vreinterpretq_f32_u16(va0x1f.val[0]), vreinterpretq_f32_u16(vb1f.val[0])); |
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vacc0x2 = vfmaq_f32(vacc0x2, vreinterpretq_f32_u16(va0x2f.val[0]), vreinterpretq_f32_u16(vb2f.val[0])); |
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vacc0x3 = vfmaq_f32(vacc0x3, vreinterpretq_f32_u16(va0x3f.val[0]), vreinterpretq_f32_u16(vb3f.val[0])); |
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vacc0x0 = vfmaq_f32(vacc0x0, vreinterpretq_f32_u16(va0x0f.val[1]), vreinterpretq_f32_u16(vb0f.val[1])); |
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vacc0x1 = vfmaq_f32(vacc0x1, vreinterpretq_f32_u16(va0x1f.val[1]), vreinterpretq_f32_u16(vb1f.val[1])); |
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vacc0x2 = vfmaq_f32(vacc0x2, vreinterpretq_f32_u16(va0x2f.val[1]), vreinterpretq_f32_u16(vb2f.val[1])); |
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vacc0x3 = vfmaq_f32(vacc0x3, vreinterpretq_f32_u16(va0x3f.val[1]), vreinterpretq_f32_u16(vb3f.val[1])); |
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} |
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#if XNN_ARCH_ARM64 |
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const float32x4_t vacc0x01 = vpaddq_f32(vacc0x0, vacc0x1); |
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const float32x4_t vacc0x23 = vpaddq_f32(vacc0x2, vacc0x3); |
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float32x4_t vacc0x0123 = vpaddq_f32(vacc0x01, vacc0x23); |
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#else |
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const float32x2_t vsum0x0 = vadd_f32(vget_low_f32(vacc0x0), vget_high_f32(vacc0x0)); |
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const float32x2_t vsum0x1 = vadd_f32(vget_low_f32(vacc0x1), vget_high_f32(vacc0x1)); |
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const float32x2_t vsum0x2 = vadd_f32(vget_low_f32(vacc0x2), vget_high_f32(vacc0x2)); |
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const float32x2_t vsum0x3 = vadd_f32(vget_low_f32(vacc0x3), vget_high_f32(vacc0x3)); |
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float32x4_t vacc0x0123 = vcombine_f32(vpadd_f32(vsum0x0, vsum0x1), vpadd_f32(vsum0x2, vsum0x3)); |
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#endif |
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const float32x4_t vmax = vld1q_dup_f32(¶ms->scalar.max); |
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vacc0x0123 = vminq_f32(vacc0x0123, vmax); |
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const float32x4_t vmin = vld1q_dup_f32(¶ms->scalar.min); |
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vacc0x0123 = vmaxq_f32(vacc0x0123, vmin); |
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uint16x4_t vout0x0123 = vshrn_n_u32(vreinterpretq_u32_f32(vacc0x0123), 16); |
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if XNN_LIKELY(nc >= 4) { |
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vst1_u16(c0, vout0x0123); |
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c0 = (uint16_t*) ((uintptr_t) c0 + cn_stride); |
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a0 = (const uint16_t*) ((uintptr_t) a0 - kc); |
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nc -= 4; |
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} else { |
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if (nc & 2) { |
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vst1_lane_u32((void*) c0, vreinterpret_u32_u16(vout0x0123), 0); c0 += 2; |
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vout0x0123 = vext_u16(vout0x0123, vout0x0123, 2); |
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} |
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if (nc & 1) { |
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vst1_lane_u16(c0, vout0x0123, 0); |
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} |
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nc = 0; |
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} |
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} while (nc != 0); |
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} |
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