test / src /f16-raddstoreexpminusmax /avx2-rr1-p2.c.in
Androidonnxfork's picture
Upload folder using huggingface_hub
8b7c501
raw
history blame
6.17 kB
// Copyright 2022 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.
$assert BATCH_TILE % 8 == 0
$assert BATCH_TILE >= 8
$SIMD_TILE = BATCH_TILE // 8
$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
#include <assert.h>
#include <immintrin.h>
#include <xnnpack/intrinsics-polyfill.h>
#include <xnnpack/raddstoreexpminusmax.h>
void xnn_f16_raddstoreexpminusmax_ukernel__avx2_rr1_p2_x${BATCH_TILE}${"" if ACCUMULATORS == 1 else "_acc%d" % ACCUMULATORS}(
size_t batch,
const void* input,
const void* max,
void* output,
void* sum,
const union xnn_f16_expminus_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
{
assert(batch != 0);
assert(batch % sizeof(uint16_t) == 0);
assert(input != NULL);
assert(max != NULL);
assert(output != NULL);
assert(sum != NULL);
const __m256 vi_max = _mm256_cvtph_ps(_mm_set1_epi16((short) *((const uint16_t*) max)));
const __m256 vlog2e = _mm256_load_ps(params->avx2_rr1_p2.log2e);
const __m256 vmagic_bias = _mm256_load_ps(params->avx2_rr1_p2.magic_bias);
const __m256 vminus_ln2 = _mm256_load_ps(params->avx2_rr1_p2.minus_ln2);
const __m256 vc2 = _mm256_load_ps(params->avx2_rr1_p2.c2);
const __m256 vc1 = _mm256_load_ps(params->avx2_rr1_p2.c1);
const __m256 vdenorm_cutoff = _mm256_load_ps(params->avx2_rr1_p2.denorm_cutoff);
const uint16_t* i = (const uint16_t*) input;
uint16_t* o = (uint16_t*) output;
$for K in range(ACCUMULATORS):
__m256 vacc${K} = _mm256_setzero_ps();
for (; batch >= ${BATCH_TILE} * sizeof(uint16_t); batch -= ${BATCH_TILE} * sizeof(uint16_t)) {
const __m256 vi0 = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
$for N in range(1, SIMD_TILE):
const __m256 vi${ABC[N]} = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) (i + ${N * 8})));
i += ${BATCH_TILE};
$for N in range(SIMD_TILE):
const __m256 vx${ABC[N]} = _mm256_sub_ps(vi${ABC[N]}, vi_max);
$for N in range(SIMD_TILE):
__m256 vn${ABC[N]} = _mm256_fmadd_ps(vx${ABC[N]}, vlog2e, vmagic_bias);
$for N in range(SIMD_TILE):
const __m256 vs${ABC[N]} = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn${ABC[N]}), 23));
$for N in range(SIMD_TILE):
vn${ABC[N]} = _mm256_sub_ps(vn${ABC[N]}, vmagic_bias);
$for N in range(SIMD_TILE):
__m256 vt${ABC[N]} = _mm256_fmadd_ps(vn${ABC[N]}, vminus_ln2, vx${ABC[N]});
$for N in range(SIMD_TILE):
const __m256 vp${ABC[N]} = _mm256_fmadd_ps(vc2, vt${ABC[N]}, vc1);
$for N in range(SIMD_TILE):
vt${ABC[N]} = _mm256_mul_ps(vt${ABC[N]}, vs${ABC[N]});
$for N in range(SIMD_TILE):
__m256 vf${ABC[N]} = _mm256_fmadd_ps(vt${ABC[N]}, vp${ABC[N]}, vs${ABC[N]});
$for N in range(SIMD_TILE):
vf${ABC[N]} = _mm256_andnot_ps(_mm256_cmp_ps(vx${ABC[N]}, vdenorm_cutoff, _CMP_LT_OS), vf${ABC[N]});
_mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf0, _MM_FROUND_TO_NEAREST_INT));
$for N in range(1, SIMD_TILE):
_mm_storeu_si128((__m128i*) (o + ${N * 8}), _mm256_cvtps_ph(vf${ABC[N]}, _MM_FROUND_TO_NEAREST_INT));
o += ${BATCH_TILE};
$for N in range(SIMD_TILE):
vacc${N % ACCUMULATORS} = _mm256_add_ps(vacc${N % ACCUMULATORS}, vf${ABC[N]});
}
$if ACCUMULATORS > 1:
$ACC_SLICE = 1
$while ACC_SLICE < ACCUMULATORS:
$for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
$if A + ACC_SLICE < ACCUMULATORS:
vacc${A} = _mm256_add_ps(vacc${A}, vacc${A + ACC_SLICE});
$ACC_SLICE *= 2
__m256 vacc = vacc0;
for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) {
const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
i += 8;
const __m256 vx = _mm256_sub_ps(vi, vi_max);
__m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
vn = _mm256_sub_ps(vn, vmagic_bias);
__m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
vt = _mm256_mul_ps(vt, vs);
__m256 vf = _mm256_fmadd_ps(vt, vp, vs);
vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
_mm_storeu_si128((__m128i*) o, _mm256_cvtps_ph(vf, _MM_FROUND_TO_NEAREST_INT));
o += 8;
vacc = _mm256_add_ps(vacc, vf);
}
__m128 vacc_lo = _mm_add_ps(_mm256_castps256_ps128(vacc), _mm256_extractf128_ps(vacc, 1));
if (batch != 0) {
assert(batch >= 1 * sizeof(uint16_t));
assert(batch <= 7 * sizeof(uint16_t));
const __m256 vi = _mm256_cvtph_ps(_mm_loadu_si128((const __m128i*) i));
const __m256 vx = _mm256_sub_ps(vi, vi_max);
__m256 vn = _mm256_fmadd_ps(vx, vlog2e, vmagic_bias);
const __m256 vs = _mm256_castsi256_ps(_mm256_slli_epi32(_mm256_castps_si256(vn), 23));
vn = _mm256_sub_ps(vn, vmagic_bias);
__m256 vt = _mm256_fmadd_ps(vn, vminus_ln2, vx);
const __m256 vp = _mm256_fmadd_ps(vc2, vt, vc1);
vt = _mm256_mul_ps(vt, vs);
__m256 vf = _mm256_fmadd_ps(vt, vp, vs);
vf = _mm256_andnot_ps(_mm256_cmp_ps(vx, vdenorm_cutoff, _CMP_LT_OS), vf);
__m128i vh = _mm256_cvtps_ph(vf, _MM_FROUND_TO_NEAREST_INT);
__m128 vf_lo = _mm256_castps256_ps128(vf);
if (batch & (4 * sizeof(uint16_t))) {
_mm_storel_epi64((__m128i*) o, vh);
vh = _mm_unpackhi_epi64(vh, vh);
vacc_lo = _mm_add_ps(vacc_lo, vf_lo);
vf_lo = _mm256_extractf128_ps(vf, 1);
o += 4;
}
if (batch & (2 * sizeof(uint16_t))) {
_mm_storeu_si32(o, vh);
vh = _mm_srli_epi64(vh, 32);
vacc_lo = _mm_blend_ps(_mm_add_ps(vacc_lo, vf_lo), vacc_lo, 0xC);
vf_lo = _mm_movehl_ps(vf_lo, vf_lo);
o += 2;
}
if (batch & (1 * sizeof(uint16_t))) {
*o = (uint16_t) _mm_extract_epi16(vh, 0);
vacc_lo = _mm_add_ss(vacc_lo, vf_lo);
}
}
vacc_lo = _mm_add_ps(vacc_lo, _mm_movehl_ps(vacc_lo, vacc_lo));
vacc_lo = _mm_add_ss(vacc_lo, _mm_movehdup_ps(vacc_lo));
*((uint16_t*) sum) = (uint16_t) _mm_extract_epi16(_mm_cvtps_ph(vacc_lo, _MM_FROUND_TO_NEAREST_INT), 0);
_mm256_zeroupper();
}