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$assert BATCH_TILE % 8 == 0 |
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$assert BATCH_TILE >= 8 |
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$SIMD_TILE = BATCH_TILE |
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$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ" |
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#include <assert.h> |
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#include <wasm_simd128.h> |
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#include <xnnpack/common.h> |
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#include <xnnpack/vcvt.h> |
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$WASM_V32X4_LANESELECT = "wasm_i32x4_relaxed_laneselect" if RELAXED else "wasm_v128_bitselect" |
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$ISA = "wasmrelaxedsimd" if RELAXED else "wasmsimd" |
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void xnn_f16_f32_vcvt_ukernel__${ISA}_int32_x${BATCH_TILE}( |
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size_t batch, |
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const void* input, |
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float* output, |
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const union xnn_f16_f32_cvt_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS |
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{ |
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assert(batch != 0); |
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assert(batch % sizeof(uint16_t) == 0); |
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assert(input != NULL); |
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assert(output != NULL); |
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const v128_t vsign_mask = wasm_v128_load64_splat(params->wasmsimd_int32.sign_mask); |
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const v128_t vexp_offset = wasm_v128_load64_splat(params->wasmsimd_int32.exp_offset); |
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const v128_t vexp_scale = wasm_v128_load64_splat(params->wasmsimd_int32.exp_scale); |
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const v128_t vmagic_bias = wasm_v128_load64_splat(params->wasmsimd_int32.magic_bias); |
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const v128_t vdenorm_cutoff = wasm_v128_load64_splat(params->wasmsimd_int32.denorm_cutoff); |
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const uint16_t* i = (const uint16_t*) input; |
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$if BATCH_TILE > 8: |
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for (; batch >= ${BATCH_TILE} * sizeof(uint16_t); batch -= ${BATCH_TILE} * sizeof(uint16_t)) { |
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const v128_t vh0 = wasm_v128_load(i); |
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$for N in range(1, SIMD_TILE): |
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const v128_t vh${N} = wasm_v128_load(i + ${N * 8}); |
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i += ${BATCH_TILE}; |
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const v128_t vzero = wasm_i16x8_const_splat(0); |
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$for N in range(SIMD_TILE): |
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const v128_t vw${N*2} = wasm_v16x8_shuffle(vzero, vh${N}, 0, 8, 1, 9, 2, 10, 3, 11); |
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const v128_t vw${N*2+1} = wasm_v16x8_shuffle(vzero, vh${N}, 4, 12, 5, 13, 6, 14, 7, 15); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vsign${N} = wasm_v128_and(vw${N}, vsign_mask); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vnonsign${N} = wasm_v128_xor(vw${N}, vsign${N}); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vnorm${N} = wasm_f32x4_mul(wasm_i32x4_add(wasm_u32x4_shr(vnonsign${N}, 3), vexp_offset), vexp_scale); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vdenorm${N} = wasm_f32x4_sub(wasm_v128_or(wasm_u32x4_shr(vnonsign${N}, 16), vmagic_bias), vmagic_bias); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vxmask${N} = wasm_i32x4_gt(vnonsign${N}, vdenorm_cutoff); |
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$for N in range(2*SIMD_TILE): |
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const v128_t vf${N} = wasm_v128_or(vsign${N}, wasm_v128_bitselect(vnorm${N}, vdenorm${N}, vxmask${N})); |
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wasm_v128_store(output, vf0); |
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$for N in range(1, 2*SIMD_TILE): |
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wasm_v128_store(output + ${N*4}, vf${N}); |
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output += ${BATCH_TILE}; |
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} |
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for (; batch >= 8 * sizeof(uint16_t); batch -= 8 * sizeof(uint16_t)) { |
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const v128_t vh = wasm_v128_load(i); |
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i += 8; |
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const v128_t vzero = wasm_i16x8_const_splat(0); |
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const v128_t vw_lo = wasm_v16x8_shuffle(vzero, vh, 0, 8, 1, 9, 2, 10, 3, 11); |
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const v128_t vw_hi = wasm_v16x8_shuffle(vzero, vh, 4, 12, 5, 13, 6, 14, 7, 15); |
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const v128_t vsign_lo = wasm_v128_and(vw_lo, vsign_mask); |
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const v128_t vsign_hi = wasm_v128_and(vw_hi, vsign_mask); |
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const v128_t vnonsign_lo = wasm_v128_xor(vw_lo, vsign_lo); |
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const v128_t vnonsign_hi = wasm_v128_xor(vw_hi, vsign_hi); |
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const v128_t vnorm_lo = wasm_f32x4_mul(wasm_i32x4_add(wasm_u32x4_shr(vnonsign_lo, 3), vexp_offset), vexp_scale); |
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const v128_t vnorm_hi = wasm_f32x4_mul(wasm_i32x4_add(wasm_u32x4_shr(vnonsign_hi, 3), vexp_offset), vexp_scale); |
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const v128_t vdenorm_lo = wasm_f32x4_sub(wasm_v128_or(wasm_u32x4_shr(vnonsign_lo, 16), vmagic_bias), vmagic_bias); |
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const v128_t vdenorm_hi = wasm_f32x4_sub(wasm_v128_or(wasm_u32x4_shr(vnonsign_hi, 16), vmagic_bias), vmagic_bias); |
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const v128_t vxmask_lo = wasm_i32x4_gt(vnonsign_lo, vdenorm_cutoff); |
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const v128_t vxmask_hi = wasm_i32x4_gt(vnonsign_hi, vdenorm_cutoff); |
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const v128_t vf_lo = wasm_v128_or(vsign_lo, wasm_v128_bitselect(vnorm_lo, vdenorm_lo, vxmask_lo)); |
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const v128_t vf_hi = wasm_v128_or(vsign_hi, wasm_v128_bitselect(vnorm_hi, vdenorm_hi, vxmask_hi)); |
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wasm_v128_store(output, vf_lo); |
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wasm_v128_store(output + 4, vf_hi); |
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output += 8; |
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} |
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if XNN_UNLIKELY(batch != 0) { |
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assert(batch >= 1 * sizeof(uint16_t)); |
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assert(batch <= 7 * sizeof(uint16_t)); |
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const v128_t vh = wasm_v128_load(i); |
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const v128_t vzero = wasm_i16x8_const_splat(0); |
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const v128_t vw_lo = wasm_v16x8_shuffle(vzero, vh, 0, 8, 1, 9, 2, 10, 3, 11); |
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const v128_t vw_hi = wasm_v16x8_shuffle(vzero, vh, 4, 12, 5, 13, 6, 14, 7, 15); |
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const v128_t vsign_lo = wasm_v128_and(vw_lo, vsign_mask); |
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const v128_t vsign_hi = wasm_v128_and(vw_hi, vsign_mask); |
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const v128_t vnonsign_lo = wasm_v128_xor(vw_lo, vsign_lo); |
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const v128_t vnonsign_hi = wasm_v128_xor(vw_hi, vsign_hi); |
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const v128_t vnorm_lo = wasm_f32x4_mul(wasm_i32x4_add(wasm_u32x4_shr(vnonsign_lo, 3), vexp_offset), vexp_scale); |
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const v128_t vnorm_hi = wasm_f32x4_mul(wasm_i32x4_add(wasm_u32x4_shr(vnonsign_hi, 3), vexp_offset), vexp_scale); |
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const v128_t vdenorm_lo = wasm_f32x4_sub(wasm_v128_or(wasm_u32x4_shr(vnonsign_lo, 16), vmagic_bias), vmagic_bias); |
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const v128_t vdenorm_hi = wasm_f32x4_sub(wasm_v128_or(wasm_u32x4_shr(vnonsign_hi, 16), vmagic_bias), vmagic_bias); |
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const v128_t vxmask_lo = wasm_i32x4_gt(vnonsign_lo, vdenorm_cutoff); |
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v128_t vf = wasm_v128_or(vsign_lo, wasm_v128_bitselect(vnorm_lo, vdenorm_lo, vxmask_lo)); |
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if (batch & (4 * sizeof(uint16_t))) { |
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wasm_v128_store(output, vf); |
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output += 4; |
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const v128_t vxmask_hi = wasm_i32x4_gt(vnonsign_hi, vdenorm_cutoff); |
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vf = wasm_v128_or(vsign_hi, wasm_v128_bitselect(vnorm_hi, vdenorm_hi, vxmask_hi)); |
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} |
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if (batch & (2 * sizeof(uint16_t))) { |
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wasm_v128_store64_lane(output, vf, 0); |
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vf = wasm_v64x2_shuffle(vf, vf, 1, 1); |
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output += 2; |
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} |
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if (batch & (1 * sizeof(uint16_t))) { |
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wasm_v128_store32_lane(output, vf, 0); |
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} |
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} |
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} |
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