src/f16-dwconv2d-chw/3x3p1-neonfp16arith.c.in

// Copyright 2020 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.

$assert ROW_TILE >= 1
$assert ACCUMULATORS >= 1
#include <assert.h>

#include <arm_neon.h>

#include <xnnpack/dwconv.h>
#include <xnnpack/intrinsics-polyfill.h>
#include <xnnpack/math.h>


void xnn_f16_dwconv2d_chw_ukernel_3x3p1__neonfp16arith_${ROW_TILE}x8${"_acc%d" % ACCUMULATORS if ACCUMULATORS > 1 else ""}(
    size_t input_height,
    size_t input_width,
    const void* input,
    const void* weights,
    const void* zero,
    void* output,
    uint32_t padding_top,
    const union xnn_f16_chw_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
{
  assert(input_height != 0);
  assert(input_width != 0);
  assert(input_width % sizeof(uint16_t) == 0);
  assert(padding_top == 1);

  #if XNN_ARCH_ARM64
    const uint16x8x2_t vminmax = vld2q_dup_u16(&params->neonfp16arith_stride1.min);
    const float16x8_t vmin = vreinterpretq_f16_u16(vminmax.val[0]);
    const float16x8_t vmax = vreinterpretq_f16_u16(vminmax.val[1]);
  #else
    // vld2_dup is to work around aarch32 clang bug with vld1q_dup
    const uint16x4x2_t vminmax = vld2_dup_u16(&params->neonfp16arith_stride1.min);
    const float16x8_t vmin = vreinterpretq_f16_u16(vcombine_u16(vminmax.val[0], vminmax.val[0]));
    const float16x8_t vmax = vreinterpretq_f16_u16(vcombine_u16(vminmax.val[1], vminmax.val[1]));
  #endif
  const uint16x8_t vmask = vld1q_u16(params->neonfp16arith_stride1.mask);

  const uint16_t* w = (const uint16_t*) weights;
  const float16x8_t vw01234567 = vreinterpretq_f16_u16(vld1q_u16(w));
  const float16x4_t vw89 = vreinterpret_f16_u32(vld1_dup_u32((const void*) (w + 8)));

  const size_t input_decrement = round_up_po2(input_width, 8 * sizeof(uint16_t));

  const uint16_t* i0 = zero;
  const uint16_t* i1 = input;
  $for M in range(2, 2 + ROW_TILE):
    const uint16_t* i${M} = (const uint16_t*) ((uintptr_t) i${M-1} + input_width);

  uint16_t* o0 = output;
  $for M in range(1, ROW_TILE):
    uint16_t* o${M} = (uint16_t*) ((uintptr_t) o${M-1} + input_width);

  size_t output_height = input_height;
  do {
    $for M in range(2, 2 + ROW_TILE):
      if XNN_UNPREDICTABLE(output_height < ${M}) {
        i${M} = zero;
        $if M <= ROW_TILE:
          o${M-1} = o${M-2};
      }

    $for M in range(2 + ROW_TILE):
      float16x8_t vi${M}x01234567 = vreinterpretq_f16_u16(vmovq_n_u16(0));

    $for M in range(2 + ROW_TILE):
      float16x8_t vi${M}x89ABCDEF = vreinterpretq_f16_u16(vld1q_u16(i${M})); i${M} += 8;

    size_t w = input_width;
    for (; w > 8 * sizeof(uint16_t); w -= 8 * sizeof(uint16_t)) {
      $for M in range(ROW_TILE):
        float16x8_t vo${M}p0 = vdupq_lane_f16(vget_low_f16(vw01234567), 0);

      $for M in range(2 + ROW_TILE):
        const float16x8_t vi${M}xGHIJKLMN = vreinterpretq_f16_u16(vld1q_u16(i${M})); i${M} += 8;

      // Center column
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p0 = vfmaq_laneq_f16(vo${M}p0, vi${M}x89ABCDEF, vw01234567, 2);
        #else
          vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M}x89ABCDEF, vget_low_f16(vw01234567), 2);
        #endif
      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 2:
          float16x8_t vo${M}p1 = vmulq_lane_f16(vi${M+1}x89ABCDEF, vget_high_f16(vw01234567), 1);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p0 = vfmaq_laneq_f16(vo${M}p0, vi${M+1}x89ABCDEF, vw01234567, 5);
          #else
            vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M+1}x89ABCDEF, vget_high_f16(vw01234567), 1);
          #endif
      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 3:
          float16x8_t vo${M}p2 = vmulq_lane_f16(vi${M+2}x89ABCDEF, vw89, 0);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p0 = vfmaq_lane_f16(vo${M}p0, vi${M+2}x89ABCDEF, vw89, 0);
          #else
            vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M+2}x89ABCDEF, vw89, 0);
          #endif
      // Left column
      $for M in range(2 + ROW_TILE):
        const float16x8_t vi${M}x789ABCDE = vextq_f16(vi${M}x01234567, vi${M}x89ABCDEF, 7);

      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 4:
          float16x8_t vo${M}p3 = vmulq_lane_f16(vi${M}x789ABCDE, vget_low_f16(vw01234567), 1);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p${3 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${3 % ACCUMULATORS}, vi${M}x789ABCDE, vw01234567, 1);
          #else
            vo${M}p${3 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${3 % ACCUMULATORS}, vi${M}x789ABCDE, vget_low_f16(vw01234567), 1);
          #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${4 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${4 % ACCUMULATORS}, vi${M+1}x789ABCDE, vw01234567, 4);
        #else
          vo${M}p${4 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${4 % ACCUMULATORS}, vi${M+1}x789ABCDE, vget_high_f16(vw01234567), 0);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${5 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${5 % ACCUMULATORS}, vi${M+2}x789ABCDE, vw01234567, 7);
        #else
          vo${M}p${5 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${5 % ACCUMULATORS}, vi${M+2}x789ABCDE, vget_high_f16(vw01234567), 3);
        #endif
      $for M in range(2 + ROW_TILE):
        vi${M}x01234567 = vi${M}x89ABCDEF;

      // Right column
      $for M in range(2 + ROW_TILE):
        const float16x8_t vi${M}x9ABCDEFG = vextq_f16(vi${M}x89ABCDEF, vi${M}xGHIJKLMN, 1);

      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${6 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${6 % ACCUMULATORS}, vi${M}x9ABCDEFG, vw01234567, 3);
        #else
          vo${M}p${6 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${6 % ACCUMULATORS}, vi${M}x9ABCDEFG, vget_low_f16(vw01234567), 3);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${7 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${7 % ACCUMULATORS}, vi${M+1}x9ABCDEFG, vw01234567, 6);
        #else
          vo${M}p${7 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${7 % ACCUMULATORS}, vi${M+1}x9ABCDEFG, vget_high_f16(vw01234567), 2);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${8 % ACCUMULATORS} = vfmaq_lane_f16(vo${M}p${8 % ACCUMULATORS}, vi${M+2}x9ABCDEFG, vw89, 1);
        #else
          vo${M}p${8 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${8 % ACCUMULATORS}, vi${M+2}x9ABCDEFG, vw89, 1);
        #endif
      $for M in range(2 + ROW_TILE):
        vi${M}x89ABCDEF = vi${M}xGHIJKLMN;

      $if ACCUMULATORS > 1:
        $ACC_SLICE = 1
        $while ACC_SLICE < ACCUMULATORS:
          $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
            $if A + ACC_SLICE < ACCUMULATORS:
              $for M in range(ROW_TILE):
                vo${M}p${A} = vaddq_f16(vo${M}p${A}, vo${M}p${A + ACC_SLICE});
          $ACC_SLICE *= 2

      $for M in range(ROW_TILE):
        float16x8_t vo${M} = vmaxq_f16(vo${M}p0, vmin);

      $for M in range(ROW_TILE):
        vo${M} = vminq_f16(vo${M}, vmax);

      $for M in reversed(range(ROW_TILE)):
        vst1q_u16(o${M}, vreinterpretq_u16_f16(vo${M})); o${M} += 8;
    }

    // Always process the last block of 1..8 pixels.
    assert(w >= 1 * sizeof(uint16_t));
    assert(w <= 8 * sizeof(uint16_t));
    {
      $for M in range(ROW_TILE):
        float16x8_t vo${M}p0 = vdupq_lane_f16(vget_low_f16(vw01234567), 0);

      $for M in range(2 + ROW_TILE):
        vi${M}x89ABCDEF = vreinterpretq_f16_u16(vandq_u16(vmask, vreinterpretq_u16_f16(vi${M}x89ABCDEF)));

      // Center column
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p0 = vfmaq_laneq_f16(vo${M}p0, vi${M}x89ABCDEF, vw01234567, 2);
        #else
          vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M}x89ABCDEF, vget_low_f16(vw01234567), 2);
        #endif
      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 2:
          float16x8_t vo${M}p1 = vmulq_lane_f16(vi${M+1}x89ABCDEF, vget_high_f16(vw01234567), 1);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p0 = vfmaq_laneq_f16(vo${M}p0, vi${M+1}x89ABCDEF, vw01234567, 5);
          #else
            vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M+1}x89ABCDEF, vget_high_f16(vw01234567), 1);
          #endif
      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 3:
          float16x8_t vo${M}p2 = vmulq_lane_f16(vi${M+2}x89ABCDEF, vw89, 0);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p0 = vfmaq_lane_f16(vo${M}p0, vi${M+2}x89ABCDEF, vw89, 0);
          #else
            vo${M}p0 = vmlaq_lane_f16(vo${M}p0, vi${M+2}x89ABCDEF, vw89, 0);
          #endif
      // Left column
      $for M in range(2 + ROW_TILE):
        const float16x8_t vi${M}x789ABCDE = vextq_f16(vi${M}x01234567, vi${M}x89ABCDEF, 7);

      $for M in range(ROW_TILE):
        $if ACCUMULATORS >= 4:
          float16x8_t vo${M}p3 = vmulq_lane_f16(vi${M}x789ABCDE, vget_low_f16(vw01234567), 1);
        $else:
          #if XNN_ARCH_ARM64
            vo${M}p${3 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${3 % ACCUMULATORS}, vi${M}x789ABCDE, vw01234567, 1);
          #else
            vo${M}p${3 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${3 % ACCUMULATORS}, vi${M}x789ABCDE, vget_low_f16(vw01234567), 1);
          #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${4 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${4 % ACCUMULATORS}, vi${M+1}x789ABCDE, vw01234567, 4);
        #else
          vo${M}p${4 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${4 % ACCUMULATORS}, vi${M+1}x789ABCDE, vget_high_f16(vw01234567), 0);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${5 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${5 % ACCUMULATORS}, vi${M+2}x789ABCDE, vw01234567, 7);
        #else
          vo${M}p${5 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${5 % ACCUMULATORS}, vi${M+2}x789ABCDE, vget_high_f16(vw01234567), 3);
        #endif
      // Right column
      const float16x8_t vzero = vreinterpretq_f16_u16(vmovq_n_u16(0));
      $for M in range(2 + ROW_TILE):
        const float16x8_t vi${M}x9ABCDEFG = vextq_f16(vi${M}x89ABCDEF, vzero, 1);

      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${6 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${6 % ACCUMULATORS}, vi${M}x9ABCDEFG, vw01234567, 3);
        #else
          vo${M}p${6 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${6 % ACCUMULATORS}, vi${M}x9ABCDEFG, vget_low_f16(vw01234567), 3);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${7 % ACCUMULATORS} = vfmaq_laneq_f16(vo${M}p${7 % ACCUMULATORS}, vi${M+1}x9ABCDEFG, vw01234567, 6);
        #else
          vo${M}p${7 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${7 % ACCUMULATORS}, vi${M+1}x9ABCDEFG, vget_high_f16(vw01234567), 2);
        #endif
      $for M in range(ROW_TILE):
        #if XNN_ARCH_ARM64
          vo${M}p${8 % ACCUMULATORS} = vfmaq_lane_f16(vo${M}p${8 % ACCUMULATORS}, vi${M+2}x9ABCDEFG, vw89, 1);
        #else
          vo${M}p${8 % ACCUMULATORS} = vmlaq_lane_f16(vo${M}p${8 % ACCUMULATORS}, vi${M+2}x9ABCDEFG, vw89, 1);
        #endif
      $if ACCUMULATORS > 1:
        $ACC_SLICE = 1
        $while ACC_SLICE < ACCUMULATORS:
          $for A in range(0, ACCUMULATORS, ACC_SLICE * 2):
            $if A + ACC_SLICE < ACCUMULATORS:
              $for M in range(ROW_TILE):
                vo${M}p${A} = vaddq_f16(vo${M}p${A}, vo${M}p${A + ACC_SLICE});
          $ACC_SLICE *= 2

      $for M in range(ROW_TILE):
        float16x8_t vo${M} = vmaxq_f16(vo${M}p0, vmin);

      $for M in range(ROW_TILE):
        vo${M} = vminq_f16(vo${M}, vmax);

      if XNN_LIKELY(w == 8 * sizeof(uint16_t)) {
        $for M in reversed(range(ROW_TILE)):
          vst1q_u16(o${M}, vreinterpretq_u16_f16(vo${M})); o${M} += 8;
      } else {
        $for M in reversed(range(ROW_TILE)):
          float16x4_t vo${M}_lo = vget_low_f16(vo${M});

        if (w & (4 * sizeof(uint16_t))) {
         $for M in reversed(range(ROW_TILE)):
            vst1_u16(o${M}, vreinterpret_u16_f16(vo${M}_lo)); o${M} += 4;

          $for M in reversed(range(ROW_TILE)):
            vo${M}_lo = vget_high_f16(vo${M});
        }
        if (w & (2 * sizeof(uint16_t))) {
          $for M in reversed(range(ROW_TILE)):
            vst1_lane_u32((void*) o${M}, vreinterpret_u32_f16(vo${M}_lo), 0); o${M} += 2;

          $for M in range(ROW_TILE):
            vo${M}_lo = vext_f16(vo${M}_lo, vo${M}_lo, 2);
        }
        if (w & (1 * sizeof(uint16_t))) {
          $for M in reversed(range(ROW_TILE)):
            vst1_lane_u16(o${M}, vreinterpret_u16_f16(vo${M}_lo), 0); o${M} += 1;
        }
      }
    }

    i0 = (const uint16_t*) ((uintptr_t) i${ROW_TILE} - input_decrement);
    i1 = (const uint16_t*) ((uintptr_t) i${ROW_TILE+1} - input_decrement);
    $for M in range(2, 2 + ROW_TILE):
      i${M} = (const uint16_t*) ((uintptr_t) i${M-1} + input_width);

    $if ROW_TILE > 1:
      o0 = o${ROW_TILE - 1};
      $for M in range(1, ROW_TILE):
        o${M} = (uint16_t*) ((uintptr_t) o${M-1} + input_width);

    $if ROW_TILE > 1:
      output_height = doz(output_height, ${ROW_TILE});
  } while (${"--" if ROW_TILE == 1 else ""}output_height != 0);
}