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// Copyright 2023 Google LLC
//
// This source code is licensed under the BSD-style license found in the
// LICENSE file in the root directory of this source tree.
$assert (P, H) in [(3, 2)]
$assert not PS or (P, H) == (4, 3)
$assert DIV in ["DIV", "RECPEADJ", "NR1RECPS", "NR1FMA"]
$assert BATCH_TILE % 8 == 0
$assert BATCH_TILE >= 8
$SIMD_TILE = BATCH_TILE // 8
$ABC = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"
#include <assert.h>
#include <arm_neon.h>
#include <xnnpack/common.h>
#include <xnnpack/microparams.h>
$POLY_SUFFIX = "p%dh%d%s" % (P, H, "ps" if PS else "ts")
$DIV_SUFFIX = DIV.lower()
$ISA = "aarch64_neonfp16arith" if DIV == "DIV" else "neonfp16arith"
void xnn_f16_vtanh_ukernel__${ISA}_expm1minus_rr1_${POLY_SUFFIX}_${DIV_SUFFIX}_x${BATCH_TILE}(
size_t n,
const void* input,
void* output,
const union xnn_f16_tanh_params params[restrict XNN_MIN_ELEMENTS(1)]) XNN_OOB_READS
{
assert(n != 0);
assert(n % sizeof(uint16_t) == 0);
assert(input != NULL);
assert(output != NULL);
const float16x8_t vsat_cutoff = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0x4482)));
const float16x8_t vmagic_bias = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0x620F)));
const float16x8_t vminus_log2e = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0xBDC5)));
const float16x8_t vln2 = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0x398C)));
const float16x8_t vc3 = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0xBD5B)));
const float16x8_t vc2 = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0x4008)));
const float16x8_t vtwo = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0x4000)));
const float16x8_t vminus_one = vreinterpretq_f16_u16(vmovq_n_u16(UINT16_C(0xBC00)));
const uint16x8_t vsign_mask = vmovq_n_u16(UINT16_C(0x8000));
const uint16_t* i = (const uint16_t*) input;
uint16_t* o = (uint16_t*) output;
$for SIMD_TILE_LEVEL in (SIMD_TILE, 1) if SIMD_TILE > 1 else (1,):
$if SIMD_TILE_LEVEL == 1:
$ABC = ["" for a in ABC]
for (; n >= ${SIMD_TILE_LEVEL} * sizeof(float16x8_t); n -= ${SIMD_TILE_LEVEL} * sizeof(float16x8_t)) {
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vx${ABC[N]} = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8;
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vz${ABC[N]} = vabsq_f16(vx${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vz${ABC[N]} = vminq_f16(vz${ABC[N]}, vsat_cutoff);
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vn${ABC[N]} = vfmaq_f16(vmagic_bias, vz${ABC[N]}, vminus_log2e);
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vs${ABC[N]} = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn${ABC[N]}), 10));
vn${ABC[N]} = vsubq_f16(vn${ABC[N]}, vmagic_bias);
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vt${ABC[N]} = vfmaq_f16(vz${ABC[N]}, vn${ABC[N]}, vln2);
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vp${ABC[N]} = vfmaq_f16(vc${P-1}, vc${P}, vt${ABC[N]});
$for i in reversed(range(2, P - 1)):
$for N in range(SIMD_TILE_LEVEL):
vp${ABC[N]} = vfmaq_f16(vc${i}, vp${ABC[N]}, vt${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vp${ABC[N]} = vfmsq_f16(vtwo, vp${ABC[N]}, vt${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vts${ABC[N]} = vmulq_f16(vt${ABC[N]}, vs${ABC[N]});
const float16x8_t vsmo${ABC[N]} = vaddq_f16(vs${ABC[N]}, vminus_one);
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vemo${ABC[N]} = vfmsq_f16(vsmo${ABC[N]}, vp${ABC[N]}, vts${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vepo${ABC[N]} = vaddq_f16(vemo${ABC[N]}, vtwo);
$if DIV == "DIV":
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vy${ABC[N]} = vdivq_f16(vemo${ABC[N]}, vepo${ABC[N]});
$else:
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vrepo${ABC[N]} = vrecpeq_f16(vepo${ABC[N]});
$if DIV.startswith("NR1RECPS"):
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t verepo${ABC[N]} = vrecpsq_f16(vrepo${ABC[N]}, vepo${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vrepo${ABC[N]} = vmulq_f16(vrepo${ABC[N]}, verepo${ABC[N]});
$elif DIV.startswith("NR1FMA"):
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t verepo${ABC[N]} = vfmaq_f16(vminus_one, vrepo${ABC[N]}, vepo${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vrepo${ABC[N]} = vfmsq_f16(vrepo${ABC[N]}, vrepo${ABC[N]}, verepo${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
float16x8_t vy${ABC[N]} = vmulq_f16(vemo${ABC[N]}, vrepo${ABC[N]});
$if DIV.endswith("ADJ"):
$for N in range(SIMD_TILE_LEVEL):
const float16x8_t vey${ABC[N]} = vfmsq_f16(vemo${ABC[N]}, vy${ABC[N]}, vepo${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vy${ABC[N]} = vfmaq_f16(vy${ABC[N]}, vey${ABC[N]}, vrepo${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vy${ABC[N]} = vbslq_f16(vsign_mask, vx${ABC[N]}, vy${ABC[N]});
$for N in range(SIMD_TILE_LEVEL):
vst1q_u16(o, vreinterpretq_u16_f16(vy${ABC[N]})); o += 8;
}
if (n != 0) {
const float16x8_t vx = vreinterpretq_f16_u16(vld1q_u16(i)); i += 8;
float16x8_t vz = vabsq_f16(vx);
vz = vminq_f16(vz, vsat_cutoff);
float16x8_t vn = vfmaq_f16(vmagic_bias, vz, vminus_log2e);
const float16x8_t vs = vreinterpretq_f16_s16(vshlq_n_s16(vreinterpretq_s16_f16(vn), 10));
vn = vsubq_f16(vn, vmagic_bias);
const float16x8_t vt = vfmaq_f16(vz, vn, vln2);
float16x8_t vp = vfmaq_f16(vc${P-1}, vc${P}, vt);
$for i in reversed(range(2, P - 1)):
vp = vfmaq_f16(vc${i}, vp, vt);
vp = vfmsq_f16(vtwo, vp, vt);
const float16x8_t vts = vmulq_f16(vt, vs);
const float16x8_t vsmo = vaddq_f16(vs, vminus_one);
const float16x8_t vemo = vfmsq_f16(vsmo, vp, vts);
const float16x8_t vepo = vaddq_f16(vemo, vtwo);
$if DIV == "DIV":
float16x8_t vy = vdivq_f16(vemo, vepo);
$else:
float16x8_t vrepo = vrecpeq_f16(vepo);
$if DIV.startswith("NR1RECPS"):
const float16x8_t verepo = vrecpsq_f16(vrepo, vepo);
vrepo = vmulq_f16(vrepo, verepo);
$elif DIV.startswith("NR1FMA"):
const float16x8_t verepo = vfmaq_f16(vminus_one, vrepo, vepo);
vrepo = vfmsq_f16(vrepo, vrepo, verepo);
float16x8_t vy = vmulq_f16(vemo, vrepo);
$if DIV.endswith("ADJ"):
const float16x8_t vey = vfmsq_f16(vemo, vy, vepo);
vy = vfmaq_f16(vy, vey, vrepo);
vy = vbslq_f16(vsign_mask, vx, vy);
float16x4_t vy_lo = vget_low_f16(vy);
if (n & 4 * sizeof(uint16_t)) {
vst1_u16(o, vreinterpret_u16_f16(vy_lo)); o += 4;
vy_lo = vget_high_f16(vy);
}
if (n & 2 * sizeof(uint16_t)) {
vst1_lane_u32((void*) o, vreinterpret_u32_f16(vy_lo), 0); o+= 2;
vy_lo = vext_f16(vy_lo, vy_lo, 2);
}
if (n & 1 * sizeof(uint16_t)) {
vst1_lane_u16(o, vreinterpret_u16_f16(vy_lo), 0);
}
}
}
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